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* [PATCH 1/2] dt-bindings: serial: renesas,scif: Update compatible string for RZ/G2UL SoC
@ 2022-03-03  8:59 Biju Das
  2022-03-03  8:59 ` [PATCH 2/2] dt-bindings: serial: renesas,sci: " Biju Das
  2022-03-03  9:06 ` [PATCH 1/2] dt-bindings: serial: renesas,scif: " Geert Uytterhoeven
  0 siblings, 2 replies; 9+ messages in thread
From: Biju Das @ 2022-03-03  8:59 UTC (permalink / raw)
  To: Greg Kroah-Hartman, Rob Herring
  Cc: Biju Das, Geert Uytterhoeven, linux-serial, devicetree,
	Chris Paterson, Biju Das, Prabhakar Mahadev Lad,
	linux-renesas-soc

Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043.
To distinguish between them update the compatible string to
"renesas,scif-r9a07g043u" for RZ/G2UL SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 Documentation/devicetree/bindings/serial/renesas,scif.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
index 5d37f8f189fb..9485cb5de2c8 100644
--- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
@@ -76,7 +76,7 @@ properties:
 
       - items:
           - enum:
-              - renesas,scif-r9a07g043      # RZ/G2UL
+              - renesas,scif-r9a07g043u     # RZ/G2UL
               - renesas,scif-r9a07g054      # RZ/V2L
           - const: renesas,scif-r9a07g044   # RZ/G2{L,LC} fallback
 
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [PATCH 2/2] dt-bindings: serial: renesas,sci: Update compatible string for RZ/G2UL SoC
  2022-03-03  8:59 [PATCH 1/2] dt-bindings: serial: renesas,scif: Update compatible string for RZ/G2UL SoC Biju Das
@ 2022-03-03  8:59 ` Biju Das
  2022-03-03  9:06   ` Geert Uytterhoeven
  2022-03-03  9:06 ` [PATCH 1/2] dt-bindings: serial: renesas,scif: " Geert Uytterhoeven
  1 sibling, 1 reply; 9+ messages in thread
From: Biju Das @ 2022-03-03  8:59 UTC (permalink / raw)
  To: Greg Kroah-Hartman, Rob Herring
  Cc: Biju Das, Geert Uytterhoeven, linux-serial, devicetree,
	Chris Paterson, Biju Das, Prabhakar Mahadev Lad,
	linux-renesas-soc

Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043.
To distinguish between them update the compatible string to
"renesas,r9a07g043u-sci" for RZ/G2UL SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 Documentation/devicetree/bindings/serial/renesas,sci.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/serial/renesas,sci.yaml b/Documentation/devicetree/bindings/serial/renesas,sci.yaml
index bf7708a7a2c0..49a8285ad604 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml
@@ -17,7 +17,7 @@ properties:
     oneOf:
       - items:
           - enum:
-              - renesas,r9a07g043-sci     # RZ/G2UL
+              - renesas,r9a07g043u-sci    # RZ/G2UL
               - renesas,r9a07g044-sci     # RZ/G2{L,LC}
               - renesas,r9a07g054-sci     # RZ/V2L
           - const: renesas,sci            # generic SCI compatible UART
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* Re: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update compatible string for RZ/G2UL SoC
  2022-03-03  8:59 ` [PATCH 2/2] dt-bindings: serial: renesas,sci: " Biju Das
@ 2022-03-03  9:06   ` Geert Uytterhoeven
  2022-03-03  9:53     ` Biju Das
  0 siblings, 1 reply; 9+ messages in thread
From: Geert Uytterhoeven @ 2022-03-03  9:06 UTC (permalink / raw)
  To: Biju Das
  Cc: Greg Kroah-Hartman, Rob Herring, Geert Uytterhoeven,
	open list:SERIAL DRIVERS,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Chris Paterson, Biju Das, Prabhakar Mahadev Lad, Linux-Renesas

Hi Biju,

On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043.
> To distinguish between them update the compatible string to
> "renesas,r9a07g043u-sci" for RZ/G2UL SoC.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml
> @@ -17,7 +17,7 @@ properties:
>      oneOf:
>        - items:
>            - enum:
> -              - renesas,r9a07g043-sci     # RZ/G2UL
> +              - renesas,r9a07g043u-sci    # RZ/G2UL

Is this really needed? As far as we know, RZ/Five and RZ/G2UL
do use the same I/O blocks?

>                - renesas,r9a07g044-sci     # RZ/G2{L,LC}
>                - renesas,r9a07g054-sci     # RZ/V2L
>            - const: renesas,sci            # generic SCI compatible UART

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH 1/2] dt-bindings: serial: renesas,scif: Update compatible string for RZ/G2UL SoC
  2022-03-03  8:59 [PATCH 1/2] dt-bindings: serial: renesas,scif: Update compatible string for RZ/G2UL SoC Biju Das
  2022-03-03  8:59 ` [PATCH 2/2] dt-bindings: serial: renesas,sci: " Biju Das
@ 2022-03-03  9:06 ` Geert Uytterhoeven
  2022-03-03  9:54   ` Biju Das
  1 sibling, 1 reply; 9+ messages in thread
From: Geert Uytterhoeven @ 2022-03-03  9:06 UTC (permalink / raw)
  To: Biju Das
  Cc: Greg Kroah-Hartman, Rob Herring, Geert Uytterhoeven,
	open list:SERIAL DRIVERS,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Chris Paterson, Biju Das, Prabhakar Mahadev Lad, Linux-Renesas

Hi Biju,

On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043.
> To distinguish between them update the compatible string to
> "renesas,scif-r9a07g043u" for RZ/G2UL SoC.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> @@ -76,7 +76,7 @@ properties:
>
>        - items:
>            - enum:
> -              - renesas,scif-r9a07g043      # RZ/G2UL
> +              - renesas,scif-r9a07g043u     # RZ/G2UL

Is this really needed? As far as we know, RZ/Five and RZ/G2UL
do use the same I/O blocks?

>                - renesas,scif-r9a07g054      # RZ/V2L
>            - const: renesas,scif-r9a07g044   # RZ/G2{L,LC} fallback

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 9+ messages in thread

* RE: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update compatible string for RZ/G2UL SoC
  2022-03-03  9:06   ` Geert Uytterhoeven
@ 2022-03-03  9:53     ` Biju Das
  2022-03-03 10:20       ` Geert Uytterhoeven
  0 siblings, 1 reply; 9+ messages in thread
From: Biju Das @ 2022-03-03  9:53 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Greg Kroah-Hartman, Rob Herring, Geert Uytterhoeven,
	open list:SERIAL DRIVERS,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Chris Paterson, Biju Das, Prabhakar Mahadev Lad, Linux-Renesas

Hi Geert,

Thanks for the feedback.

> Subject: Re: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update
> compatible string for RZ/G2UL SoC
> 
> Hi Biju,
> 
> On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043.
> > To distinguish between them update the compatible string to
> > "renesas,r9a07g043u-sci" for RZ/G2UL SoC.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Thanks for your patch!
> 
> > --- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml
> > +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml
> > @@ -17,7 +17,7 @@ properties:
> >      oneOf:
> >        - items:
> >            - enum:
> > -              - renesas,r9a07g043-sci     # RZ/G2UL
> > +              - renesas,r9a07g043u-sci    # RZ/G2UL
> 
> Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the
> same I/O blocks?

OK, Just thought their DEVID is different and they use RISC-V instead of ARM64.
I agree it uses identical IP blocks.

May be I can drop this patch, if it is not really needed. Please let me know.

Cheers,
Biju

> 
> >                - renesas,r9a07g044-sci     # RZ/G2{L,LC}
> >                - renesas,r9a07g054-sci     # RZ/V2L
> >            - const: renesas,sci            # generic SCI compatible UART
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
> 
> In personal conversations with technical people, I call myself a hacker.
> But when I'm talking to journalists I just say "programmer" or something
> like that.
>                                 -- Linus Torvalds

^ permalink raw reply	[flat|nested] 9+ messages in thread

* RE: [PATCH 1/2] dt-bindings: serial: renesas,scif: Update compatible string for RZ/G2UL SoC
  2022-03-03  9:06 ` [PATCH 1/2] dt-bindings: serial: renesas,scif: " Geert Uytterhoeven
@ 2022-03-03  9:54   ` Biju Das
  2022-03-03 10:25     ` Geert Uytterhoeven
  0 siblings, 1 reply; 9+ messages in thread
From: Biju Das @ 2022-03-03  9:54 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Greg Kroah-Hartman, Rob Herring, Geert Uytterhoeven,
	open list:SERIAL DRIVERS,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Chris Paterson, Biju Das, Prabhakar Mahadev Lad, Linux-Renesas

Hi Geert,

Thanks for the feedback

> Subject: Re: [PATCH 1/2] dt-bindings: serial: renesas,scif: Update
> compatible string for RZ/G2UL SoC
> 
> Hi Biju,
> 
> On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043.
> > To distinguish between them update the compatible string to
> > "renesas,scif-r9a07g043u" for RZ/G2UL SoC.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Thanks for your patch!
> 
> > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > @@ -76,7 +76,7 @@ properties:
> >
> >        - items:
> >            - enum:
> > -              - renesas,scif-r9a07g043      # RZ/G2UL
> > +              - renesas,scif-r9a07g043u     # RZ/G2UL
> 
> Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the
> same I/O blocks?

OK, Just thought their DEVID is different and they use RISC-V instead of ARM64.
I agree it uses identical IP blocks.

May be I can drop this patch, if it is not really needed. Please let me know.

Cheers,
Biju

> 
> >                - renesas,scif-r9a07g054      # RZ/V2L
> >            - const: renesas,scif-r9a07g044   # RZ/G2{L,LC} fallback
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
> 
> In personal conversations with technical people, I call myself a hacker.
> But when I'm talking to journalists I just say "programmer" or something
> like that.
>                                 -- Linus Torvalds

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update compatible string for RZ/G2UL SoC
  2022-03-03  9:53     ` Biju Das
@ 2022-03-03 10:20       ` Geert Uytterhoeven
  2022-03-03 10:48         ` Biju Das
  0 siblings, 1 reply; 9+ messages in thread
From: Geert Uytterhoeven @ 2022-03-03 10:20 UTC (permalink / raw)
  To: Biju Das
  Cc: Greg Kroah-Hartman, Rob Herring, open list:SERIAL DRIVERS,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Chris Paterson, Biju Das, Prabhakar Mahadev Lad, Linux-Renesas

Hi Biju,

On Thu, Mar 3, 2022 at 10:53 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Subject: Re: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update
> > compatible string for RZ/G2UL SoC
> > On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com>
> > wrote:
> > > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043.
> > > To distinguish between them update the compatible string to
> > > "renesas,r9a07g043u-sci" for RZ/G2UL SoC.
> > >
> > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Thanks for your patch!
> >
> > > --- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml
> > > +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml
> > > @@ -17,7 +17,7 @@ properties:
> > >      oneOf:
> > >        - items:
> > >            - enum:
> > > -              - renesas,r9a07g043-sci     # RZ/G2UL
> > > +              - renesas,r9a07g043u-sci    # RZ/G2UL
> >
> > Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the
> > same I/O blocks?
>
> OK, Just thought their DEVID is different and they use RISC-V instead of ARM64.
> I agree it uses identical IP blocks.
>
> May be I can drop this patch, if it is not really needed. Please let me know.

I think it is not needed. We used the same compatible values
("r8a7778") for R-Car M1A (R8A77781, SH-4A + CA9) and M1S (R8A77780,
SH-4A only), too, (probably not by design, as we never supported the
latter under arch/sh/ ;-)

We do need a different top-level compatible value for the RZ/Five SoC,
like we already have for the RZ/G2UL variants:

      - description: RZ/G2UL (R9A07G043)
        items:
          - enum:
              - renesas,r9a07g043u11 # RZ/G2UL Type-1
              - renesas,r9a07g043u12 # RZ/G2UL Type-2
          - const: renesas,r9a07g043

So if we ever have an issue due to a difference, we can handle that
through soc_device_match(), just like for RZ/V2L vs. RZ/G2L.

BTW, I guess RZ/G2UL Type-1 and Type-2 do have the same DEVID, and
only differ in PRR?

Any other opinions?
Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH 1/2] dt-bindings: serial: renesas,scif: Update compatible string for RZ/G2UL SoC
  2022-03-03  9:54   ` Biju Das
@ 2022-03-03 10:25     ` Geert Uytterhoeven
  0 siblings, 0 replies; 9+ messages in thread
From: Geert Uytterhoeven @ 2022-03-03 10:25 UTC (permalink / raw)
  To: Biju Das
  Cc: Greg Kroah-Hartman, Rob Herring, open list:SERIAL DRIVERS,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Chris Paterson, Biju Das, Prabhakar Mahadev Lad, Linux-Renesas

Hi Biju,

On Thu, Mar 3, 2022 at 10:55 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Subject: Re: [PATCH 1/2] dt-bindings: serial: renesas,scif: Update
> > compatible string for RZ/G2UL SoC
> > On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com>
> > wrote:
> > > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043.
> > > To distinguish between them update the compatible string to
> > > "renesas,scif-r9a07g043u" for RZ/G2UL SoC.
> > >
> > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Thanks for your patch!
> >
> > > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > @@ -76,7 +76,7 @@ properties:
> > >
> > >        - items:
> > >            - enum:
> > > -              - renesas,scif-r9a07g043      # RZ/G2UL
> > > +              - renesas,scif-r9a07g043u     # RZ/G2UL
> >
> > Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the
> > same I/O blocks?
>
> OK, Just thought their DEVID is different and they use RISC-V instead of ARM64.
> I agree it uses identical IP blocks.
>
> May be I can drop this patch, if it is not really needed. Please let me know.

Please see my response in
https://lore.kernel.org/r/CAMuHMdUZw5bxUgEif=pT-2Gm1ha-Z01r+AJ6ieC62SwkfMYD5Q@mail.gmail.com/
Let's continue the discussion there...

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 9+ messages in thread

* RE: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update compatible string for RZ/G2UL SoC
  2022-03-03 10:20       ` Geert Uytterhoeven
@ 2022-03-03 10:48         ` Biju Das
  0 siblings, 0 replies; 9+ messages in thread
From: Biju Das @ 2022-03-03 10:48 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Greg Kroah-Hartman, Rob Herring, open list:SERIAL DRIVERS,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Chris Paterson, Biju Das, Prabhakar Mahadev Lad, Linux-Renesas

Hi Geert,

> Subject: Re: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update
> compatible string for RZ/G2UL SoC
> 
> Hi Biju,
> 
> On Thu, Mar 3, 2022 at 10:53 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > > Subject: Re: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update
> > > compatible string for RZ/G2UL SoC On Thu, Mar 3, 2022 at 9:59 AM
> > > Biju Das <biju.das.jz@bp.renesas.com>
> > > wrote:
> > > > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043.
> > > > To distinguish between them update the compatible string to
> > > > "renesas,r9a07g043u-sci" for RZ/G2UL SoC.
> > > >
> > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > > Reviewed-by: Lad Prabhakar
> > > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > >
> > > Thanks for your patch!
> > >
> > > > --- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml
> > > > +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml
> > > > @@ -17,7 +17,7 @@ properties:
> > > >      oneOf:
> > > >        - items:
> > > >            - enum:
> > > > -              - renesas,r9a07g043-sci     # RZ/G2UL
> > > > +              - renesas,r9a07g043u-sci    # RZ/G2UL
> > >
> > > Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use
> > > the same I/O blocks?
> >
> > OK, Just thought their DEVID is different and they use RISC-V instead of
> ARM64.
> > I agree it uses identical IP blocks.
> >
> > May be I can drop this patch, if it is not really needed. Please let me
> know.
> 
> I think it is not needed. We used the same compatible values
> ("r8a7778") for R-Car M1A (R8A77781, SH-4A + CA9) and M1S (R8A77780, SH-4A
> only), too, (probably not by design, as we never supported the latter
> under arch/sh/ ;-)
> 
> We do need a different top-level compatible value for the RZ/Five SoC,
> like we already have for the RZ/G2UL variants:
> 
>       - description: RZ/G2UL (R9A07G043)
>         items:
>           - enum:
>               - renesas,r9a07g043u11 # RZ/G2UL Type-1
>               - renesas,r9a07g043u12 # RZ/G2UL Type-2
>           - const: renesas,r9a07g043
> 
> So if we ever have an issue due to a difference, we can handle that
> through soc_device_match(), just like for RZ/V2L vs. RZ/G2L.

Agreed.

> 
> BTW, I guess RZ/G2UL Type-1 and Type-2 do have the same DEVID, and only
> differ in PRR?

Yes, They have same DEVID and PRR, but there is a way to distinguish between
Type-1 and Type-2. I am checking this with hardware people.

Cheers,
Biju


^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2022-03-03 10:48 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-03  8:59 [PATCH 1/2] dt-bindings: serial: renesas,scif: Update compatible string for RZ/G2UL SoC Biju Das
2022-03-03  8:59 ` [PATCH 2/2] dt-bindings: serial: renesas,sci: " Biju Das
2022-03-03  9:06   ` Geert Uytterhoeven
2022-03-03  9:53     ` Biju Das
2022-03-03 10:20       ` Geert Uytterhoeven
2022-03-03 10:48         ` Biju Das
2022-03-03  9:06 ` [PATCH 1/2] dt-bindings: serial: renesas,scif: " Geert Uytterhoeven
2022-03-03  9:54   ` Biju Das
2022-03-03 10:25     ` Geert Uytterhoeven

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