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From: "tarumizu.kohei@fujitsu.com" <tarumizu.kohei@fujitsu.com>
To: 'Dave Hansen' <dave.hansen@intel.com>,
	"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
	"will@kernel.org" <will@kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"bp@alien8.de" <bp@alien8.de>,
	"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
	"x86@kernel.org" <x86@kernel.org>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v2 6/8] x86: Add hardware prefetch control support for x86
Date: Fri, 18 Mar 2022 06:41:04 +0000	[thread overview]
Message-ID: <OSBPR01MB2037E49B416A30182901F70C80139@OSBPR01MB2037.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <6b28a6f3-8d3d-76f4-d517-62260ac5b337@intel.com>

> > +static int broadwell_write_pfreg(enum pfctl_attr pattr, unsigned int cpu,
> > +				 unsigned int level, u64 val)
> > +{
> > +	int ret;
> > +	u64 reg;
> > +
> > +	ret = rdmsrl_on_cpu(cpu, MSR_MISC_FEATURE_CONTROL, &reg);
> > +	if (ret)
> > +		return ret;
> > +
> > +	ret = broadwell_modify_pfreg(pattr, &reg, level, val);
> > +	if (ret < 0)
> > +		return ret;
> > +
> > +	ret = wrmsrl_on_cpu(cpu, MSR_MISC_FEATURE_CONTROL, reg);
> > +	if (ret)
> > +		return ret;
> > +
> > +	return 0;
> > +}
> 
> This needs to integrate _somehow_ with the pseudo_lock.c code.  Right now, I
> suspect that code would just overwrite any MSR changes made by this code.

I lacked consideration for pseudo_lock.c code. I try to integration
with that code.

WARNING: multiple messages have this Message-ID (diff)
From: "tarumizu.kohei@fujitsu.com" <tarumizu.kohei@fujitsu.com>
To: 'Dave Hansen' <dave.hansen@intel.com>,
	"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
	"will@kernel.org" <will@kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"bp@alien8.de" <bp@alien8.de>,
	"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
	"x86@kernel.org" <x86@kernel.org>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v2 6/8] x86: Add hardware prefetch control support for x86
Date: Fri, 18 Mar 2022 06:41:04 +0000	[thread overview]
Message-ID: <OSBPR01MB2037E49B416A30182901F70C80139@OSBPR01MB2037.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <6b28a6f3-8d3d-76f4-d517-62260ac5b337@intel.com>

> > +static int broadwell_write_pfreg(enum pfctl_attr pattr, unsigned int cpu,
> > +				 unsigned int level, u64 val)
> > +{
> > +	int ret;
> > +	u64 reg;
> > +
> > +	ret = rdmsrl_on_cpu(cpu, MSR_MISC_FEATURE_CONTROL, &reg);
> > +	if (ret)
> > +		return ret;
> > +
> > +	ret = broadwell_modify_pfreg(pattr, &reg, level, val);
> > +	if (ret < 0)
> > +		return ret;
> > +
> > +	ret = wrmsrl_on_cpu(cpu, MSR_MISC_FEATURE_CONTROL, reg);
> > +	if (ret)
> > +		return ret;
> > +
> > +	return 0;
> > +}
> 
> This needs to integrate _somehow_ with the pseudo_lock.c code.  Right now, I
> suspect that code would just overwrite any MSR changes made by this code.

I lacked consideration for pseudo_lock.c code. I try to integration
with that code.
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  reply	other threads:[~2022-03-18  6:42 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-11 10:19 [PATCH v2 0/8] Add hardware prefetch control driver for arm64 and x86 Kohei Tarumizu
2022-03-11 10:19 ` Kohei Tarumizu
2022-03-11 10:19 ` [PATCH v2 1/8] drivers: base: Add hardware prefetch control core driver Kohei Tarumizu
2022-03-11 10:19   ` Kohei Tarumizu
2022-03-11 10:19 ` [PATCH v2 2/8] drivers: base: Add Kconfig/Makefile to build " Kohei Tarumizu
2022-03-11 10:19   ` Kohei Tarumizu
2022-03-11 10:19 ` [PATCH v2 3/8] arm64: Add hardware prefetch control support for ARM64 Kohei Tarumizu
2022-03-11 10:19   ` Kohei Tarumizu
2022-03-30 22:11   ` Rob Herring
2022-03-30 22:11     ` Rob Herring
2022-04-04 11:56     ` tarumizu.kohei
2022-04-04 11:56       ` tarumizu.kohei
2022-03-11 10:19 ` [PATCH v2 4/8] arm64: Add Kconfig/Makefile to build hardware prefetch control driver Kohei Tarumizu
2022-03-11 10:19   ` Kohei Tarumizu
2022-03-11 10:19 ` [PATCH v2 5/8] arm64: Create cache sysfs directory without ACPI PPTT for hardware prefetch control Kohei Tarumizu
2022-03-11 10:19   ` Kohei Tarumizu
2022-03-30 22:14   ` Rob Herring
2022-03-30 22:14     ` Rob Herring
2022-04-04 11:48     ` tarumizu.kohei
2022-04-04 11:48       ` tarumizu.kohei
2022-03-11 10:19 ` [PATCH v2 6/8] x86: Add hardware prefetch control support for x86 Kohei Tarumizu
2022-03-11 10:19   ` Kohei Tarumizu
2022-03-14 21:05   ` Dave Hansen
2022-03-14 21:05     ` Dave Hansen
2022-03-18  6:41     ` tarumizu.kohei [this message]
2022-03-18  6:41       ` tarumizu.kohei
2022-03-11 10:19 ` [PATCH v2 7/8] x86: Add Kconfig/Makefile to build hardware prefetch control driver Kohei Tarumizu
2022-03-11 10:19   ` Kohei Tarumizu
2022-03-11 10:19 ` [PATCH v2 8/8] docs: ABI: Add sysfs documentation interface of " Kohei Tarumizu
2022-03-11 10:19   ` Kohei Tarumizu
2022-03-14 16:39   ` Jonathan Cameron
2022-03-14 16:39     ` Jonathan Cameron
2022-03-16 12:56     ` tarumizu.kohei
2022-03-16 12:56       ` tarumizu.kohei
2022-03-14 19:19 ` [PATCH v2 0/8] Add hardware prefetch control driver for arm64 and x86 Dave Hansen
2022-03-14 19:19   ` Dave Hansen
2022-03-18  6:34   ` tarumizu.kohei
2022-03-18  6:34     ` tarumizu.kohei

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