* [PATCH] dmaengine: axi-dmac: check cache coherency register
@ 2022-07-14 11:06 Mathias Tausen
2022-07-15 10:47 ` Sa, Nuno
0 siblings, 1 reply; 4+ messages in thread
From: Mathias Tausen @ 2022-07-14 11:06 UTC (permalink / raw)
To: dmaengine; +Cc: Mathias Tausen, Lars-Peter Clausen, Nuno Sá
Marking the DMA as cache coherent (dma-coherent in devicetree) is only
safe with versions of axi_dmac that have this feature enabled.
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Mathias Tausen <mta@satlab.com>
---
For context, this patch is related to a recent change to the HDL:
https://github.com/analogdevicesinc/hdl/pull/925
And has been discussed in the Analog Devices tree:
https://github.com/analogdevicesinc/linux/pull/1908
drivers/dma/dma-axi-dmac.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/dma/dma-axi-dmac.c b/drivers/dma/dma-axi-dmac.c
index 6aa5d383da21..1b78e54c2630 100644
--- a/drivers/dma/dma-axi-dmac.c
+++ b/drivers/dma/dma-axi-dmac.c
@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_dma.h>
+#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/slab.h>
@@ -55,6 +56,9 @@
#define AXI_DMAC_DMA_DST_TYPE_GET(x) FIELD_GET(AXI_DMAC_DMA_DST_TYPE_MSK, x)
#define AXI_DMAC_DMA_DST_WIDTH_MSK GENMASK(3, 0)
#define AXI_DMAC_DMA_DST_WIDTH_GET(x) FIELD_GET(AXI_DMAC_DMA_DST_WIDTH_MSK, x)
+#define AXI_DMAC_REG_COHERENCY_DESC 0x14
+#define AXI_DMAC_DST_COHERENT_MSK BIT(0)
+#define AXI_DMAC_DST_COHERENT_GET(x) FIELD_GET(AXI_DMAC_DST_COHERENT_MSK, x)
#define AXI_DMAC_REG_IRQ_MASK 0x80
#define AXI_DMAC_REG_IRQ_PENDING 0x84
@@ -1006,6 +1010,18 @@ static int axi_dmac_probe(struct platform_device *pdev)
axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_MASK, 0x00);
+ if (of_dma_is_coherent(pdev->dev.of_node)) {
+ ret = axi_dmac_read(dmac, AXI_DMAC_REG_COHERENCY_DESC);
+
+ if (version < ADI_AXI_PCORE_VER(4, 4, 'a') ||
+ !AXI_DMAC_DST_COHERENT_GET(ret)) {
+ dev_err(dmac->dma_dev.dev,
+ "Coherent DMA not supported in hardware");
+ ret = -EINVAL;
+ goto err_clk_disable;
+ }
+ }
+
ret = dma_async_device_register(dma_dev);
if (ret)
goto err_clk_disable;
--
2.36.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* RE: [PATCH] dmaengine: axi-dmac: check cache coherency register
2022-07-14 11:06 [PATCH] dmaengine: axi-dmac: check cache coherency register Mathias Tausen
@ 2022-07-15 10:47 ` Sa, Nuno
2022-07-18 7:31 ` Mathias Tausen
0 siblings, 1 reply; 4+ messages in thread
From: Sa, Nuno @ 2022-07-15 10:47 UTC (permalink / raw)
To: Mathias Tausen, dmaengine; +Cc: Lars-Peter Clausen
> From: Mathias Tausen <mta@satlab.com>
> Sent: Thursday, July 14, 2022 1:07 PM
> To: dmaengine@vger.kernel.org
> Cc: Mathias Tausen <mta@satlab.com>; Lars-Peter Clausen
> <lars@metafoo.de>; Sa, Nuno <Nuno.Sa@analog.com>
> Subject: [PATCH] dmaengine: axi-dmac: check cache coherency
> register
>
> [External]
>
> Marking the DMA as cache coherent (dma-coherent in devicetree) is
> only
> safe with versions of axi_dmac that have this feature enabled.
>
> Cc: Lars-Peter Clausen <lars@metafoo.de>
> Cc: Nuno Sá <nuno.sa@analog.com>
> Signed-off-by: Mathias Tausen <mta@satlab.com>
> ---
Acked-by: Nuno Sá <nuno.sa@analog.com>
BTW, Mathias you should +cc the maintainers... Take a look at
scripts/get_maintainer.pl
Thanks for the patch,
- Nuno Sá
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] dmaengine: axi-dmac: check cache coherency register
2022-07-15 10:47 ` Sa, Nuno
@ 2022-07-18 7:31 ` Mathias Tausen
2022-07-26 13:03 ` Vinod Koul
0 siblings, 1 reply; 4+ messages in thread
From: Mathias Tausen @ 2022-07-18 7:31 UTC (permalink / raw)
To: Sa, Nuno; +Cc: dmaengine, Lars-Peter Clausen, Vinod Koul
> BTW, Mathias you should +cc the maintainers... Take a look at
>
> scripts/get_maintainer.pl
Thanks, Nuno.
+CC: Vinod
- Tausen
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] dmaengine: axi-dmac: check cache coherency register
2022-07-18 7:31 ` Mathias Tausen
@ 2022-07-26 13:03 ` Vinod Koul
0 siblings, 0 replies; 4+ messages in thread
From: Vinod Koul @ 2022-07-26 13:03 UTC (permalink / raw)
To: Mathias Tausen; +Cc: Sa, Nuno, dmaengine, Lars-Peter Clausen
On 18-07-22, 09:31, Mathias Tausen wrote:
> > BTW, Mathias you should +cc the maintainers... Take a look at
> >
> > scripts/get_maintainer.pl
>
> Thanks, Nuno.
>
> +CC: Vinod
Can you please resend the patch, with the acks received
--
~Vinod
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-07-26 13:03 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2022-07-14 11:06 [PATCH] dmaengine: axi-dmac: check cache coherency register Mathias Tausen
2022-07-15 10:47 ` Sa, Nuno
2022-07-18 7:31 ` Mathias Tausen
2022-07-26 13:03 ` Vinod Koul
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