* [PATCH 1/3] drm/amdgpu: print channel index for UMC bad page
@ 2023-09-19 10:09 Tao Zhou
2023-09-19 10:09 ` [PATCH 2/3] drm/amdgpu: fix value of some UMC parameters for UMC v12 Tao Zhou
2023-09-19 10:09 ` [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update Tao Zhou
0 siblings, 2 replies; 7+ messages in thread
From: Tao Zhou @ 2023-09-19 10:09 UTC (permalink / raw)
To: amd-gfx, hawking.zhang, stanley.yang, candice.li, kevinyang.wang,
yipeng.chai
Cc: Tao Zhou
Print channel index for UMC v12.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
---
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
index c6742dd863d4..7714c2ef2cdc 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
@@ -240,15 +240,17 @@ static void umc_v12_0_convert_error_address(struct amdgpu_device *adev,
/* include column bit 0 and 1 */
col &= 0x3;
col |= (column << 2);
- dev_info(adev->dev, "Error Address(PA):0x%llx Row:0x%x Col:0x%x Bank:0x%x\n",
- retired_page, row, col, bank);
+ dev_info(adev->dev,
+ "Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",
+ retired_page, row, col, bank, channel_index);
amdgpu_umc_fill_error_record(err_data, err_addr,
retired_page, channel_index, umc_inst);
/* shift R13 bit */
retired_page ^= (0x1ULL << UMC_V12_0_PA_R13_BIT);
- dev_info(adev->dev, "Error Address(PA):0x%llx Row:0x%x Col:0x%x Bank:0x%x\n",
- retired_page, row_xor, col, bank);
+ dev_info(adev->dev,
+ "Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",
+ retired_page, row_xor, col, bank, channel_index);
amdgpu_umc_fill_error_record(err_data, err_addr,
retired_page, channel_index, umc_inst);
}
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/3] drm/amdgpu: fix value of some UMC parameters for UMC v12
2023-09-19 10:09 [PATCH 1/3] drm/amdgpu: print channel index for UMC bad page Tao Zhou
@ 2023-09-19 10:09 ` Tao Zhou
2023-09-19 10:09 ` [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update Tao Zhou
1 sibling, 0 replies; 7+ messages in thread
From: Tao Zhou @ 2023-09-19 10:09 UTC (permalink / raw)
To: amd-gfx, hawking.zhang, stanley.yang, candice.li, kevinyang.wang,
yipeng.chai
Cc: Tao Zhou
Prepare for bad page retirement.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/umc_v12_0.h | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index a5510412acd0..bae4a0d18190 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1497,12 +1497,14 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
adev->umc.channel_idx_tbl = &umc_v6_7_channel_idx_tbl_second[0][0];
break;
case IP_VERSION(12, 0, 0):
- adev->umc.max_ras_err_cnt_per_query = UMC_V12_0_TOTAL_CHANNEL_NUM(adev);
+ adev->umc.max_ras_err_cnt_per_query =
+ UMC_V12_0_TOTAL_CHANNEL_NUM(adev) * UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL;
adev->umc.channel_inst_num = UMC_V12_0_CHANNEL_INSTANCE_NUM;
adev->umc.umc_inst_num = UMC_V12_0_UMC_INSTANCE_NUM;
adev->umc.node_inst_num /= UMC_V12_0_UMC_INSTANCE_NUM;
adev->umc.channel_offs = UMC_V12_0_PER_CHANNEL_OFFSET;
adev->umc.active_mask = adev->aid_mask;
+ adev->umc.retire_unit = UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL;
adev->umc.channel_idx_tbl = &umc_v12_0_channel_idx_tbl[0][0][0];
if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu)
adev->umc.ras = &umc_v12_0_ras;
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h
index e3619d67ae3b..4885b9fff272 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h
@@ -53,6 +53,8 @@
/* one piece of normalized address is mapped to 8 pieces of physical address */
#define UMC_V12_0_NA_MAP_PA_NUM 8
+/* R13 bit shift should be considered, double the number */
+#define UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL (UMC_V12_0_NA_MAP_PA_NUM * 2)
/* bank bits in MCA error address */
#define UMC_V12_0_MCA_B0_BIT 6
#define UMC_V12_0_MCA_B1_BIT 7
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update
2023-09-19 10:09 [PATCH 1/3] drm/amdgpu: print channel index for UMC bad page Tao Zhou
2023-09-19 10:09 ` [PATCH 2/3] drm/amdgpu: fix value of some UMC parameters for UMC v12 Tao Zhou
@ 2023-09-19 10:09 ` Tao Zhou
2023-09-19 15:33 ` Wang, Yang(Kevin)
1 sibling, 1 reply; 7+ messages in thread
From: Tao Zhou @ 2023-09-19 10:09 UTC (permalink / raw)
To: amd-gfx, hawking.zhang, stanley.yang, candice.li, kevinyang.wang,
yipeng.chai
Cc: Tao Zhou
The amdgpu_ras_eeprom_control.bad_channel_bitmap is u32 type, but the
channel index could be larger than 32. For the ASICs whose channel
number is more than 32, the amdgpu_dpm_send_hbm_bad_channel_flag
interface is not supported, so we simply bypass channel bitmap update under
this condition.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 8ced4be784e0..1c4433f22f4b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -616,7 +616,8 @@ amdgpu_ras_eeprom_append_table(struct amdgpu_ras_eeprom_control *control,
__encode_table_record_to_buf(control, &record[i], pp);
/* update bad channel bitmap */
- if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
+ if ((record[i].mem_channel < sizeof(control->bad_channel_bitmap)) &&
+ !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
control->bad_channel_bitmap |= 1 << record[i].mem_channel;
con->update_channel_flag = true;
}
@@ -969,7 +970,8 @@ int amdgpu_ras_eeprom_read(struct amdgpu_ras_eeprom_control *control,
__decode_table_record_from_buf(control, &record[i], pp);
/* update bad channel bitmap */
- if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
+ if ((record[i].mem_channel < sizeof(control->bad_channel_bitmap)) &&
+ !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
control->bad_channel_bitmap |= 1 << record[i].mem_channel;
con->update_channel_flag = true;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* RE: [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update
2023-09-19 10:09 ` [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update Tao Zhou
@ 2023-09-19 15:33 ` Wang, Yang(Kevin)
2023-09-20 1:55 ` Zhou1, Tao
0 siblings, 1 reply; 7+ messages in thread
From: Wang, Yang(Kevin) @ 2023-09-19 15:33 UTC (permalink / raw)
To: Zhou1, Tao, amd-gfx, Zhang, Hawking, Yang, Stanley, Li, Candice,
Chai, Thomas
[AMD Official Use Only - General]
Hi Tao,
Based on your description, I think you should use BITS_PER_TYPE() instead of sizeof(), right?
Best Regards,
Kevin
-----Original Message-----
From: Zhou1, Tao <Tao.Zhou1@amd.com>
Sent: Tuesday, September 19, 2023 6:10 PM
To: amd-gfx@lists.freedesktop.org; Zhang, Hawking <Hawking.Zhang@amd.com>; Yang, Stanley <Stanley.Yang@amd.com>; Li, Candice <Candice.Li@amd.com>; Wang, Yang(Kevin) <KevinYang.Wang@amd.com>; Chai, Thomas <YiPeng.Chai@amd.com>
Cc: Zhou1, Tao <Tao.Zhou1@amd.com>
Subject: [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update
The amdgpu_ras_eeprom_control.bad_channel_bitmap is u32 type, but the channel index could be larger than 32. For the ASICs whose channel number is more than 32, the amdgpu_dpm_send_hbm_bad_channel_flag
interface is not supported, so we simply bypass channel bitmap update under this condition.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 8ced4be784e0..1c4433f22f4b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -616,7 +616,8 @@ amdgpu_ras_eeprom_append_table(struct amdgpu_ras_eeprom_control *control,
__encode_table_record_to_buf(control, &record[i], pp);
/* update bad channel bitmap */
- if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
+ if ((record[i].mem_channel < sizeof(control->bad_channel_bitmap)) &&
+ !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
control->bad_channel_bitmap |= 1 << record[i].mem_channel;
con->update_channel_flag = true;
}
@@ -969,7 +970,8 @@ int amdgpu_ras_eeprom_read(struct amdgpu_ras_eeprom_control *control,
__decode_table_record_from_buf(control, &record[i], pp);
/* update bad channel bitmap */
- if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
+ if ((record[i].mem_channel < sizeof(control->bad_channel_bitmap)) &&
+ !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
control->bad_channel_bitmap |= 1 << record[i].mem_channel;
con->update_channel_flag = true;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* RE: [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update
2023-09-19 15:33 ` Wang, Yang(Kevin)
@ 2023-09-20 1:55 ` Zhou1, Tao
0 siblings, 0 replies; 7+ messages in thread
From: Zhou1, Tao @ 2023-09-20 1:55 UTC (permalink / raw)
To: Wang, Yang(Kevin),
amd-gfx, Zhang, Hawking, Yang, Stanley, Li, Candice, Chai,
Thomas
[AMD Official Use Only - General]
Thanks for catch it, will update the patch.
Tao
> -----Original Message-----
> From: Wang, Yang(Kevin) <KevinYang.Wang@amd.com>
> Sent: Tuesday, September 19, 2023 11:34 PM
> To: Zhou1, Tao <Tao.Zhou1@amd.com>; amd-gfx@lists.freedesktop.org; Zhang,
> Hawking <Hawking.Zhang@amd.com>; Yang, Stanley <Stanley.Yang@amd.com>;
> Li, Candice <Candice.Li@amd.com>; Chai, Thomas <YiPeng.Chai@amd.com>
> Subject: RE: [PATCH 3/3] drm/amdgpu: change if condition for bad channel
> bitmap update
>
> [AMD Official Use Only - General]
>
> Hi Tao,
>
> Based on your description, I think you should use BITS_PER_TYPE() instead of
> sizeof(), right?
>
> Best Regards,
> Kevin
>
> -----Original Message-----
> From: Zhou1, Tao <Tao.Zhou1@amd.com>
> Sent: Tuesday, September 19, 2023 6:10 PM
> To: amd-gfx@lists.freedesktop.org; Zhang, Hawking <Hawking.Zhang@amd.com>;
> Yang, Stanley <Stanley.Yang@amd.com>; Li, Candice <Candice.Li@amd.com>;
> Wang, Yang(Kevin) <KevinYang.Wang@amd.com>; Chai, Thomas
> <YiPeng.Chai@amd.com>
> Cc: Zhou1, Tao <Tao.Zhou1@amd.com>
> Subject: [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap
> update
>
> The amdgpu_ras_eeprom_control.bad_channel_bitmap is u32 type, but the
> channel index could be larger than 32. For the ASICs whose channel number is
> more than 32, the amdgpu_dpm_send_hbm_bad_channel_flag
> interface is not supported, so we simply bypass channel bitmap update under this
> condition.
>
> Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> index 8ced4be784e0..1c4433f22f4b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> @@ -616,7 +616,8 @@ amdgpu_ras_eeprom_append_table(struct
> amdgpu_ras_eeprom_control *control,
> __encode_table_record_to_buf(control, &record[i], pp);
>
> /* update bad channel bitmap */
> - if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
> + if ((record[i].mem_channel < sizeof(control->bad_channel_bitmap)) &&
> + !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
> control->bad_channel_bitmap |= 1 << record[i].mem_channel;
> con->update_channel_flag = true;
> }
> @@ -969,7 +970,8 @@ int amdgpu_ras_eeprom_read(struct
> amdgpu_ras_eeprom_control *control,
> __decode_table_record_from_buf(control, &record[i], pp);
>
> /* update bad channel bitmap */
> - if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
> + if ((record[i].mem_channel < sizeof(control->bad_channel_bitmap)) &&
> + !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
> control->bad_channel_bitmap |= 1 << record[i].mem_channel;
> con->update_channel_flag = true;
> }
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update
2023-09-20 8:36 ` [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update Tao Zhou
@ 2023-09-20 8:41 ` Zhang, Hawking
0 siblings, 0 replies; 7+ messages in thread
From: Zhang, Hawking @ 2023-09-20 8:41 UTC (permalink / raw)
To: Zhou1, Tao, amd-gfx, Yang, Stanley, Li, Candice, Wang,
Yang(Kevin),
Chai, Thomas
[AMD Official Use Only - General]
Series is
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Regards,
Hawking
-----Original Message-----
From: Zhou1, Tao <Tao.Zhou1@amd.com>
Sent: Wednesday, September 20, 2023 16:37
To: amd-gfx@lists.freedesktop.org; Zhang, Hawking <Hawking.Zhang@amd.com>; Yang, Stanley <Stanley.Yang@amd.com>; Li, Candice <Candice.Li@amd.com>; Wang, Yang(Kevin) <KevinYang.Wang@amd.com>; Chai, Thomas <YiPeng.Chai@amd.com>
Cc: Zhou1, Tao <Tao.Zhou1@amd.com>
Subject: [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update
The amdgpu_ras_eeprom_control.bad_channel_bitmap is u32 type, but the channel index could be larger than 32. For the ASICs whose channel number is more than 32, the amdgpu_dpm_send_hbm_bad_channel_flag
interface is not supported, so we simply bypass channel bitmap update under this condition.
v2: replace sizeof with BITS_PER_TYPE, we should check bit number instead of byte number.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 8ced4be784e0..c60d2f79eeef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -616,7 +616,8 @@ amdgpu_ras_eeprom_append_table(struct amdgpu_ras_eeprom_control *control,
__encode_table_record_to_buf(control, &record[i], pp);
/* update bad channel bitmap */
- if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
+ if ((record[i].mem_channel < BITS_PER_TYPE(control->bad_channel_bitmap)) &&
+ !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
control->bad_channel_bitmap |= 1 << record[i].mem_channel;
con->update_channel_flag = true;
}
@@ -969,7 +970,8 @@ int amdgpu_ras_eeprom_read(struct amdgpu_ras_eeprom_control *control,
__decode_table_record_from_buf(control, &record[i], pp);
/* update bad channel bitmap */
- if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
+ if ((record[i].mem_channel < BITS_PER_TYPE(control->bad_channel_bitmap)) &&
+ !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
control->bad_channel_bitmap |= 1 << record[i].mem_channel;
con->update_channel_flag = true;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update
2023-09-20 8:36 [PATCH 1/3] drm/amdgpu: print channel index for UMC bad page Tao Zhou
@ 2023-09-20 8:36 ` Tao Zhou
2023-09-20 8:41 ` Zhang, Hawking
0 siblings, 1 reply; 7+ messages in thread
From: Tao Zhou @ 2023-09-20 8:36 UTC (permalink / raw)
To: amd-gfx, hawking.zhang, stanley.yang, candice.li, kevinyang.wang,
yipeng.chai
Cc: Tao Zhou
The amdgpu_ras_eeprom_control.bad_channel_bitmap is u32 type, but the
channel index could be larger than 32. For the ASICs whose channel
number is more than 32, the amdgpu_dpm_send_hbm_bad_channel_flag
interface is not supported, so we simply bypass channel bitmap update under
this condition.
v2: replace sizeof with BITS_PER_TYPE, we should check bit number
instead of byte number.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 8ced4be784e0..c60d2f79eeef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -616,7 +616,8 @@ amdgpu_ras_eeprom_append_table(struct amdgpu_ras_eeprom_control *control,
__encode_table_record_to_buf(control, &record[i], pp);
/* update bad channel bitmap */
- if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
+ if ((record[i].mem_channel < BITS_PER_TYPE(control->bad_channel_bitmap)) &&
+ !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
control->bad_channel_bitmap |= 1 << record[i].mem_channel;
con->update_channel_flag = true;
}
@@ -969,7 +970,8 @@ int amdgpu_ras_eeprom_read(struct amdgpu_ras_eeprom_control *control,
__decode_table_record_from_buf(control, &record[i], pp);
/* update bad channel bitmap */
- if (!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
+ if ((record[i].mem_channel < BITS_PER_TYPE(control->bad_channel_bitmap)) &&
+ !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {
control->bad_channel_bitmap |= 1 << record[i].mem_channel;
con->update_channel_flag = true;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-09-20 8:41 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-19 10:09 [PATCH 1/3] drm/amdgpu: print channel index for UMC bad page Tao Zhou
2023-09-19 10:09 ` [PATCH 2/3] drm/amdgpu: fix value of some UMC parameters for UMC v12 Tao Zhou
2023-09-19 10:09 ` [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update Tao Zhou
2023-09-19 15:33 ` Wang, Yang(Kevin)
2023-09-20 1:55 ` Zhou1, Tao
2023-09-20 8:36 [PATCH 1/3] drm/amdgpu: print channel index for UMC bad page Tao Zhou
2023-09-20 8:36 ` [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update Tao Zhou
2023-09-20 8:41 ` Zhang, Hawking
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