* [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes
@ 2015-11-02 17:31 Phil Edworthy
2015-11-03 8:01 ` Geert Uytterhoeven
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Phil Edworthy @ 2015-11-02 17:31 UTC (permalink / raw)
To: linux-sh
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 60 +++++++++++++++++++++++++++++++-
1 file changed, 59 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index a433720..bd17f8e 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -74,6 +74,15 @@
clock-frequency = <0>;
};
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "pcie_bus";
+ status = "disabled";
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -682,6 +691,55 @@
};
};
};
- };
+ pciec0: pcie@fe000000 {
+ compatible = "renesas,pcie-r8a7795";
+ reg = <0 0xfe000000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+ interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>,
+ <0 117 IRQ_TYPE_LEVEL_HIGH>,
+ <0 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ pciec1: pcie@ee800000 {
+ compatible = "renesas,pcie-r8a7795";
+ reg = <0 0xee800000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
+ 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
+ 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
+ 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+ interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>,
+ <0 149 IRQ_TYPE_LEVEL_HIGH>,
+ <0 150 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+ };
};
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes
2015-11-02 17:31 [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes Phil Edworthy
@ 2015-11-03 8:01 ` Geert Uytterhoeven
2015-11-03 9:13 ` Phil Edworthy
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2015-11-03 8:01 UTC (permalink / raw)
To: linux-sh
Hi Phil,
On Mon, Nov 2, 2015 at 6:31 PM, Phil Edworthy <phil.edworthy@renesas.com> wrote:
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -74,6 +74,15 @@
> clock-frequency = <0>;
> };
>
> + /* External PCIe clock - can be overridden by the board */
> + pcie_bus_clk: pcie_bus_clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <100000000>;
> + clock-output-names = "pcie_bus";
> + status = "disabled";
> + };
This is generated by an external clock generator (9FGV0841AKILF on
Salvator-X). Hence I think it should be listed with a zero clock-frequency,
and be overridden in r8a7795-salvator-x.dts.
Hmm, that clock generator generates multiple clocks, so it should have a more
complex node. As PCIe always requires a 100 MHz external lock, I guess that's
why you modeled it that simpler way?
> @@ -682,6 +691,55 @@
> };
> };
> };
> - };
>
> + pciec0: pcie@fe000000 {
> + compatible = "renesas,pcie-r8a7795";
> + reg = <0 0xfe000000 0 0x80000>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
> + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
> + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
> + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
> + /* Map all possible DDR as inbound ranges */
> + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
> + interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>,
> + <0 117 IRQ_TYPE_LEVEL_HIGH>,
> + <0 118 IRQ_TYPE_LEVEL_HIGH>;
As there are multiple interrupts, I recommend adding interrupt-names to the
DT bindings.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes
2015-11-02 17:31 [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes Phil Edworthy
2015-11-03 8:01 ` Geert Uytterhoeven
@ 2015-11-03 9:13 ` Phil Edworthy
2015-11-10 1:36 ` Simon Horman
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Phil Edworthy @ 2015-11-03 9:13 UTC (permalink / raw)
To: linux-sh
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes
2015-11-02 17:31 [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes Phil Edworthy
2015-11-03 8:01 ` Geert Uytterhoeven
2015-11-03 9:13 ` Phil Edworthy
@ 2015-11-10 1:36 ` Simon Horman
2015-11-10 9:15 ` Phil Edworthy
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Simon Horman @ 2015-11-10 1:36 UTC (permalink / raw)
To: linux-sh
On Tue, Nov 03, 2015 at 09:13:09AM +0000, Phil Edworthy wrote:
> Hi Geert,
>
> On 03 November 2015 08:01, Geert wrote:
> > On Mon, Nov 2, 2015 at 6:31 PM, Phil Edworthy <phil.edworthy@renesas.com>
> > wrote:
> > > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > > @@ -74,6 +74,15 @@
> > > clock-frequency = <0>;
> > > };
> > >
> > > + /* External PCIe clock - can be overridden by the board */
> > > + pcie_bus_clk: pcie_bus_clk {
> > > + compatible = "fixed-clock";
> > > + #clock-cells = <0>;
> > > + clock-frequency = <100000000>;
> > > + clock-output-names = "pcie_bus";
> > > + status = "disabled";
> > > + };
> >
> > This is generated by an external clock generator (9FGV0841AKILF on
> > Salvator-X). Hence I think it should be listed with a zero clock-frequency,
> > and be overridden in r8a7795-salvator-x.dts.
> >
> > Hmm, that clock generator generates multiple clocks, so it should have a more
> > complex node. As PCIe always requires a 100 MHz external lock, I guess that's
> > why you modeled it that simpler way?
> Yes and the PCIe driver doesn't care what the clock rate is. We need to ensure
> that the external clock is on.
>
> > > @@ -682,6 +691,55 @@
> > > };
> > > };
> > > };
> > > - };
> > >
> > > + pciec0: pcie@fe000000 {
> > > + compatible = "renesas,pcie-r8a7795";
> > > + reg = <0 0xfe000000 0 0x80000>;
> > > + #address-cells = <3>;
> > > + #size-cells = <2>;
> > > + bus-range = <0x00 0xff>;
> > > + device_type = "pci";
> > > + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
> > > + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
> > > + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
> > > + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
> > > + /* Map all possible DDR as inbound ranges */
> > > + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0
> > 0x40000000>;
> > > + interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>,
> > > + <0 117 IRQ_TYPE_LEVEL_HIGH>,
> > > + <0 118 IRQ_TYPE_LEVEL_HIGH>;
> >
> > As there are multiple interrupts, I recommend adding interrupt-names to the
> > DT bindings.
> I could do, though unfortunately the interrupts are a bit of a jumble. The first
> covers MSI and INTx, the second covers DMA and MSI, the third is a mix of PM,
> errors and MAC control.
I still think we need to use named interrupts.
Even if coming up with names for them is a bit of a challenge.
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes
2015-11-02 17:31 [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes Phil Edworthy
` (2 preceding siblings ...)
2015-11-10 1:36 ` Simon Horman
@ 2015-11-10 9:15 ` Phil Edworthy
2016-01-15 10:42 ` Geert Uytterhoeven
2016-02-10 8:01 ` Geert Uytterhoeven
5 siblings, 0 replies; 7+ messages in thread
From: Phil Edworthy @ 2015-11-10 9:15 UTC (permalink / raw)
To: linux-sh
Hi Simon,
On 10 November 2015 01:37, Simon wrote:
> On Tue, Nov 03, 2015 at 09:13:09AM +0000, Phil Edworthy wrote:
> > Hi Geert,
> >
> > On 03 November 2015 08:01, Geert wrote:
> > > On Mon, Nov 2, 2015 at 6:31 PM, Phil Edworthy
> <phil.edworthy@renesas.com>
> > > wrote:
> > > > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > > > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > > > @@ -74,6 +74,15 @@
> > > > clock-frequency = <0>;
> > > > };
> > > >
> > > > + /* External PCIe clock - can be overridden by the board */
> > > > + pcie_bus_clk: pcie_bus_clk {
> > > > + compatible = "fixed-clock";
> > > > + #clock-cells = <0>;
> > > > + clock-frequency = <100000000>;
> > > > + clock-output-names = "pcie_bus";
> > > > + status = "disabled";
> > > > + };
> > >
> > > This is generated by an external clock generator (9FGV0841AKILF on
> > > Salvator-X). Hence I think it should be listed with a zero clock-frequency,
> > > and be overridden in r8a7795-salvator-x.dts.
> > >
> > > Hmm, that clock generator generates multiple clocks, so it should have a more
> > > complex node. As PCIe always requires a 100 MHz external lock, I guess that's
> > > why you modeled it that simpler way?
> > Yes and the PCIe driver doesn't care what the clock rate is. We need to ensure
> > that the external clock is on.
> >
> > > > @@ -682,6 +691,55 @@
> > > > };
> > > > };
> > > > };
> > > > - };
> > > >
> > > > + pciec0: pcie@fe000000 {
> > > > + compatible = "renesas,pcie-r8a7795";
> > > > + reg = <0 0xfe000000 0 0x80000>;
> > > > + #address-cells = <3>;
> > > > + #size-cells = <2>;
> > > > + bus-range = <0x00 0xff>;
> > > > + device_type = "pci";
> > > > + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
> > > > + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
> > > > + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
> > > > + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
> > > > + /* Map all possible DDR as inbound ranges */
> > > > + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0
> > > 0x40000000>;
> > > > + interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>,
> > > > + <0 117 IRQ_TYPE_LEVEL_HIGH>,
> > > > + <0 118 IRQ_TYPE_LEVEL_HIGH>;
> > >
> > > As there are multiple interrupts, I recommend adding interrupt-names to the
> > > DT bindings.
> > I could do, though unfortunately the interrupts are a bit of a jumble. The first
> > covers MSI and INTx, the second covers DMA and MSI, the third is a mix of PM,
> > errors and MAC control.
>
> I still think we need to use named interrupts.
> Even if coming up with names for them is a bit of a challenge.
Of course, if I add interrupt names to the DT bindings they will have to be optional
since there are Gen2 devices that already use the existing bindings. I'll add this to
to todo list...
Thanks
Phil
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes
2015-11-02 17:31 [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes Phil Edworthy
` (3 preceding siblings ...)
2015-11-10 9:15 ` Phil Edworthy
@ 2016-01-15 10:42 ` Geert Uytterhoeven
2016-02-10 8:01 ` Geert Uytterhoeven
5 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2016-01-15 10:42 UTC (permalink / raw)
To: linux-sh
On Mon, Nov 2, 2015 at 6:31 PM, Phil Edworthy <phil.edworthy@renesas.com> wrote:
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -682,6 +691,55 @@
> };
> };
> };
> - };
>
> + pciec0: pcie@fe000000 {
> + compatible = "renesas,pcie-r8a7795";
> + reg = <0 0xfe000000 0 0x80000>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
> + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
> + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
> + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
> + /* Map all possible DDR as inbound ranges */
> + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
> + interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>,
> + <0 117 IRQ_TYPE_LEVEL_HIGH>,
> + <0 118 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI ...> (x3)
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 0>;
> + interrupt-map = <0 0 0 0 &gic 0 116 IRQ_TYPE_LEVEL_HIGH>;
... &gic GIC_SPI ...
> + clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
> + clock-names = "pcie", "pcie_bus";
> + power-domains = <&cpg>;
> + status = "disabled";
> + };
> +
> + pciec1: pcie@ee800000 {
> + compatible = "renesas,pcie-r8a7795";
> + reg = <0 0xee800000 0 0x80000>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
> + 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
> + 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
> + 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
> + /* Map all possible DDR as inbound ranges */
> + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
> + interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>,
> + <0 149 IRQ_TYPE_LEVEL_HIGH>,
> + <0 150 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI ...> (x3)
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 0>;
> + interrupt-map = <0 0 0 0 &gic 0 148 IRQ_TYPE_LEVEL_HIGH>;
... &gic GIC_SPI ...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes
2015-11-02 17:31 [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes Phil Edworthy
` (4 preceding siblings ...)
2016-01-15 10:42 ` Geert Uytterhoeven
@ 2016-02-10 8:01 ` Geert Uytterhoeven
5 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2016-02-10 8:01 UTC (permalink / raw)
To: linux-sh
On Mon, Nov 2, 2015 at 6:31 PM, Phil Edworthy <phil.edworthy@renesas.com> wrote:
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -74,6 +74,15 @@
> clock-frequency = <0>;
> };
>
> + /* External PCIe clock - can be overridden by the board */
> + pcie_bus_clk: pcie_bus_clk {
Please drop the "_clk" suffix from the device node's name.
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <100000000>;
> + clock-output-names = "pcie_bus";
The "clock-output-names" property is optional and not needed. Please drop it,
the clock will be named after the device node's name.
> + status = "disabled";
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2016-02-10 8:01 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-11-02 17:31 [PATCH 2/3] arm64: renesas: r8a7795: Add PCIe nodes Phil Edworthy
2015-11-03 8:01 ` Geert Uytterhoeven
2015-11-03 9:13 ` Phil Edworthy
2015-11-10 1:36 ` Simon Horman
2015-11-10 9:15 ` Phil Edworthy
2016-01-15 10:42 ` Geert Uytterhoeven
2016-02-10 8:01 ` Geert Uytterhoeven
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