[PATCH 1/2] powerpc/p4080ds: dts - add usb controller version info and port0

[PATCH 1/2] powerpc/p4080ds: dts - add usb controller version info and port0

[Shengzhou Liu]

Add the missing usb controller version info and port0, which is
required during setup usb phy.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
 arch/powerpc/boot/dts/fsl/p4080si-post.dtsi |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 8d35d2c..4f9c9f6 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -345,6 +345,13 @@
 /include/ "qoriq-duart-1.dtsi"
 /include/ "qoriq-gpio-0.dtsi"
 /include/ "qoriq-usb2-mph-0.dtsi"
+	usb@210000 {
+		compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
+		port0;
+	};
 /include/ "qoriq-usb2-dr-0.dtsi"
+	usb@211000 {
+		compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
+	};
 /include/ "qoriq-sec4.0-0.dtsi"
 };
-- 
1.6.4

[PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock

[Shengzhou Liu]

when missing USB PHY clock, kernel booting up will hang during USB
initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
CPU hanging in this case.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
 drivers/usb/host/ehci-fsl.c |   63 ++++++++++++++++++++++++++++++------------
 drivers/usb/host/ehci-fsl.h |    1 +
 2 files changed, 46 insertions(+), 18 deletions(-)

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index b7451b2..aeb6d03 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -210,11 +210,11 @@ static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
 	usb_put_hcd(hcd);
 }
 
-static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
+static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 			       enum fsl_usb2_phy_modes phy_mode,
 			       unsigned int port_offset)
 {
-	u32 portsc, temp;
+	u32 portsc, timeout;
 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 	void __iomem *non_ehci = hcd->regs;
 	struct device *dev = hcd->self.controller;
@@ -232,9 +232,15 @@ static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
 	case FSL_USB2_PHY_ULPI:
 		if (pdata->controller_ver) {
 			/* controller version 1.6 or above */
-			temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
-			out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
-				USB_CTRL_USB_EN | ULPI_PHY_CLK_SEL);
+			setbits32(non_ehci + FSL_SOC_USB_CTRL,
+					ULPI_PHY_CLK_SEL);
+			/*
+			 * Due to controller issue of PHY_CLK_VALID in ULPI
+			 * mode, we set USB_CTRL_USB_EN before checking
+			 * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
+			 */
+			clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+					UTMI_PHY_EN, USB_CTRL_USB_EN);
 		}
 		portsc |= PORT_PTS_ULPI;
 		break;
@@ -247,9 +253,7 @@ static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
 	case FSL_USB2_PHY_UTMI:
 		if (pdata->controller_ver) {
 			/* controller version 1.6 or above */
-			temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
-			out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
-				UTMI_PHY_EN | USB_CTRL_USB_EN);
+			setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
 			mdelay(FSL_UTMI_PHY_DLY);  /* Delay for UTMI PHY CLK to
 						become stable - 10ms*/
 		}
@@ -262,23 +266,39 @@ static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
 	case FSL_USB2_PHY_NONE:
 		break;
 	}
+
+	if ((pdata->controller_ver) && ((phy_mode == FSL_USB2_PHY_ULPI) ||
+			(phy_mode == FSL_USB2_PHY_UTMI))) {
+		for (timeout = 1000; timeout > 0; timeout--) {
+			/* check PHY_CLK_VALID to get phy clk valid */
+			if (in_be32(non_ehci + FSL_SOC_USB_CTRL)
+					& PHY_CLK_VALID)
+				break;
+			udelay(1);
+		}
+		if (timeout == 0) {
+			printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
+			return -EINVAL;
+		}
+	}
+
 	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
+
+	if (phy_mode != FSL_USB2_PHY_ULPI)
+		setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
+
+	return 0;
 }
 
-static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
+static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 {
 	struct usb_hcd *hcd = ehci_to_hcd(ehci);
 	struct fsl_usb2_platform_data *pdata;
 	void __iomem *non_ehci = hcd->regs;
-	u32 temp;
 
 	pdata = hcd->self.controller->platform_data;
 
-	/* Enable PHY interface in the control reg. */
 	if (pdata->have_sysif_regs) {
-		temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
-		out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
-
 		/*
 		* Turn on cache snooping hardware, since some PowerPC platforms
 		* wholly rely on hardware to deal with cache coherent
@@ -293,7 +313,8 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 
 	if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
 			(pdata->operating_mode == FSL_USB2_DR_OTG))
-		ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
+		if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
+			return -EINVAL;
 
 	if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
 		unsigned int chip, rev, svr;
@@ -307,9 +328,12 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 			ehci->has_fsl_port_bug = 1;
 
 		if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
-			ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
+			if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
+				return -EINVAL;
+
 		if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
-			ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1);
+			if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
+				return -EINVAL;
 	}
 
 	if (pdata->have_sysif_regs) {
@@ -322,12 +346,15 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 #endif
 		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
 	}
+
+	return 0;
 }
 
 /* called after powerup, by probe or system-pm "wakeup" */
 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
 {
-	ehci_fsl_usb_setup(ehci);
+	if (ehci_fsl_usb_setup(ehci))
+		return -EINVAL;
 	ehci_port_power(ehci, 0);
 
 	return 0;
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index 8840368..dbd292e 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -61,4 +61,5 @@
 #define PLL_RESET               (1<<8)
 #define UTMI_PHY_EN             (1<<9)
 #define ULPI_PHY_CLK_SEL        (1<<10)
+#define PHY_CLK_VALID		(1<<17)
 #endif				/* _EHCI_FSL_H */
-- 
1.6.4

Re: [PATCH 1/2] powerpc/p4080ds: dts - add usb controller version info and port0

[Kumar Gala]

On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:

> Add the missing usb controller version info and port0, which is
> required during setup usb phy.
> 
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/p4080si-post.dtsi |    7 +++++++
> 1 files changed, 7 insertions(+), 0 deletions(-)

applied to merge

- k

Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock

[Kumar Gala]

On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:

> when missing USB PHY clock, kernel booting up will hang during USB
> initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
> CPU hanging in this case.
>=20
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> ---
> drivers/usb/host/ehci-fsl.c |   63 =
++++++++++++++++++++++++++++++------------
> drivers/usb/host/ehci-fsl.h |    1 +
> 2 files changed, 46 insertions(+), 18 deletions(-)

I assume this should be considered a bug fix and be looked at for =
inclusion in v3.6?

- k=

RE: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock

[Liu Shengzhou-B36685]

> -----Original Message-----
> From: Kumar Gala [mailto:galak@kernel.crashing.org]
> Sent: Friday, August 10, 2012 9:50 PM
> To: Liu Shengzhou-B36685
> Cc: linuxppc-dev@lists.ozlabs.org list; linux-usb@vger.kernel.org;
> gregkh@linuxfoundation.org
> Subject: Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing US=
B PHY
> clock
>=20
>=20
> On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:
>=20
> > when missing USB PHY clock, kernel booting up will hang during USB
> > initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid CPU
> > hanging in this case.
> >
> > Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> > ---
> > drivers/usb/host/ehci-fsl.c |   63 ++++++++++++++++++++++++++++++------=
-----
> -
> > drivers/usb/host/ehci-fsl.h |    1 +
> > 2 files changed, 46 insertions(+), 18 deletions(-)
>=20
> I assume this should be considered a bug fix and be looked at for inclusi=
on in
> v3.6?
>=20
> - k
[Shengzhou] Yes.=20

Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock

[Kumar Gala]

On Aug 12, 2012, at 10:01 PM, Liu Shengzhou-B36685 wrote:

>=20
>=20
>> -----Original Message-----
>> From: Kumar Gala [mailto:galak@kernel.crashing.org]
>> Sent: Friday, August 10, 2012 9:50 PM
>> To: Liu Shengzhou-B36685
>> Cc: linuxppc-dev@lists.ozlabs.org list; linux-usb@vger.kernel.org;
>> gregkh@linuxfoundation.org
>> Subject: Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when =
missing USB PHY
>> clock
>>=20
>>=20
>> On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:
>>=20
>>> when missing USB PHY clock, kernel booting up will hang during USB
>>> initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid =
CPU
>>> hanging in this case.
>>>=20
>>> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
>>> ---
>>> drivers/usb/host/ehci-fsl.c |   63 =
++++++++++++++++++++++++++++++-----------
>> -
>>> drivers/usb/host/ehci-fsl.h |    1 +
>>> 2 files changed, 46 insertions(+), 18 deletions(-)
>>=20
>> I assume this should be considered a bug fix and be looked at for =
inclusion in
>> v3.6?
>>=20
>> - k
> [Shengzhou] Yes.=20

Greg,

ping?

- k

Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock

[Tabi Timur-B04825]

On Fri, Aug 10, 2012 at 5:48 AM, Shengzhou Liu
<Shengzhou.Liu@freescale.com> wrote:

> +               for (timeout =3D 1000; timeout > 0; timeout--) {
> +                       /* check PHY_CLK_VALID to get phy clk valid */
> +                       if (in_be32(non_ehci + FSL_SOC_USB_CTRL)
> +                                       & PHY_CLK_VALID)
> +                               break;
> +                       udelay(1);
> +               }

Use spin_event_timeout() instead.

--=20
Timur Tabi
Linux kernel developer at Freescale=

Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock

[Alan Stern]

On Mon, 20 Aug 2012, Kumar Gala wrote:

> >> Subject: Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY
> >> clock
> >> 
> >> 
> >> On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:
> >> 
> >>> when missing USB PHY clock, kernel booting up will hang during USB
> >>> initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid CPU
> >>> hanging in this case.
> >>> 
> >>> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> >>> ---
> >>> drivers/usb/host/ehci-fsl.c |   63 ++++++++++++++++++++++++++++++-----------
> >> -
> >>> drivers/usb/host/ehci-fsl.h |    1 +
> >>> 2 files changed, 46 insertions(+), 18 deletions(-)
> >> 
> >> I assume this should be considered a bug fix and be looked at for inclusion in
> >> v3.6?
> >> 
> >> - k
> > [Shengzhou] Yes. 
> 
> Greg,
> 
> ping?

Greg is away on vacation for the rest of this week.

Alan Stern