All of lore.kernel.org
 help / color / mirror / Atom feed
From: Po Liu <po.liu@nxp.com>
To: Dongdong Liu <liudongdong3@huawei.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Shawn Guo <shawnguo@kernel.org>,
	"Marc Zyngier" <marc.zyngier@arm.com>,
	Rob Herring <robh@kernel.org>, Roy Zang <roy.zang@nxp.com>,
	Mingkai Hu <mingkai.hu@nxp.com>,
	Stuart Yoder <stuart.yoder@nxp.com>,
	Yang-Leo Li <leoyang.li@nxp.com>, Arnd Bergmann <arnd@arndb.de>,
	Minghuan Lian <minghuan.lian@nxp.com>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Linuxarm <linuxarm@huawei.com>
Subject: RE: [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk
Date: Tue, 5 Jul 2016 03:03:01 +0000	[thread overview]
Message-ID: <VI1PR0401MB1709D556D0A7F7BB9188221E92390@VI1PR0401MB1709.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <577A21E4.1030301@huawei.com>

Hi Dongdong,

The patch were intend to fixup the NXP layerscape serial SOC and were tested ok.
I am not clear what platform are you trying to fix. 
The problem on your board may be as below comments:


>  -----Original Message-----
>  From: Dongdong Liu [mailto:liudongdong3@huawei.com]
>  Sent: Monday, July 04, 2016 4:44 PM
>  To: Po Liu; linux-pci@vger.kernel.org; linux-arm-
>  kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
>  devicetree@vger.kernel.org
>  Cc: Bjorn Helgaas; Shawn Guo; Marc Zyngier; Rob Herring; Roy Zang;
>  Mingkai Hu; Stuart Yoder; Yang-Leo Li; Arnd Bergmann; Minghuan Lian;
>  Murali Karicheri; Linuxarm
>  Subject: Re: [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk
>  
>  Hi Po
>  
>  I found a problem with the similar patch. as the below log.
>  
>  [    4.287060] pci 0000:80:00.0: quirk_aer_interrupt dev->irq 416
>  [    4.293778] pcieport 0000:80:00.0: pci_device_probe in
>  [    4.299605] pcieport 0000:80:00.0: of_irq_parse_pci() failed with
>  rc=-22
>  [    4.307209] pcieport 0000:80:00.0: init_service_irqs  dev->irq 0
>  
>  The fucntions are called as below sequence.
>  1. quirk_aer_interrupt, get the aer dev->irq 416.

This code quirk_aer_interrupt() should be run at pci_fixup_device(pci_fixup_final) which is in the pci_bus_add_devices()

>  2. pci_device_probe->of_irq_parse_pci, of_irq_parse_pci() failed, then
>  dev->irq changed to 0.

pci_device_probe->of_irq_parse_pci which in the pci_scan_child_bus() run before  pci_bus_add_devices(). See dw_pcie_host_init().
Apparently , your quirk_aer_interrupt() is running before the dev->irq assignment in the of_irq_parse_pci().

So make sure your configure the quirk_aer_interrupt() run in the FINAL stage in the quirk.c OR check your host driver which you are using.


>  
>  So this patch could not work with aer.
>  
>  Thanks
>  Dongdong
>  在 2016/6/14 16:24, Po Liu 写道:
>  > On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
>  > When chip support the aer interrupt with none MSI/MSI-X/INTx mode,
>  > maybe there is interrupt line for aer pme etc. Search the interrupt
>  > number in the fdt file. Then fixup the dev->irq with it.
>  >
>  > Signed-off-by: Po Liu <po.liu@nxp.com>
>  > ---
>  > changes for V3:
>  > 	- Move to quirk;
>  > 	- Only correct the irq in RC mode;
>  >
>  >   drivers/pci/quirks.c | 29 +++++++++++++++++++++++++++++
>  >   1 file changed, 29 insertions(+)
>  >
>  > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index
>  > ee72ebe..8b39cce 100644
>  > --- a/drivers/pci/quirks.c
>  > +++ b/drivers/pci/quirks.c
>  > @@ -25,6 +25,7 @@
>  >   #include <linux/sched.h>
>  >   #include <linux/ktime.h>
>  >   #include <linux/mm.h>
>  > +#include <linux/of_irq.h>
>  >   #include <asm/dma.h>	/* isa_dma_bridge_buggy */
>  >   #include "pci.h"
>  >
>  > @@ -4419,3 +4420,31 @@ static void quirk_intel_qat_vf_cap(struct
>  pci_dev *pdev)
>  >   	}
>  >   }
>  >   DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x443,
>  > quirk_intel_qat_vf_cap);
>  > +
>  > +/* If root port doesn't support MSI/MSI-X/INTx in RC mode,
>  > + * but use standalone irq. Read the device tree for the aer
>  > + * interrupt number.
>  > + */
>  > +static void quirk_aer_interrupt(struct pci_dev *dev) {
>  > +	int ret;
>  > +	u8 header_type;
>  > +	struct device_node *np = NULL;
>  > +
>  > +	/* Only for the RC mode device */
>  > +	pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
>  > +	if ((header_type & 0x7F) != PCI_HEADER_TYPE_BRIDGE)
>  > +		return;
>  > +
>  > +	if (dev->bus->dev.of_node)
>  > +		np = dev->bus->dev.of_node;
>  > +
>  > +	if (IS_ENABLED(CONFIG_OF_IRQ) && np) {
>  > +		ret = of_irq_get_byname(np, "aer");
>  > +		if (ret > 0) {
>  > +			dev->no_msi = 1;
>  > +			dev->irq = ret;
>  > +		}
>  > +	}
>  > +}
>  > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID,
>  > +quirk_aer_interrupt);
>  >
>  

WARNING: multiple messages have this Message-ID (diff)
From: Po Liu <po.liu@nxp.com>
To: Dongdong Liu <liudongdong3@huawei.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Shawn Guo <shawnguo@kernel.org>,
	"Marc Zyngier" <marc.zyngier@arm.com>,
	Rob Herring <robh@kernel.org>, Roy Zang <roy.zang@nxp.com>,
	Mingkai Hu <mingkai.hu@nxp.com>,
	Stuart Yoder <stuart.yoder@nxp.com>,
	Yang-Leo Li <leoyang.li@nxp.com>, Arnd Bergmann <arnd@arndb.de>,
	Minghuan Lian <minghuan.lian@nxp.com>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Linuxarm <linuxarm@huawei.com>
Subject: RE: [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk
Date: Tue, 5 Jul 2016 03:03:01 +0000	[thread overview]
Message-ID: <VI1PR0401MB1709D556D0A7F7BB9188221E92390@VI1PR0401MB1709.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <577A21E4.1030301@huawei.com>

SGkgRG9uZ2RvbmcsDQoNClRoZSBwYXRjaCB3ZXJlIGludGVuZCB0byBmaXh1cCB0aGUgTlhQIGxh
eWVyc2NhcGUgc2VyaWFsIFNPQyBhbmQgd2VyZSB0ZXN0ZWQgb2suDQpJIGFtIG5vdCBjbGVhciB3
aGF0IHBsYXRmb3JtIGFyZSB5b3UgdHJ5aW5nIHRvIGZpeC4gDQpUaGUgcHJvYmxlbSBvbiB5b3Vy
IGJvYXJkIG1heSBiZSBhcyBiZWxvdyBjb21tZW50czoNCg0KDQo+ICAtLS0tLU9yaWdpbmFsIE1l
c3NhZ2UtLS0tLQ0KPiAgRnJvbTogRG9uZ2RvbmcgTGl1IFttYWlsdG86bGl1ZG9uZ2RvbmczQGh1
YXdlaS5jb21dDQo+ICBTZW50OiBNb25kYXksIEp1bHkgMDQsIDIwMTYgNDo0NCBQTQ0KPiAgVG86
IFBvIExpdTsgbGludXgtcGNpQHZnZXIua2VybmVsLm9yZzsgbGludXgtYXJtLQ0KPiAga2VybmVs
QGxpc3RzLmluZnJhZGVhZC5vcmc7IGxpbnV4LWtlcm5lbEB2Z2VyLmtlcm5lbC5vcmc7DQo+ICBk
ZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZw0KPiAgQ2M6IEJqb3JuIEhlbGdhYXM7IFNoYXduIEd1
bzsgTWFyYyBaeW5naWVyOyBSb2IgSGVycmluZzsgUm95IFphbmc7DQo+ICBNaW5na2FpIEh1OyBT
dHVhcnQgWW9kZXI7IFlhbmctTGVvIExpOyBBcm5kIEJlcmdtYW5uOyBNaW5naHVhbiBMaWFuOw0K
PiAgTXVyYWxpIEthcmljaGVyaTsgTGludXhhcm0NCj4gIFN1YmplY3Q6IFJlOiBbUEFUQ0ggdjMg
Mi8yXSBwY2kvYWVyOiBpbnRlcnJ1cHQgZml4dXAgaW4gdGhlIHF1aXJrDQo+ICANCj4gIEhpIFBv
DQo+ICANCj4gIEkgZm91bmQgYSBwcm9ibGVtIHdpdGggdGhlIHNpbWlsYXIgcGF0Y2guIGFzIHRo
ZSBiZWxvdyBsb2cuDQo+ICANCj4gIFsgICAgNC4yODcwNjBdIHBjaSAwMDAwOjgwOjAwLjA6IHF1
aXJrX2Flcl9pbnRlcnJ1cHQgZGV2LT5pcnEgNDE2DQo+ICBbICAgIDQuMjkzNzc4XSBwY2llcG9y
dCAwMDAwOjgwOjAwLjA6IHBjaV9kZXZpY2VfcHJvYmUgaW4NCj4gIFsgICAgNC4yOTk2MDVdIHBj
aWVwb3J0IDAwMDA6ODA6MDAuMDogb2ZfaXJxX3BhcnNlX3BjaSgpIGZhaWxlZCB3aXRoDQo+ICBy
Yz0tMjINCj4gIFsgICAgNC4zMDcyMDldIHBjaWVwb3J0IDAwMDA6ODA6MDAuMDogaW5pdF9zZXJ2
aWNlX2lycXMgIGRldi0+aXJxIDANCj4gIA0KPiAgVGhlIGZ1Y250aW9ucyBhcmUgY2FsbGVkIGFz
IGJlbG93IHNlcXVlbmNlLg0KPiAgMS4gcXVpcmtfYWVyX2ludGVycnVwdCwgZ2V0IHRoZSBhZXIg
ZGV2LT5pcnEgNDE2Lg0KDQpUaGlzIGNvZGUgcXVpcmtfYWVyX2ludGVycnVwdCgpIHNob3VsZCBi
ZSBydW4gYXQgcGNpX2ZpeHVwX2RldmljZShwY2lfZml4dXBfZmluYWwpIHdoaWNoIGlzIGluIHRo
ZSBwY2lfYnVzX2FkZF9kZXZpY2VzKCkNCg0KPiAgMi4gcGNpX2RldmljZV9wcm9iZS0+b2ZfaXJx
X3BhcnNlX3BjaSwgb2ZfaXJxX3BhcnNlX3BjaSgpIGZhaWxlZCwgdGhlbg0KPiAgZGV2LT5pcnEg
Y2hhbmdlZCB0byAwLg0KDQpwY2lfZGV2aWNlX3Byb2JlLT5vZl9pcnFfcGFyc2VfcGNpIHdoaWNo
IGluIHRoZSBwY2lfc2Nhbl9jaGlsZF9idXMoKSBydW4gYmVmb3JlICBwY2lfYnVzX2FkZF9kZXZp
Y2VzKCkuIFNlZSBkd19wY2llX2hvc3RfaW5pdCgpLg0KQXBwYXJlbnRseSAsIHlvdXIgcXVpcmtf
YWVyX2ludGVycnVwdCgpIGlzIHJ1bm5pbmcgYmVmb3JlIHRoZSBkZXYtPmlycSBhc3NpZ25tZW50
IGluIHRoZSBvZl9pcnFfcGFyc2VfcGNpKCkuDQoNClNvIG1ha2Ugc3VyZSB5b3VyIGNvbmZpZ3Vy
ZSB0aGUgcXVpcmtfYWVyX2ludGVycnVwdCgpIHJ1biBpbiB0aGUgRklOQUwgc3RhZ2UgaW4gdGhl
IHF1aXJrLmMgT1IgY2hlY2sgeW91ciBob3N0IGRyaXZlciB3aGljaCB5b3UgYXJlIHVzaW5nLg0K
DQoNCj4gIA0KPiAgU28gdGhpcyBwYXRjaCBjb3VsZCBub3Qgd29yayB3aXRoIGFlci4NCj4gIA0K
PiAgVGhhbmtzDQo+ICBEb25nZG9uZw0KPiAg5ZyoIDIwMTYvNi8xNCAxNjoyNCwgUG8gTGl1IOWG
memBkzoNCj4gID4gT24gc29tZSBwbGF0Zm9ybXMsIHJvb3QgcG9ydCBkb2Vzbid0IHN1cHBvcnQg
TVNJL01TSS1YL0lOVHggaW4gUkMgbW9kZS4NCj4gID4gV2hlbiBjaGlwIHN1cHBvcnQgdGhlIGFl
ciBpbnRlcnJ1cHQgd2l0aCBub25lIE1TSS9NU0ktWC9JTlR4IG1vZGUsDQo+ICA+IG1heWJlIHRo
ZXJlIGlzIGludGVycnVwdCBsaW5lIGZvciBhZXIgcG1lIGV0Yy4gU2VhcmNoIHRoZSBpbnRlcnJ1
cHQNCj4gID4gbnVtYmVyIGluIHRoZSBmZHQgZmlsZS4gVGhlbiBmaXh1cCB0aGUgZGV2LT5pcnEg
d2l0aCBpdC4NCj4gID4NCj4gID4gU2lnbmVkLW9mZi1ieTogUG8gTGl1IDxwby5saXVAbnhwLmNv
bT4NCj4gID4gLS0tDQo+ICA+IGNoYW5nZXMgZm9yIFYzOg0KPiAgPiAJLSBNb3ZlIHRvIHF1aXJr
Ow0KPiAgPiAJLSBPbmx5IGNvcnJlY3QgdGhlIGlycSBpbiBSQyBtb2RlOw0KPiAgPg0KPiAgPiAg
IGRyaXZlcnMvcGNpL3F1aXJrcy5jIHwgMjkgKysrKysrKysrKysrKysrKysrKysrKysrKysrKysN
Cj4gID4gICAxIGZpbGUgY2hhbmdlZCwgMjkgaW5zZXJ0aW9ucygrKQ0KPiAgPg0KPiAgPiBkaWZm
IC0tZ2l0IGEvZHJpdmVycy9wY2kvcXVpcmtzLmMgYi9kcml2ZXJzL3BjaS9xdWlya3MuYyBpbmRl
eA0KPiAgPiBlZTcyZWJlLi44YjM5Y2NlIDEwMDY0NA0KPiAgPiAtLS0gYS9kcml2ZXJzL3BjaS9x
dWlya3MuYw0KPiAgPiArKysgYi9kcml2ZXJzL3BjaS9xdWlya3MuYw0KPiAgPiBAQCAtMjUsNiAr
MjUsNyBAQA0KPiAgPiAgICNpbmNsdWRlIDxsaW51eC9zY2hlZC5oPg0KPiAgPiAgICNpbmNsdWRl
IDxsaW51eC9rdGltZS5oPg0KPiAgPiAgICNpbmNsdWRlIDxsaW51eC9tbS5oPg0KPiAgPiArI2lu
Y2x1ZGUgPGxpbnV4L29mX2lycS5oPg0KPiAgPiAgICNpbmNsdWRlIDxhc20vZG1hLmg+CS8qIGlz
YV9kbWFfYnJpZGdlX2J1Z2d5ICovDQo+ICA+ICAgI2luY2x1ZGUgInBjaS5oIg0KPiAgPg0KPiAg
PiBAQCAtNDQxOSwzICs0NDIwLDMxIEBAIHN0YXRpYyB2b2lkIHF1aXJrX2ludGVsX3FhdF92Zl9j
YXAoc3RydWN0DQo+ICBwY2lfZGV2ICpwZGV2KQ0KPiAgPiAgIAl9DQo+ICA+ICAgfQ0KPiAgPiAg
IERFQ0xBUkVfUENJX0ZJWFVQX0VBUkxZKFBDSV9WRU5ET1JfSURfSU5URUwsIDB4NDQzLA0KPiAg
PiBxdWlya19pbnRlbF9xYXRfdmZfY2FwKTsNCj4gID4gKw0KPiAgPiArLyogSWYgcm9vdCBwb3J0
IGRvZXNuJ3Qgc3VwcG9ydCBNU0kvTVNJLVgvSU5UeCBpbiBSQyBtb2RlLA0KPiAgPiArICogYnV0
IHVzZSBzdGFuZGFsb25lIGlycS4gUmVhZCB0aGUgZGV2aWNlIHRyZWUgZm9yIHRoZSBhZXINCj4g
ID4gKyAqIGludGVycnVwdCBudW1iZXIuDQo+ICA+ICsgKi8NCj4gID4gK3N0YXRpYyB2b2lkIHF1
aXJrX2Flcl9pbnRlcnJ1cHQoc3RydWN0IHBjaV9kZXYgKmRldikgew0KPiAgPiArCWludCByZXQ7
DQo+ICA+ICsJdTggaGVhZGVyX3R5cGU7DQo+ICA+ICsJc3RydWN0IGRldmljZV9ub2RlICpucCA9
IE5VTEw7DQo+ICA+ICsNCj4gID4gKwkvKiBPbmx5IGZvciB0aGUgUkMgbW9kZSBkZXZpY2UgKi8N
Cj4gID4gKwlwY2lfcmVhZF9jb25maWdfYnl0ZShkZXYsIFBDSV9IRUFERVJfVFlQRSwgJmhlYWRl
cl90eXBlKTsNCj4gID4gKwlpZiAoKGhlYWRlcl90eXBlICYgMHg3RikgIT0gUENJX0hFQURFUl9U
WVBFX0JSSURHRSkNCj4gID4gKwkJcmV0dXJuOw0KPiAgPiArDQo+ICA+ICsJaWYgKGRldi0+YnVz
LT5kZXYub2Zfbm9kZSkNCj4gID4gKwkJbnAgPSBkZXYtPmJ1cy0+ZGV2Lm9mX25vZGU7DQo+ICA+
ICsNCj4gID4gKwlpZiAoSVNfRU5BQkxFRChDT05GSUdfT0ZfSVJRKSAmJiBucCkgew0KPiAgPiAr
CQlyZXQgPSBvZl9pcnFfZ2V0X2J5bmFtZShucCwgImFlciIpOw0KPiAgPiArCQlpZiAocmV0ID4g
MCkgew0KPiAgPiArCQkJZGV2LT5ub19tc2kgPSAxOw0KPiAgPiArCQkJZGV2LT5pcnEgPSByZXQ7
DQo+ICA+ICsJCX0NCj4gID4gKwl9DQo+ICA+ICt9DQo+ICA+ICtERUNMQVJFX1BDSV9GSVhVUF9G
SU5BTChQQ0lfVkVORE9SX0lEX0ZSRUVTQ0FMRSwgUENJX0FOWV9JRCwNCj4gID4gK3F1aXJrX2Fl
cl9pbnRlcnJ1cHQpOw0KPiAgPg0KPiAgDQoNCg==

WARNING: multiple messages have this Message-ID (diff)
From: po.liu@nxp.com (Po Liu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk
Date: Tue, 5 Jul 2016 03:03:01 +0000	[thread overview]
Message-ID: <VI1PR0401MB1709D556D0A7F7BB9188221E92390@VI1PR0401MB1709.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <577A21E4.1030301@huawei.com>

Hi Dongdong,

The patch were intend to fixup the NXP layerscape serial SOC and were tested ok.
I am not clear what platform are you trying to fix. 
The problem on your board may be as below comments:


>  -----Original Message-----
>  From: Dongdong Liu [mailto:liudongdong3 at huawei.com]
>  Sent: Monday, July 04, 2016 4:44 PM
>  To: Po Liu; linux-pci at vger.kernel.org; linux-arm-
>  kernel at lists.infradead.org; linux-kernel at vger.kernel.org;
>  devicetree at vger.kernel.org
>  Cc: Bjorn Helgaas; Shawn Guo; Marc Zyngier; Rob Herring; Roy Zang;
>  Mingkai Hu; Stuart Yoder; Yang-Leo Li; Arnd Bergmann; Minghuan Lian;
>  Murali Karicheri; Linuxarm
>  Subject: Re: [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk
>  
>  Hi Po
>  
>  I found a problem with the similar patch. as the below log.
>  
>  [    4.287060] pci 0000:80:00.0: quirk_aer_interrupt dev->irq 416
>  [    4.293778] pcieport 0000:80:00.0: pci_device_probe in
>  [    4.299605] pcieport 0000:80:00.0: of_irq_parse_pci() failed with
>  rc=-22
>  [    4.307209] pcieport 0000:80:00.0: init_service_irqs  dev->irq 0
>  
>  The fucntions are called as below sequence.
>  1. quirk_aer_interrupt, get the aer dev->irq 416.

This code quirk_aer_interrupt() should be run at pci_fixup_device(pci_fixup_final) which is in the pci_bus_add_devices()

>  2. pci_device_probe->of_irq_parse_pci, of_irq_parse_pci() failed, then
>  dev->irq changed to 0.

pci_device_probe->of_irq_parse_pci which in the pci_scan_child_bus() run before  pci_bus_add_devices(). See dw_pcie_host_init().
Apparently , your quirk_aer_interrupt() is running before the dev->irq assignment in the of_irq_parse_pci().

So make sure your configure the quirk_aer_interrupt() run in the FINAL stage in the quirk.c OR check your host driver which you are using.


>  
>  So this patch could not work with aer.
>  
>  Thanks
>  Dongdong
>  ? 2016/6/14 16:24, Po Liu ??:
>  > On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
>  > When chip support the aer interrupt with none MSI/MSI-X/INTx mode,
>  > maybe there is interrupt line for aer pme etc. Search the interrupt
>  > number in the fdt file. Then fixup the dev->irq with it.
>  >
>  > Signed-off-by: Po Liu <po.liu@nxp.com>
>  > ---
>  > changes for V3:
>  > 	- Move to quirk;
>  > 	- Only correct the irq in RC mode;
>  >
>  >   drivers/pci/quirks.c | 29 +++++++++++++++++++++++++++++
>  >   1 file changed, 29 insertions(+)
>  >
>  > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index
>  > ee72ebe..8b39cce 100644
>  > --- a/drivers/pci/quirks.c
>  > +++ b/drivers/pci/quirks.c
>  > @@ -25,6 +25,7 @@
>  >   #include <linux/sched.h>
>  >   #include <linux/ktime.h>
>  >   #include <linux/mm.h>
>  > +#include <linux/of_irq.h>
>  >   #include <asm/dma.h>	/* isa_dma_bridge_buggy */
>  >   #include "pci.h"
>  >
>  > @@ -4419,3 +4420,31 @@ static void quirk_intel_qat_vf_cap(struct
>  pci_dev *pdev)
>  >   	}
>  >   }
>  >   DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x443,
>  > quirk_intel_qat_vf_cap);
>  > +
>  > +/* If root port doesn't support MSI/MSI-X/INTx in RC mode,
>  > + * but use standalone irq. Read the device tree for the aer
>  > + * interrupt number.
>  > + */
>  > +static void quirk_aer_interrupt(struct pci_dev *dev) {
>  > +	int ret;
>  > +	u8 header_type;
>  > +	struct device_node *np = NULL;
>  > +
>  > +	/* Only for the RC mode device */
>  > +	pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
>  > +	if ((header_type & 0x7F) != PCI_HEADER_TYPE_BRIDGE)
>  > +		return;
>  > +
>  > +	if (dev->bus->dev.of_node)
>  > +		np = dev->bus->dev.of_node;
>  > +
>  > +	if (IS_ENABLED(CONFIG_OF_IRQ) && np) {
>  > +		ret = of_irq_get_byname(np, "aer");
>  > +		if (ret > 0) {
>  > +			dev->no_msi = 1;
>  > +			dev->irq = ret;
>  > +		}
>  > +	}
>  > +}
>  > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID,
>  > +quirk_aer_interrupt);
>  >
>  

  reply	other threads:[~2016-07-05  3:03 UTC|newest]

Thread overview: 201+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-26  6:00 [PATCH 2/2] aer: add support aer interrupt with none MSI/MSI-X/INTx mode Po Liu
2016-05-26  6:00 ` Po Liu
2016-05-26  6:00 ` Po Liu
2016-05-26  6:00 ` Po Liu
2016-06-02  3:48 ` Bjorn Helgaas
2016-06-02  3:48   ` Bjorn Helgaas
2016-06-02  5:01   ` Po Liu
2016-06-02  5:01     ` Po Liu
2016-06-02  5:01     ` Po Liu
2016-06-02  5:01     ` Po Liu
2016-06-02 13:55     ` Bjorn Helgaas
2016-06-02 13:55       ` Bjorn Helgaas
2016-06-02 13:55       ` Bjorn Helgaas
2016-06-02 15:37       ` Murali Karicheri
2016-06-02 15:37         ` Murali Karicheri
2016-06-02 15:37         ` Murali Karicheri
2016-06-03  4:09         ` Bjorn Helgaas
2016-06-03  4:09           ` Bjorn Helgaas
2016-06-03  4:09           ` Bjorn Helgaas
2016-06-03 17:31           ` Murali Karicheri
2016-06-03 17:31             ` Murali Karicheri
2016-06-03 17:31             ` Murali Karicheri
2016-06-04  3:48             ` Bjorn Helgaas
2016-06-04  3:48               ` Bjorn Helgaas
2016-06-04  3:48               ` Bjorn Helgaas
2016-06-06  7:32               ` Po Liu
2016-06-06  7:32                 ` Po Liu
2016-06-06  7:32                 ` Po Liu
2016-06-06  7:32                 ` Po Liu
2016-06-06 14:01                 ` Murali Karicheri
2016-06-06 14:01                   ` Murali Karicheri
2016-06-06 14:01                   ` Murali Karicheri
2016-06-06 18:10                   ` Bjorn Helgaas
2016-06-06 18:10                     ` Bjorn Helgaas
2016-06-06 18:10                     ` Bjorn Helgaas
2016-06-07 10:07                     ` Po Liu
2016-06-07 10:07                       ` Po Liu
2016-06-07 10:07                       ` Po Liu
2016-06-07 10:07                       ` Po Liu
2016-06-07 22:46                       ` Bjorn Helgaas
2016-06-07 22:46                         ` Bjorn Helgaas
2016-06-07 22:46                         ` Bjorn Helgaas
2016-06-08  4:56                         ` Po Liu
2016-06-08  4:56                           ` Po Liu
2016-06-08  4:56                           ` Po Liu
2016-06-08  4:56                           ` Po Liu
2016-06-14  6:12 ` [PATCH v2 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-06-14  6:12   ` Po Liu
2016-06-14  6:12   ` Po Liu
2016-06-14  6:12   ` Po Liu
2016-06-14  6:12   ` [PATCH v2 2/2] pci/aer: interrupt fixup in the quirk Po Liu
2016-06-14  6:12     ` Po Liu
2016-06-14  6:12     ` Po Liu
2016-06-16 13:54     ` Bjorn Helgaas
2016-06-16 13:54       ` Bjorn Helgaas
2016-06-17  3:30       ` Po Liu
2016-06-17  3:30         ` Po Liu
2016-06-17  3:30         ` Po Liu
2016-06-17  3:30         ` Po Liu
2016-07-01  8:46       ` Po Liu
2016-07-01  8:46         ` Po Liu
2016-07-01  8:46         ` Po Liu
2016-07-01  8:46         ` Po Liu
2016-06-14  8:24 ` [PATCH v3 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-06-14  8:24   ` Po Liu
2016-06-14  8:24   ` Po Liu
2016-06-14  8:24   ` Po Liu
2016-06-14  8:24   ` [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk Po Liu
2016-06-14  8:24     ` Po Liu
2016-06-14  8:24     ` Po Liu
2016-06-14  8:24     ` Po Liu
2016-06-23  5:43     ` Dongdong Liu
2016-06-23  5:43       ` Dongdong Liu
2016-06-23  5:43       ` Dongdong Liu
2016-07-01  8:40       ` Po Liu
2016-07-01  8:40         ` Po Liu
2016-07-01  8:40         ` Po Liu
2016-07-01  8:40         ` Po Liu
2016-07-04  8:44     ` Dongdong Liu
2016-07-04  8:44       ` Dongdong Liu
2016-07-04  8:44       ` Dongdong Liu
2016-07-05  3:03       ` Po Liu [this message]
2016-07-05  3:03         ` Po Liu
2016-07-05  3:03         ` Po Liu
2016-07-05  3:03         ` Po Liu
2016-07-06  8:38         ` Dongdong Liu
2016-07-06  8:38           ` Dongdong Liu
2016-07-06  8:38           ` Dongdong Liu
2016-07-06  8:38           ` Dongdong Liu
2016-07-29 22:41     ` Bjorn Helgaas
2016-07-29 22:41       ` Bjorn Helgaas
2016-07-29 22:41       ` Bjorn Helgaas
2016-07-29 22:41       ` Bjorn Helgaas
2016-08-22 10:09       ` Po Liu
2016-08-22 10:09         ` Po Liu
2016-08-22 10:09         ` Po Liu
2016-08-22 10:09         ` Po Liu
2016-09-20 20:47         ` Bjorn Helgaas
2016-09-20 20:47           ` Bjorn Helgaas
2016-09-20 20:47           ` Bjorn Helgaas
2016-09-21  6:51           ` Po Liu
2016-09-21  6:51             ` Po Liu
2016-09-21  6:51             ` Po Liu
2016-09-21  6:51             ` Po Liu
2016-09-21 21:53             ` Bjorn Helgaas
2016-09-21 21:53               ` Bjorn Helgaas
2016-09-21 21:53               ` Bjorn Helgaas
2016-09-21 21:53               ` Bjorn Helgaas
2016-08-31  6:37     ` [PATCH v4 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-08-31  6:37       ` Po Liu
2016-08-31  6:37       ` Po Liu
2016-08-31  6:37       ` [PATCH v4 2/2] pci:aer: add support aer interrupt with none MSI/MSI-X/INTx mode Po Liu
2016-08-31  6:37         ` Po Liu
2016-08-31  6:37         ` Po Liu
2016-09-02 15:17         ` Rob Herring
2016-09-02 15:17           ` Rob Herring
2016-09-02 15:17           ` Rob Herring
2016-09-05  6:05           ` Po Liu
2016-09-05  6:05             ` Po Liu
2016-09-05  6:05             ` Po Liu
2016-09-05  6:05             ` Po Liu
2016-09-13  4:40         ` [PATCH v5 1/3] arm/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-09-13  4:40           ` Po Liu
2016-09-13  4:40           ` Po Liu
2016-09-13  4:40           ` Po Liu
2016-09-13  4:40           ` [PATCH v5 2/3] arm64/dts: " Po Liu
2016-09-13  4:40             ` Po Liu
2016-09-13  4:40             ` Po Liu
2016-09-13  4:40           ` [PATCH v5 3/3] pci:aer: add support aer interrupt with none MSI/MSI-X/INTx mode Po Liu
2016-09-13  4:40             ` Po Liu
2016-09-13  4:40             ` Po Liu
2016-09-13  4:40             ` Po Liu
2016-09-18  0:52             ` Shawn Guo
2016-09-18  0:52               ` Shawn Guo
2016-09-18  0:52               ` Shawn Guo
2016-09-18  3:37               ` Po Liu
2016-09-18  3:37                 ` Po Liu
2016-09-18  3:37                 ` Po Liu
2016-09-18  3:37                 ` Po Liu
2016-09-20 12:39                 ` Shawn Guo
2016-09-20 12:39                   ` Shawn Guo
2016-09-20 12:39                   ` Shawn Guo
2016-09-20 12:39                   ` Shawn Guo
2016-09-21  6:54                   ` Po Liu
2016-09-21  6:54                     ` Po Liu
2016-09-21  6:54                     ` Po Liu
2016-09-21  6:54                     ` Po Liu
2016-09-30 22:13                     ` Shawn Guo
2016-09-30 22:13                       ` Shawn Guo
2016-09-30 22:13                       ` Shawn Guo
2016-09-23 13:06                 ` Rob Herring
2016-09-23 13:06                   ` Rob Herring
2016-09-23 13:06                   ` Rob Herring
2016-09-26  8:25                   ` Po Liu
2016-09-26  8:25                     ` Po Liu
2016-09-26  8:25                     ` Po Liu
2016-09-26  8:25                     ` Po Liu
2016-09-21 22:37             ` Bjorn Helgaas
2016-09-21 22:37               ` Bjorn Helgaas
2016-09-21 22:37               ` Bjorn Helgaas
2016-09-21 22:37               ` Bjorn Helgaas
2016-09-22  2:53               ` Po Liu
2016-09-22  2:53                 ` Po Liu
2016-09-22  2:53                 ` Po Liu
2016-09-22  2:53                 ` Po Liu
2016-09-30  9:11             ` [PATCH v6 1/3] arm/dts-ls1021: add pcie aer/pme interrupt-name property in the dts Po Liu
2016-09-30  9:11               ` Po Liu
2016-09-30  9:11               ` Po Liu
2016-09-30  9:11               ` Po Liu
2016-09-30  9:11               ` [PATCH v6 2/3] arm64/dts-ls1043-ls2080: " Po Liu
2016-09-30  9:11                 ` Po Liu
2016-09-30  9:11                 ` Po Liu
2016-09-30  9:11                 ` Po Liu
2016-09-30  9:11               ` [PATCH v6 3/3] pci:add support aer/pme interrupts with none MSI/MSI-X/INTx mode Po Liu
2016-09-30  9:11                 ` Po Liu
2016-09-30  9:11                 ` Po Liu
2016-09-30  9:11                 ` Po Liu
2016-10-08 20:49                 ` Rob Herring
2016-10-08 20:49                   ` Rob Herring
2016-10-08 20:49                   ` Rob Herring
2016-10-09  2:47                   ` Po Liu
2016-10-09  2:47                     ` Po Liu
2016-10-09  2:47                     ` Po Liu
2016-10-09  2:47                     ` Po Liu
2016-09-05  2:25       ` [PATCH v4 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Shawn Guo
2016-09-05  2:25         ` Shawn Guo
2016-09-12 22:13       ` Bjorn Helgaas
2016-09-12 22:13         ` Bjorn Helgaas
2016-09-12 22:13         ` Bjorn Helgaas
2016-09-13  3:02         ` Po Liu
2016-09-13  3:02           ` Po Liu
2016-09-13  3:02           ` Po Liu
2016-09-13  3:02           ` Po Liu
2016-06-16  0:36   ` [PATCH v3 " Shawn Guo
2016-06-16  0:36     ` Shawn Guo
2016-06-16 10:50     ` Po Liu
2016-06-16 10:50       ` Po Liu
2016-06-16 10:50       ` Po Liu
2016-06-16 10:50       ` Po Liu
2016-06-16 22:19   ` Rob Herring
2016-06-16 22:19     ` Rob Herring

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=VI1PR0401MB1709D556D0A7F7BB9188221E92390@VI1PR0401MB1709.eurprd04.prod.outlook.com \
    --to=po.liu@nxp.com \
    --cc=arnd@arndb.de \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=leoyang.li@nxp.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linuxarm@huawei.com \
    --cc=liudongdong3@huawei.com \
    --cc=m-karicheri2@ti.com \
    --cc=marc.zyngier@arm.com \
    --cc=minghuan.lian@nxp.com \
    --cc=mingkai.hu@nxp.com \
    --cc=robh@kernel.org \
    --cc=roy.zang@nxp.com \
    --cc=shawnguo@kernel.org \
    --cc=stuart.yoder@nxp.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.