[U-Boot] [PATCH] drivers: net: mc: Report extra memory to Linux

[U-Boot] [PATCH] drivers: net: mc: Report extra memory to Linux

[Meenakshi Aggarwal]

MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
 board/freescale/ls1088a/ls1088a.c       | 31 ++++++++++++++++++++++++++++---
 board/freescale/ls2080ardb/ls2080ardb.c | 32 +++++++++++++++++++++++++++++---
 board/freescale/lx2160a/lx2160a.c       | 31 ++++++++++++++++++++++++++++---
 drivers/net/fsl-mc/mc.c                 | 10 ++++++++++
 include/fsl-mc/fsl_mc.h                 |  1 +
 5 files changed, 96 insertions(+), 9 deletions(-)

diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 6d11a13..96f0871 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -738,11 +738,26 @@ void fsl_fdt_fixup_flash(void *fdt)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	int i;
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	bool mc_memory_bank = false;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = true;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the two GPP DDR banks */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		base[i] = gd->bd->bi_dram[i].start;
@@ -759,7 +774,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[1] = gd->arch.resv_ram - base[1];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index ce419df..3af83f9 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -409,11 +409,27 @@ void fsl_fdt_fixup_flash(void *fdt)
 
 int ft_board_setup(void *blob, bd_t *bd)
 {
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	int i;
+	bool mc_memory_bank = false;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = true;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the two GPP DDR banks */
 	base[0] = gd->bd->bi_dram[0].start;
 	size[0] = gd->bd->bi_dram[0].size;
@@ -430,7 +446,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[1] = gd->arch.resv_ram - base[1];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, 2);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 3875d04..93b5204 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -520,11 +520,26 @@ void board_quiesce_devices(void)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	int i;
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	bool mc_memory_bank = false;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = true;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the three GPP DDR banks */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		base[i] = gd->bd->bi_dram[i].start;
@@ -544,7 +559,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[2] = gd->arch.resv_ram - base[2];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 #ifdef CONFIG_USB
 	fsl_fdt_fixup_dr_usb(blob, bd);
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index cc59b21..f424025 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -281,6 +281,16 @@ static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
 				 MC_FIXUP_DPL);
 }
 
+void fdt_fixup_mc_ddr(u64 *base, u64 *size)
+{
+	u64 mc_size = mc_get_dram_block_size();
+
+	if (mc_size < MC_DRAM_BLOCK_DEFAULT_SIZE) {
+		*base = mc_get_dram_addr() + mc_size;
+		*size = MC_DRAM_BLOCK_DEFAULT_SIZE - mc_size;
+	}
+}
+
 void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)
 {
 	u32 *prop;
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index 0abd797..a4d7d85 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -55,6 +55,7 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob);
 int get_mc_boot_status(void);
 int get_dpl_apply_status(void);
 int is_lazy_dpl_addr_valid(void);
+void fdt_fixup_mc_ddr(u64 *base, u64 *size);
 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
 int get_aiop_apply_status(void);
 #endif
-- 
1.9.1

[U-Boot] [PATCH] drivers: net: mc: Report extra memory to Linux

[Prabhakar Kushwaha]

Dear Meenakshi,

> -----Original Message-----
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Sent: Friday, April 5, 2019 7:57 PM
> To: u-boot at lists.denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>
> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Subject: [PATCH] drivers: net: mc: Report extra memory to Linux
> 
> MC firmware need to be aligned to 512M, so minimum 512MB DDR is
> reserved.
> But MC support to work with 128MB or 256MB DDR memory also, in this case,
> rest of the memory is not usable.
> So reporting this extra memory to Linux through dtb memory fixup.
> 
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> ---
>  board/freescale/ls1088a/ls1088a.c       | 31
> ++++++++++++++++++++++++++++---
>  board/freescale/ls2080ardb/ls2080ardb.c | 32
> +++++++++++++++++++++++++++++---
>  board/freescale/lx2160a/lx2160a.c       | 31
> ++++++++++++++++++++++++++++---
>  drivers/net/fsl-mc/mc.c                 | 10 ++++++++++
>  include/fsl-mc/fsl_mc.h                 |  1 +
>  5 files changed, 96 insertions(+), 9 deletions(-)
> 
> diff --git a/board/freescale/ls1088a/ls1088a.c
> b/board/freescale/ls1088a/ls1088a.c
> index 6d11a13..96f0871 100644
> --- a/board/freescale/ls1088a/ls1088a.c
> +++ b/board/freescale/ls1088a/ls1088a.c
> @@ -738,11 +738,26 @@ void fsl_fdt_fixup_flash(void *fdt)  int
> ft_board_setup(void *blob, bd_t *bd)  {
>  	int i;
> -	u64 base[CONFIG_NR_DRAM_BANKS];
> -	u64 size[CONFIG_NR_DRAM_BANKS];
> +	bool mc_memory_bank = false;
> +
> +	u64 *base;
> +	u64 *size;
> +	u64 mc_memory_base = 0;
> +	u64 mc_memory_size = 0;
> +	u16 total_memory_banks;
> 
>  	ft_cpu_setup(blob, bd);
> 
> +	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
> +
> +	if (mc_memory_base != 0)
> +		mc_memory_bank = true;
> +
> +	total_memory_banks = CONFIG_NR_DRAM_BANKS +
> mc_memory_bank;
> +

mc_memory_bank has been assigned as "true" and you are adding it to total_memory_banks.
You cannot assume "true"as 1

Please fix it.

--pk

[U-Boot] [PATCH v1] drivers: net: mc: Report extra memory to Linux

[Meenakshi Aggarwal]

MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
 board/freescale/ls1088a/ls1088a.c       | 31 +++++++++++++++++++++++++++---
 board/freescale/ls2080ardb/ls2080ardb.c | 32 ++++++++++++++++++++++++++++---
 board/freescale/lx2160a/lx2160a.c       | 34 ++++++++++++++++++++++++++++++---
 drivers/net/fsl-mc/mc.c                 | 10 ++++++++++
 include/fsl-mc/fsl_mc.h                 |  1 +
 5 files changed, 99 insertions(+), 9 deletions(-)

diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 6d11a13..96f0871 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -738,11 +738,26 @@ void fsl_fdt_fixup_flash(void *fdt)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	int i;
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	bool mc_memory_bank = false;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = true;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the two GPP DDR banks */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		base[i] = gd->bd->bi_dram[i].start;
@@ -759,7 +774,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[1] = gd->arch.resv_ram - base[1];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index ce419df..3af83f9 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -409,11 +409,27 @@ void fsl_fdt_fixup_flash(void *fdt)
 
 int ft_board_setup(void *blob, bd_t *bd)
 {
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	int i;
+	bool mc_memory_bank = false;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = true;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the two GPP DDR banks */
 	base[0] = gd->bd->bi_dram[0].start;
 	size[0] = gd->bd->bi_dram[0].size;
@@ -430,7 +446,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[1] = gd->arch.resv_ram - base[1];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, 2);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 3875d04..b44ca3f 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -30,6 +30,9 @@
 #include "../common/emc2305.h"
 #endif
 
+#define TRUE						1
+#define FALSE					0
+
 #ifdef CONFIG_TARGET_LX2160AQDS
 #define CFG_MUX_I2C_SDHC(reg, value)		((reg & 0x3f) | value)
 #define SET_CFG_MUX1_SDHC1_SDHC(reg)		(reg & 0x3f)
@@ -520,11 +523,26 @@ void board_quiesce_devices(void)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	int i;
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	bool mc_memory_bank = FALSE;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = TRUE;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the three GPP DDR banks */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		base[i] = gd->bd->bi_dram[i].start;
@@ -544,7 +562,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[2] = gd->arch.resv_ram - base[2];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 #ifdef CONFIG_USB
 	fsl_fdt_fixup_dr_usb(blob, bd);
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index cc59b21..f424025 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -281,6 +281,16 @@ static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
 				 MC_FIXUP_DPL);
 }
 
+void fdt_fixup_mc_ddr(u64 *base, u64 *size)
+{
+	u64 mc_size = mc_get_dram_block_size();
+
+	if (mc_size < MC_DRAM_BLOCK_DEFAULT_SIZE) {
+		*base = mc_get_dram_addr() + mc_size;
+		*size = MC_DRAM_BLOCK_DEFAULT_SIZE - mc_size;
+	}
+}
+
 void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)
 {
 	u32 *prop;
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index 0abd797..a4d7d85 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -55,6 +55,7 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob);
 int get_mc_boot_status(void);
 int get_dpl_apply_status(void);
 int is_lazy_dpl_addr_valid(void);
+void fdt_fixup_mc_ddr(u64 *base, u64 *size);
 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
 int get_aiop_apply_status(void);
 #endif
-- 
1.9.1

[U-Boot] [PATCH v2] cover letter for drivers: net: mc: Report extra memory to linux

[Meenakshi Aggarwal]

changes in different versions:

v1 : Incorporated review comments in one board, Missed for other boards
v2 : Incorporated review comments in all boards.

Meenakshi Aggarwal (1):
  drivers: net: mc: Report extra memory to Linux

 board/freescale/ls1088a/ls1088a.c       | 34 +++++++++++++++++++++++++++++---
 board/freescale/ls2080ardb/ls2080ardb.c | 35 ++++++++++++++++++++++++++++++---
 board/freescale/lx2160a/lx2160a.c       | 34 +++++++++++++++++++++++++++++---
 drivers/net/fsl-mc/mc.c                 | 10 ++++++++++
 include/fsl-mc/fsl_mc.h                 |  1 +
 5 files changed, 105 insertions(+), 9 deletions(-)

-- 
1.9.1

[U-Boot] [PATCH v2] drivers: net: mc: Report extra memory to Linux

[Meenakshi Aggarwal]

MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
 board/freescale/ls1088a/ls1088a.c       | 34 +++++++++++++++++++++++++++++---
 board/freescale/ls2080ardb/ls2080ardb.c | 35 ++++++++++++++++++++++++++++++---
 board/freescale/lx2160a/lx2160a.c       | 34 +++++++++++++++++++++++++++++---
 drivers/net/fsl-mc/mc.c                 | 10 ++++++++++
 include/fsl-mc/fsl_mc.h                 |  1 +
 5 files changed, 105 insertions(+), 9 deletions(-)

diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 6d11a13..88c34cb 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -28,6 +28,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define TRUE						1
+#define FALSE						0
+
 #ifdef CONFIG_TARGET_LS1088AQDS
 #ifdef CONFIG_TFABOOT
 struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
@@ -738,11 +741,26 @@ void fsl_fdt_fixup_flash(void *fdt)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	int i;
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	bool mc_memory_bank = FALSE;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = TRUE;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the two GPP DDR banks */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		base[i] = gd->bd->bi_dram[i].start;
@@ -759,7 +777,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[1] = gd->arch.resv_ram - base[1];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index ce419df..b6b4e80 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -22,6 +22,9 @@
 #include <asm/arch/ppa.h>
 #include <fsl_sec.h>
 
+#define TRUE						1
+#define FALSE						0
+
 #ifdef CONFIG_FSL_QIXIS
 #include "../common/qixis.h"
 #include "ls2080ardb_qixis.h"
@@ -409,11 +412,27 @@ void fsl_fdt_fixup_flash(void *fdt)
 
 int ft_board_setup(void *blob, bd_t *bd)
 {
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	int i;
+	bool mc_memory_bank = FALSE;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = TRUE;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the two GPP DDR banks */
 	base[0] = gd->bd->bi_dram[0].start;
 	size[0] = gd->bd->bi_dram[0].size;
@@ -430,7 +449,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[1] = gd->arch.resv_ram - base[1];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, 2);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 3875d04..5f6099f 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -30,6 +30,9 @@
 #include "../common/emc2305.h"
 #endif
 
+#define TRUE						1
+#define FALSE						0
+
 #ifdef CONFIG_TARGET_LX2160AQDS
 #define CFG_MUX_I2C_SDHC(reg, value)		((reg & 0x3f) | value)
 #define SET_CFG_MUX1_SDHC1_SDHC(reg)		(reg & 0x3f)
@@ -520,11 +523,26 @@ void board_quiesce_devices(void)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	int i;
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	bool mc_memory_bank = FALSE;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = TRUE;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the three GPP DDR banks */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		base[i] = gd->bd->bi_dram[i].start;
@@ -544,7 +562,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[2] = gd->arch.resv_ram - base[2];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 #ifdef CONFIG_USB
 	fsl_fdt_fixup_dr_usb(blob, bd);
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index cc59b21..f424025 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -281,6 +281,16 @@ static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
 				 MC_FIXUP_DPL);
 }
 
+void fdt_fixup_mc_ddr(u64 *base, u64 *size)
+{
+	u64 mc_size = mc_get_dram_block_size();
+
+	if (mc_size < MC_DRAM_BLOCK_DEFAULT_SIZE) {
+		*base = mc_get_dram_addr() + mc_size;
+		*size = MC_DRAM_BLOCK_DEFAULT_SIZE - mc_size;
+	}
+}
+
 void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)
 {
 	u32 *prop;
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index 0abd797..a4d7d85 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -55,6 +55,7 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob);
 int get_mc_boot_status(void);
 int get_dpl_apply_status(void);
 int is_lazy_dpl_addr_valid(void);
+void fdt_fixup_mc_ddr(u64 *base, u64 *size);
 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
 int get_aiop_apply_status(void);
 #endif
-- 
1.9.1

[U-Boot] [PATCH v2] drivers: net: mc: Report extra memory to Linux

[Prabhakar Kushwaha]

> -----Original Message-----
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Sent: Wednesday, May 15, 2019 4:40 PM
> To: u-boot at lists.denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>
> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Subject: [PATCH v2] drivers: net: mc: Report extra memory to Linux
> 

V2 but no revision history

> MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
> But MC support to work with 128MB or 256MB DDR memory also, in this case,
> rest of the memory is not usable.
> So reporting this extra memory to Linux through dtb memory fixup.
> 
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> ---
>  board/freescale/ls1088a/ls1088a.c       | 34
> +++++++++++++++++++++++++++++---
>  board/freescale/ls2080ardb/ls2080ardb.c | 35
> ++++++++++++++++++++++++++++++---
>  board/freescale/lx2160a/lx2160a.c       | 34
> +++++++++++++++++++++++++++++---
>  drivers/net/fsl-mc/mc.c                 | 10 ++++++++++
>  include/fsl-mc/fsl_mc.h                 |  1 +
>  5 files changed, 105 insertions(+), 9 deletions(-)
> 
> diff --git a/board/freescale/ls1088a/ls1088a.c
> b/board/freescale/ls1088a/ls1088a.c
> index 6d11a13..88c34cb 100644
> --- a/board/freescale/ls1088a/ls1088a.c
> +++ b/board/freescale/ls1088a/ls1088a.c
> @@ -28,6 +28,9 @@
> 
>  DECLARE_GLOBAL_DATA_PTR;
> 
> +#define TRUE						1
> +#define FALSE						0
> +
>  #ifdef CONFIG_TARGET_LS1088AQDS
>  #ifdef CONFIG_TFABOOT
>  struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
> @@ -738,11 +741,26 @@ void fsl_fdt_fixup_flash(void *fdt)  int
> ft_board_setup(void *blob, bd_t *bd)  {
>  	int i;
> -	u64 base[CONFIG_NR_DRAM_BANKS];
> -	u64 size[CONFIG_NR_DRAM_BANKS];
> +	bool mc_memory_bank = FALSE;
> +
> +	u64 *base;
> +	u64 *size;
> +	u64 mc_memory_base = 0;
> +	u64 mc_memory_size = 0;
> +	u16 total_memory_banks;
> 
>  	ft_cpu_setup(blob, bd);
> 
> +	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
> +
> +	if (mc_memory_base != 0)
> +		mc_memory_bank = TRUE;
> +

Again same mistake ☹

--pk

[U-Boot] [PATCH v2] cover letter for drivers: net: mc: Report extra memory to linux

[Prabhakar Kushwaha]

> -----Original Message-----
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Sent: Wednesday, May 15, 2019 4:40 PM
> To: u-boot at lists.denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>
> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Subject: [PATCH v2] cover letter for drivers: net: mc: Report extra memory to
> linux
> 
> changes in different versions:
> 
> v1 : Incorporated review comments in one board, Missed for other boards
> v2 : Incorporated review comments in all boards.
> 

Cover letter is not required for one patch. It is usually done for patch-set. 

Please add revision history as part of your patch after "..."

--pk

[U-Boot] [PATCH v3] drivers: net: mc: Report extra memory to Linux

[Prabhakar Kushwaha]

> -----Original Message-----
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Sent: Thursday, May 23, 2019 2:33 PM
> To: u-boot at lists.denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>
> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Subject: [PATCH v3] drivers: net: mc: Report extra memory to Linux
> 
> MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
> But MC support to work with 128MB or 256MB DDR memory also, in this case,
> rest of the memory is not usable.
> So reporting this extra memory to Linux through dtb memory fixup.
> 
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> ---
> changed for v1:
>         - Incorporated review comments in one board, Missed for
> 	  other boards
> changed for v2:
> 	- Incorporated review comments in all boards changed for v3:
>         - Include revision history in patch
> ---
>  board/freescale/ls1088a/ls1088a.c       | 34
> +++++++++++++++++++++++++++++---
>  board/freescale/ls2080ardb/ls2080ardb.c | 35
> ++++++++++++++++++++++++++++++---
>  board/freescale/lx2160a/lx2160a.c       | 34
> +++++++++++++++++++++++++++++---
>  drivers/net/fsl-mc/mc.c                 | 10 ++++++++++
>  include/fsl-mc/fsl_mc.h                 |  1 +
>  5 files changed, 105 insertions(+), 9 deletions(-)
> 
> diff --git a/board/freescale/ls1088a/ls1088a.c
> b/board/freescale/ls1088a/ls1088a.c
> index 6d11a13..88c34cb 100644
> --- a/board/freescale/ls1088a/ls1088a.c
> +++ b/board/freescale/ls1088a/ls1088a.c
> @@ -28,6 +28,9 @@
> 
>  DECLARE_GLOBAL_DATA_PTR;
> 
> +#define TRUE						1
> +#define FALSE						0
> +
>  #ifdef CONFIG_TARGET_LS1088AQDS
>  #ifdef CONFIG_TFABOOT
>  struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
> @@ -738,11 +741,26 @@ void fsl_fdt_fixup_flash(void *fdt)  int
> ft_board_setup(void *blob, bd_t *bd)  {
>  	int i;
> -	u64 base[CONFIG_NR_DRAM_BANKS];
> -	u64 size[CONFIG_NR_DRAM_BANKS];
> +	bool mc_memory_bank = FALSE;
> +
             Use at u8 or u16 or u32. Don't use as bool

> +	u64 *base;
> +	u64 *size;
> +	u64 mc_memory_base = 0;
> +	u64 mc_memory_size = 0;
> +	u16 total_memory_banks;
> 
>  	ft_cpu_setup(blob, bd);
> 
> +	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
> +
> +	if (mc_memory_base != 0)
> +		mc_memory_bank = TRUE;
> +

Please avoid TRUE and FALSE for increment.  
Directly do mc_memory_bank++

--pk

[U-Boot] [PATCH v3] drivers: net: mc: Report extra memory to Linux

[Meenakshi Aggarwal]

MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
changed for v1:
        - Incorporated review comments in one board, Missed for
	  other boards
changed for v2:
	- Incorporated review comments in all boards
changed for v3:
        - Include revision history in patch
---
 board/freescale/ls1088a/ls1088a.c       | 34 +++++++++++++++++++++++++++++---
 board/freescale/ls2080ardb/ls2080ardb.c | 35 ++++++++++++++++++++++++++++++---
 board/freescale/lx2160a/lx2160a.c       | 34 +++++++++++++++++++++++++++++---
 drivers/net/fsl-mc/mc.c                 | 10 ++++++++++
 include/fsl-mc/fsl_mc.h                 |  1 +
 5 files changed, 105 insertions(+), 9 deletions(-)

diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 6d11a13..88c34cb 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -28,6 +28,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define TRUE						1
+#define FALSE						0
+
 #ifdef CONFIG_TARGET_LS1088AQDS
 #ifdef CONFIG_TFABOOT
 struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
@@ -738,11 +741,26 @@ void fsl_fdt_fixup_flash(void *fdt)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	int i;
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	bool mc_memory_bank = FALSE;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = TRUE;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the two GPP DDR banks */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		base[i] = gd->bd->bi_dram[i].start;
@@ -759,7 +777,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[1] = gd->arch.resv_ram - base[1];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index ce419df..b6b4e80 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -22,6 +22,9 @@
 #include <asm/arch/ppa.h>
 #include <fsl_sec.h>
 
+#define TRUE						1
+#define FALSE						0
+
 #ifdef CONFIG_FSL_QIXIS
 #include "../common/qixis.h"
 #include "ls2080ardb_qixis.h"
@@ -409,11 +412,27 @@ void fsl_fdt_fixup_flash(void *fdt)
 
 int ft_board_setup(void *blob, bd_t *bd)
 {
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	int i;
+	bool mc_memory_bank = FALSE;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = TRUE;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the two GPP DDR banks */
 	base[0] = gd->bd->bi_dram[0].start;
 	size[0] = gd->bd->bi_dram[0].size;
@@ -430,7 +449,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[1] = gd->arch.resv_ram - base[1];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, 2);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 3875d04..5f6099f 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -30,6 +30,9 @@
 #include "../common/emc2305.h"
 #endif
 
+#define TRUE						1
+#define FALSE						0
+
 #ifdef CONFIG_TARGET_LX2160AQDS
 #define CFG_MUX_I2C_SDHC(reg, value)		((reg & 0x3f) | value)
 #define SET_CFG_MUX1_SDHC1_SDHC(reg)		(reg & 0x3f)
@@ -520,11 +523,26 @@ void board_quiesce_devices(void)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	int i;
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	bool mc_memory_bank = FALSE;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank = TRUE;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the three GPP DDR banks */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		base[i] = gd->bd->bi_dram[i].start;
@@ -544,7 +562,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[2] = gd->arch.resv_ram - base[2];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 #ifdef CONFIG_USB
 	fsl_fdt_fixup_dr_usb(blob, bd);
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index cc59b21..f424025 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -281,6 +281,16 @@ static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
 				 MC_FIXUP_DPL);
 }
 
+void fdt_fixup_mc_ddr(u64 *base, u64 *size)
+{
+	u64 mc_size = mc_get_dram_block_size();
+
+	if (mc_size < MC_DRAM_BLOCK_DEFAULT_SIZE) {
+		*base = mc_get_dram_addr() + mc_size;
+		*size = MC_DRAM_BLOCK_DEFAULT_SIZE - mc_size;
+	}
+}
+
 void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)
 {
 	u32 *prop;
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index 0abd797..a4d7d85 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -55,6 +55,7 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob);
 int get_mc_boot_status(void);
 int get_dpl_apply_status(void);
 int is_lazy_dpl_addr_valid(void);
+void fdt_fixup_mc_ddr(u64 *base, u64 *size);
 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
 int get_aiop_apply_status(void);
 #endif
-- 
1.9.1

[U-Boot] [PATCH v4] drivers: net: mc: Report extra memory to Linux

[Meenakshi Aggarwal]

MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
changed for v1:
        - Incorporated review comments in one board, Missed for
	  other boards
changed for v2:
	- Incorporated review comments in all boards
changed for v3:
        - Include revision history in patch
changed for v4:
	- Remove macro TRUE/FALSE
---
 board/freescale/ls1088a/ls1088a.c       | 31 ++++++++++++++++++++++++++++---
 board/freescale/ls2080ardb/ls2080ardb.c | 32 +++++++++++++++++++++++++++++---
 board/freescale/lx2160a/lx2160a.c       | 31 ++++++++++++++++++++++++++++---
 drivers/net/fsl-mc/mc.c                 | 10 ++++++++++
 include/fsl-mc/fsl_mc.h                 |  1 +
 5 files changed, 96 insertions(+), 9 deletions(-)

diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 6d11a13..db26938 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -738,11 +738,26 @@ void fsl_fdt_fixup_flash(void *fdt)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	int i;
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	u16 mc_memory_bank = 0;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank++;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the two GPP DDR banks */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		base[i] = gd->bd->bi_dram[i].start;
@@ -759,7 +774,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[1] = gd->arch.resv_ram - base[1];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index ce419df..318ee65 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -409,11 +409,27 @@ void fsl_fdt_fixup_flash(void *fdt)
 
 int ft_board_setup(void *blob, bd_t *bd)
 {
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	int i;
+	u16 mc_memory_bank = 0;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank++;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the two GPP DDR banks */
 	base[0] = gd->bd->bi_dram[0].start;
 	size[0] = gd->bd->bi_dram[0].size;
@@ -430,7 +446,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[1] = gd->arch.resv_ram - base[1];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, 2);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 3875d04..aa2ff74 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -520,11 +520,26 @@ void board_quiesce_devices(void)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	int i;
-	u64 base[CONFIG_NR_DRAM_BANKS];
-	u64 size[CONFIG_NR_DRAM_BANKS];
+	u16 mc_memory_bank = 0;
+
+	u64 *base;
+	u64 *size;
+	u64 mc_memory_base = 0;
+	u64 mc_memory_size = 0;
+	u16 total_memory_banks;
 
 	ft_cpu_setup(blob, bd);
 
+	fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+	if (mc_memory_base != 0)
+		mc_memory_bank++;
+
+	total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+	base = calloc(total_memory_banks, sizeof(u64));
+	size = calloc(total_memory_banks, sizeof(u64));
+
 	/* fixup DT for the three GPP DDR banks */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		base[i] = gd->bd->bi_dram[i].start;
@@ -544,7 +559,17 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[2] = gd->arch.resv_ram - base[2];
 #endif
 
-	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+	if (mc_memory_base != 0) {
+		for (i = 0; i <= total_memory_banks; i++) {
+			if (base[i] == 0 && size[i] == 0) {
+				base[i] = mc_memory_base;
+				size[i] = mc_memory_size;
+				break;
+			}
+		}
+	}
+
+	fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
 
 #ifdef CONFIG_USB
 	fsl_fdt_fixup_dr_usb(blob, bd);
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index cc59b21..f424025 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -281,6 +281,16 @@ static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
 				 MC_FIXUP_DPL);
 }
 
+void fdt_fixup_mc_ddr(u64 *base, u64 *size)
+{
+	u64 mc_size = mc_get_dram_block_size();
+
+	if (mc_size < MC_DRAM_BLOCK_DEFAULT_SIZE) {
+		*base = mc_get_dram_addr() + mc_size;
+		*size = MC_DRAM_BLOCK_DEFAULT_SIZE - mc_size;
+	}
+}
+
 void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)
 {
 	u32 *prop;
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index 0abd797..a4d7d85 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -55,6 +55,7 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob);
 int get_mc_boot_status(void);
 int get_dpl_apply_status(void);
 int is_lazy_dpl_addr_valid(void);
+void fdt_fixup_mc_ddr(u64 *base, u64 *size);
 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
 int get_aiop_apply_status(void);
 #endif
-- 
1.9.1

[U-Boot] [PATCH v4] drivers: net: mc: Report extra memory to Linux

[Prabhakar Kushwaha]

> -----Original Message-----
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Sent: Thursday, May 23, 2019 3:14 PM
> To: u-boot at lists.denx.de; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>
> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Subject: [PATCH v4] drivers: net: mc: Report extra memory to Linux
> 
> MC firmware need to be aligned to 512M, so minimum 512MB DDR is
> reserved.
> But MC support to work with 128MB or 256MB DDR memory also, in this case,
> rest of the memory is not usable.
> So reporting this extra memory to Linux through dtb memory fixup.
> 
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> ---
> changed for v1:
>         - Incorporated review comments in one board, Missed for
> 	  other boards
> changed for v2:
> 	- Incorporated review comments in all boards changed for v3:
>         - Include revision history in patch changed for v4:
> 	- Remove macro TRUE/FALSE
> 
This patch has been applied to fsl-qoriq master, awaiting upstream.

--pk