* [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
@ 2015-12-28 3:47 ` shh.xie
0 siblings, 0 replies; 10+ messages in thread
From: shh.xie @ 2015-12-28 3:47 UTC (permalink / raw)
To: devicetree, linuxppc-dev; +Cc: scottwood, igal.liberman, Shaohui Xie
From: Shaohui Xie <Shaohui.Xie@freescale.com>
PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs
to change corresponding serdes lane settings, so a reference is needed
for serdes lane. This patch describes properties needed for PCS PHY to
support backplane.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
---
based on: http://patchwork.ozlabs.org/patch/560936/
Documentation/devicetree/bindings/powerpc/fsl/fman.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
index 55c2c03..b38e727 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
@@ -432,6 +432,16 @@ example of how to define a PHY (Internal PHY has no interrupt line).
- For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,
PCS PHY addr must be '0'.
+ PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs to
+ change the corresponding serdes lane settings.
+
+ PCS PHY node properties required for backplane:
+
+ - compatible: must be "ethernet-phy-ieee802.3-c45".
+ - phy-mode: string, operation mode of the PHY interface; must be "1000base-kx"
+ for 1000BASE-KX, or "10gbase-kr" for 10GBASE-KR.
+ - lane-handle: phandle, specifies a reference to a node representing a Serdes.
+ - lane-range: offset and length of the register set for the serdes lane.
EXAMPLE
@@ -464,7 +474,11 @@ mdio@f1000 {
fsl,fman-internal-mdio;
pcsphy6: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ phy-mode = "10gbase-kr";
reg = <0x0>;
+ lane-handle = <&serdes>;
+ lane-range = <0x18c0 0x40>;
};
};
--
2.1.0.27.g96db324
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
@ 2015-12-28 3:47 ` shh.xie
0 siblings, 0 replies; 10+ messages in thread
From: shh.xie @ 2015-12-28 3:47 UTC (permalink / raw)
To: devicetree, linuxppc-dev; +Cc: scottwood, igal.liberman, Shaohui Xie
From: Shaohui Xie <Shaohui.Xie@freescale.com>
PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs
to change corresponding serdes lane settings, so a reference is needed
for serdes lane. This patch describes properties needed for PCS PHY to
support backplane.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
---
based on: http://patchwork.ozlabs.org/patch/560936/
Documentation/devicetree/bindings/powerpc/fsl/fman.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
index 55c2c03..b38e727 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
@@ -432,6 +432,16 @@ example of how to define a PHY (Internal PHY has no interrupt line).
- For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,
PCS PHY addr must be '0'.
+ PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs to
+ change the corresponding serdes lane settings.
+
+ PCS PHY node properties required for backplane:
+
+ - compatible: must be "ethernet-phy-ieee802.3-c45".
+ - phy-mode: string, operation mode of the PHY interface; must be "1000base-kx"
+ for 1000BASE-KX, or "10gbase-kr" for 10GBASE-KR.
+ - lane-handle: phandle, specifies a reference to a node representing a Serdes.
+ - lane-range: offset and length of the register set for the serdes lane.
EXAMPLE
@@ -464,7 +474,11 @@ mdio@f1000 {
fsl,fman-internal-mdio;
pcsphy6: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ phy-mode = "10gbase-kr";
reg = <0x0>;
+ lane-handle = <&serdes>;
+ lane-range = <0x18c0 0x40>;
};
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
2015-12-28 3:47 ` shh.xie
@ 2015-12-29 18:34 ` Rob Herring
-1 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2015-12-29 18:34 UTC (permalink / raw)
To: shh.xie-Re5JQEeQqe8AvxtiuMwx3w
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ,
scottwood-KZfg59tc24xl57MIdRCFDg,
igal.liberman-KZfg59tc24xl57MIdRCFDg, Shaohui Xie
On Mon, Dec 28, 2015 at 11:47:34AM +0800, shh.xie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote:
> From: Shaohui Xie <Shaohui.Xie-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>
> PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs
> to change corresponding serdes lane settings, so a reference is needed
> for serdes lane. This patch describes properties needed for PCS PHY to
> support backplane.
>
> Signed-off-by: Shaohui Xie <Shaohui.Xie-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> ---
> based on: http://patchwork.ozlabs.org/patch/560936/
>
> Documentation/devicetree/bindings/powerpc/fsl/fman.txt | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> index 55c2c03..b38e727 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> @@ -432,6 +432,16 @@ example of how to define a PHY (Internal PHY has no interrupt line).
> - For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
> - For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,
> PCS PHY addr must be '0'.
> + PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs to
> + change the corresponding serdes lane settings.
> +
> + PCS PHY node properties required for backplane:
> +
> + - compatible: must be "ethernet-phy-ieee802.3-c45".
> + - phy-mode: string, operation mode of the PHY interface; must be "1000base-kx"
> + for 1000BASE-KX, or "10gbase-kr" for 10GBASE-KR.
Seems like these should be in common ethernet phy binding.
> + - lane-handle: phandle, specifies a reference to a node representing a Serdes.
> + - lane-range: offset and length of the register set for the serdes lane.
These seem pretty FSL specific, so add vendor prefix.
Rob
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To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
@ 2015-12-29 18:34 ` Rob Herring
0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2015-12-29 18:34 UTC (permalink / raw)
To: shh.xie; +Cc: devicetree, linuxppc-dev, scottwood, igal.liberman, Shaohui Xie
On Mon, Dec 28, 2015 at 11:47:34AM +0800, shh.xie@gmail.com wrote:
> From: Shaohui Xie <Shaohui.Xie@freescale.com>
>
> PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs
> to change corresponding serdes lane settings, so a reference is needed
> for serdes lane. This patch describes properties needed for PCS PHY to
> support backplane.
>
> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
> ---
> based on: http://patchwork.ozlabs.org/patch/560936/
>
> Documentation/devicetree/bindings/powerpc/fsl/fman.txt | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> index 55c2c03..b38e727 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> @@ -432,6 +432,16 @@ example of how to define a PHY (Internal PHY has no interrupt line).
> - For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
> - For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,
> PCS PHY addr must be '0'.
> + PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs to
> + change the corresponding serdes lane settings.
> +
> + PCS PHY node properties required for backplane:
> +
> + - compatible: must be "ethernet-phy-ieee802.3-c45".
> + - phy-mode: string, operation mode of the PHY interface; must be "1000base-kx"
> + for 1000BASE-KX, or "10gbase-kr" for 10GBASE-KR.
Seems like these should be in common ethernet phy binding.
> + - lane-handle: phandle, specifies a reference to a node representing a Serdes.
> + - lane-range: offset and length of the register set for the serdes lane.
These seem pretty FSL specific, so add vendor prefix.
Rob
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
2015-12-29 18:34 ` Rob Herring
@ 2015-12-30 3:41 ` Shaohui Xie
-1 siblings, 0 replies; 10+ messages in thread
From: Shaohui Xie @ 2015-12-30 3:41 UTC (permalink / raw)
To: Rob Herring, shh.xie-Re5JQEeQqe8AvxtiuMwx3w
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ, Scott Wood, Igal Liberman,
Shaohui Xie
> Subject: Re: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
>
> On Mon, Dec 28, 2015 at 11:47:34AM +0800, shh.xie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote:
> > From: Shaohui Xie <Shaohui.Xie-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> >
> > PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs
> > to change corresponding serdes lane settings, so a reference is needed
> > for serdes lane. This patch describes properties needed for PCS PHY to
> > support backplane.
> >
> > Signed-off-by: Shaohui Xie <Shaohui.Xie-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> > ---
> > based on: http://patchwork.ozlabs.org/patch/560936/
> >
> > Documentation/devicetree/bindings/powerpc/fsl/fman.txt | 14
> > ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> > b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> > index 55c2c03..b38e727 100644
> > --- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> > +++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> > @@ -432,6 +432,16 @@ example of how to define a PHY (Internal PHY has no
> interrupt line).
> > - For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
> > - For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,
> > PCS PHY addr must be '0'.
> > + PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this
> > + needs to change the corresponding serdes lane settings.
> > +
> > + PCS PHY node properties required for backplane:
> > +
> > + - compatible: must be "ethernet-phy-ieee802.3-c45".
> > + - phy-mode: string, operation mode of the PHY interface; must be "1000base-
> kx"
> > + for 1000BASE-KX, or "10gbase-kr" for 10GBASE-KR.
>
> Seems like these should be in common ethernet phy binding.
[S.H] 'compatible' and 'phy-mode' are standard properties already in common Ethernet
phy binding, I can update 'phy-mode' with "1000base-kx" and "10gbase-kr", how
about I still list the two properties here for the requirement of PCS PHY to support
backplane?
>
> > + - lane-handle: phandle, specifies a reference to a node representing a
> Serdes.
> > + - lane-range: offset and length of the register set for the serdes lane.
>
> These seem pretty FSL specific, so add vendor prefix.
[S.H] OK. will add fsl prefix.
Thank you for reviewing the patch!
Shaohui
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
@ 2015-12-30 3:41 ` Shaohui Xie
0 siblings, 0 replies; 10+ messages in thread
From: Shaohui Xie @ 2015-12-30 3:41 UTC (permalink / raw)
To: Rob Herring, shh.xie
Cc: devicetree, linuxppc-dev, Scott Wood, Igal Liberman, Shaohui Xie
> Subject: Re: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
>=20
> On Mon, Dec 28, 2015 at 11:47:34AM +0800, shh.xie@gmail.com wrote:
> > From: Shaohui Xie <Shaohui.Xie@freescale.com>
> >
> > PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs
> > to change corresponding serdes lane settings, so a reference is needed
> > for serdes lane. This patch describes properties needed for PCS PHY to
> > support backplane.
> >
> > Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
> > ---
> > based on: http://patchwork.ozlabs.org/patch/560936/
> >
> > Documentation/devicetree/bindings/powerpc/fsl/fman.txt | 14
> > ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> > b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> > index 55c2c03..b38e727 100644
> > --- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> > +++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> > @@ -432,6 +432,16 @@ example of how to define a PHY (Internal PHY has n=
o
> interrupt line).
> > - For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY=
.
> > - For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is P=
CS PHY,
> > PCS PHY addr must be '0'.
> > + PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this
> > + needs to change the corresponding serdes lane settings.
> > +
> > + PCS PHY node properties required for backplane:
> > +
> > + - compatible: must be "ethernet-phy-ieee802.3-c45".
> > + - phy-mode: string, operation mode of the PHY interface; must be "10=
00base-
> kx"
> > + for 1000BASE-KX, or "10gbase-kr" for 10GBASE-KR.
>=20
> Seems like these should be in common ethernet phy binding.
[S.H] 'compatible' and 'phy-mode' are standard properties already in common=
Ethernet
phy binding, I can update 'phy-mode' with "1000base-kx" and "10gbase-kr", h=
ow
about I still list the two properties here for the requirement of PCS PHY t=
o support
backplane?
>=20
> > + - lane-handle: phandle, specifies a reference to a node representing=
a
> Serdes.
> > + - lane-range: offset and length of the register set for the serdes l=
ane.
>=20
> These seem pretty FSL specific, so add vendor prefix.
[S.H] OK. will add fsl prefix.
Thank you for reviewing the patch!
Shaohui
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
2015-12-30 3:41 ` Shaohui Xie
@ 2015-12-30 15:14 ` Rob Herring
-1 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2015-12-30 15:14 UTC (permalink / raw)
To: Shaohui Xie
Cc: shh.xie-Re5JQEeQqe8AvxtiuMwx3w,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ, Scott Wood, Igal Liberman,
Shaohui Xie
On Tue, Dec 29, 2015 at 9:41 PM, Shaohui Xie <shaohui.xie-3arQi8VN3Tc@public.gmane.org> wrote:
>> Subject: Re: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
>>
>> On Mon, Dec 28, 2015 at 11:47:34AM +0800, shh.xie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote:
>> > From: Shaohui Xie <Shaohui.Xie-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>> >
>> > PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs
>> > to change corresponding serdes lane settings, so a reference is needed
>> > for serdes lane. This patch describes properties needed for PCS PHY to
>> > support backplane.
>> >
>> > Signed-off-by: Shaohui Xie <Shaohui.Xie-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>> > ---
>> > based on: http://patchwork.ozlabs.org/patch/560936/
>> >
>> > Documentation/devicetree/bindings/powerpc/fsl/fman.txt | 14
>> > ++++++++++++++
>> > 1 file changed, 14 insertions(+)
>> >
>> > diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
>> > b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
>> > index 55c2c03..b38e727 100644
>> > --- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
>> > +++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
>> > @@ -432,6 +432,16 @@ example of how to define a PHY (Internal PHY has no
>> interrupt line).
>> > - For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
>> > - For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,
>> > PCS PHY addr must be '0'.
>> > + PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this
>> > + needs to change the corresponding serdes lane settings.
>> > +
>> > + PCS PHY node properties required for backplane:
>> > +
>> > + - compatible: must be "ethernet-phy-ieee802.3-c45".
>> > + - phy-mode: string, operation mode of the PHY interface; must be "1000base-
>> kx"
>> > + for 1000BASE-KX, or "10gbase-kr" for 10GBASE-KR.
>>
>> Seems like these should be in common ethernet phy binding.
> [S.H] 'compatible' and 'phy-mode' are standard properties already in common Ethernet
> phy binding, I can update 'phy-mode' with "1000base-kx" and "10gbase-kr", how
> about I still list the two properties here for the requirement of PCS PHY to support
> backplane?
Yes. The common binding should list all possible values and this
binding should list allowed values.
Rob
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
@ 2015-12-30 15:14 ` Rob Herring
0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2015-12-30 15:14 UTC (permalink / raw)
To: Shaohui Xie
Cc: shh.xie, devicetree, linuxppc-dev, Scott Wood, Igal Liberman,
Shaohui Xie
On Tue, Dec 29, 2015 at 9:41 PM, Shaohui Xie <shaohui.xie@nxp.com> wrote:
>> Subject: Re: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
>>
>> On Mon, Dec 28, 2015 at 11:47:34AM +0800, shh.xie@gmail.com wrote:
>> > From: Shaohui Xie <Shaohui.Xie@freescale.com>
>> >
>> > PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this needs
>> > to change corresponding serdes lane settings, so a reference is needed
>> > for serdes lane. This patch describes properties needed for PCS PHY to
>> > support backplane.
>> >
>> > Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
>> > ---
>> > based on: http://patchwork.ozlabs.org/patch/560936/
>> >
>> > Documentation/devicetree/bindings/powerpc/fsl/fman.txt | 14
>> > ++++++++++++++
>> > 1 file changed, 14 insertions(+)
>> >
>> > diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
>> > b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
>> > index 55c2c03..b38e727 100644
>> > --- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
>> > +++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
>> > @@ -432,6 +432,16 @@ example of how to define a PHY (Internal PHY has no
>> interrupt line).
>> > - For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
>> > - For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,
>> > PCS PHY addr must be '0'.
>> > + PCS PHY can support backplane (1000BASE-KX and 10GBASE-KR), this
>> > + needs to change the corresponding serdes lane settings.
>> > +
>> > + PCS PHY node properties required for backplane:
>> > +
>> > + - compatible: must be "ethernet-phy-ieee802.3-c45".
>> > + - phy-mode: string, operation mode of the PHY interface; must be "1000base-
>> kx"
>> > + for 1000BASE-KX, or "10gbase-kr" for 10GBASE-KR.
>>
>> Seems like these should be in common ethernet phy binding.
> [S.H] 'compatible' and 'phy-mode' are standard properties already in common Ethernet
> phy binding, I can update 'phy-mode' with "1000base-kx" and "10gbase-kr", how
> about I still list the two properties here for the requirement of PCS PHY to support
> backplane?
Yes. The common binding should list all possible values and this
binding should list allowed values.
Rob
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
2015-12-30 15:14 ` Rob Herring
@ 2015-12-31 5:21 ` Shaohui Xie
-1 siblings, 0 replies; 10+ messages in thread
From: Shaohui Xie @ 2015-12-31 5:21 UTC (permalink / raw)
To: Rob Herring
Cc: shh.xie-Re5JQEeQqe8AvxtiuMwx3w,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ, Scott Wood, Igal Liberman,
Shaohui Xie
> > [S.H] 'compatible' and 'phy-mode' are standard properties already in
> > common Ethernet phy binding, I can update 'phy-mode' with
> > "1000base-kx" and "10gbase-kr", how about I still list the two
> > properties here for the requirement of PCS PHY to support backplane?
>
> Yes. The common binding should list all possible values and this binding should
> list allowed values.
Got it.
Thank you!
Shaohui
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
@ 2015-12-31 5:21 ` Shaohui Xie
0 siblings, 0 replies; 10+ messages in thread
From: Shaohui Xie @ 2015-12-31 5:21 UTC (permalink / raw)
To: Rob Herring
Cc: shh.xie, devicetree, linuxppc-dev, Scott Wood, Igal Liberman,
Shaohui Xie
PiA+IFtTLkhdICdjb21wYXRpYmxlJyBhbmQgJ3BoeS1tb2RlJyBhcmUgc3RhbmRhcmQgcHJvcGVy
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WWVzLiBUaGUgY29tbW9uIGJpbmRpbmcgc2hvdWxkIGxpc3QgYWxsIHBvc3NpYmxlIHZhbHVlcyBh
bmQgdGhpcyBiaW5kaW5nIHNob3VsZA0KPiBsaXN0IGFsbG93ZWQgdmFsdWVzLg0KR290IGl0Lg0K
VGhhbmsgeW91IQ0KDQpTaGFvaHVpDQoNCg==
^ permalink raw reply [flat|nested] 10+ messages in thread
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2015-12-28 3:47 [PATCH] powerpc: fsl: update fman dt binding for PCS PHY shh.xie
2015-12-28 3:47 ` shh.xie
[not found] ` <1451274454-26091-1-git-send-email-shh.xie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-29 18:34 ` Rob Herring
2015-12-29 18:34 ` Rob Herring
2015-12-30 3:41 ` Shaohui Xie
2015-12-30 3:41 ` Shaohui Xie
[not found] ` <VI1PR04MB1664E34FC9467506BEC5D815E8FD0-mr6QIVyDiCHTAO9RNConP89NdZoXdze2vxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2015-12-30 15:14 ` Rob Herring
2015-12-30 15:14 ` Rob Herring
[not found] ` <CAL_JsqLaFj2uC8dZRhvAi=fdr=JySd4+zp62z3FosePOp7Dqjw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-12-31 5:21 ` Shaohui Xie
2015-12-31 5:21 ` Shaohui Xie
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