* [U-Boot] [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
@ 2018-07-03 5:34 Ran Wang
2018-07-10 21:06 ` York Sun
0 siblings, 1 reply; 6+ messages in thread
From: Ran Wang @ 2018-07-03 5:34 UTC (permalink / raw)
To: u-boot
Program Central Security Unit (CSU) to grant access
permission for USB 2.0 controller, otherwiase EHCI funciton will down.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 8 ++++++++
arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 6a56269..2c4cf7f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -14,6 +14,7 @@
#include <asm/io.h>
#include <asm/global_data.h>
#include <asm/arch-fsl-layerscape/config.h>
+#include <asm/arch-fsl-layerscape/ns_access.h>
#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
#include <fsl_csu.h>
#endif
@@ -668,6 +669,13 @@ void fsl_lsch2_early_init_f(void)
CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN);
}
+ /*
+ * Program Central Security Unit (CSU) to grant access
+ * permission for USB 2.0 controller
+ */
+#if defined(CONFIG_ARCH_LS1012A) && defined(CONFIG_USB_EHCI_FSL)
+ set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW);
+#endif
/* Erratum */
erratum_a008850_early(); /* part 1 of 2 */
erratum_a009929();
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index fe97a93..d1b8efa 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -40,6 +40,7 @@ enum csu_cslx_ind {
CSU_CSLX_ESDHC,
CSU_CSLX_IFC = 45,
CSU_CSLX_I2C1,
+ CSU_CSLX_USB_2,
CSU_CSLX_I2C3 = 48,
CSU_CSLX_I2C2,
CSU_CSLX_DUART2 = 50,
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
2018-07-03 5:34 [U-Boot] [PATCH] armv8: layerscape: Enable EHCI access for LS1012A Ran Wang
@ 2018-07-10 21:06 ` York Sun
2018-07-11 2:11 ` Ran Wang
0 siblings, 1 reply; 6+ messages in thread
From: York Sun @ 2018-07-10 21:06 UTC (permalink / raw)
To: u-boot
On 07/02/2018 10:34 PM, Ran Wang wrote:
> Program Central Security Unit (CSU) to grant access
> permission for USB 2.0 controller, otherwiase EHCI funciton will down.
>
> Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
> ---
> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 8 ++++++++
> arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 +
> 2 files changed, 9 insertions(+)
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 6a56269..2c4cf7f 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -14,6 +14,7 @@
> #include <asm/io.h>
> #include <asm/global_data.h>
> #include <asm/arch-fsl-layerscape/config.h>
> +#include <asm/arch-fsl-layerscape/ns_access.h>
> #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
> #include <fsl_csu.h>
> #endif
> @@ -668,6 +669,13 @@ void fsl_lsch2_early_init_f(void)
> CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN);
> }
>
> + /*
> + * Program Central Security Unit (CSU) to grant access
> + * permission for USB 2.0 controller
> + */
> +#if defined(CONFIG_ARCH_LS1012A) && defined(CONFIG_USB_EHCI_FSL)
> + set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW);
> +#endif
Is this LS1012A specific?
York
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
2018-07-10 21:06 ` York Sun
@ 2018-07-11 2:11 ` Ran Wang
2018-07-24 15:40 ` York Sun
0 siblings, 1 reply; 6+ messages in thread
From: Ran Wang @ 2018-07-11 2:11 UTC (permalink / raw)
To: u-boot
Hi York,
> -----Original Message-----
> From: York Sun
> Sent: Wednesday, July 11, 2018 05:06
> To: Ran Wang <ran.wang_1@nxp.com>; Albert Aribaud
> <albert.u.boot@aribaud.net>
> Cc: u-boot at lists.denx.de
> Subject: Re: [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
>
> On 07/02/2018 10:34 PM, Ran Wang wrote:
> > Program Central Security Unit (CSU) to grant access permission for USB
> > 2.0 controller, otherwiase EHCI funciton will down.
> >
> > Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
> > ---
> > arch/arm/cpu/armv8/fsl-layerscape/soc.c | 8 ++++++++
> > arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 +
> > 2 files changed, 9 insertions(+)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > index 6a56269..2c4cf7f 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > @@ -14,6 +14,7 @@
> > #include <asm/io.h>
> > #include <asm/global_data.h>
> > #include <asm/arch-fsl-layerscape/config.h>
> > +#include <asm/arch-fsl-layerscape/ns_access.h>
> > #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
> > #include <fsl_csu.h>
> > #endif
> > @@ -668,6 +669,13 @@ void fsl_lsch2_early_init_f(void)
> > CCI400_DVM_MESSAGE_REQ_EN |
> CCI400_SNOOP_REQ_EN);
> > }
> >
> > + /*
> > + * Program Central Security Unit (CSU) to grant access
> > + * permission for USB 2.0 controller
> > + */
> > +#if defined(CONFIG_ARCH_LS1012A) && defined(CONFIG_USB_EHCI_FSL)
> > + set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW); #endif
>
> Is this LS1012A specific?
>
For Layerscape platforms, only LS1012A and LS1021A have USB2.0(EHCI) controller,
Others have USB3.0 controller only. For now I can only verify on LS1012A, so didn't
cover LS1021A yet.
Ran
> York
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
2018-07-11 2:11 ` Ran Wang
@ 2018-07-24 15:40 ` York Sun
2018-07-26 5:27 ` Ran Wang
0 siblings, 1 reply; 6+ messages in thread
From: York Sun @ 2018-07-24 15:40 UTC (permalink / raw)
To: u-boot
On 07/10/2018 07:11 PM, Ran Wang wrote:
> Hi York,
>
>> -----Original Message-----
>> From: York Sun
>> Sent: Wednesday, July 11, 2018 05:06
>> To: Ran Wang <ran.wang_1@nxp.com>; Albert Aribaud
>> <albert.u.boot@aribaud.net>
>> Cc: u-boot at lists.denx.de
>> Subject: Re: [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
>>
>> On 07/02/2018 10:34 PM, Ran Wang wrote:
>>> Program Central Security Unit (CSU) to grant access permission for USB
>>> 2.0 controller, otherwiase EHCI funciton will down.
>>>
>>> Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
>>> ---
>>> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 8 ++++++++
>>> arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 +
>>> 2 files changed, 9 insertions(+)
>>>
>>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>> index 6a56269..2c4cf7f 100644
>>> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>> @@ -14,6 +14,7 @@
>>> #include <asm/io.h>
>>> #include <asm/global_data.h>
>>> #include <asm/arch-fsl-layerscape/config.h>
>>> +#include <asm/arch-fsl-layerscape/ns_access.h>
>>> #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
>>> #include <fsl_csu.h>
>>> #endif
>>> @@ -668,6 +669,13 @@ void fsl_lsch2_early_init_f(void)
>>> CCI400_DVM_MESSAGE_REQ_EN |
>> CCI400_SNOOP_REQ_EN);
>>> }
>>>
>>> + /*
>>> + * Program Central Security Unit (CSU) to grant access
>>> + * permission for USB 2.0 controller
>>> + */
>>> +#if defined(CONFIG_ARCH_LS1012A) && defined(CONFIG_USB_EHCI_FSL)
>>> + set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW); #endif
>>
>> Is this LS1012A specific?
>>
> For Layerscape platforms, only LS1012A and LS1021A have USB2.0(EHCI) controller,
> Others have USB3.0 controller only. For now I can only verify on LS1012A, so didn't
> cover LS1021A yet.
>
Ran,
I think calling function set_devices_ns_access() may have an issue. It
is not EL2 safe, is it? Please check enable_layerscape_ns_access(). It
detects exception level before accessing EL3-only registers.
York
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
2018-07-24 15:40 ` York Sun
@ 2018-07-26 5:27 ` Ran Wang
2018-07-26 17:04 ` York Sun
0 siblings, 1 reply; 6+ messages in thread
From: Ran Wang @ 2018-07-26 5:27 UTC (permalink / raw)
To: u-boot
Hi York,
> -----Original Message-----
> From: York Sun
> Sent: Tuesday, July 24, 2018 23:40
> To: Ran Wang <ran.wang_1@nxp.com>; Albert Aribaud
> <albert.u.boot@aribaud.net>
> Cc: u-boot at lists.denx.de
> Subject: Re: [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
>
> On 07/10/2018 07:11 PM, Ran Wang wrote:
> > Hi York,
> >
> >> -----Original Message-----
> >> From: York Sun
> >> Sent: Wednesday, July 11, 2018 05:06
> >> To: Ran Wang <ran.wang_1@nxp.com>; Albert Aribaud
> >> <albert.u.boot@aribaud.net>
> >> Cc: u-boot at lists.denx.de
> >> Subject: Re: [PATCH] armv8: layerscape: Enable EHCI access for
> >> LS1012A
> >>
> >> On 07/02/2018 10:34 PM, Ran Wang wrote:
> >>> Program Central Security Unit (CSU) to grant access permission for
> >>> USB
> >>> 2.0 controller, otherwiase EHCI funciton will down.
> >>>
> >>> Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
> >>> ---
> >>> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 8 ++++++++
> >>> arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 +
> >>> 2 files changed, 9 insertions(+)
> >>>
> >>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> >>> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> >>> index 6a56269..2c4cf7f 100644
> >>> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> >>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> >>> @@ -14,6 +14,7 @@
> >>> #include <asm/io.h>
> >>> #include <asm/global_data.h>
> >>> #include <asm/arch-fsl-layerscape/config.h>
> >>> +#include <asm/arch-fsl-layerscape/ns_access.h>
> >>> #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
> >>> #include <fsl_csu.h>
> >>> #endif
> >>> @@ -668,6 +669,13 @@ void fsl_lsch2_early_init_f(void)
> >>> CCI400_DVM_MESSAGE_REQ_EN |
> >> CCI400_SNOOP_REQ_EN);
> >>> }
> >>>
> >>> + /*
> >>> + * Program Central Security Unit (CSU) to grant access
> >>> + * permission for USB 2.0 controller
> >>> + */
> >>> +#if defined(CONFIG_ARCH_LS1012A) &&
> defined(CONFIG_USB_EHCI_FSL)
> >>> + set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW); #endif
> >>
> >> Is this LS1012A specific?
> >>
> > For Layerscape platforms, only LS1012A and LS1021A have USB2.0(EHCI)
> > controller, Others have USB3.0 controller only. For now I can only
> > verify on LS1012A, so didn't cover LS1021A yet.
> >
>
> Ran,
>
> I think calling function set_devices_ns_access() may have an issue. It is not
> EL2 safe, is it? Please check enable_layerscape_ns_access(). It detects
> exception level before accessing EL3-only registers.
>
Yes, I re-checked the code and the experiments prove your point, I will send v2 patch soon.
Thanks for reminding.
BTW, I observed that in function board_late_init(), the return value of current_el() will be different:
Case 1: Boot with PPA: return 2
...
Using SERDES1 Protocol: 13576 (0x3508)
PPA Firmware: Version LSDK-1712-TC1-dirty
SEC Firmware: 'loadables' present in config
loadables: 'trustedOS at 1'
...
FPGA: v4 (LS1012QDS_2016_0405_1443), build 100 on Tue Apr 05 09:13:13 2016
wangran!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
current_el():2
Case 2: without PPA: return 3
...
Using SERDES1 Protocol: 13576 (0x3508)
SEC Firmware: config-1: no such config
SEC Firmware: error (-2)
SEC Firmware: Failed to load image
...
FPGA: v4 (LS1012QDS_2016_0405_1443), build 100 on Tue Apr 05 09:13:13 2016
wangran!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
current_el():3
Do you know the reason?
Ran
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
2018-07-26 5:27 ` Ran Wang
@ 2018-07-26 17:04 ` York Sun
0 siblings, 0 replies; 6+ messages in thread
From: York Sun @ 2018-07-26 17:04 UTC (permalink / raw)
To: u-boot
On 07/25/2018 10:27 PM, Ran Wang wrote:
> Hi York,
>
>> -----Original Message-----
>> From: York Sun
>> Sent: Tuesday, July 24, 2018 23:40
>> To: Ran Wang <ran.wang_1@nxp.com>; Albert Aribaud
>> <albert.u.boot@aribaud.net>
>> Cc: u-boot at lists.denx.de
>> Subject: Re: [PATCH] armv8: layerscape: Enable EHCI access for LS1012A
>>
>> On 07/10/2018 07:11 PM, Ran Wang wrote:
>>> Hi York,
>>>
>>>> -----Original Message-----
>>>> From: York Sun
>>>> Sent: Wednesday, July 11, 2018 05:06
>>>> To: Ran Wang <ran.wang_1@nxp.com>; Albert Aribaud
>>>> <albert.u.boot@aribaud.net>
>>>> Cc: u-boot at lists.denx.de
>>>> Subject: Re: [PATCH] armv8: layerscape: Enable EHCI access for
>>>> LS1012A
>>>>
>>>> On 07/02/2018 10:34 PM, Ran Wang wrote:
>>>>> Program Central Security Unit (CSU) to grant access permission for
>>>>> USB
>>>>> 2.0 controller, otherwiase EHCI funciton will down.
>>>>>
>>>>> Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
>>>>> ---
>>>>> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 8 ++++++++
>>>>> arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 +
>>>>> 2 files changed, 9 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>>>> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>>>> index 6a56269..2c4cf7f 100644
>>>>> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>>>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
>>>>> @@ -14,6 +14,7 @@
>>>>> #include <asm/io.h>
>>>>> #include <asm/global_data.h>
>>>>> #include <asm/arch-fsl-layerscape/config.h>
>>>>> +#include <asm/arch-fsl-layerscape/ns_access.h>
>>>>> #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
>>>>> #include <fsl_csu.h>
>>>>> #endif
>>>>> @@ -668,6 +669,13 @@ void fsl_lsch2_early_init_f(void)
>>>>> CCI400_DVM_MESSAGE_REQ_EN |
>>>> CCI400_SNOOP_REQ_EN);
>>>>> }
>>>>>
>>>>> + /*
>>>>> + * Program Central Security Unit (CSU) to grant access
>>>>> + * permission for USB 2.0 controller
>>>>> + */
>>>>> +#if defined(CONFIG_ARCH_LS1012A) &&
>> defined(CONFIG_USB_EHCI_FSL)
>>>>> + set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW); #endif
>>>>
>>>> Is this LS1012A specific?
>>>>
>>> For Layerscape platforms, only LS1012A and LS1021A have USB2.0(EHCI)
>>> controller, Others have USB3.0 controller only. For now I can only
>>> verify on LS1012A, so didn't cover LS1021A yet.
>>>
>>
>> Ran,
>>
>> I think calling function set_devices_ns_access() may have an issue. It is not
>> EL2 safe, is it? Please check enable_layerscape_ns_access(). It detects
>> exception level before accessing EL3-only registers.
>>
> Yes, I re-checked the code and the experiments prove your point, I will send v2 patch soon.
> Thanks for reminding.
>
> BTW, I observed that in function board_late_init(), the return value of current_el() will be different:
> Case 1: Boot with PPA: return 2
> ...
> Using SERDES1 Protocol: 13576 (0x3508)
> PPA Firmware: Version LSDK-1712-TC1-dirty
> SEC Firmware: 'loadables' present in config
> loadables: 'trustedOS at 1'
> ...
> FPGA: v4 (LS1012QDS_2016_0405_1443), build 100 on Tue Apr 05 09:13:13 2016
> wangran!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
> current_el():2
>
> Case 2: without PPA: return 3
> ...
> Using SERDES1 Protocol: 13576 (0x3508)
> SEC Firmware: config-1: no such config
> SEC Firmware: error (-2)
> SEC Firmware: Failed to load image
> ...
> FPGA: v4 (LS1012QDS_2016_0405_1443), build 100 on Tue Apr 05 09:13:13 2016
> wangran!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
> current_el():3
>
> Do you know the reason?
>
That's exactly what PPA does -- drop to EL2.
York
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-07-26 17:04 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-03 5:34 [U-Boot] [PATCH] armv8: layerscape: Enable EHCI access for LS1012A Ran Wang
2018-07-10 21:06 ` York Sun
2018-07-11 2:11 ` Ran Wang
2018-07-24 15:40 ` York Sun
2018-07-26 5:27 ` Ran Wang
2018-07-26 17:04 ` York Sun
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