[U-Boot] [Patch V3] drivers: mtd: spi: Add micron mt35xu512g and mt35xu02g flash ID

[U-Boot] [Patch V3] drivers: mtd: spi: Add micron mt35xu512g and mt35xu02g flash ID

[Ashish Kumar]

mt35xu512g and mt35xu02g suports Single I/O and OCTAL I/O
also enable use of SPI_NOR_4B_OPCODES.

These flashes are tested on LX2160ARDB and LS1028ARDB respectively

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
---
v3:
1. Add version info, rebase to top
v2: 
1. Adding more description in commit msg. 
2. consolidating "http://patchwork.ozlabs.org/patch/1097867/" 
 and "http://patchwork.ozlabs.org/patch/1097867/" in single patch.

 drivers/mtd/spi/spi-nor-ids.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index d99c4c5..3217fc6 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -170,6 +170,8 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+	{ INFO6("mt35xu512g", 0x2c5b1a, 0x104100,  128 * 1024,  512, USE_FSR | SPI_NOR_4B_OPCODES) },
+	{ INFO("mt35xu02g",  0x2c5b1c, 0x0, 128 * 1024,  2048, USE_FSR | SPI_NOR_4B_OPCODES) },
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
 	/* Spansion/Cypress -- single (large) sector size only, at least
-- 
2.7.4

[U-Boot] [Patch V3] drivers: mtd: spi: Add micron mt35xu512g and mt35xu02g flash ID

[Jagan Teki]

On Wed, Jul 17, 2019 at 11:46 AM Ashish Kumar <Ashish.Kumar@nxp.com> wrote:
>
> mt35xu512g and mt35xu02g suports Single I/O and OCTAL I/O
> also enable use of SPI_NOR_4B_OPCODES.
>
> These flashes are tested on LX2160ARDB and LS1028ARDB respectively
>
> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
> ---
> v3:
> 1. Add version info, rebase to top
> v2:
> 1. Adding more description in commit msg.
> 2. consolidating "http://patchwork.ozlabs.org/patch/1097867/"
>  and "http://patchwork.ozlabs.org/patch/1097867/" in single patch.
>
>  drivers/mtd/spi/spi-nor-ids.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index d99c4c5..3217fc6 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -170,6 +170,8 @@ const struct flash_info spi_nor_ids[] = {
>         { INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>         { INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>         { INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
> +       { INFO6("mt35xu512g", 0x2c5b1a, 0x104100,  128 * 1024,  512, USE_FSR | SPI_NOR_4B_OPCODES) },

Couldn't find the datasheet for this part on web, is this part is next
version of mt35xu512aba?

[U-Boot] [EXT] Re: [Patch V3] drivers: mtd: spi: Add micron mt35xu512g and mt35xu02g flash ID

[Ashish Kumar]

> -----Original Message-----
> From: Jagan Teki <jagan@amarulasolutions.com>
> Sent: Thursday, July 18, 2019 3:55 PM
> To: Ashish Kumar <ashish.kumar@nxp.com>
> Cc: U-Boot-Denx <u-boot@lists.denx.de>; Kuldeep Singh
> <kuldeep.singh@nxp.com>
> Subject: [EXT] Re: [Patch V3] drivers: mtd: spi: Add micron mt35xu512g and
> mt35xu02g flash ID
> 
> Caution: EXT Email
> 
> On Wed, Jul 17, 2019 at 11:46 AM Ashish Kumar <Ashish.Kumar@nxp.com>
> wrote:
> >
> > mt35xu512g and mt35xu02g suports Single I/O and OCTAL I/O also enable
> > use of SPI_NOR_4B_OPCODES.
> >
> > These flashes are tested on LX2160ARDB and LS1028ARDB respectively
> >
> > Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
> > Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
> > ---
> > v3:
> > 1. Add version info, rebase to top
> > v2:
> > 1. Adding more description in commit msg.
> > 2. consolidating
> "https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatch
> work.ozlabs.org%2Fpatch%2F1097867%2F&amp;data=02%7C01%7CAshish.Ku
> mar%40nxp.com%7C199a3c5048d84eb18ce408d70b6a3f72%7C686ea1d3bc2b
> 4c6fa92cd99c5c301635%7C0%7C0%7C636990423264975416&amp;sdata=MEg
> %2F3GIscKqV4WDJPqslLL%2FnOS47oEoWRdeZS5VPva4%3D&amp;reserved=0"
> >  and
> "https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatch
> work.ozlabs.org%2Fpatch%2F1097867%2F&amp;data=02%7C01%7CAshish.Ku
> mar%40nxp.com%7C199a3c5048d84eb18ce408d70b6a3f72%7C686ea1d3bc2b
> 4c6fa92cd99c5c301635%7C0%7C0%7C636990423264975416&amp;sdata=MEg
> %2F3GIscKqV4WDJPqslLL%2FnOS47oEoWRdeZS5VPva4%3D&amp;reserved=0"
> in single patch.
> >
> >  drivers/mtd/spi/spi-nor-ids.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/mtd/spi/spi-nor-ids.c
> > b/drivers/mtd/spi/spi-nor-ids.c index d99c4c5..3217fc6 100644
> > --- a/drivers/mtd/spi/spi-nor-ids.c
> > +++ b/drivers/mtd/spi/spi-nor-ids.c
> > @@ -170,6 +170,8 @@ const struct flash_info spi_nor_ids[] = {
> >         { INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR
> | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
> >         { INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR
> | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
> >         { INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K |
> USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
> > +       { INFO6("mt35xu512g", 0x2c5b1a, 0x104100,  128 * 1024,  512,
> > + USE_FSR | SPI_NOR_4B_OPCODES) },
> 
> Couldn't find the datasheet for this part on web, is this part is next version
> of mt35xu512aba?
Oh Sorry, this should be mt35xu512a. I will update this in v4.

Regards
Ashish