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From: Leonard Crestez <leonard.crestez@nxp.com>
To: Rob Herring <robh@kernel.org>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>
Cc: "Stephen Boyd" <sboyd@kernel.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Artur Świgoń" <a.swigon@partner.samsung.com>,
	"Saravana Kannan" <saravanak@google.com>,
	"Angus Ainslie" <angus@akkea.ca>,
	"Martin Kepplinger" <martink@posteo.de>,
	"Matthias Kaehlcke" <mka@chromium.org>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Alexandre Bailon" <abailon@baylibre.com>,
	"Georgi Djakov" <georgi.djakov@linaro.org>,
	"Aisheng Dong" <aisheng.dong@nxp.com>,
	"Abel Vesa" <abel.vesa@nxp.com>, "Jacky Bai" <ping.bai@nxp.com>,
	"Anson Huang" <anson.huang@nxp.com>,
	"Fabio Estevam" <fabio.estevam@nxp.com>,
	"Viresh Kumar" <viresh.kumar@linaro.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	dl-linux-imx <linux-imx@nxp.com>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 3/6] dt-bindings: devfreq: Add bindings for imx ddr controller
Date: Tue, 5 Nov 2019 19:25:57 +0000	[thread overview]
Message-ID: <VI1PR04MB7023F375AEDC4549FA12247FEE7E0@VI1PR04MB7023.eurprd04.prod.outlook.com> (raw)
In-Reply-To: 20191104222126.GB5218@bogus

On 05.11.2019 00:21, Rob Herring wrote:
> On Thu, Oct 31, 2019 at 11:50:24PM +0200, Leonard Crestez wrote:
>> Add devicetree bindings for the i.MX DDR Controller on imx8m series
>> chips. It supports dynamic frequency switching between multiple data
>> rates and this is exposed to Linux via the devfreq subsystem.
>>
>> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
>> ---
>>   .../devicetree/bindings/devfreq/imx-ddrc.yaml | 60 +++++++++++++++++++
> 
> .../bindings/memory-controllers/

Okay, but I'm not sure about the rules here. Usually there is a 1:1 
mapping between subsystems and bindings directory but I guess devfreq is 
odd since it's not really a physical class of device.

I saw there is also a drivers/memory and there is already a 
devfreq-using driver in there (EXYNOS5422_DMC).

It's not clear if my driver fits in there; as far as I can see the only 
"core" functionality in drivers/memory is parsing DDR timings from DTS 
but for imx8m this is all controlled in firmware.

>>   1 file changed, 60 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml b/Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml
>> new file mode 100644
>> index 000000000000..31db204e6845
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml
>> @@ -0,0 +1,60 @@
>> +# SPDX-License-Identifier: GPL-2.0
> 
> For new bindings:
> 
> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> 
>> +%YAML 1.2
>> +---
>> +$id: https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdevfreq%2Fimx-devfreq.yaml%23&amp;data=02%7C01%7Cleonard.crestez%40nxp.com%7Cba47e72161764d5a969a08d761755736%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C637085028918247356&amp;sdata=2DjKgyATOPu7qhzpOCfRrmUM0%2FSAQrV9R7AxZxib8gk%3D&amp;reserved=0
> 
> Run 'make dt_binding_check'. This will fail as the filename doesn't
> match.
> 
>> +$schema: https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=02%7C01%7Cleonard.crestez%40nxp.com%7Cba47e72161764d5a969a08d761755736%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C637085028918247356&amp;sdata=EbyVK2ZF6Z22vE%2F4LfIVv0S1LoMe7%2BxhM43H1i8nxtE%3D&amp;reserved=0
>> +
>> +title: i.MX DDR Controller
> 
> Perhaps i.MX8x as it's not all i.MX chips. And the filename too?

Ok, will rename to imx8m-ddrc since it's not even for all imx8.

>> +
>> +maintainers:
>> +  - Leonard Crestez <leonard.crestez@nxp.com>
>> +
>> +properties:
>> +  compatible:
>> +    items:
>> +      - enum:
>> +        - fsl,imx8mn-ddrc
>> +        - fsl,imx8mm-ddrc
>> +        - fsl,imx8mq-ddrc
>> +      - const: fsl,imx8m-ddrc
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    maxItems: 4
>> +
>> +  clock-names:
>> +    items:
>> +      - const: dram_core
>> +      - const: dram_pll
>> +      - const: dram_alt
>> +      - const: dram_apb
> 
> Drop 'dram_'

OK

>> +
>> +  operating-points-v2: true
>> +
>> +  devfreq-events:
>> +    description: Phandle of PMU node
>> +    $ref: "/schemas/types.yaml#/definitions/phandle"
>> +
>> +required:
>> +  - reg
>> +  - compatible
>> +  - clocks
>> +  - clock-names
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/imx8mm-clock.h>
>> +    ddrc: dram-controller@3d400000 {
>> +        compatible = "fsl,imx8mm-ddrc", "fsl,imx8m-ddrc";
>> +        reg = <0x3d400000 0x400000>;
>> +        clock-names = "dram_core", "dram_pll", "dram_alt", "dram_apb";
>> +        clocks = <&clk IMX8MM_CLK_DRAM_CORE>,
>> +                 <&clk IMX8MM_DRAM_PLL>,
>> +                 <&clk IMX8MM_CLK_DRAM_ALT>,
>> +                 <&clk IMX8MM_CLK_DRAM_APB>;
>> +        operating-points-v2 = <&ddrc_opp_table>;
>> +    };

WARNING: multiple messages have this Message-ID (diff)
From: Leonard Crestez <leonard.crestez@nxp.com>
To: Rob Herring <robh@kernel.org>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>
Cc: "Mark Rutland" <mark.rutland@arm.com>,
	"Artur Świgoń" <a.swigon@partner.samsung.com>,
	"Jacky Bai" <ping.bai@nxp.com>,
	"Viresh Kumar" <viresh.kumar@linaro.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Angus Ainslie" <angus@akkea.ca>,
	"Alexandre Bailon" <abailon@baylibre.com>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"Abel Vesa" <abel.vesa@nxp.com>,
	"Saravana Kannan" <saravanak@google.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Matthias Kaehlcke" <mka@chromium.org>,
	dl-linux-imx <linux-imx@nxp.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"Martin Kepplinger" <martink@posteo.de>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"Aisheng Dong" <aisheng.dong@nxp.com>,
	"Anson Huang" <anson.huang@nxp.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	"Fabio Estevam" <fabio.estevam@nxp.com>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Georgi Djakov" <georgi.djakov@linaro.org>
Subject: Re: [PATCH v3 3/6] dt-bindings: devfreq: Add bindings for imx ddr controller
Date: Tue, 5 Nov 2019 19:25:57 +0000	[thread overview]
Message-ID: <VI1PR04MB7023F375AEDC4549FA12247FEE7E0@VI1PR04MB7023.eurprd04.prod.outlook.com> (raw)
In-Reply-To: 20191104222126.GB5218@bogus

On 05.11.2019 00:21, Rob Herring wrote:
> On Thu, Oct 31, 2019 at 11:50:24PM +0200, Leonard Crestez wrote:
>> Add devicetree bindings for the i.MX DDR Controller on imx8m series
>> chips. It supports dynamic frequency switching between multiple data
>> rates and this is exposed to Linux via the devfreq subsystem.
>>
>> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
>> ---
>>   .../devicetree/bindings/devfreq/imx-ddrc.yaml | 60 +++++++++++++++++++
> 
> .../bindings/memory-controllers/

Okay, but I'm not sure about the rules here. Usually there is a 1:1 
mapping between subsystems and bindings directory but I guess devfreq is 
odd since it's not really a physical class of device.

I saw there is also a drivers/memory and there is already a 
devfreq-using driver in there (EXYNOS5422_DMC).

It's not clear if my driver fits in there; as far as I can see the only 
"core" functionality in drivers/memory is parsing DDR timings from DTS 
but for imx8m this is all controlled in firmware.

>>   1 file changed, 60 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml b/Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml
>> new file mode 100644
>> index 000000000000..31db204e6845
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml
>> @@ -0,0 +1,60 @@
>> +# SPDX-License-Identifier: GPL-2.0
> 
> For new bindings:
> 
> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> 
>> +%YAML 1.2
>> +---
>> +$id: https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdevfreq%2Fimx-devfreq.yaml%23&amp;data=02%7C01%7Cleonard.crestez%40nxp.com%7Cba47e72161764d5a969a08d761755736%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C637085028918247356&amp;sdata=2DjKgyATOPu7qhzpOCfRrmUM0%2FSAQrV9R7AxZxib8gk%3D&amp;reserved=0
> 
> Run 'make dt_binding_check'. This will fail as the filename doesn't
> match.
> 
>> +$schema: https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=02%7C01%7Cleonard.crestez%40nxp.com%7Cba47e72161764d5a969a08d761755736%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C637085028918247356&amp;sdata=EbyVK2ZF6Z22vE%2F4LfIVv0S1LoMe7%2BxhM43H1i8nxtE%3D&amp;reserved=0
>> +
>> +title: i.MX DDR Controller
> 
> Perhaps i.MX8x as it's not all i.MX chips. And the filename too?

Ok, will rename to imx8m-ddrc since it's not even for all imx8.

>> +
>> +maintainers:
>> +  - Leonard Crestez <leonard.crestez@nxp.com>
>> +
>> +properties:
>> +  compatible:
>> +    items:
>> +      - enum:
>> +        - fsl,imx8mn-ddrc
>> +        - fsl,imx8mm-ddrc
>> +        - fsl,imx8mq-ddrc
>> +      - const: fsl,imx8m-ddrc
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    maxItems: 4
>> +
>> +  clock-names:
>> +    items:
>> +      - const: dram_core
>> +      - const: dram_pll
>> +      - const: dram_alt
>> +      - const: dram_apb
> 
> Drop 'dram_'

OK

>> +
>> +  operating-points-v2: true
>> +
>> +  devfreq-events:
>> +    description: Phandle of PMU node
>> +    $ref: "/schemas/types.yaml#/definitions/phandle"
>> +
>> +required:
>> +  - reg
>> +  - compatible
>> +  - clocks
>> +  - clock-names
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/imx8mm-clock.h>
>> +    ddrc: dram-controller@3d400000 {
>> +        compatible = "fsl,imx8mm-ddrc", "fsl,imx8m-ddrc";
>> +        reg = <0x3d400000 0x400000>;
>> +        clock-names = "dram_core", "dram_pll", "dram_alt", "dram_apb";
>> +        clocks = <&clk IMX8MM_CLK_DRAM_CORE>,
>> +                 <&clk IMX8MM_DRAM_PLL>,
>> +                 <&clk IMX8MM_CLK_DRAM_ALT>,
>> +                 <&clk IMX8MM_CLK_DRAM_APB>;
>> +        operating-points-v2 = <&ddrc_opp_table>;
>> +    };

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  reply	other threads:[~2019-11-05 19:26 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-31 21:50 [PATCH v3 0/6] PM / devfreq: Add dynamic scaling for imx ddr controller Leonard Crestez
2019-10-31 21:50 ` Leonard Crestez
2019-10-31 21:50 ` [PATCH v3 1/6] clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks Leonard Crestez
2019-10-31 21:50   ` Leonard Crestez
2019-12-02  3:12   ` Shawn Guo
2019-12-02  3:12     ` Shawn Guo
2019-12-02  4:19     ` Leonard Crestez
2019-12-02  4:19       ` Leonard Crestez
2019-10-31 21:50 ` [PATCH v3 2/6] clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE Leonard Crestez
2019-10-31 21:50   ` Leonard Crestez
2019-10-31 21:50 ` [PATCH v3 3/6] dt-bindings: devfreq: Add bindings for imx ddr controller Leonard Crestez
2019-10-31 21:50   ` Leonard Crestez
2019-11-04 22:21   ` Rob Herring
2019-11-04 22:21     ` Rob Herring
2019-11-05 19:25     ` Leonard Crestez [this message]
2019-11-05 19:25       ` Leonard Crestez
2019-11-05 20:13       ` Rob Herring
2019-11-05 20:13         ` Rob Herring
2019-10-31 21:50 ` [PATCH v3 4/6] PM / devfreq: Add dynamic scaling " Leonard Crestez
2019-10-31 21:50   ` Leonard Crestez
2019-12-02  5:38   ` Shawn Guo
2019-12-02  5:38     ` Shawn Guo
2019-12-02  9:12     ` Leonard Crestez
2019-12-02  9:12       ` Leonard Crestez
2019-12-02 13:34       ` Shawn Guo
2019-12-02 13:34         ` Shawn Guo
2019-10-31 21:50 ` [PATCH v3 5/6] PM / devfreq: imx-ddrc: Measure bandwidth with perf Leonard Crestez
2019-10-31 21:50   ` Leonard Crestez
2019-10-31 21:50 ` [PATCH v3 6/6] arm64: dts: imx8m: Add ddr controller nodes Leonard Crestez
2019-10-31 21:50   ` Leonard Crestez
2019-11-04 22:01   ` Rob Herring
2019-11-04 22:01     ` Rob Herring
2019-11-11 14:29     ` Leonard Crestez
2019-11-11 14:29       ` Leonard Crestez

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