* [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set
@ 2020-12-08 20:03 Dmitry Fomichev
2020-12-08 20:03 ` [PATCH v11 01/13] hw/block/nvme: Process controller reset and shutdown differently Dmitry Fomichev
` (14 more replies)
0 siblings, 15 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:03 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
v10 -> v11:
- Address review comments by Klaus.
- Add a patch to separate the handling of controller reset
and subsystem shutdown. Place the patch at the beginning
of the series so it can be picked up separately.
- Rebase on the current nvme-next branch.
v9 -> v10:
- Correctly check for MDTS in Zone Management Receive handler.
- Change Klaus' "Reviewed-by" email in UUID patch.
v8 -> v9:
- Move the modifications to "include/block/nvme.h" made to
introduce ZNS-related definitions to a separate patch.
- Add a new struct, NvmeZonedResult, along the same lines as the
existing NvmeAerResult, to carry Zone Append LBA returned to
the host. Now, there is no need to modify NvmeCqe struct except
renaming DW1 field from "rsvd" to "dw1".
- Add check for MDTS in Zone Management Receive handler.
- Remove checks for ns->attached since the value of this flag
is always true for now.
- Rebase to the current quemu-nvme/nvme-next branch.
v7 -> v8:
- Move refactoring commits to the front of the series.
- Remove "attached" and "fill_pattern" device properties.
- Only close open zones upon subsystem shutdown, not when CC.EN flag
is set to 0. Avoid looping through all zones by iterating through
lists of open and closed zones.
- Improve bulk processing of zones aka zoned operations with "all"
flag set. Avoid looping through the entire zone array for all zone
operations except Offline Zone.
- Prefix ZNS-related property names with "zoned.". The "zoned" Boolean
property is retained to turn on zoned command set as it is much more
intuitive and user-friendly compared to setting a magic number value
to csi property.
- Address review comments.
- Remove unused trace events.
v6 -> v7:
- Introduce ns->iocs initialization function earlier in the series,
in CSE Log patch.
- Set NVM iocs for zoned namespaces when CC.CSS is set to
NVME_CC_CSS_NVM.
- Clean up code in CSE log handler.
v5 -> v6:
- Remove zoned state persistence code. Replace position-independent
zone lists with QTAILQs.
- Close all open zones upon clearing of the controller. This is
a similar procedure to the one previously performed upon powering
up with zone persistence.
- Squash NS Types and ZNS triplets of commits to keep definitions
and trace event definitions together with the implementation code.
- Move namespace UUID generation to a separate patch. Add the new
"uuid" property as suggested by Klaus.
- Rework Commands and Effects patch to make sure that the log is
always in sync with the actual set of commands supported.
- Add two refactoring commits at the end of the series to
optimize read and write i/o path.
- Incorporate feedback from Keith, Klaus and Niklas:
* fix rebase errors in nvme_identify_ns_descr_list()
* remove unnecessary code from nvme_write_bar()
* move csi to NvmeNamespace and use it from the beginning in NSTypes
patch
* change zone read processing to cover all corner cases with RAZB=1
* sync w_ptr and d.wp in case of a i/o error at the preceding zone
* reword the commit message in active/inactive patch with the new
text from Niklas
* correct dlfeat reporting depending on the fill pattern set
* add more checks for "attached" n/s parameter to prevent i/o and
get/set features on inactive namespaces
* Use DEFINE_PROP_SIZE and DEFINE_PROP_SIZE32 for zone size/capacity
and ZASL respectively
* Improve zone size and capacity validation
* Correctly report NSZE
v4 -> v5:
- Rebase to the current qemu-nvme.
- Use HostMemoryBackendFile as the backing storage for persistent
zone metadata.
- Fix the issue with filling the valid data in the next zone if RAZB
is enabled.
v3 -> v4:
- Fix bugs introduced in v2/v3 for QD > 1 operation. Now, all writes
to a zone happen at the new write pointer variable, zone->w_ptr,
that is advanced right after submitting the backend i/o. The existing
zone->d.wp variable is updated upon the successful write completion
and it is used for zone reporting. Some code has been split from
nvme_finalize_zoned_write() function to a new function,
nvme_advance_zone_wp().
- Make the code compile under mingw. Switch to using QEMU API for
mmap/msync, i.e. memory_region...(). Since mmap is not available in
mingw (even though there is mman-win32 library available on Github),
conditional compilation is added around these calls to avoid
undefined symbols under mingw. A better fix would be to add stub
functions to softmmu/memory.c for the case when CONFIG_POSIX is not
defined, but such change is beyond the scope of this patchset and it
can be made in a separate patch.
- Correct permission mask used to open zone metadata file.
- Fold "Define 64 bit cqe.result" patch into ZNS commit.
- Use clz64/clz32 instead of defining nvme_ilog2() function.
- Simplify rpt_empty_id_struct() code, move nvme_fill_data() back
to ZNS patch.
- Fix a power-on processing bug.
- Rename NVME_CMD_ZONE_APND to NVME_CMD_ZONE_APPEND.
- Make the list of review comments addressed in v2 of the series
(see below).
v2 -> v3:
- Moved nvme_fill_data() function to the NSTypes patch as it is
now used there to output empty namespace identify structs.
- Fixed typo in Maxim's email address.
v1 -> v2:
- Rebased on top of qemu-nvme/next branch.
- Incorporated feedback from Klaus and Alistair.
* Allow a subset of CSE log to be read, not the entire log
* Assign admin command entries in CSE log to ACS fields
* Set LPA bit 1 to indicate support of CSE log page
* Rename CC.CSS value CSS_ALL_NSTYPES (110b) to CSS_CSI
* Move the code to assign lbaf.ds to a separate patch
* Remove the change in firmware revision
* Change "driver" to "device" in comments and annotations
* Rename ZAMDS to ZASL
* Correct a few format expressions and some wording in
trace event definitions
* Remove validation code to return NVME_CAP_EXCEEDED error
* Make ZASL to be equal to MDTS if "zone_append_size_limit"
module parameter is not set
* Clean up nvme_zoned_init_ctrl() to make size calculations
less confusing
* Avoid changing module parameters, use separate n/s variables
if additional calculations are necessary to convert parameters
to running values
* Use NVME_DEFAULT_ZONE_SIZE to assign the default zone size value
* Use default 0 for zone capacity meaning that zone capacity will
be equal to zone size by default
* Issue warnings if user MAR/MOR values are too large and have
to be adjusted
* Use unsigned values for MAR/MOR
- Dropped "Simulate Zone Active excursions" patch.
Excursion behavior may depend on the internal controller
architecture and therefore be vendor-specific.
- Dropped support for Zone Attributes and zoned AENs for now.
These features can be added in a future series.
- NS Types support is extended to handle active/inactive namespaces.
- Update the write pointer after backing storage I/O completion, not
before. This makes the emulation to run correctly in case of
backing device failures.
- Avoid division in the I/O path if the device zone size is
a power of two (the most common case). Zone index then can be
calculated by using bit shift.
- A few reported bugs have been fixed.
- Indentation in function definitions has been changed to make it
the same as the rest of the code.
Zoned Namespace (ZNS) Command Set is a newly introduced command set
published by the NVM Express, Inc. organization as TP 4053. The main
design goals of ZNS are to provide hardware designers the means to
reduce NVMe controller complexity and to allow achieving a better I/O
latency and throughput. SSDs that implement this interface are
commonly known as ZNS SSDs.
This command set is implementing a zoned storage model, similarly to
ZAC/ZBC. As such, there is already support in Linux, allowing one to
perform the majority of tasks needed for managing ZNS SSDs.
The Zoned Namespace Command Set relies on another TP, known as
Namespace Types (NVMe TP 4056), which introduces support for having
multiple command sets per namespace.
Both ZNS and Namespace Types specifications can be downloaded by
visiting the following link -
https://nvmexpress.org/wp-content/uploads/NVM-Express-1.4-Ratified-TPs.zip
This patch series adds Namespace Types support and zoned namespace
emulation capability to the existing NVMe PCI device.
Based-on: <20201104102248.32168-1-its@irrelevant.dk>
Dmitry Fomichev (11):
hw/block/nvme: Process controller reset and shutdown differently
hw/block/nvme: Generate namespace UUIDs
hw/block/nvme: Separate read and write handlers
hw/block/nvme: Combine nvme_write_zeroes() and nvme_write()
hw/block/nvme: Add Commands Supported and Effects log
block/nvme: Make ZNS-related definitions
hw/block/nvme: Support Zoned Namespace Command Set
hw/block/nvme: Introduce max active and open zone limits
hw/block/nvme: Support Zone Descriptor Extensions
hw/block/nvme: Add injection of Offline/Read-Only zones
hw/block/nvme: Document zoned parameters in usage text
Niklas Cassel (2):
hw/block/nvme: Add support for Namespace Types
hw/block/nvme: Support allocated CNS command variants
hw/block/nvme-ns.h | 108 +++-
hw/block/nvme.h | 6 +
include/block/nvme.h | 201 +++++-
hw/block/nvme-ns.c | 271 +++++++-
hw/block/nvme.c | 1432 ++++++++++++++++++++++++++++++++++++++---
hw/block/trace-events | 32 +-
6 files changed, 1927 insertions(+), 123 deletions(-)
--
2.28.0
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v11 01/13] hw/block/nvme: Process controller reset and shutdown differently
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
@ 2020-12-08 20:03 ` Dmitry Fomichev
2020-12-08 20:03 ` [PATCH v11 02/13] hw/block/nvme: Generate namespace UUIDs Dmitry Fomichev
` (13 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:03 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
Controller reset ans subsystem shutdown are handled very much the same
in the current code, but some of the steps should be different in these
two cases.
Introduce two new functions, nvme_reset_ctrl() and nvme_shutdown_ctrl(),
to separate some portions of the code from nvme_clear_ctrl(). The steps
that are made different between reset and shutdown are that BAR.CC is not
reset to zero upon the shutdown and namespace data is flushed to
backing storage as a part of shutdown handling, but not upon reset.
Suggested-by: Klaus Jensen <its@irrelevant.dk>
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
---
hw/block/nvme-ns.h | 2 +-
hw/block/nvme-ns.c | 2 +-
hw/block/nvme.c | 24 ++++++++++++++++++------
3 files changed, 20 insertions(+), 8 deletions(-)
diff --git a/hw/block/nvme-ns.h b/hw/block/nvme-ns.h
index 44bf6271b7..ed3d7e65d5 100644
--- a/hw/block/nvme-ns.h
+++ b/hw/block/nvme-ns.h
@@ -73,6 +73,6 @@ typedef struct NvmeCtrl NvmeCtrl;
int nvme_ns_setup(NvmeCtrl *n, NvmeNamespace *ns, Error **errp);
void nvme_ns_drain(NvmeNamespace *ns);
-void nvme_ns_flush(NvmeNamespace *ns);
+void nvme_ns_shutdown(NvmeNamespace *ns);
#endif /* NVME_NS_H */
diff --git a/hw/block/nvme-ns.c b/hw/block/nvme-ns.c
index 847069a66e..9b95e2ed33 100644
--- a/hw/block/nvme-ns.c
+++ b/hw/block/nvme-ns.c
@@ -130,7 +130,7 @@ void nvme_ns_drain(NvmeNamespace *ns)
blk_drain(ns->blkconf.blk);
}
-void nvme_ns_flush(NvmeNamespace *ns)
+void nvme_ns_shutdown(NvmeNamespace *ns)
{
blk_flush(ns->blkconf.blk);
}
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 59990e00bc..10acb7e7f0 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -2197,6 +2197,20 @@ static void nvme_clear_ctrl(NvmeCtrl *n)
n->aer_queued = 0;
n->outstanding_aers = 0;
n->qs_created = false;
+}
+
+static void nvme_ctrl_reset(NvmeCtrl *n)
+{
+ nvme_clear_ctrl(n);
+ n->bar.cc = 0;
+}
+
+static void nvme_ctrl_shutdown(NvmeCtrl *n)
+{
+ NvmeNamespace *ns;
+ int i;
+
+ nvme_clear_ctrl(n);
for (i = 1; i <= n->num_namespaces; i++) {
ns = nvme_ns(n, i);
@@ -2204,10 +2218,8 @@ static void nvme_clear_ctrl(NvmeCtrl *n)
continue;
}
- nvme_ns_flush(ns);
+ nvme_ns_shutdown(ns);
}
-
- n->bar.cc = 0;
}
static int nvme_start_ctrl(NvmeCtrl *n)
@@ -2374,12 +2386,12 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset, uint64_t data,
}
} else if (!NVME_CC_EN(data) && NVME_CC_EN(n->bar.cc)) {
trace_pci_nvme_mmio_stopped();
- nvme_clear_ctrl(n);
+ nvme_ctrl_reset(n);
n->bar.csts &= ~NVME_CSTS_READY;
}
if (NVME_CC_SHN(data) && !(NVME_CC_SHN(n->bar.cc))) {
trace_pci_nvme_mmio_shutdown_set();
- nvme_clear_ctrl(n);
+ nvme_ctrl_shutdown(n);
n->bar.cc = data;
n->bar.csts |= NVME_CSTS_SHST_COMPLETE;
} else if (!NVME_CC_SHN(data) && NVME_CC_SHN(n->bar.cc)) {
@@ -2990,7 +3002,7 @@ static void nvme_exit(PCIDevice *pci_dev)
{
NvmeCtrl *n = NVME(pci_dev);
- nvme_clear_ctrl(n);
+ nvme_ctrl_shutdown(n);
g_free(n->cq);
g_free(n->sq);
g_free(n->aer_reqs);
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 02/13] hw/block/nvme: Generate namespace UUIDs
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
2020-12-08 20:03 ` [PATCH v11 01/13] hw/block/nvme: Process controller reset and shutdown differently Dmitry Fomichev
@ 2020-12-08 20:03 ` Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 03/13] hw/block/nvme: Separate read and write handlers Dmitry Fomichev
` (12 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:03 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
In NVMe 1.4, a namespace must report an ID descriptor of UUID type
if it doesn't support EUI64 or NGUID. Add a new namespace property,
"uuid", that provides the user the option to either specify the UUID
explicitly or have a UUID generated automatically every time a
namespace is initialized.
Suggested-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Niklas Cassel <Niklas.Cassel@wdc.com>
---
hw/block/nvme-ns.h | 1 +
hw/block/nvme-ns.c | 1 +
hw/block/nvme.c | 9 +++++----
3 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/block/nvme-ns.h b/hw/block/nvme-ns.h
index ed3d7e65d5..aeca810fc7 100644
--- a/hw/block/nvme-ns.h
+++ b/hw/block/nvme-ns.h
@@ -21,6 +21,7 @@
typedef struct NvmeNamespaceParams {
uint32_t nsid;
+ QemuUUID uuid;
} NvmeNamespaceParams;
typedef struct NvmeNamespace {
diff --git a/hw/block/nvme-ns.c b/hw/block/nvme-ns.c
index 9b95e2ed33..6349aa30be 100644
--- a/hw/block/nvme-ns.c
+++ b/hw/block/nvme-ns.c
@@ -152,6 +152,7 @@ static void nvme_ns_realize(DeviceState *dev, Error **errp)
static Property nvme_ns_props[] = {
DEFINE_BLOCK_PROPERTIES(NvmeNamespace, blkconf),
DEFINE_PROP_UINT32("nsid", NvmeNamespace, params.nsid, 0),
+ DEFINE_PROP_UUID("uuid", NvmeNamespace, params.uuid),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 10acb7e7f0..a30fe75620 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -1662,6 +1662,7 @@ static uint16_t nvme_identify_nslist(NvmeCtrl *n, NvmeRequest *req)
static uint16_t nvme_identify_ns_descr_list(NvmeCtrl *n, NvmeRequest *req)
{
+ NvmeNamespace *ns;
NvmeIdentify *c = (NvmeIdentify *)&req->cmd;
uint32_t nsid = le32_to_cpu(c->nsid);
uint8_t list[NVME_IDENTIFY_DATA_SIZE];
@@ -1681,7 +1682,8 @@ static uint16_t nvme_identify_ns_descr_list(NvmeCtrl *n, NvmeRequest *req)
return NVME_INVALID_NSID | NVME_DNR;
}
- if (unlikely(!nvme_ns(n, nsid))) {
+ ns = nvme_ns(n, nsid);
+ if (unlikely(!ns)) {
return NVME_INVALID_FIELD | NVME_DNR;
}
@@ -1690,12 +1692,11 @@ static uint16_t nvme_identify_ns_descr_list(NvmeCtrl *n, NvmeRequest *req)
/*
* Because the NGUID and EUI64 fields are 0 in the Identify Namespace data
* structure, a Namespace UUID (nidt = 0x3) must be reported in the
- * Namespace Identification Descriptor. Add a very basic Namespace UUID
- * here.
+ * Namespace Identification Descriptor. Add the namespace UUID here.
*/
ns_descrs->uuid.hdr.nidt = NVME_NIDT_UUID;
ns_descrs->uuid.hdr.nidl = NVME_NIDT_UUID_LEN;
- stl_be_p(&ns_descrs->uuid.v, nsid);
+ memcpy(&ns_descrs->uuid.v, ns->params.uuid.data, NVME_NIDT_UUID_LEN);
return nvme_dma(n, list, NVME_IDENTIFY_DATA_SIZE,
DMA_DIRECTION_FROM_DEVICE, req);
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 03/13] hw/block/nvme: Separate read and write handlers
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
2020-12-08 20:03 ` [PATCH v11 01/13] hw/block/nvme: Process controller reset and shutdown differently Dmitry Fomichev
2020-12-08 20:03 ` [PATCH v11 02/13] hw/block/nvme: Generate namespace UUIDs Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 04/13] hw/block/nvme: Combine nvme_write_zeroes() and nvme_write() Dmitry Fomichev
` (11 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
The majority of code in nvme_rw() is becoming read- or write-specific.
Move these parts to two separate handlers, nvme_read() and nvme_write()
to make the code more readable and to remove multiple is_write checks
that has been present in the i/o path.
This is a refactoring patch, no change in functionality.
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Niklas Cassel <Niklas.Cassel@wdc.com>
Acked-by: Klaus Jensen <its@irrelevant.dk>
---
hw/block/nvme.c | 107 ++++++++++++++++++++++++++++--------------
hw/block/trace-events | 3 +-
2 files changed, 74 insertions(+), 36 deletions(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index a30fe75620..897c2d04e5 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -1073,6 +1073,61 @@ static uint16_t nvme_flush(NvmeCtrl *n, NvmeRequest *req)
return NVME_NO_COMPLETE;
}
+static uint16_t nvme_read(NvmeCtrl *n, NvmeRequest *req)
+{
+ NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
+ NvmeNamespace *ns = req->ns;
+ uint64_t slba = le64_to_cpu(rw->slba);
+ uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
+ uint64_t data_size = nvme_l2b(ns, nlb);
+ uint64_t data_offset;
+ BlockBackend *blk = ns->blkconf.blk;
+ uint16_t status;
+
+ trace_pci_nvme_read(nvme_cid(req), nvme_nsid(ns), nlb, data_size, slba);
+
+ status = nvme_check_mdts(n, data_size);
+ if (status) {
+ trace_pci_nvme_err_mdts(nvme_cid(req), data_size);
+ goto invalid;
+ }
+
+ status = nvme_check_bounds(n, ns, slba, nlb);
+ if (status) {
+ trace_pci_nvme_err_invalid_lba_range(slba, nlb, ns->id_ns.nsze);
+ goto invalid;
+ }
+
+ status = nvme_map_dptr(n, data_size, req);
+ if (status) {
+ goto invalid;
+ }
+
+ if (NVME_ERR_REC_DULBE(ns->features.err_rec)) {
+ status = nvme_check_dulbe(ns, slba, nlb);
+ if (status) {
+ goto invalid;
+ }
+ }
+
+ data_offset = nvme_l2b(ns, slba);
+
+ block_acct_start(blk_get_stats(blk), &req->acct, data_size,
+ BLOCK_ACCT_READ);
+ if (req->qsg.sg) {
+ req->aiocb = dma_blk_read(blk, &req->qsg, data_offset,
+ BDRV_SECTOR_SIZE, nvme_rw_cb, req);
+ } else {
+ req->aiocb = blk_aio_preadv(blk, data_offset, &req->iov, 0,
+ nvme_rw_cb, req);
+ }
+ return NVME_NO_COMPLETE;
+
+invalid:
+ block_acct_invalid(blk_get_stats(blk), BLOCK_ACCT_READ);
+ return status | NVME_DNR;
+}
+
static uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeRequest *req)
{
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
@@ -1098,22 +1153,19 @@ static uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeRequest *req)
return NVME_NO_COMPLETE;
}
-static uint16_t nvme_rw(NvmeCtrl *n, NvmeRequest *req)
+static uint16_t nvme_write(NvmeCtrl *n, NvmeRequest *req)
{
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
NvmeNamespace *ns = req->ns;
- uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
uint64_t slba = le64_to_cpu(rw->slba);
-
+ uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
uint64_t data_size = nvme_l2b(ns, nlb);
- uint64_t data_offset = nvme_l2b(ns, slba);
- enum BlockAcctType acct = req->cmd.opcode == NVME_CMD_WRITE ?
- BLOCK_ACCT_WRITE : BLOCK_ACCT_READ;
+ uint64_t data_offset;
BlockBackend *blk = ns->blkconf.blk;
uint16_t status;
- trace_pci_nvme_rw(nvme_cid(req), nvme_io_opc_str(rw->opcode),
- nvme_nsid(ns), nlb, data_size, slba);
+ trace_pci_nvme_write(nvme_cid(req), nvme_io_opc_str(rw->opcode),
+ nvme_nsid(ns), nlb, data_size, slba);
status = nvme_check_mdts(n, data_size);
if (status) {
@@ -1127,43 +1179,27 @@ static uint16_t nvme_rw(NvmeCtrl *n, NvmeRequest *req)
goto invalid;
}
- if (acct == BLOCK_ACCT_READ) {
- if (NVME_ERR_REC_DULBE(ns->features.err_rec)) {
- status = nvme_check_dulbe(ns, slba, nlb);
- if (status) {
- goto invalid;
- }
- }
- }
-
status = nvme_map_dptr(n, data_size, req);
if (status) {
goto invalid;
}
- block_acct_start(blk_get_stats(blk), &req->acct, data_size, acct);
+ data_offset = nvme_l2b(ns, slba);
+
+ block_acct_start(blk_get_stats(blk), &req->acct, data_size,
+ BLOCK_ACCT_WRITE);
if (req->qsg.sg) {
- if (acct == BLOCK_ACCT_WRITE) {
- req->aiocb = dma_blk_write(blk, &req->qsg, data_offset,
- BDRV_SECTOR_SIZE, nvme_rw_cb, req);
- } else {
- req->aiocb = dma_blk_read(blk, &req->qsg, data_offset,
- BDRV_SECTOR_SIZE, nvme_rw_cb, req);
- }
+ req->aiocb = dma_blk_write(blk, &req->qsg, data_offset,
+ BDRV_SECTOR_SIZE, nvme_rw_cb, req);
} else {
- if (acct == BLOCK_ACCT_WRITE) {
- req->aiocb = blk_aio_pwritev(blk, data_offset, &req->iov, 0,
- nvme_rw_cb, req);
- } else {
- req->aiocb = blk_aio_preadv(blk, data_offset, &req->iov, 0,
- nvme_rw_cb, req);
- }
+ req->aiocb = blk_aio_pwritev(blk, data_offset, &req->iov, 0,
+ nvme_rw_cb, req);
}
return NVME_NO_COMPLETE;
invalid:
- block_acct_invalid(blk_get_stats(ns->blkconf.blk), acct);
- return status;
+ block_acct_invalid(blk_get_stats(blk), BLOCK_ACCT_WRITE);
+ return status | NVME_DNR;
}
static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
@@ -1192,8 +1228,9 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
case NVME_CMD_WRITE_ZEROES:
return nvme_write_zeroes(n, req);
case NVME_CMD_WRITE:
+ return nvme_write(n, req);
case NVME_CMD_READ:
- return nvme_rw(n, req);
+ return nvme_read(n, req);
case NVME_CMD_DSM:
return nvme_dsm(n, req);
default:
diff --git a/hw/block/trace-events b/hw/block/trace-events
index af2d0cb28f..6233f801e1 100644
--- a/hw/block/trace-events
+++ b/hw/block/trace-events
@@ -40,7 +40,8 @@ pci_nvme_map_prp(uint64_t trans_len, uint32_t len, uint64_t prp1, uint64_t prp2,
pci_nvme_map_sgl(uint16_t cid, uint8_t typ, uint64_t len) "cid %"PRIu16" type 0x%"PRIx8" len %"PRIu64""
pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" nsid %"PRIu32" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'"
pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'"
-pci_nvme_rw(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" opname '%s' nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
+pci_nvme_read(uint16_t cid, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
+pci_nvme_write(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" opname '%s' nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
pci_nvme_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'"
pci_nvme_write_zeroes(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) "cid %"PRIu16" nsid %"PRIu32" slba %"PRIu64" nlb %"PRIu32""
pci_nvme_block_status(int64_t offset, int64_t bytes, int64_t pnum, int ret, bool zeroed) "offset %"PRId64" bytes %"PRId64" pnum %"PRId64" ret 0x%x zeroed %d"
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 04/13] hw/block/nvme: Combine nvme_write_zeroes() and nvme_write()
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (2 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 03/13] hw/block/nvme: Separate read and write handlers Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 05/13] hw/block/nvme: Add Commands Supported and Effects log Dmitry Fomichev
` (10 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
Move write processing to nvme_do_write() that now handles both WRITE
and WRITE ZEROES. Both nvme_write() and nvme_write_zeroes() become
inline helper functions.
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Niklas Cassel <Niklas.Cassel@wdc.com>
Acked-by: Klaus Jensen <its@irrelevant.dk>
---
hw/block/nvme.c | 78 ++++++++++++++++++++-----------------------
hw/block/trace-events | 1 -
2 files changed, 36 insertions(+), 43 deletions(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 897c2d04e5..986917dabf 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -1128,32 +1128,7 @@ invalid:
return status | NVME_DNR;
}
-static uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeRequest *req)
-{
- NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
- NvmeNamespace *ns = req->ns;
- uint64_t slba = le64_to_cpu(rw->slba);
- uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
- uint64_t offset = nvme_l2b(ns, slba);
- uint32_t count = nvme_l2b(ns, nlb);
- uint16_t status;
-
- trace_pci_nvme_write_zeroes(nvme_cid(req), nvme_nsid(ns), slba, nlb);
-
- status = nvme_check_bounds(n, ns, slba, nlb);
- if (status) {
- trace_pci_nvme_err_invalid_lba_range(slba, nlb, ns->id_ns.nsze);
- return status;
- }
-
- block_acct_start(blk_get_stats(req->ns->blkconf.blk), &req->acct, 0,
- BLOCK_ACCT_WRITE);
- req->aiocb = blk_aio_pwrite_zeroes(req->ns->blkconf.blk, offset, count,
- BDRV_REQ_MAY_UNMAP, nvme_rw_cb, req);
- return NVME_NO_COMPLETE;
-}
-
-static uint16_t nvme_write(NvmeCtrl *n, NvmeRequest *req)
+static uint16_t nvme_do_write(NvmeCtrl *n, NvmeRequest *req, bool wrz)
{
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
NvmeNamespace *ns = req->ns;
@@ -1167,10 +1142,12 @@ static uint16_t nvme_write(NvmeCtrl *n, NvmeRequest *req)
trace_pci_nvme_write(nvme_cid(req), nvme_io_opc_str(rw->opcode),
nvme_nsid(ns), nlb, data_size, slba);
- status = nvme_check_mdts(n, data_size);
- if (status) {
- trace_pci_nvme_err_mdts(nvme_cid(req), data_size);
- goto invalid;
+ if (!wrz) {
+ status = nvme_check_mdts(n, data_size);
+ if (status) {
+ trace_pci_nvme_err_mdts(nvme_cid(req), data_size);
+ goto invalid;
+ }
}
status = nvme_check_bounds(n, ns, slba, nlb);
@@ -1179,21 +1156,28 @@ static uint16_t nvme_write(NvmeCtrl *n, NvmeRequest *req)
goto invalid;
}
- status = nvme_map_dptr(n, data_size, req);
- if (status) {
- goto invalid;
- }
-
data_offset = nvme_l2b(ns, slba);
- block_acct_start(blk_get_stats(blk), &req->acct, data_size,
- BLOCK_ACCT_WRITE);
- if (req->qsg.sg) {
- req->aiocb = dma_blk_write(blk, &req->qsg, data_offset,
- BDRV_SECTOR_SIZE, nvme_rw_cb, req);
+ if (!wrz) {
+ status = nvme_map_dptr(n, data_size, req);
+ if (status) {
+ goto invalid;
+ }
+
+ block_acct_start(blk_get_stats(blk), &req->acct, data_size,
+ BLOCK_ACCT_WRITE);
+ if (req->qsg.sg) {
+ req->aiocb = dma_blk_write(blk, &req->qsg, data_offset,
+ BDRV_SECTOR_SIZE, nvme_rw_cb, req);
+ } else {
+ req->aiocb = blk_aio_pwritev(blk, data_offset, &req->iov, 0,
+ nvme_rw_cb, req);
+ }
} else {
- req->aiocb = blk_aio_pwritev(blk, data_offset, &req->iov, 0,
- nvme_rw_cb, req);
+ block_acct_start(blk_get_stats(blk), &req->acct, 0, BLOCK_ACCT_WRITE);
+ req->aiocb = blk_aio_pwrite_zeroes(blk, data_offset, data_size,
+ BDRV_REQ_MAY_UNMAP, nvme_rw_cb,
+ req);
}
return NVME_NO_COMPLETE;
@@ -1202,6 +1186,16 @@ invalid:
return status | NVME_DNR;
}
+static inline uint16_t nvme_write(NvmeCtrl *n, NvmeRequest *req)
+{
+ return nvme_do_write(n, req, false);
+}
+
+static inline uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeRequest *req)
+{
+ return nvme_do_write(n, req, true);
+}
+
static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
{
uint32_t nsid = le32_to_cpu(req->cmd.nsid);
diff --git a/hw/block/trace-events b/hw/block/trace-events
index 6233f801e1..02a7c3044c 100644
--- a/hw/block/trace-events
+++ b/hw/block/trace-events
@@ -43,7 +43,6 @@ pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode, const char *opna
pci_nvme_read(uint16_t cid, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
pci_nvme_write(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" opname '%s' nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
pci_nvme_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'"
-pci_nvme_write_zeroes(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) "cid %"PRIu16" nsid %"PRIu32" slba %"PRIu64" nlb %"PRIu32""
pci_nvme_block_status(int64_t offset, int64_t bytes, int64_t pnum, int ret, bool zeroed) "offset %"PRId64" bytes %"PRId64" pnum %"PRId64" ret 0x%x zeroed %d"
pci_nvme_dsm(uint16_t cid, uint32_t nsid, uint32_t nr, uint32_t attr) "cid %"PRIu16" nsid %"PRIu32" nr %"PRIu32" attr 0x%"PRIx32""
pci_nvme_dsm_deallocate(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) "cid %"PRIu16" nsid %"PRIu32" slba %"PRIu64" nlb %"PRIu32""
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 05/13] hw/block/nvme: Add Commands Supported and Effects log
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (3 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 04/13] hw/block/nvme: Combine nvme_write_zeroes() and nvme_write() Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 06/13] hw/block/nvme: Add support for Namespace Types Dmitry Fomichev
` (9 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
This log page becomes necessary to implement to allow checking for
Zone Append command support in Zoned Namespace Command Set.
This commit adds the code to report this log page for NVM Command
Set only. The parts that are specific to zoned operation will be
added later in the series.
All incoming admin and i/o commands are now only processed if their
corresponding support bits are set in this log. This provides an
easy way to control what commands to support and what not to
depending on set CC.CSS.
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Niklas Cassel <Niklas.Cassel@wdc.com>
---
hw/block/nvme-ns.h | 1 +
include/block/nvme.h | 19 +++++++++
hw/block/nvme.c | 96 +++++++++++++++++++++++++++++++++++++++----
hw/block/trace-events | 1 +
4 files changed, 108 insertions(+), 9 deletions(-)
diff --git a/hw/block/nvme-ns.h b/hw/block/nvme-ns.h
index aeca810fc7..bdeaf1c0de 100644
--- a/hw/block/nvme-ns.h
+++ b/hw/block/nvme-ns.h
@@ -30,6 +30,7 @@ typedef struct NvmeNamespace {
int32_t bootindex;
int64_t size;
NvmeIdNs id_ns;
+ const uint32_t *iocs;
NvmeNamespaceParams params;
diff --git a/include/block/nvme.h b/include/block/nvme.h
index e95ff6ca9b..422c98a297 100644
--- a/include/block/nvme.h
+++ b/include/block/nvme.h
@@ -746,10 +746,27 @@ enum NvmeSmartWarn {
NVME_SMART_FAILED_VOLATILE_MEDIA = 1 << 4,
};
+typedef struct NvmeEffectsLog {
+ uint32_t acs[256];
+ uint32_t iocs[256];
+ uint8_t resv[2048];
+} NvmeEffectsLog;
+
+enum {
+ NVME_CMD_EFF_CSUPP = 1 << 0,
+ NVME_CMD_EFF_LBCC = 1 << 1,
+ NVME_CMD_EFF_NCC = 1 << 2,
+ NVME_CMD_EFF_NIC = 1 << 3,
+ NVME_CMD_EFF_CCC = 1 << 4,
+ NVME_CMD_EFF_CSE_MASK = 3 << 16,
+ NVME_CMD_EFF_UUID_SEL = 1 << 19,
+};
+
enum NvmeLogIdentifier {
NVME_LOG_ERROR_INFO = 0x01,
NVME_LOG_SMART_INFO = 0x02,
NVME_LOG_FW_SLOT_INFO = 0x03,
+ NVME_LOG_CMD_EFFECTS = 0x05,
};
typedef struct QEMU_PACKED NvmePSD {
@@ -862,6 +879,7 @@ enum NvmeIdCtrlFrmw {
enum NvmeIdCtrlLpa {
NVME_LPA_NS_SMART = 1 << 0,
+ NVME_LPA_CSE = 1 << 1,
NVME_LPA_EXTENDED = 1 << 2,
};
@@ -1070,6 +1088,7 @@ static inline void _nvme_check_size(void)
QEMU_BUILD_BUG_ON(sizeof(NvmeErrorLog) != 64);
QEMU_BUILD_BUG_ON(sizeof(NvmeFwSlotInfoLog) != 512);
QEMU_BUILD_BUG_ON(sizeof(NvmeSmartLog) != 512);
+ QEMU_BUILD_BUG_ON(sizeof(NvmeEffectsLog) != 4096);
QEMU_BUILD_BUG_ON(sizeof(NvmeIdCtrl) != 4096);
QEMU_BUILD_BUG_ON(sizeof(NvmeIdNs) != 4096);
QEMU_BUILD_BUG_ON(sizeof(NvmeSglDescriptor) != 16);
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 986917dabf..0b047f2069 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -112,6 +112,28 @@ static const uint32_t nvme_feature_cap[NVME_FID_MAX] = {
[NVME_TIMESTAMP] = NVME_FEAT_CAP_CHANGE,
};
+static const uint32_t nvme_cse_acs[256] = {
+ [NVME_ADM_CMD_DELETE_SQ] = NVME_CMD_EFF_CSUPP,
+ [NVME_ADM_CMD_CREATE_SQ] = NVME_CMD_EFF_CSUPP,
+ [NVME_ADM_CMD_GET_LOG_PAGE] = NVME_CMD_EFF_CSUPP,
+ [NVME_ADM_CMD_DELETE_CQ] = NVME_CMD_EFF_CSUPP,
+ [NVME_ADM_CMD_CREATE_CQ] = NVME_CMD_EFF_CSUPP,
+ [NVME_ADM_CMD_IDENTIFY] = NVME_CMD_EFF_CSUPP,
+ [NVME_ADM_CMD_ABORT] = NVME_CMD_EFF_CSUPP,
+ [NVME_ADM_CMD_SET_FEATURES] = NVME_CMD_EFF_CSUPP,
+ [NVME_ADM_CMD_GET_FEATURES] = NVME_CMD_EFF_CSUPP,
+ [NVME_ADM_CMD_ASYNC_EV_REQ] = NVME_CMD_EFF_CSUPP,
+};
+
+static const uint32_t nvme_cse_iocs_none[256];
+
+static const uint32_t nvme_cse_iocs_nvm[256] = {
+ [NVME_CMD_FLUSH] = NVME_CMD_EFF_CSUPP | NVME_CMD_EFF_LBCC,
+ [NVME_CMD_WRITE_ZEROES] = NVME_CMD_EFF_CSUPP | NVME_CMD_EFF_LBCC,
+ [NVME_CMD_WRITE] = NVME_CMD_EFF_CSUPP | NVME_CMD_EFF_LBCC,
+ [NVME_CMD_READ] = NVME_CMD_EFF_CSUPP,
+};
+
static void nvme_process_sq(void *opaque);
static uint16_t nvme_cid(NvmeRequest *req)
@@ -1203,10 +1225,6 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
trace_pci_nvme_io_cmd(nvme_cid(req), nsid, nvme_sqid(req),
req->cmd.opcode, nvme_io_opc_str(req->cmd.opcode));
- if (NVME_CC_CSS(n->bar.cc) == NVME_CC_CSS_ADMIN_ONLY) {
- return NVME_INVALID_OPCODE | NVME_DNR;
- }
-
if (!nvme_nsid_valid(n, nsid)) {
return NVME_INVALID_NSID | NVME_DNR;
}
@@ -1216,6 +1234,11 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
return NVME_INVALID_FIELD | NVME_DNR;
}
+ if (!(req->ns->iocs[req->cmd.opcode] & NVME_CMD_EFF_CSUPP)) {
+ trace_pci_nvme_err_invalid_opc(req->cmd.opcode);
+ return NVME_INVALID_OPCODE | NVME_DNR;
+ }
+
switch (req->cmd.opcode) {
case NVME_CMD_FLUSH:
return nvme_flush(n, req);
@@ -1228,8 +1251,7 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
case NVME_CMD_DSM:
return nvme_dsm(n, req);
default:
- trace_pci_nvme_err_invalid_opc(req->cmd.opcode);
- return NVME_INVALID_OPCODE | NVME_DNR;
+ assert(false);
}
}
@@ -1466,6 +1488,37 @@ static uint16_t nvme_error_info(NvmeCtrl *n, uint8_t rae, uint32_t buf_len,
DMA_DIRECTION_FROM_DEVICE, req);
}
+static uint16_t nvme_cmd_effects(NvmeCtrl *n, uint32_t buf_len,
+ uint64_t off, NvmeRequest *req)
+{
+ NvmeEffectsLog log = {};
+ const uint32_t *src_iocs = NULL;
+ uint32_t trans_len;
+
+ if (off >= sizeof(log)) {
+ trace_pci_nvme_err_invalid_log_page_offset(off, sizeof(log));
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+
+ switch (NVME_CC_CSS(n->bar.cc)) {
+ case NVME_CC_CSS_NVM:
+ src_iocs = nvme_cse_iocs_nvm;
+ case NVME_CC_CSS_ADMIN_ONLY:
+ break;
+ }
+
+ memcpy(log.acs, nvme_cse_acs, sizeof(nvme_cse_acs));
+
+ if (src_iocs) {
+ memcpy(log.iocs, src_iocs, sizeof(log.iocs));
+ }
+
+ trans_len = MIN(sizeof(log) - off, buf_len);
+
+ return nvme_dma(n, ((uint8_t *)&log) + off, trans_len,
+ DMA_DIRECTION_FROM_DEVICE, req);
+}
+
static uint16_t nvme_get_log(NvmeCtrl *n, NvmeRequest *req)
{
NvmeCmd *cmd = &req->cmd;
@@ -1509,6 +1562,8 @@ static uint16_t nvme_get_log(NvmeCtrl *n, NvmeRequest *req)
return nvme_smart_info(n, rae, len, off, req);
case NVME_LOG_FW_SLOT_INFO:
return nvme_fw_log_info(n, len, off, req);
+ case NVME_LOG_CMD_EFFECTS:
+ return nvme_cmd_effects(n, len, off, req);
default:
trace_pci_nvme_err_invalid_log_page(nvme_cid(req), lid);
return NVME_INVALID_FIELD | NVME_DNR;
@@ -2131,6 +2186,11 @@ static uint16_t nvme_admin_cmd(NvmeCtrl *n, NvmeRequest *req)
trace_pci_nvme_admin_cmd(nvme_cid(req), nvme_sqid(req), req->cmd.opcode,
nvme_adm_opc_str(req->cmd.opcode));
+ if (!(nvme_cse_acs[req->cmd.opcode] & NVME_CMD_EFF_CSUPP)) {
+ trace_pci_nvme_err_invalid_admin_opc(req->cmd.opcode);
+ return NVME_INVALID_OPCODE | NVME_DNR;
+ }
+
switch (req->cmd.opcode) {
case NVME_ADM_CMD_DELETE_SQ:
return nvme_del_sq(n, req);
@@ -2153,8 +2213,7 @@ static uint16_t nvme_admin_cmd(NvmeCtrl *n, NvmeRequest *req)
case NVME_ADM_CMD_ASYNC_EV_REQ:
return nvme_aer(n, req);
default:
- trace_pci_nvme_err_invalid_admin_opc(req->cmd.opcode);
- return NVME_INVALID_OPCODE | NVME_DNR;
+ assert(false);
}
}
@@ -2254,6 +2313,23 @@ static void nvme_ctrl_shutdown(NvmeCtrl *n)
}
}
+static void nvme_select_ns_iocs(NvmeCtrl *n)
+{
+ NvmeNamespace *ns;
+ int i;
+
+ for (i = 1; i <= n->num_namespaces; i++) {
+ ns = nvme_ns(n, i);
+ if (!ns) {
+ continue;
+ }
+ ns->iocs = nvme_cse_iocs_none;
+ if (NVME_CC_CSS(n->bar.cc) != NVME_CC_CSS_ADMIN_ONLY) {
+ ns->iocs = nvme_cse_iocs_nvm;
+ }
+ }
+}
+
static int nvme_start_ctrl(NvmeCtrl *n)
{
uint32_t page_bits = NVME_CC_MPS(n->bar.cc) + 12;
@@ -2352,6 +2428,8 @@ static int nvme_start_ctrl(NvmeCtrl *n)
QTAILQ_INIT(&n->aer_queue);
+ nvme_select_ns_iocs(n);
+
return 0;
}
@@ -2959,7 +3037,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev)
id->acl = 3;
id->aerl = n->params.aerl;
id->frmw = (NVME_NUM_FW_SLOTS << 1) | NVME_FRMW_SLOT1_RO;
- id->lpa = NVME_LPA_NS_SMART | NVME_LPA_EXTENDED;
+ id->lpa = NVME_LPA_NS_SMART | NVME_LPA_CSE | NVME_LPA_EXTENDED;
/* recommended default value (~70 C) */
id->wctemp = cpu_to_le16(NVME_TEMPERATURE_WARNING);
diff --git a/hw/block/trace-events b/hw/block/trace-events
index 02a7c3044c..22e0108c9d 100644
--- a/hw/block/trace-events
+++ b/hw/block/trace-events
@@ -106,6 +106,7 @@ pci_nvme_err_invalid_prp2_align(uint64_t prp2) "PRP2 is not page aligned: 0x%"PR
pci_nvme_err_invalid_opc(uint8_t opc) "invalid opcode 0x%"PRIx8""
pci_nvme_err_invalid_admin_opc(uint8_t opc) "invalid admin opcode 0x%"PRIx8""
pci_nvme_err_invalid_lba_range(uint64_t start, uint64_t len, uint64_t limit) "Invalid LBA start=%"PRIu64" len=%"PRIu64" limit=%"PRIu64""
+pci_nvme_err_invalid_log_page_offset(uint64_t ofs, uint64_t size) "must be <= %"PRIu64", got %"PRIu64""
pci_nvme_err_invalid_del_sq(uint16_t qid) "invalid submission queue deletion, sid=%"PRIu16""
pci_nvme_err_invalid_create_sq_cqid(uint16_t cqid) "failed creating submission queue, invalid cqid=%"PRIu16""
pci_nvme_err_invalid_create_sq_sqid(uint16_t sqid) "failed creating submission queue, invalid sqid=%"PRIu16""
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 06/13] hw/block/nvme: Add support for Namespace Types
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (4 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 05/13] hw/block/nvme: Add Commands Supported and Effects log Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 07/13] hw/block/nvme: Support allocated CNS command variants Dmitry Fomichev
` (8 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
From: Niklas Cassel <niklas.cassel@wdc.com>
Define the structures and constants required to implement
Namespace Types support.
Namespace Types introduce a new command set, "I/O Command Sets",
that allows the host to retrieve the command sets associated with
a namespace. Introduce support for the command set and enable
detection for the NVM Command Set.
The new workflows for identify commands rely heavily on zero-filled
identify structs. E.g., certain CNS commands are defined to return
a zero-filled identify struct when an inactive namespace NSID
is supplied.
Add a helper function in order to avoid code duplication when
reporting zero-filled identify structures.
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Keith Busch <kbusch@kernel.org>
---
hw/block/nvme-ns.h | 1 +
include/block/nvme.h | 64 ++++++++++----
hw/block/nvme-ns.c | 2 +
hw/block/nvme.c | 188 +++++++++++++++++++++++++++++++++++-------
hw/block/trace-events | 6 ++
5 files changed, 217 insertions(+), 44 deletions(-)
diff --git a/hw/block/nvme-ns.h b/hw/block/nvme-ns.h
index bdeaf1c0de..bdbc98c2ec 100644
--- a/hw/block/nvme-ns.h
+++ b/hw/block/nvme-ns.h
@@ -31,6 +31,7 @@ typedef struct NvmeNamespace {
int64_t size;
NvmeIdNs id_ns;
const uint32_t *iocs;
+ uint8_t csi;
NvmeNamespaceParams params;
diff --git a/include/block/nvme.h b/include/block/nvme.h
index 422c98a297..890977db4b 100644
--- a/include/block/nvme.h
+++ b/include/block/nvme.h
@@ -84,6 +84,7 @@ enum NvmeCapMask {
enum NvmeCapCss {
NVME_CAP_CSS_NVM = 1 << 0,
+ NVME_CAP_CSS_CSI_SUPP = 1 << 6,
NVME_CAP_CSS_ADMIN_ONLY = 1 << 7,
};
@@ -117,9 +118,25 @@ enum NvmeCcMask {
enum NvmeCcCss {
NVME_CC_CSS_NVM = 0x0,
+ NVME_CC_CSS_CSI = 0x6,
NVME_CC_CSS_ADMIN_ONLY = 0x7,
};
+#define NVME_SET_CC_EN(cc, val) \
+ (cc |= (uint32_t)((val) & CC_EN_MASK) << CC_EN_SHIFT)
+#define NVME_SET_CC_CSS(cc, val) \
+ (cc |= (uint32_t)((val) & CC_CSS_MASK) << CC_CSS_SHIFT)
+#define NVME_SET_CC_MPS(cc, val) \
+ (cc |= (uint32_t)((val) & CC_MPS_MASK) << CC_MPS_SHIFT)
+#define NVME_SET_CC_AMS(cc, val) \
+ (cc |= (uint32_t)((val) & CC_AMS_MASK) << CC_AMS_SHIFT)
+#define NVME_SET_CC_SHN(cc, val) \
+ (cc |= (uint32_t)((val) & CC_SHN_MASK) << CC_SHN_SHIFT)
+#define NVME_SET_CC_IOSQES(cc, val) \
+ (cc |= (uint32_t)((val) & CC_IOSQES_MASK) << CC_IOSQES_SHIFT)
+#define NVME_SET_CC_IOCQES(cc, val) \
+ (cc |= (uint32_t)((val) & CC_IOCQES_MASK) << CC_IOCQES_SHIFT)
+
enum NvmeCstsShift {
CSTS_RDY_SHIFT = 0,
CSTS_CFS_SHIFT = 1,
@@ -534,8 +551,13 @@ typedef struct QEMU_PACKED NvmeIdentify {
uint64_t rsvd2[2];
uint64_t prp1;
uint64_t prp2;
- uint32_t cns;
- uint32_t rsvd11[5];
+ uint8_t cns;
+ uint8_t rsvd10;
+ uint16_t ctrlid;
+ uint16_t nvmsetid;
+ uint8_t rsvd11;
+ uint8_t csi;
+ uint32_t rsvd12[4];
} NvmeIdentify;
typedef struct QEMU_PACKED NvmeRwCmd {
@@ -656,6 +678,7 @@ enum NvmeStatusCodes {
NVME_SGL_DESCR_TYPE_INVALID = 0x0011,
NVME_INVALID_USE_OF_CMB = 0x0012,
NVME_INVALID_PRP_OFFSET = 0x0013,
+ NVME_CMD_SET_CMB_REJECTED = 0x002b,
NVME_LBA_RANGE = 0x0080,
NVME_CAP_EXCEEDED = 0x0081,
NVME_NS_NOT_READY = 0x0082,
@@ -783,11 +806,15 @@ typedef struct QEMU_PACKED NvmePSD {
#define NVME_IDENTIFY_DATA_SIZE 4096
-enum {
- NVME_ID_CNS_NS = 0x0,
- NVME_ID_CNS_CTRL = 0x1,
- NVME_ID_CNS_NS_ACTIVE_LIST = 0x2,
- NVME_ID_CNS_NS_DESCR_LIST = 0x3,
+enum NvmeIdCns {
+ NVME_ID_CNS_NS = 0x00,
+ NVME_ID_CNS_CTRL = 0x01,
+ NVME_ID_CNS_NS_ACTIVE_LIST = 0x02,
+ NVME_ID_CNS_NS_DESCR_LIST = 0x03,
+ NVME_ID_CNS_CS_NS = 0x05,
+ NVME_ID_CNS_CS_CTRL = 0x06,
+ NVME_ID_CNS_CS_NS_ACTIVE_LIST = 0x07,
+ NVME_ID_CNS_IO_COMMAND_SET = 0x1c,
};
typedef struct QEMU_PACKED NvmeIdCtrl {
@@ -938,6 +965,7 @@ enum NvmeFeatureIds {
NVME_WRITE_ATOMICITY = 0xa,
NVME_ASYNCHRONOUS_EVENT_CONF = 0xb,
NVME_TIMESTAMP = 0xe,
+ NVME_COMMAND_SET_PROFILE = 0x19,
NVME_SOFTWARE_PROGRESS_MARKER = 0x80,
NVME_FID_MAX = 0x100,
};
@@ -1027,18 +1055,26 @@ typedef struct QEMU_PACKED NvmeIdNsDescr {
uint8_t rsvd2[2];
} NvmeIdNsDescr;
-enum {
- NVME_NIDT_EUI64_LEN = 8,
- NVME_NIDT_NGUID_LEN = 16,
- NVME_NIDT_UUID_LEN = 16,
+enum NvmeNsIdentifierLength {
+ NVME_NIDL_EUI64 = 8,
+ NVME_NIDL_NGUID = 16,
+ NVME_NIDL_UUID = 16,
+ NVME_NIDL_CSI = 1,
};
enum NvmeNsIdentifierType {
- NVME_NIDT_EUI64 = 0x1,
- NVME_NIDT_NGUID = 0x2,
- NVME_NIDT_UUID = 0x3,
+ NVME_NIDT_EUI64 = 0x01,
+ NVME_NIDT_NGUID = 0x02,
+ NVME_NIDT_UUID = 0x03,
+ NVME_NIDT_CSI = 0x04,
};
+enum NvmeCsi {
+ NVME_CSI_NVM = 0x00,
+};
+
+#define NVME_SET_CSI(vec, csi) (vec |= (uint8_t)(1 << (csi)))
+
/*Deallocate Logical Block Features*/
#define NVME_ID_NS_DLFEAT_GUARD_CRC(dlfeat) ((dlfeat) & 0x10)
#define NVME_ID_NS_DLFEAT_WRITE_ZEROES(dlfeat) ((dlfeat) & 0x08)
diff --git a/hw/block/nvme-ns.c b/hw/block/nvme-ns.c
index 6349aa30be..961cc81923 100644
--- a/hw/block/nvme-ns.c
+++ b/hw/block/nvme-ns.c
@@ -43,6 +43,8 @@ static int nvme_ns_init(NvmeNamespace *ns, Error **errp)
id_ns->nsze = cpu_to_le64(nvme_ns_nlbas(ns));
+ ns->csi = NVME_CSI_NVM;
+
/* no thin provisioning */
id_ns->ncap = id_ns->nsze;
id_ns->nuse = id_ns->ncap;
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 0b047f2069..16eed37533 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -1488,7 +1488,7 @@ static uint16_t nvme_error_info(NvmeCtrl *n, uint8_t rae, uint32_t buf_len,
DMA_DIRECTION_FROM_DEVICE, req);
}
-static uint16_t nvme_cmd_effects(NvmeCtrl *n, uint32_t buf_len,
+static uint16_t nvme_cmd_effects(NvmeCtrl *n, uint8_t csi, uint32_t buf_len,
uint64_t off, NvmeRequest *req)
{
NvmeEffectsLog log = {};
@@ -1503,8 +1503,15 @@ static uint16_t nvme_cmd_effects(NvmeCtrl *n, uint32_t buf_len,
switch (NVME_CC_CSS(n->bar.cc)) {
case NVME_CC_CSS_NVM:
src_iocs = nvme_cse_iocs_nvm;
+ /* fall through */
case NVME_CC_CSS_ADMIN_ONLY:
break;
+ case NVME_CC_CSS_CSI:
+ switch (csi) {
+ case NVME_CSI_NVM:
+ src_iocs = nvme_cse_iocs_nvm;
+ break;
+ }
}
memcpy(log.acs, nvme_cse_acs, sizeof(nvme_cse_acs));
@@ -1530,6 +1537,7 @@ static uint16_t nvme_get_log(NvmeCtrl *n, NvmeRequest *req)
uint8_t lid = dw10 & 0xff;
uint8_t lsp = (dw10 >> 8) & 0xf;
uint8_t rae = (dw10 >> 15) & 0x1;
+ uint8_t csi = le32_to_cpu(cmd->cdw14) >> 24;
uint32_t numdl, numdu;
uint64_t off, lpol, lpou;
size_t len;
@@ -1563,7 +1571,7 @@ static uint16_t nvme_get_log(NvmeCtrl *n, NvmeRequest *req)
case NVME_LOG_FW_SLOT_INFO:
return nvme_fw_log_info(n, len, off, req);
case NVME_LOG_CMD_EFFECTS:
- return nvme_cmd_effects(n, len, off, req);
+ return nvme_cmd_effects(n, csi, len, off, req);
default:
trace_pci_nvme_err_invalid_log_page(nvme_cid(req), lid);
return NVME_INVALID_FIELD | NVME_DNR;
@@ -1677,6 +1685,13 @@ static uint16_t nvme_create_cq(NvmeCtrl *n, NvmeRequest *req)
return NVME_SUCCESS;
}
+static uint16_t nvme_rpt_empty_id_struct(NvmeCtrl *n, NvmeRequest *req)
+{
+ uint8_t id[NVME_IDENTIFY_DATA_SIZE] = {};
+
+ return nvme_dma(n, id, sizeof(id), DMA_DIRECTION_FROM_DEVICE, req);
+}
+
static uint16_t nvme_identify_ctrl(NvmeCtrl *n, NvmeRequest *req)
{
trace_pci_nvme_identify_ctrl();
@@ -1685,11 +1700,23 @@ static uint16_t nvme_identify_ctrl(NvmeCtrl *n, NvmeRequest *req)
DMA_DIRECTION_FROM_DEVICE, req);
}
+static uint16_t nvme_identify_ctrl_csi(NvmeCtrl *n, NvmeRequest *req)
+{
+ NvmeIdentify *c = (NvmeIdentify *)&req->cmd;
+
+ trace_pci_nvme_identify_ctrl_csi(c->csi);
+
+ if (c->csi == NVME_CSI_NVM) {
+ return nvme_rpt_empty_id_struct(n, req);
+ }
+
+ return NVME_INVALID_FIELD | NVME_DNR;
+}
+
static uint16_t nvme_identify_ns(NvmeCtrl *n, NvmeRequest *req)
{
NvmeNamespace *ns;
NvmeIdentify *c = (NvmeIdentify *)&req->cmd;
- NvmeIdNs *id_ns, inactive = { 0 };
uint32_t nsid = le32_to_cpu(c->nsid);
trace_pci_nvme_identify_ns(nsid);
@@ -1700,23 +1727,46 @@ static uint16_t nvme_identify_ns(NvmeCtrl *n, NvmeRequest *req)
ns = nvme_ns(n, nsid);
if (unlikely(!ns)) {
- id_ns = &inactive;
- } else {
- id_ns = &ns->id_ns;
+ return nvme_rpt_empty_id_struct(n, req);
}
- return nvme_dma(n, (uint8_t *)id_ns, sizeof(NvmeIdNs),
+ return nvme_dma(n, (uint8_t *)&ns->id_ns, sizeof(NvmeIdNs),
DMA_DIRECTION_FROM_DEVICE, req);
}
+static uint16_t nvme_identify_ns_csi(NvmeCtrl *n, NvmeRequest *req)
+{
+ NvmeNamespace *ns;
+ NvmeIdentify *c = (NvmeIdentify *)&req->cmd;
+ uint32_t nsid = le32_to_cpu(c->nsid);
+
+ trace_pci_nvme_identify_ns_csi(nsid, c->csi);
+
+ if (!nvme_nsid_valid(n, nsid) || nsid == NVME_NSID_BROADCAST) {
+ return NVME_INVALID_NSID | NVME_DNR;
+ }
+
+ ns = nvme_ns(n, nsid);
+ if (unlikely(!ns)) {
+ return nvme_rpt_empty_id_struct(n, req);
+ }
+
+ if (c->csi == NVME_CSI_NVM) {
+ return nvme_rpt_empty_id_struct(n, req);
+ }
+
+ return NVME_INVALID_FIELD | NVME_DNR;
+}
+
static uint16_t nvme_identify_nslist(NvmeCtrl *n, NvmeRequest *req)
{
+ NvmeNamespace *ns;
NvmeIdentify *c = (NvmeIdentify *)&req->cmd;
- static const int data_len = NVME_IDENTIFY_DATA_SIZE;
uint32_t min_nsid = le32_to_cpu(c->nsid);
- uint32_t *list;
- uint16_t ret;
- int j = 0;
+ uint8_t list[NVME_IDENTIFY_DATA_SIZE] = {};
+ static const int data_len = sizeof(list);
+ uint32_t *list_ptr = (uint32_t *)list;
+ int i, j = 0;
trace_pci_nvme_identify_nslist(min_nsid);
@@ -1730,20 +1780,61 @@ static uint16_t nvme_identify_nslist(NvmeCtrl *n, NvmeRequest *req)
return NVME_INVALID_NSID | NVME_DNR;
}
- list = g_malloc0(data_len);
- for (int i = 1; i <= n->num_namespaces; i++) {
- if (i <= min_nsid || !nvme_ns(n, i)) {
+ for (i = 1; i <= n->num_namespaces; i++) {
+ ns = nvme_ns(n, i);
+ if (!ns) {
continue;
}
- list[j++] = cpu_to_le32(i);
+ if (ns->params.nsid <= min_nsid) {
+ continue;
+ }
+ list_ptr[j++] = cpu_to_le32(ns->params.nsid);
if (j == data_len / sizeof(uint32_t)) {
break;
}
}
- ret = nvme_dma(n, (uint8_t *)list, data_len, DMA_DIRECTION_FROM_DEVICE,
- req);
- g_free(list);
- return ret;
+
+ return nvme_dma(n, list, data_len, DMA_DIRECTION_FROM_DEVICE, req);
+}
+
+static uint16_t nvme_identify_nslist_csi(NvmeCtrl *n, NvmeRequest *req)
+{
+ NvmeNamespace *ns;
+ NvmeIdentify *c = (NvmeIdentify *)&req->cmd;
+ uint32_t min_nsid = le32_to_cpu(c->nsid);
+ uint8_t list[NVME_IDENTIFY_DATA_SIZE] = {};
+ static const int data_len = sizeof(list);
+ uint32_t *list_ptr = (uint32_t *)list;
+ int i, j = 0;
+
+ trace_pci_nvme_identify_nslist_csi(min_nsid, c->csi);
+
+ /*
+ * Same as in nvme_identify_nslist(), 0xffffffff/0xfffffffe are invalid.
+ */
+ if (min_nsid >= NVME_NSID_BROADCAST - 1) {
+ return NVME_INVALID_NSID | NVME_DNR;
+ }
+
+ if (c->csi != NVME_CSI_NVM) {
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+
+ for (i = 1; i <= n->num_namespaces; i++) {
+ ns = nvme_ns(n, i);
+ if (!ns) {
+ continue;
+ }
+ if (ns->params.nsid <= min_nsid) {
+ continue;
+ }
+ list_ptr[j++] = cpu_to_le32(ns->params.nsid);
+ if (j == data_len / sizeof(uint32_t)) {
+ break;
+ }
+ }
+
+ return nvme_dma(n, list, data_len, DMA_DIRECTION_FROM_DEVICE, req);
}
static uint16_t nvme_identify_ns_descr_list(NvmeCtrl *n, NvmeRequest *req)
@@ -1751,13 +1842,17 @@ static uint16_t nvme_identify_ns_descr_list(NvmeCtrl *n, NvmeRequest *req)
NvmeNamespace *ns;
NvmeIdentify *c = (NvmeIdentify *)&req->cmd;
uint32_t nsid = le32_to_cpu(c->nsid);
- uint8_t list[NVME_IDENTIFY_DATA_SIZE];
+ uint8_t list[NVME_IDENTIFY_DATA_SIZE] = {};
struct data {
struct {
NvmeIdNsDescr hdr;
- uint8_t v[16];
+ uint8_t v[NVME_NIDL_UUID];
} uuid;
+ struct {
+ NvmeIdNsDescr hdr;
+ uint8_t v;
+ } csi;
};
struct data *ns_descrs = (struct data *)list;
@@ -1773,19 +1868,31 @@ static uint16_t nvme_identify_ns_descr_list(NvmeCtrl *n, NvmeRequest *req)
return NVME_INVALID_FIELD | NVME_DNR;
}
- memset(list, 0x0, sizeof(list));
-
/*
* Because the NGUID and EUI64 fields are 0 in the Identify Namespace data
* structure, a Namespace UUID (nidt = 0x3) must be reported in the
* Namespace Identification Descriptor. Add the namespace UUID here.
*/
ns_descrs->uuid.hdr.nidt = NVME_NIDT_UUID;
- ns_descrs->uuid.hdr.nidl = NVME_NIDT_UUID_LEN;
- memcpy(&ns_descrs->uuid.v, ns->params.uuid.data, NVME_NIDT_UUID_LEN);
+ ns_descrs->uuid.hdr.nidl = NVME_NIDL_UUID;
+ memcpy(&ns_descrs->uuid.v, ns->params.uuid.data, NVME_NIDL_UUID);
- return nvme_dma(n, list, NVME_IDENTIFY_DATA_SIZE,
- DMA_DIRECTION_FROM_DEVICE, req);
+ ns_descrs->csi.hdr.nidt = NVME_NIDT_CSI;
+ ns_descrs->csi.hdr.nidl = NVME_NIDL_CSI;
+ ns_descrs->csi.v = ns->csi;
+
+ return nvme_dma(n, list, sizeof(list), DMA_DIRECTION_FROM_DEVICE, req);
+}
+
+static uint16_t nvme_identify_cmd_set(NvmeCtrl *n, NvmeRequest *req)
+{
+ uint8_t list[NVME_IDENTIFY_DATA_SIZE] = {};
+ static const int data_len = sizeof(list);
+
+ trace_pci_nvme_identify_cmd_set();
+
+ NVME_SET_CSI(*list, NVME_CSI_NVM);
+ return nvme_dma(n, list, data_len, DMA_DIRECTION_FROM_DEVICE, req);
}
static uint16_t nvme_identify(NvmeCtrl *n, NvmeRequest *req)
@@ -1795,12 +1902,20 @@ static uint16_t nvme_identify(NvmeCtrl *n, NvmeRequest *req)
switch (le32_to_cpu(c->cns)) {
case NVME_ID_CNS_NS:
return nvme_identify_ns(n, req);
+ case NVME_ID_CNS_CS_NS:
+ return nvme_identify_ns_csi(n, req);
case NVME_ID_CNS_CTRL:
return nvme_identify_ctrl(n, req);
+ case NVME_ID_CNS_CS_CTRL:
+ return nvme_identify_ctrl_csi(n, req);
case NVME_ID_CNS_NS_ACTIVE_LIST:
return nvme_identify_nslist(n, req);
+ case NVME_ID_CNS_CS_NS_ACTIVE_LIST:
+ return nvme_identify_nslist_csi(n, req);
case NVME_ID_CNS_NS_DESCR_LIST:
return nvme_identify_ns_descr_list(n, req);
+ case NVME_ID_CNS_IO_COMMAND_SET:
+ return nvme_identify_cmd_set(n, req);
default:
trace_pci_nvme_err_invalid_identify_cns(le32_to_cpu(c->cns));
return NVME_INVALID_FIELD | NVME_DNR;
@@ -1994,7 +2109,9 @@ defaults:
if (iv == n->admin_cq.vector) {
result |= NVME_INTVC_NOCOALESCING;
}
-
+ break;
+ case NVME_COMMAND_SET_PROFILE:
+ result = 0;
break;
default:
result = nvme_feature_default[fid];
@@ -2156,6 +2273,12 @@ static uint16_t nvme_set_feature(NvmeCtrl *n, NvmeRequest *req)
break;
case NVME_TIMESTAMP:
return nvme_set_feature_timestamp(n, req);
+ case NVME_COMMAND_SET_PROFILE:
+ if (dw11 & 0x1ff) {
+ trace_pci_nvme_err_invalid_iocsci(dw11 & 0x1ff);
+ return NVME_CMD_SET_CMB_REJECTED | NVME_DNR;
+ }
+ break;
default:
return NVME_FEAT_NOT_CHANGEABLE | NVME_DNR;
}
@@ -2324,8 +2447,12 @@ static void nvme_select_ns_iocs(NvmeCtrl *n)
continue;
}
ns->iocs = nvme_cse_iocs_none;
- if (NVME_CC_CSS(n->bar.cc) != NVME_CC_CSS_ADMIN_ONLY) {
- ns->iocs = nvme_cse_iocs_nvm;
+ switch (ns->csi) {
+ case NVME_CSI_NVM:
+ if (NVME_CC_CSS(n->bar.cc) != NVME_CC_CSS_ADMIN_ONLY) {
+ ns->iocs = nvme_cse_iocs_nvm;
+ }
+ break;
}
}
}
@@ -3066,6 +3193,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev)
NVME_CAP_SET_CQR(n->bar.cap, 1);
NVME_CAP_SET_TO(n->bar.cap, 0xf);
NVME_CAP_SET_CSS(n->bar.cap, NVME_CAP_CSS_NVM);
+ NVME_CAP_SET_CSS(n->bar.cap, NVME_CAP_CSS_CSI_SUPP);
NVME_CAP_SET_CSS(n->bar.cap, NVME_CAP_CSS_ADMIN_ONLY);
NVME_CAP_SET_MPSMAX(n->bar.cap, 4);
diff --git a/hw/block/trace-events b/hw/block/trace-events
index 22e0108c9d..8b697664d3 100644
--- a/hw/block/trace-events
+++ b/hw/block/trace-events
@@ -52,8 +52,12 @@ pci_nvme_create_cq(uint64_t addr, uint16_t cqid, uint16_t vector, uint16_t size,
pci_nvme_del_sq(uint16_t qid) "deleting submission queue sqid=%"PRIu16""
pci_nvme_del_cq(uint16_t cqid) "deleted completion queue, cqid=%"PRIu16""
pci_nvme_identify_ctrl(void) "identify controller"
+pci_nvme_identify_ctrl_csi(uint8_t csi) "identify controller, csi=0x%"PRIx8""
pci_nvme_identify_ns(uint32_t ns) "nsid %"PRIu32""
+pci_nvme_identify_ns_csi(uint32_t ns, uint8_t csi) "nsid=%"PRIu32", csi=0x%"PRIx8""
pci_nvme_identify_nslist(uint32_t ns) "nsid %"PRIu32""
+pci_nvme_identify_nslist_csi(uint16_t ns, uint8_t csi) "nsid=%"PRIu16", csi=0x%"PRIx8""
+pci_nvme_identify_cmd_set(void) "identify i/o command set"
pci_nvme_identify_ns_descr_list(uint32_t ns) "nsid %"PRIu32""
pci_nvme_get_log(uint16_t cid, uint8_t lid, uint8_t lsp, uint8_t rae, uint32_t len, uint64_t off) "cid %"PRIu16" lid 0x%"PRIx8" lsp 0x%"PRIx8" rae 0x%"PRIx8" len %"PRIu32" off %"PRIu64""
pci_nvme_getfeat(uint16_t cid, uint32_t nsid, uint8_t fid, uint8_t sel, uint32_t cdw11) "cid %"PRIu16" nsid 0x%"PRIx32" fid 0x%"PRIx8" sel 0x%"PRIx8" cdw11 0x%"PRIx32""
@@ -107,6 +111,7 @@ pci_nvme_err_invalid_opc(uint8_t opc) "invalid opcode 0x%"PRIx8""
pci_nvme_err_invalid_admin_opc(uint8_t opc) "invalid admin opcode 0x%"PRIx8""
pci_nvme_err_invalid_lba_range(uint64_t start, uint64_t len, uint64_t limit) "Invalid LBA start=%"PRIu64" len=%"PRIu64" limit=%"PRIu64""
pci_nvme_err_invalid_log_page_offset(uint64_t ofs, uint64_t size) "must be <= %"PRIu64", got %"PRIu64""
+pci_nvme_err_invalid_iocsci(uint32_t idx) "unsupported command set combination index %"PRIu32""
pci_nvme_err_invalid_del_sq(uint16_t qid) "invalid submission queue deletion, sid=%"PRIu16""
pci_nvme_err_invalid_create_sq_cqid(uint16_t cqid) "failed creating submission queue, invalid cqid=%"PRIu16""
pci_nvme_err_invalid_create_sq_sqid(uint16_t sqid) "failed creating submission queue, invalid sqid=%"PRIu16""
@@ -163,6 +168,7 @@ pci_nvme_ub_db_wr_invalid_cq(uint32_t qid) "completion queue doorbell write for
pci_nvme_ub_db_wr_invalid_cqhead(uint32_t qid, uint16_t new_head) "completion queue doorbell write value beyond queue size, cqid=%"PRIu32", new_head=%"PRIu16", ignoring"
pci_nvme_ub_db_wr_invalid_sq(uint32_t qid) "submission queue doorbell write for nonexistent queue, sqid=%"PRIu32", ignoring"
pci_nvme_ub_db_wr_invalid_sqtail(uint32_t qid, uint16_t new_tail) "submission queue doorbell write value beyond queue size, sqid=%"PRIu32", new_head=%"PRIu16", ignoring"
+pci_nvme_ub_unknown_css_value(void) "unknown value in cc.css field"
# xen-block.c
xen_block_realize(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u"
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 07/13] hw/block/nvme: Support allocated CNS command variants
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (5 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 06/13] hw/block/nvme: Add support for Namespace Types Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 08/13] block/nvme: Make ZNS-related definitions Dmitry Fomichev
` (7 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
From: Niklas Cassel <niklas.cassel@wdc.com>
Many CNS commands have "allocated" command variants. These include
a namespace as long as it is allocated, that is a namespace is
included regardless if it is active (attached) or not.
While these commands are optional (they are mandatory for controllers
supporting the namespace attachment command), our QEMU implementation
is more complete by actually providing support for these CNS values.
However, since our QEMU model currently does not support the namespace
attachment command, these new allocated CNS commands will return the
same result as the active CNS command variants.
The reason for not hooking up this command completely is because the
NVMe specification requires the namespace management command to be
supported if the namespace attachment command is supported.
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Keith Busch <kbusch@kernel.org>
---
include/block/nvme.h | 20 ++++++++++++--------
hw/block/nvme.c | 8 ++++++++
2 files changed, 20 insertions(+), 8 deletions(-)
diff --git a/include/block/nvme.h b/include/block/nvme.h
index 890977db4b..29d826ab19 100644
--- a/include/block/nvme.h
+++ b/include/block/nvme.h
@@ -807,14 +807,18 @@ typedef struct QEMU_PACKED NvmePSD {
#define NVME_IDENTIFY_DATA_SIZE 4096
enum NvmeIdCns {
- NVME_ID_CNS_NS = 0x00,
- NVME_ID_CNS_CTRL = 0x01,
- NVME_ID_CNS_NS_ACTIVE_LIST = 0x02,
- NVME_ID_CNS_NS_DESCR_LIST = 0x03,
- NVME_ID_CNS_CS_NS = 0x05,
- NVME_ID_CNS_CS_CTRL = 0x06,
- NVME_ID_CNS_CS_NS_ACTIVE_LIST = 0x07,
- NVME_ID_CNS_IO_COMMAND_SET = 0x1c,
+ NVME_ID_CNS_NS = 0x00,
+ NVME_ID_CNS_CTRL = 0x01,
+ NVME_ID_CNS_NS_ACTIVE_LIST = 0x02,
+ NVME_ID_CNS_NS_DESCR_LIST = 0x03,
+ NVME_ID_CNS_CS_NS = 0x05,
+ NVME_ID_CNS_CS_CTRL = 0x06,
+ NVME_ID_CNS_CS_NS_ACTIVE_LIST = 0x07,
+ NVME_ID_CNS_NS_PRESENT_LIST = 0x10,
+ NVME_ID_CNS_NS_PRESENT = 0x11,
+ NVME_ID_CNS_CS_NS_PRESENT_LIST = 0x1a,
+ NVME_ID_CNS_CS_NS_PRESENT = 0x1b,
+ NVME_ID_CNS_IO_COMMAND_SET = 0x1c,
};
typedef struct QEMU_PACKED NvmeIdCtrl {
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 16eed37533..7035896649 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -1901,16 +1901,24 @@ static uint16_t nvme_identify(NvmeCtrl *n, NvmeRequest *req)
switch (le32_to_cpu(c->cns)) {
case NVME_ID_CNS_NS:
+ /* fall through */
+ case NVME_ID_CNS_NS_PRESENT:
return nvme_identify_ns(n, req);
case NVME_ID_CNS_CS_NS:
+ /* fall through */
+ case NVME_ID_CNS_CS_NS_PRESENT:
return nvme_identify_ns_csi(n, req);
case NVME_ID_CNS_CTRL:
return nvme_identify_ctrl(n, req);
case NVME_ID_CNS_CS_CTRL:
return nvme_identify_ctrl_csi(n, req);
case NVME_ID_CNS_NS_ACTIVE_LIST:
+ /* fall through */
+ case NVME_ID_CNS_NS_PRESENT_LIST:
return nvme_identify_nslist(n, req);
case NVME_ID_CNS_CS_NS_ACTIVE_LIST:
+ /* fall through */
+ case NVME_ID_CNS_CS_NS_PRESENT_LIST:
return nvme_identify_nslist_csi(n, req);
case NVME_ID_CNS_NS_DESCR_LIST:
return nvme_identify_ns_descr_list(n, req);
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 08/13] block/nvme: Make ZNS-related definitions
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (6 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 07/13] hw/block/nvme: Support allocated CNS command variants Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-09 6:37 ` Klaus Jensen
2020-12-08 20:04 ` [PATCH v11 09/13] hw/block/nvme: Support Zoned Namespace Command Set Dmitry Fomichev
` (6 subsequent siblings)
14 siblings, 1 reply; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
Define values and structures that are needed to support Zoned
Namespace Command Set (NVMe TP 4053).
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
---
include/block/nvme.h | 114 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 113 insertions(+), 1 deletion(-)
diff --git a/include/block/nvme.h b/include/block/nvme.h
index 29d826ab19..a9165402d6 100644
--- a/include/block/nvme.h
+++ b/include/block/nvme.h
@@ -489,6 +489,9 @@ enum NvmeIoCommands {
NVME_CMD_COMPARE = 0x05,
NVME_CMD_WRITE_ZEROES = 0x08,
NVME_CMD_DSM = 0x09,
+ NVME_CMD_ZONE_MGMT_SEND = 0x79,
+ NVME_CMD_ZONE_MGMT_RECV = 0x7a,
+ NVME_CMD_ZONE_APPEND = 0x7d,
};
typedef struct QEMU_PACKED NvmeDeleteQ {
@@ -648,9 +651,13 @@ typedef struct QEMU_PACKED NvmeAerResult {
uint8_t resv;
} NvmeAerResult;
+typedef struct QEMU_PACKED NvmeZonedResult {
+ uint64_t slba;
+} NvmeZonedResult;
+
typedef struct QEMU_PACKED NvmeCqe {
uint32_t result;
- uint32_t rsvd;
+ uint32_t dw1;
uint16_t sq_head;
uint16_t sq_id;
uint16_t cid;
@@ -679,6 +686,7 @@ enum NvmeStatusCodes {
NVME_INVALID_USE_OF_CMB = 0x0012,
NVME_INVALID_PRP_OFFSET = 0x0013,
NVME_CMD_SET_CMB_REJECTED = 0x002b,
+ NVME_INVALID_CMD_SET = 0x002c,
NVME_LBA_RANGE = 0x0080,
NVME_CAP_EXCEEDED = 0x0081,
NVME_NS_NOT_READY = 0x0082,
@@ -703,6 +711,14 @@ enum NvmeStatusCodes {
NVME_CONFLICTING_ATTRS = 0x0180,
NVME_INVALID_PROT_INFO = 0x0181,
NVME_WRITE_TO_RO = 0x0182,
+ NVME_ZONE_BOUNDARY_ERROR = 0x01b8,
+ NVME_ZONE_FULL = 0x01b9,
+ NVME_ZONE_READ_ONLY = 0x01ba,
+ NVME_ZONE_OFFLINE = 0x01bb,
+ NVME_ZONE_INVALID_WRITE = 0x01bc,
+ NVME_ZONE_TOO_MANY_ACTIVE = 0x01bd,
+ NVME_ZONE_TOO_MANY_OPEN = 0x01be,
+ NVME_ZONE_INVAL_TRANSITION = 0x01bf,
NVME_WRITE_FAULT = 0x0280,
NVME_UNRECOVERED_READ = 0x0281,
NVME_E2E_GUARD_ERROR = 0x0282,
@@ -888,6 +904,11 @@ typedef struct QEMU_PACKED NvmeIdCtrl {
uint8_t vs[1024];
} NvmeIdCtrl;
+typedef struct NvmeIdCtrlZoned {
+ uint8_t zasl;
+ uint8_t rsvd1[4095];
+} NvmeIdCtrlZoned;
+
enum NvmeIdCtrlOacs {
NVME_OACS_SECURITY = 1 << 0,
NVME_OACS_FORMAT = 1 << 1,
@@ -1016,6 +1037,12 @@ typedef struct QEMU_PACKED NvmeLBAF {
uint8_t rp;
} NvmeLBAF;
+typedef struct QEMU_PACKED NvmeLBAFE {
+ uint64_t zsze;
+ uint8_t zdes;
+ uint8_t rsvd9[7];
+} NvmeLBAFE;
+
#define NVME_NSID_BROADCAST 0xffffffff
typedef struct QEMU_PACKED NvmeIdNs {
@@ -1075,10 +1102,24 @@ enum NvmeNsIdentifierType {
enum NvmeCsi {
NVME_CSI_NVM = 0x00,
+ NVME_CSI_ZONED = 0x02,
};
#define NVME_SET_CSI(vec, csi) (vec |= (uint8_t)(1 << (csi)))
+typedef struct QEMU_PACKED NvmeIdNsZoned {
+ uint16_t zoc;
+ uint16_t ozcs;
+ uint32_t mar;
+ uint32_t mor;
+ uint32_t rrl;
+ uint32_t frl;
+ uint8_t rsvd20[2796];
+ NvmeLBAFE lbafe[16];
+ uint8_t rsvd3072[768];
+ uint8_t vs[256];
+} NvmeIdNsZoned;
+
/*Deallocate Logical Block Features*/
#define NVME_ID_NS_DLFEAT_GUARD_CRC(dlfeat) ((dlfeat) & 0x10)
#define NVME_ID_NS_DLFEAT_WRITE_ZEROES(dlfeat) ((dlfeat) & 0x08)
@@ -1111,10 +1152,76 @@ enum NvmeIdNsDps {
DPS_FIRST_EIGHT = 8,
};
+enum NvmeZoneAttr {
+ NVME_ZA_FINISHED_BY_CTLR = 1 << 0,
+ NVME_ZA_FINISH_RECOMMENDED = 1 << 1,
+ NVME_ZA_RESET_RECOMMENDED = 1 << 2,
+ NVME_ZA_ZD_EXT_VALID = 1 << 7,
+};
+
+typedef struct QEMU_PACKED NvmeZoneReportHeader {
+ uint64_t nr_zones;
+ uint8_t rsvd[56];
+} NvmeZoneReportHeader;
+
+enum NvmeZoneReceiveAction {
+ NVME_ZONE_REPORT = 0,
+ NVME_ZONE_REPORT_EXTENDED = 1,
+};
+
+enum NvmeZoneReportType {
+ NVME_ZONE_REPORT_ALL = 0,
+ NVME_ZONE_REPORT_EMPTY = 1,
+ NVME_ZONE_REPORT_IMPLICITLY_OPEN = 2,
+ NVME_ZONE_REPORT_EXPLICITLY_OPEN = 3,
+ NVME_ZONE_REPORT_CLOSED = 4,
+ NVME_ZONE_REPORT_FULL = 5,
+ NVME_ZONE_REPORT_READ_ONLY = 6,
+ NVME_ZONE_REPORT_OFFLINE = 7,
+};
+
+enum NvmeZoneType {
+ NVME_ZONE_TYPE_RESERVED = 0x00,
+ NVME_ZONE_TYPE_SEQ_WRITE = 0x02,
+};
+
+enum NvmeZoneSendAction {
+ NVME_ZONE_ACTION_RSD = 0x00,
+ NVME_ZONE_ACTION_CLOSE = 0x01,
+ NVME_ZONE_ACTION_FINISH = 0x02,
+ NVME_ZONE_ACTION_OPEN = 0x03,
+ NVME_ZONE_ACTION_RESET = 0x04,
+ NVME_ZONE_ACTION_OFFLINE = 0x05,
+ NVME_ZONE_ACTION_SET_ZD_EXT = 0x10,
+};
+
+typedef struct QEMU_PACKED NvmeZoneDescr {
+ uint8_t zt;
+ uint8_t zs;
+ uint8_t za;
+ uint8_t rsvd3[5];
+ uint64_t zcap;
+ uint64_t zslba;
+ uint64_t wp;
+ uint8_t rsvd32[32];
+} NvmeZoneDescr;
+
+enum NvmeZoneState {
+ NVME_ZONE_STATE_RESERVED = 0x00,
+ NVME_ZONE_STATE_EMPTY = 0x01,
+ NVME_ZONE_STATE_IMPLICITLY_OPEN = 0x02,
+ NVME_ZONE_STATE_EXPLICITLY_OPEN = 0x03,
+ NVME_ZONE_STATE_CLOSED = 0x04,
+ NVME_ZONE_STATE_READ_ONLY = 0x0D,
+ NVME_ZONE_STATE_FULL = 0x0E,
+ NVME_ZONE_STATE_OFFLINE = 0x0F,
+};
+
static inline void _nvme_check_size(void)
{
QEMU_BUILD_BUG_ON(sizeof(NvmeBar) != 4096);
QEMU_BUILD_BUG_ON(sizeof(NvmeAerResult) != 4);
+ QEMU_BUILD_BUG_ON(sizeof(NvmeZonedResult) != 8);
QEMU_BUILD_BUG_ON(sizeof(NvmeCqe) != 16);
QEMU_BUILD_BUG_ON(sizeof(NvmeDsmRange) != 16);
QEMU_BUILD_BUG_ON(sizeof(NvmeCmd) != 64);
@@ -1130,8 +1237,13 @@ static inline void _nvme_check_size(void)
QEMU_BUILD_BUG_ON(sizeof(NvmeSmartLog) != 512);
QEMU_BUILD_BUG_ON(sizeof(NvmeEffectsLog) != 4096);
QEMU_BUILD_BUG_ON(sizeof(NvmeIdCtrl) != 4096);
+ QEMU_BUILD_BUG_ON(sizeof(NvmeIdCtrlZoned) != 4096);
+ QEMU_BUILD_BUG_ON(sizeof(NvmeLBAF) != 4);
+ QEMU_BUILD_BUG_ON(sizeof(NvmeLBAFE) != 16);
QEMU_BUILD_BUG_ON(sizeof(NvmeIdNs) != 4096);
+ QEMU_BUILD_BUG_ON(sizeof(NvmeIdNsZoned) != 4096);
QEMU_BUILD_BUG_ON(sizeof(NvmeSglDescriptor) != 16);
QEMU_BUILD_BUG_ON(sizeof(NvmeIdNsDescr) != 4);
+ QEMU_BUILD_BUG_ON(sizeof(NvmeZoneDescr) != 64);
}
#endif
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 09/13] hw/block/nvme: Support Zoned Namespace Command Set
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (7 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 08/13] block/nvme: Make ZNS-related definitions Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 10/13] hw/block/nvme: Introduce max active and open zone limits Dmitry Fomichev
` (5 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
The emulation code has been changed to advertise NVM Command Set when
"zoned" device property is not set (default) and Zoned Namespace
Command Set otherwise.
Define values and structures that are needed to support Zoned
Namespace Command Set (NVMe TP 4053) in PCI NVMe controller emulator.
Define trace events where needed in newly introduced code.
In order to improve scalability, all open, closed and full zones
are organized in separate linked lists. Consequently, almost all
zone operations don't require scanning of the entire zone array
(which potentially can be quite large) - it is only necessary to
enumerate one or more zone lists.
Handlers for three new NVMe commands introduced in Zoned Namespace
Command Set specification are added, namely for Zone Management
Receive, Zone Management Send and Zone Append.
Device initialization code has been extended to create a proper
configuration for zoned operation using device properties.
Read/Write command handler is modified to only allow writes at the
write pointer if the namespace is zoned. For Zone Append command,
writes implicitly happen at the write pointer and the starting write
pointer value is returned as the result of the command. Write Zeroes
handler is modified to add zoned checks that are identical to those
done as a part of Write flow.
Subsequent commits in this series add ZDE support and checks for
active and open zone limits.
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Hans Holmberg <hans.holmberg@wdc.com>
Signed-off-by: Ajay Joshi <ajay.joshi@wdc.com>
Signed-off-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
Signed-off-by: Matias Bjorling <matias.bjorling@wdc.com>
Signed-off-by: Aravind Ramesh <aravind.ramesh@wdc.com>
Signed-off-by: Shin'ichiro Kawasaki <shinichiro.kawasaki@wdc.com>
Signed-off-by: Adam Manzanares <adam.manzanares@wdc.com>
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Niklas Cassel <Niklas.Cassel@wdc.com>
---
hw/block/nvme-ns.h | 52 +++
hw/block/nvme.h | 6 +
hw/block/nvme-ns.c | 165 +++++++++
hw/block/nvme.c | 804 +++++++++++++++++++++++++++++++++++++++++-
hw/block/trace-events | 17 +
5 files changed, 1036 insertions(+), 8 deletions(-)
diff --git a/hw/block/nvme-ns.h b/hw/block/nvme-ns.h
index bdbc98c2ec..388381dda0 100644
--- a/hw/block/nvme-ns.h
+++ b/hw/block/nvme-ns.h
@@ -19,9 +19,20 @@
#define NVME_NS(obj) \
OBJECT_CHECK(NvmeNamespace, (obj), TYPE_NVME_NS)
+typedef struct NvmeZone {
+ NvmeZoneDescr d;
+ uint64_t w_ptr;
+ QTAILQ_ENTRY(NvmeZone) entry;
+} NvmeZone;
+
typedef struct NvmeNamespaceParams {
uint32_t nsid;
QemuUUID uuid;
+
+ bool zoned;
+ bool cross_zone_read;
+ uint64_t zone_size_bs;
+ uint64_t zone_cap_bs;
} NvmeNamespaceParams;
typedef struct NvmeNamespace {
@@ -33,6 +44,17 @@ typedef struct NvmeNamespace {
const uint32_t *iocs;
uint8_t csi;
+ NvmeIdNsZoned *id_ns_zoned;
+ NvmeZone *zone_array;
+ QTAILQ_HEAD(, NvmeZone) exp_open_zones;
+ QTAILQ_HEAD(, NvmeZone) imp_open_zones;
+ QTAILQ_HEAD(, NvmeZone) closed_zones;
+ QTAILQ_HEAD(, NvmeZone) full_zones;
+ uint32_t num_zones;
+ uint64_t zone_size;
+ uint64_t zone_capacity;
+ uint32_t zone_size_log2;
+
NvmeNamespaceParams params;
struct {
@@ -74,8 +96,38 @@ static inline size_t nvme_l2b(NvmeNamespace *ns, uint64_t lba)
typedef struct NvmeCtrl NvmeCtrl;
+static inline enum NvmeZoneState nvme_get_zone_state(NvmeZone *zone)
+{
+ return zone->d.zs >> 4;
+}
+
+static inline void nvme_set_zone_state(NvmeZone *zone, enum NvmeZoneState state)
+{
+ zone->d.zs = state << 4;
+}
+
+static inline uint64_t nvme_zone_rd_boundary(NvmeNamespace *ns, NvmeZone *zone)
+{
+ return zone->d.zslba + ns->zone_size;
+}
+
+static inline uint64_t nvme_zone_wr_boundary(NvmeZone *zone)
+{
+ return zone->d.zslba + zone->d.zcap;
+}
+
+static inline bool nvme_wp_is_valid(NvmeZone *zone)
+{
+ uint8_t st = nvme_get_zone_state(zone);
+
+ return st != NVME_ZONE_STATE_FULL &&
+ st != NVME_ZONE_STATE_READ_ONLY &&
+ st != NVME_ZONE_STATE_OFFLINE;
+}
+
int nvme_ns_setup(NvmeCtrl *n, NvmeNamespace *ns, Error **errp);
void nvme_ns_drain(NvmeNamespace *ns);
void nvme_ns_shutdown(NvmeNamespace *ns);
+void nvme_ns_cleanup(NvmeNamespace *ns);
#endif /* NVME_NS_H */
diff --git a/hw/block/nvme.h b/hw/block/nvme.h
index 574333caa3..b7fbcca39d 100644
--- a/hw/block/nvme.h
+++ b/hw/block/nvme.h
@@ -6,6 +6,9 @@
#define NVME_MAX_NAMESPACES 256
+#define NVME_DEFAULT_ZONE_SIZE (128 * MiB)
+#define NVME_DEFAULT_MAX_ZA_SIZE (128 * KiB)
+
typedef struct NvmeParams {
char *serial;
uint32_t num_queues; /* deprecated since 5.1 */
@@ -16,6 +19,7 @@ typedef struct NvmeParams {
uint32_t aer_max_queued;
uint8_t mdts;
bool use_intel_id;
+ uint32_t zasl_bs;
} NvmeParams;
typedef struct NvmeAsyncEvent {
@@ -149,6 +153,8 @@ typedef struct NvmeCtrl {
QTAILQ_HEAD(, NvmeAsyncEvent) aer_queue;
int aer_queued;
+ uint8_t zasl;
+
NvmeNamespace namespace;
NvmeNamespace *namespaces[NVME_MAX_NAMESPACES];
NvmeSQueue **sq;
diff --git a/hw/block/nvme-ns.c b/hw/block/nvme-ns.c
index 961cc81923..1df45bbe35 100644
--- a/hw/block/nvme-ns.c
+++ b/hw/block/nvme-ns.c
@@ -25,6 +25,7 @@
#include "hw/qdev-properties.h"
#include "hw/qdev-core.h"
+#include "trace.h"
#include "nvme.h"
#include "nvme-ns.h"
@@ -96,6 +97,147 @@ static int nvme_ns_init_blk(NvmeCtrl *n, NvmeNamespace *ns, Error **errp)
return 0;
}
+static int nvme_ns_zoned_check_calc_geometry(NvmeNamespace *ns, Error **errp)
+{
+ uint64_t zone_size, zone_cap;
+ uint32_t lbasz = ns->blkconf.logical_block_size;
+
+ /* Make sure that the values of ZNS properties are sane */
+ if (ns->params.zone_size_bs) {
+ zone_size = ns->params.zone_size_bs;
+ } else {
+ zone_size = NVME_DEFAULT_ZONE_SIZE;
+ }
+ if (ns->params.zone_cap_bs) {
+ zone_cap = ns->params.zone_cap_bs;
+ } else {
+ zone_cap = zone_size;
+ }
+ if (zone_cap > zone_size) {
+ error_setg(errp, "zone capacity %luB exceeds zone size %luB",
+ zone_cap, zone_size);
+ return -1;
+ }
+ if (zone_size < lbasz) {
+ error_setg(errp, "zone size %luB too small, must be at least %uB",
+ zone_size, lbasz);
+ return -1;
+ }
+ if (zone_cap < lbasz) {
+ error_setg(errp, "zone capacity %luB too small, must be at least %uB",
+ zone_cap, lbasz);
+ return -1;
+ }
+
+ /*
+ * Save the main zone geometry values to avoid
+ * calculating them later again.
+ */
+ ns->zone_size = zone_size / lbasz;
+ ns->zone_capacity = zone_cap / lbasz;
+ ns->num_zones = ns->size / lbasz / ns->zone_size;
+ return 0;
+}
+
+static void nvme_ns_zoned_init_state(NvmeNamespace *ns)
+{
+ uint64_t start = 0, zone_size = ns->zone_size;
+ uint64_t capacity = ns->num_zones * zone_size;
+ NvmeZone *zone;
+ int i;
+
+ ns->zone_array = g_new0(NvmeZone, ns->num_zones);
+
+ QTAILQ_INIT(&ns->exp_open_zones);
+ QTAILQ_INIT(&ns->imp_open_zones);
+ QTAILQ_INIT(&ns->closed_zones);
+ QTAILQ_INIT(&ns->full_zones);
+
+ zone = ns->zone_array;
+ for (i = 0; i < ns->num_zones; i++, zone++) {
+ if (start + zone_size > capacity) {
+ zone_size = capacity - start;
+ }
+ zone->d.zt = NVME_ZONE_TYPE_SEQ_WRITE;
+ nvme_set_zone_state(zone, NVME_ZONE_STATE_EMPTY);
+ zone->d.za = 0;
+ zone->d.zcap = ns->zone_capacity;
+ zone->d.zslba = start;
+ zone->d.wp = start;
+ zone->w_ptr = start;
+ start += zone_size;
+ }
+
+ ns->zone_size_log2 = 0;
+ if (is_power_of_2(ns->zone_size)) {
+ ns->zone_size_log2 = 63 - clz64(ns->zone_size);
+ }
+}
+
+static void nvme_ns_init_zoned(NvmeCtrl *n, NvmeNamespace *ns, int lba_index)
+{
+ NvmeIdNsZoned *id_ns_z;
+
+ nvme_ns_zoned_init_state(ns);
+
+ id_ns_z = g_malloc0(sizeof(NvmeIdNsZoned));
+
+ /* MAR/MOR are zeroes-based, 0xffffffff means no limit */
+ id_ns_z->mar = 0xffffffff;
+ id_ns_z->mor = 0xffffffff;
+ id_ns_z->zoc = 0;
+ id_ns_z->ozcs = ns->params.cross_zone_read ? 0x01 : 0x00;
+
+ id_ns_z->lbafe[lba_index].zsze = cpu_to_le64(ns->zone_size);
+ id_ns_z->lbafe[lba_index].zdes = 0;
+
+ ns->csi = NVME_CSI_ZONED;
+ ns->id_ns.nsze = cpu_to_le64(ns->num_zones * ns->zone_size);
+ ns->id_ns.ncap = ns->id_ns.nsze;
+ ns->id_ns.nuse = ns->id_ns.ncap;
+
+ ns->id_ns_zoned = id_ns_z;
+}
+
+static void nvme_clear_zone(NvmeNamespace *ns, NvmeZone *zone)
+{
+ uint8_t state;
+
+ zone->w_ptr = zone->d.wp;
+ state = nvme_get_zone_state(zone);
+ if (zone->d.wp != zone->d.zslba) {
+ if (state != NVME_ZONE_STATE_CLOSED) {
+ trace_pci_nvme_clear_ns_close(state, zone->d.zslba);
+ nvme_set_zone_state(zone, NVME_ZONE_STATE_CLOSED);
+ }
+ QTAILQ_INSERT_HEAD(&ns->closed_zones, zone, entry);
+ } else {
+ trace_pci_nvme_clear_ns_reset(state, zone->d.zslba);
+ nvme_set_zone_state(zone, NVME_ZONE_STATE_EMPTY);
+ }
+}
+
+/*
+ * Close all the zones that are currently open.
+ */
+static void nvme_zoned_ns_shutdown(NvmeNamespace *ns)
+{
+ NvmeZone *zone, *next;
+
+ QTAILQ_FOREACH_SAFE(zone, &ns->closed_zones, entry, next) {
+ QTAILQ_REMOVE(&ns->closed_zones, zone, entry);
+ nvme_clear_zone(ns, zone);
+ }
+ QTAILQ_FOREACH_SAFE(zone, &ns->imp_open_zones, entry, next) {
+ QTAILQ_REMOVE(&ns->imp_open_zones, zone, entry);
+ nvme_clear_zone(ns, zone);
+ }
+ QTAILQ_FOREACH_SAFE(zone, &ns->exp_open_zones, entry, next) {
+ QTAILQ_REMOVE(&ns->exp_open_zones, zone, entry);
+ nvme_clear_zone(ns, zone);
+ }
+}
+
static int nvme_ns_check_constraints(NvmeNamespace *ns, Error **errp)
{
if (!ns->blkconf.blk) {
@@ -119,6 +261,12 @@ int nvme_ns_setup(NvmeCtrl *n, NvmeNamespace *ns, Error **errp)
if (nvme_ns_init(ns, errp)) {
return -1;
}
+ if (ns->params.zoned) {
+ if (nvme_ns_zoned_check_calc_geometry(ns, errp) != 0) {
+ return -1;
+ }
+ nvme_ns_init_zoned(n, ns, 0);
+ }
if (nvme_register_namespace(n, ns, errp)) {
return -1;
@@ -135,6 +283,17 @@ void nvme_ns_drain(NvmeNamespace *ns)
void nvme_ns_shutdown(NvmeNamespace *ns)
{
blk_flush(ns->blkconf.blk);
+ if (ns->params.zoned) {
+ nvme_zoned_ns_shutdown(ns);
+ }
+}
+
+void nvme_ns_cleanup(NvmeNamespace *ns)
+{
+ if (ns->params.zoned) {
+ g_free(ns->id_ns_zoned);
+ g_free(ns->zone_array);
+ }
}
static void nvme_ns_realize(DeviceState *dev, Error **errp)
@@ -155,6 +314,12 @@ static Property nvme_ns_props[] = {
DEFINE_BLOCK_PROPERTIES(NvmeNamespace, blkconf),
DEFINE_PROP_UINT32("nsid", NvmeNamespace, params.nsid, 0),
DEFINE_PROP_UUID("uuid", NvmeNamespace, params.uuid),
+ DEFINE_PROP_BOOL("zoned", NvmeNamespace, params.zoned, false),
+ DEFINE_PROP_SIZE("zoned.zsze", NvmeNamespace, params.zone_size_bs,
+ NVME_DEFAULT_ZONE_SIZE),
+ DEFINE_PROP_SIZE("zoned.zcap", NvmeNamespace, params.zone_cap_bs, 0),
+ DEFINE_PROP_BOOL("zoned.cross_read", NvmeNamespace,
+ params.cross_zone_read, false),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 7035896649..d1c57cb322 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -134,6 +134,16 @@ static const uint32_t nvme_cse_iocs_nvm[256] = {
[NVME_CMD_READ] = NVME_CMD_EFF_CSUPP,
};
+static const uint32_t nvme_cse_iocs_zoned[256] = {
+ [NVME_CMD_FLUSH] = NVME_CMD_EFF_CSUPP | NVME_CMD_EFF_LBCC,
+ [NVME_CMD_WRITE_ZEROES] = NVME_CMD_EFF_CSUPP | NVME_CMD_EFF_LBCC,
+ [NVME_CMD_WRITE] = NVME_CMD_EFF_CSUPP | NVME_CMD_EFF_LBCC,
+ [NVME_CMD_READ] = NVME_CMD_EFF_CSUPP,
+ [NVME_CMD_ZONE_APPEND] = NVME_CMD_EFF_CSUPP | NVME_CMD_EFF_LBCC,
+ [NVME_CMD_ZONE_MGMT_SEND] = NVME_CMD_EFF_CSUPP | NVME_CMD_EFF_LBCC,
+ [NVME_CMD_ZONE_MGMT_RECV] = NVME_CMD_EFF_CSUPP,
+};
+
static void nvme_process_sq(void *opaque);
static uint16_t nvme_cid(NvmeRequest *req)
@@ -150,6 +160,48 @@ static uint16_t nvme_sqid(NvmeRequest *req)
return le16_to_cpu(req->sq->sqid);
}
+static void nvme_assign_zone_state(NvmeNamespace *ns, NvmeZone *zone,
+ enum NvmeZoneState state)
+{
+ if (QTAILQ_IN_USE(zone, entry)) {
+ switch (nvme_get_zone_state(zone)) {
+ case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ QTAILQ_REMOVE(&ns->exp_open_zones, zone, entry);
+ break;
+ case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ QTAILQ_REMOVE(&ns->imp_open_zones, zone, entry);
+ break;
+ case NVME_ZONE_STATE_CLOSED:
+ QTAILQ_REMOVE(&ns->closed_zones, zone, entry);
+ break;
+ case NVME_ZONE_STATE_FULL:
+ QTAILQ_REMOVE(&ns->full_zones, zone, entry);
+ default:
+ ;
+ }
+ }
+
+ nvme_set_zone_state(zone, state);
+
+ switch (state) {
+ case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ QTAILQ_INSERT_TAIL(&ns->exp_open_zones, zone, entry);
+ break;
+ case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ QTAILQ_INSERT_TAIL(&ns->imp_open_zones, zone, entry);
+ break;
+ case NVME_ZONE_STATE_CLOSED:
+ QTAILQ_INSERT_TAIL(&ns->closed_zones, zone, entry);
+ break;
+ case NVME_ZONE_STATE_FULL:
+ QTAILQ_INSERT_TAIL(&ns->full_zones, zone, entry);
+ case NVME_ZONE_STATE_READ_ONLY:
+ break;
+ default:
+ zone->d.za = 0;
+ }
+}
+
static bool nvme_addr_is_cmb(NvmeCtrl *n, hwaddr addr)
{
hwaddr low = n->ctrl_mem.addr;
@@ -944,6 +996,201 @@ static uint16_t nvme_check_dulbe(NvmeNamespace *ns, uint64_t slba,
return NVME_SUCCESS;
}
+static inline uint32_t nvme_zone_idx(NvmeNamespace *ns, uint64_t slba)
+{
+ return ns->zone_size_log2 > 0 ? slba >> ns->zone_size_log2 :
+ slba / ns->zone_size;
+}
+
+static inline NvmeZone *nvme_get_zone_by_slba(NvmeNamespace *ns, uint64_t slba)
+{
+ uint32_t zone_idx = nvme_zone_idx(ns, slba);
+
+ assert(zone_idx < ns->num_zones);
+ return &ns->zone_array[zone_idx];
+}
+
+static uint16_t nvme_check_zone_state_for_write(NvmeZone *zone)
+{
+ uint16_t status;
+
+ switch (nvme_get_zone_state(zone)) {
+ case NVME_ZONE_STATE_EMPTY:
+ case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ case NVME_ZONE_STATE_CLOSED:
+ status = NVME_SUCCESS;
+ break;
+ case NVME_ZONE_STATE_FULL:
+ status = NVME_ZONE_FULL;
+ break;
+ case NVME_ZONE_STATE_OFFLINE:
+ status = NVME_ZONE_OFFLINE;
+ break;
+ case NVME_ZONE_STATE_READ_ONLY:
+ status = NVME_ZONE_READ_ONLY;
+ break;
+ default:
+ assert(false);
+ }
+
+ return status;
+}
+
+static uint16_t nvme_check_zone_write(NvmeCtrl *n, NvmeNamespace *ns,
+ NvmeZone *zone, uint64_t slba,
+ uint32_t nlb, bool append)
+{
+ uint16_t status;
+
+ if (unlikely((slba + nlb) > nvme_zone_wr_boundary(zone))) {
+ status = NVME_ZONE_BOUNDARY_ERROR;
+ } else {
+ status = nvme_check_zone_state_for_write(zone);
+ }
+
+ if (status != NVME_SUCCESS) {
+ trace_pci_nvme_err_zone_write_not_ok(slba, nlb, status);
+ } else {
+ assert(nvme_wp_is_valid(zone));
+ if (append) {
+ if (unlikely(slba != zone->d.zslba)) {
+ trace_pci_nvme_err_append_not_at_start(slba, zone->d.zslba);
+ status = NVME_ZONE_INVALID_WRITE;
+ }
+ if (nvme_l2b(ns, nlb) > (n->page_size << n->zasl)) {
+ trace_pci_nvme_err_append_too_large(slba, nlb, n->zasl);
+ status = NVME_INVALID_FIELD;
+ }
+ } else if (unlikely(slba != zone->w_ptr)) {
+ trace_pci_nvme_err_write_not_at_wp(slba, zone->d.zslba,
+ zone->w_ptr);
+ status = NVME_ZONE_INVALID_WRITE;
+ }
+ }
+
+ return status;
+}
+
+static uint16_t nvme_check_zone_state_for_read(NvmeZone *zone)
+{
+ uint16_t status;
+
+ switch (nvme_get_zone_state(zone)) {
+ case NVME_ZONE_STATE_EMPTY:
+ case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ case NVME_ZONE_STATE_FULL:
+ case NVME_ZONE_STATE_CLOSED:
+ case NVME_ZONE_STATE_READ_ONLY:
+ status = NVME_SUCCESS;
+ break;
+ case NVME_ZONE_STATE_OFFLINE:
+ status = NVME_ZONE_OFFLINE;
+ break;
+ default:
+ assert(false);
+ }
+
+ return status;
+}
+
+static uint16_t nvme_check_zone_read(NvmeNamespace *ns, uint64_t slba,
+ uint32_t nlb)
+{
+ NvmeZone *zone = nvme_get_zone_by_slba(ns, slba);
+ uint64_t bndry = nvme_zone_rd_boundary(ns, zone);
+ uint64_t end = slba + nlb;
+ uint16_t status;
+
+ status = nvme_check_zone_state_for_read(zone);
+ if (status != NVME_SUCCESS) {
+ ;
+ } else if (unlikely(end > bndry)) {
+ if (!ns->params.cross_zone_read) {
+ status = NVME_ZONE_BOUNDARY_ERROR;
+ } else {
+ /*
+ * Read across zone boundary - check that all subsequent
+ * zones that are being read have an appropriate state.
+ */
+ do {
+ zone++;
+ status = nvme_check_zone_state_for_read(zone);
+ if (status != NVME_SUCCESS) {
+ break;
+ }
+ } while (end > nvme_zone_rd_boundary(ns, zone));
+ }
+ }
+
+ return status;
+}
+
+static void nvme_finalize_zoned_write(NvmeNamespace *ns, NvmeRequest *req,
+ bool failed)
+{
+ NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
+ NvmeZone *zone;
+ NvmeZonedResult *res = (NvmeZonedResult *)&req->cqe;
+ uint64_t slba;
+ uint32_t nlb;
+
+ slba = le64_to_cpu(rw->slba);
+ nlb = le16_to_cpu(rw->nlb) + 1;
+ zone = nvme_get_zone_by_slba(ns, slba);
+
+ if (failed) {
+ res->slba = 0;
+ zone->d.wp += nlb;
+ } else if (zone->w_ptr == nvme_zone_wr_boundary(zone)) {
+ switch (nvme_get_zone_state(zone)) {
+ case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ case NVME_ZONE_STATE_CLOSED:
+ case NVME_ZONE_STATE_EMPTY:
+ nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_FULL);
+ /* fall through */
+ case NVME_ZONE_STATE_FULL:
+ break;
+ default:
+ assert(false);
+ }
+ zone->d.wp = zone->w_ptr;
+ } else {
+ zone->d.wp += nlb;
+ }
+}
+
+static uint64_t nvme_advance_zone_wp(NvmeNamespace *ns, NvmeZone *zone,
+ uint32_t nlb)
+{
+ uint64_t result = zone->w_ptr;
+ uint8_t zs;
+
+ zone->w_ptr += nlb;
+
+ if (zone->w_ptr < nvme_zone_wr_boundary(zone)) {
+ zs = nvme_get_zone_state(zone);
+ switch (zs) {
+ case NVME_ZONE_STATE_EMPTY:
+ case NVME_ZONE_STATE_CLOSED:
+ nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_IMPLICITLY_OPEN);
+ }
+ }
+
+ return result;
+}
+
+static inline bool nvme_is_write(NvmeRequest *req)
+{
+ NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
+
+ return rw->opcode == NVME_CMD_WRITE ||
+ rw->opcode == NVME_CMD_ZONE_APPEND ||
+ rw->opcode == NVME_CMD_WRITE_ZEROES;
+}
+
static void nvme_rw_cb(void *opaque, int ret)
{
NvmeRequest *req = opaque;
@@ -957,6 +1204,10 @@ static void nvme_rw_cb(void *opaque, int ret)
trace_pci_nvme_rw_cb(nvme_cid(req), blk_name(blk));
+ if (ns->params.zoned && nvme_is_write(req)) {
+ nvme_finalize_zoned_write(ns, req, ret != 0);
+ }
+
if (!ret) {
block_acct_done(stats, acct);
} else {
@@ -1120,6 +1371,14 @@ static uint16_t nvme_read(NvmeCtrl *n, NvmeRequest *req)
goto invalid;
}
+ if (ns->params.zoned) {
+ status = nvme_check_zone_read(ns, slba, nlb);
+ if (status != NVME_SUCCESS) {
+ trace_pci_nvme_err_zone_read_not_ok(slba, nlb, status);
+ goto invalid;
+ }
+ }
+
status = nvme_map_dptr(n, data_size, req);
if (status) {
goto invalid;
@@ -1150,7 +1409,8 @@ invalid:
return status | NVME_DNR;
}
-static uint16_t nvme_do_write(NvmeCtrl *n, NvmeRequest *req, bool wrz)
+static uint16_t nvme_do_write(NvmeCtrl *n, NvmeRequest *req, bool append,
+ bool wrz)
{
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
NvmeNamespace *ns = req->ns;
@@ -1158,6 +1418,8 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeRequest *req, bool wrz)
uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
uint64_t data_size = nvme_l2b(ns, nlb);
uint64_t data_offset;
+ NvmeZone *zone;
+ NvmeZonedResult *res = (NvmeZonedResult *)&req->cqe;
BlockBackend *blk = ns->blkconf.blk;
uint16_t status;
@@ -1178,6 +1440,25 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeRequest *req, bool wrz)
goto invalid;
}
+ if (ns->params.zoned) {
+ zone = nvme_get_zone_by_slba(ns, slba);
+
+ status = nvme_check_zone_write(n, ns, zone, slba, nlb, append);
+ if (status != NVME_SUCCESS) {
+ goto invalid;
+ }
+
+ if (append) {
+ slba = zone->w_ptr;
+ }
+
+ res->slba = nvme_advance_zone_wp(ns, zone, nlb);
+ } else if (append) {
+ trace_pci_nvme_err_invalid_opc(rw->opcode);
+ status = NVME_INVALID_OPCODE;
+ goto invalid;
+ }
+
data_offset = nvme_l2b(ns, slba);
if (!wrz) {
@@ -1210,12 +1491,445 @@ invalid:
static inline uint16_t nvme_write(NvmeCtrl *n, NvmeRequest *req)
{
- return nvme_do_write(n, req, false);
+ return nvme_do_write(n, req, false, false);
}
static inline uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeRequest *req)
{
- return nvme_do_write(n, req, true);
+ return nvme_do_write(n, req, false, true);
+}
+
+static inline uint16_t nvme_zone_append(NvmeCtrl *n, NvmeRequest *req)
+{
+ return nvme_do_write(n, req, true, false);
+}
+
+static uint16_t nvme_get_mgmt_zone_slba_idx(NvmeNamespace *ns, NvmeCmd *c,
+ uint64_t *slba, uint32_t *zone_idx)
+{
+ uint32_t dw10 = le32_to_cpu(c->cdw10);
+ uint32_t dw11 = le32_to_cpu(c->cdw11);
+
+ if (!ns->params.zoned) {
+ trace_pci_nvme_err_invalid_opc(c->opcode);
+ return NVME_INVALID_OPCODE | NVME_DNR;
+ }
+
+ *slba = ((uint64_t)dw11) << 32 | dw10;
+ if (unlikely(*slba >= ns->id_ns.nsze)) {
+ trace_pci_nvme_err_invalid_lba_range(*slba, 0, ns->id_ns.nsze);
+ *slba = 0;
+ return NVME_LBA_RANGE | NVME_DNR;
+ }
+
+ *zone_idx = nvme_zone_idx(ns, *slba);
+ assert(*zone_idx < ns->num_zones);
+
+ return NVME_SUCCESS;
+}
+
+typedef uint16_t (*op_handler_t)(NvmeNamespace *, NvmeZone *,
+ enum NvmeZoneState);
+
+enum NvmeZoneProcessingMask {
+ NVME_PROC_CURRENT_ZONE = 0,
+ NVME_PROC_IMP_OPEN_ZONES = 1 << 0,
+ NVME_PROC_EXP_OPEN_ZONES = 1 << 1,
+ NVME_PROC_CLOSED_ZONES = 1 << 2,
+ NVME_PROC_READ_ONLY_ZONES = 1 << 3,
+ NVME_PROC_FULL_ZONES = 1 << 4,
+};
+
+static uint16_t nvme_open_zone(NvmeNamespace *ns, NvmeZone *zone,
+ enum NvmeZoneState state)
+{
+ switch (state) {
+ case NVME_ZONE_STATE_EMPTY:
+ case NVME_ZONE_STATE_CLOSED:
+ case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_EXPLICITLY_OPEN);
+ /* fall through */
+ case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ return NVME_SUCCESS;
+ default:
+ return NVME_ZONE_INVAL_TRANSITION;
+ }
+}
+
+static uint16_t nvme_close_zone(NvmeNamespace *ns, NvmeZone *zone,
+ enum NvmeZoneState state)
+{
+ switch (state) {
+ case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_CLOSED);
+ /* fall through */
+ case NVME_ZONE_STATE_CLOSED:
+ return NVME_SUCCESS;
+ default:
+ return NVME_ZONE_INVAL_TRANSITION;
+ }
+}
+
+static uint16_t nvme_finish_zone(NvmeNamespace *ns, NvmeZone *zone,
+ enum NvmeZoneState state)
+{
+ switch (state) {
+ case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ case NVME_ZONE_STATE_CLOSED:
+ case NVME_ZONE_STATE_EMPTY:
+ zone->w_ptr = nvme_zone_wr_boundary(zone);
+ zone->d.wp = zone->w_ptr;
+ nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_FULL);
+ /* fall through */
+ case NVME_ZONE_STATE_FULL:
+ return NVME_SUCCESS;
+ default:
+ return NVME_ZONE_INVAL_TRANSITION;
+ }
+}
+
+static uint16_t nvme_reset_zone(NvmeNamespace *ns, NvmeZone *zone,
+ enum NvmeZoneState state)
+{
+ switch (state) {
+ case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ case NVME_ZONE_STATE_CLOSED:
+ case NVME_ZONE_STATE_FULL:
+ zone->w_ptr = zone->d.zslba;
+ zone->d.wp = zone->w_ptr;
+ nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_EMPTY);
+ /* fall through */
+ case NVME_ZONE_STATE_EMPTY:
+ return NVME_SUCCESS;
+ default:
+ return NVME_ZONE_INVAL_TRANSITION;
+ }
+}
+
+static uint16_t nvme_offline_zone(NvmeNamespace *ns, NvmeZone *zone,
+ enum NvmeZoneState state)
+{
+ switch (state) {
+ case NVME_ZONE_STATE_READ_ONLY:
+ nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_OFFLINE);
+ /* fall through */
+ case NVME_ZONE_STATE_OFFLINE:
+ return NVME_SUCCESS;
+ default:
+ return NVME_ZONE_INVAL_TRANSITION;
+ }
+}
+
+static uint16_t nvme_bulk_proc_zone(NvmeNamespace *ns, NvmeZone *zone,
+ enum NvmeZoneProcessingMask proc_mask,
+ op_handler_t op_hndlr)
+{
+ uint16_t status = NVME_SUCCESS;
+ enum NvmeZoneState zs = nvme_get_zone_state(zone);
+ bool proc_zone;
+
+ switch (zs) {
+ case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ proc_zone = proc_mask & NVME_PROC_IMP_OPEN_ZONES;
+ break;
+ case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ proc_zone = proc_mask & NVME_PROC_EXP_OPEN_ZONES;
+ break;
+ case NVME_ZONE_STATE_CLOSED:
+ proc_zone = proc_mask & NVME_PROC_CLOSED_ZONES;
+ break;
+ case NVME_ZONE_STATE_READ_ONLY:
+ proc_zone = proc_mask & NVME_PROC_READ_ONLY_ZONES;
+ break;
+ case NVME_ZONE_STATE_FULL:
+ proc_zone = proc_mask & NVME_PROC_FULL_ZONES;
+ break;
+ default:
+ proc_zone = false;
+ }
+
+ if (proc_zone) {
+ status = op_hndlr(ns, zone, zs);
+ }
+
+ return status;
+}
+
+static uint16_t nvme_do_zone_op(NvmeNamespace *ns, NvmeZone *zone,
+ enum NvmeZoneProcessingMask proc_mask,
+ op_handler_t op_hndlr)
+{
+ NvmeZone *next;
+ uint16_t status = NVME_SUCCESS;
+ int i;
+
+ if (!proc_mask) {
+ status = op_hndlr(ns, zone, nvme_get_zone_state(zone));
+ } else {
+ if (proc_mask & NVME_PROC_CLOSED_ZONES) {
+ QTAILQ_FOREACH_SAFE(zone, &ns->closed_zones, entry, next) {
+ status = nvme_bulk_proc_zone(ns, zone, proc_mask, op_hndlr);
+ if (status != NVME_SUCCESS) {
+ goto out;
+ }
+ }
+ }
+ if (proc_mask & NVME_PROC_IMP_OPEN_ZONES) {
+ QTAILQ_FOREACH_SAFE(zone, &ns->imp_open_zones, entry, next) {
+ status = nvme_bulk_proc_zone(ns, zone, proc_mask, op_hndlr);
+ if (status != NVME_SUCCESS) {
+ goto out;
+ }
+ }
+ }
+ if (proc_mask & NVME_PROC_EXP_OPEN_ZONES) {
+ QTAILQ_FOREACH_SAFE(zone, &ns->exp_open_zones, entry, next) {
+ status = nvme_bulk_proc_zone(ns, zone, proc_mask, op_hndlr);
+ if (status != NVME_SUCCESS) {
+ goto out;
+ }
+ }
+ }
+ if (proc_mask & NVME_PROC_FULL_ZONES) {
+ QTAILQ_FOREACH_SAFE(zone, &ns->full_zones, entry, next) {
+ status = nvme_bulk_proc_zone(ns, zone, proc_mask, op_hndlr);
+ if (status != NVME_SUCCESS) {
+ goto out;
+ }
+ }
+ }
+
+ if (proc_mask & NVME_PROC_READ_ONLY_ZONES) {
+ for (i = 0; i < ns->num_zones; i++, zone++) {
+ status = nvme_bulk_proc_zone(ns, zone, proc_mask, op_hndlr);
+ if (status != NVME_SUCCESS) {
+ goto out;
+ }
+ }
+ }
+ }
+
+out:
+ return status;
+}
+
+static uint16_t nvme_zone_mgmt_send(NvmeCtrl *n, NvmeRequest *req)
+{
+ NvmeCmd *cmd = (NvmeCmd *)&req->cmd;
+ NvmeNamespace *ns = req->ns;
+ NvmeZone *zone;
+ uint32_t dw13 = le32_to_cpu(cmd->cdw13);
+ uint64_t slba = 0;
+ uint32_t zone_idx = 0;
+ uint16_t status;
+ uint8_t action;
+ bool all;
+ enum NvmeZoneProcessingMask proc_mask = NVME_PROC_CURRENT_ZONE;
+
+ action = dw13 & 0xff;
+ all = dw13 & 0x100;
+
+ req->status = NVME_SUCCESS;
+
+ if (!all) {
+ status = nvme_get_mgmt_zone_slba_idx(ns, cmd, &slba, &zone_idx);
+ if (status) {
+ return status;
+ }
+ }
+
+ zone = &ns->zone_array[zone_idx];
+ if (slba != zone->d.zslba) {
+ trace_pci_nvme_err_unaligned_zone_cmd(action, slba, zone->d.zslba);
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+
+ switch (action) {
+
+ case NVME_ZONE_ACTION_OPEN:
+ if (all) {
+ proc_mask = NVME_PROC_CLOSED_ZONES;
+ }
+ trace_pci_nvme_open_zone(slba, zone_idx, all);
+ status = nvme_do_zone_op(ns, zone, proc_mask, nvme_open_zone);
+ break;
+
+ case NVME_ZONE_ACTION_CLOSE:
+ if (all) {
+ proc_mask = NVME_PROC_IMP_OPEN_ZONES | NVME_PROC_EXP_OPEN_ZONES;
+ }
+ trace_pci_nvme_close_zone(slba, zone_idx, all);
+ status = nvme_do_zone_op(ns, zone, proc_mask, nvme_close_zone);
+ break;
+
+ case NVME_ZONE_ACTION_FINISH:
+ if (all) {
+ proc_mask = NVME_PROC_IMP_OPEN_ZONES | NVME_PROC_EXP_OPEN_ZONES |
+ NVME_PROC_CLOSED_ZONES;
+ }
+ trace_pci_nvme_finish_zone(slba, zone_idx, all);
+ status = nvme_do_zone_op(ns, zone, proc_mask, nvme_finish_zone);
+ break;
+
+ case NVME_ZONE_ACTION_RESET:
+ if (all) {
+ proc_mask = NVME_PROC_IMP_OPEN_ZONES | NVME_PROC_EXP_OPEN_ZONES |
+ NVME_PROC_CLOSED_ZONES | NVME_PROC_FULL_ZONES;
+ }
+ trace_pci_nvme_reset_zone(slba, zone_idx, all);
+ status = nvme_do_zone_op(ns, zone, proc_mask, nvme_reset_zone);
+ break;
+
+ case NVME_ZONE_ACTION_OFFLINE:
+ if (all) {
+ proc_mask = NVME_PROC_READ_ONLY_ZONES;
+ }
+ trace_pci_nvme_offline_zone(slba, zone_idx, all);
+ status = nvme_do_zone_op(ns, zone, proc_mask, nvme_offline_zone);
+ break;
+
+ case NVME_ZONE_ACTION_SET_ZD_EXT:
+ trace_pci_nvme_set_descriptor_extension(slba, zone_idx);
+ return NVME_INVALID_FIELD | NVME_DNR;
+ break;
+
+ default:
+ trace_pci_nvme_err_invalid_mgmt_action(action);
+ status = NVME_INVALID_FIELD;
+ }
+
+ if (status == NVME_ZONE_INVAL_TRANSITION) {
+ trace_pci_nvme_err_invalid_zone_state_transition(action, slba,
+ zone->d.za);
+ }
+ if (status) {
+ status |= NVME_DNR;
+ }
+
+ return status;
+}
+
+static bool nvme_zone_matches_filter(uint32_t zafs, NvmeZone *zl)
+{
+ enum NvmeZoneState zs = nvme_get_zone_state(zl);
+
+ switch (zafs) {
+ case NVME_ZONE_REPORT_ALL:
+ return true;
+ case NVME_ZONE_REPORT_EMPTY:
+ return zs == NVME_ZONE_STATE_EMPTY;
+ case NVME_ZONE_REPORT_IMPLICITLY_OPEN:
+ return zs == NVME_ZONE_STATE_IMPLICITLY_OPEN;
+ case NVME_ZONE_REPORT_EXPLICITLY_OPEN:
+ return zs == NVME_ZONE_STATE_EXPLICITLY_OPEN;
+ case NVME_ZONE_REPORT_CLOSED:
+ return zs == NVME_ZONE_STATE_CLOSED;
+ case NVME_ZONE_REPORT_FULL:
+ return zs == NVME_ZONE_STATE_FULL;
+ case NVME_ZONE_REPORT_READ_ONLY:
+ return zs == NVME_ZONE_STATE_READ_ONLY;
+ case NVME_ZONE_REPORT_OFFLINE:
+ return zs == NVME_ZONE_STATE_OFFLINE;
+ default:
+ return false;
+ }
+}
+
+static uint16_t nvme_zone_mgmt_recv(NvmeCtrl *n, NvmeRequest *req)
+{
+ NvmeCmd *cmd = (NvmeCmd *)&req->cmd;
+ NvmeNamespace *ns = req->ns;
+ /* cdw12 is zero-based number of dwords to return. Convert to bytes */
+ uint32_t data_size = (le32_to_cpu(cmd->cdw12) + 1) << 2;
+ uint32_t dw13 = le32_to_cpu(cmd->cdw13);
+ uint32_t zone_idx, zra, zrasf, partial;
+ uint64_t max_zones, nr_zones = 0;
+ uint16_t status;
+ uint64_t slba, capacity = nvme_ns_nlbas(ns);
+ NvmeZoneDescr *z;
+ NvmeZone *zone;
+ NvmeZoneReportHeader *header;
+ void *buf, *buf_p;
+ size_t zone_entry_sz;
+
+ req->status = NVME_SUCCESS;
+
+ status = nvme_get_mgmt_zone_slba_idx(ns, cmd, &slba, &zone_idx);
+ if (status) {
+ return status;
+ }
+
+ zra = dw13 & 0xff;
+ if (zra != NVME_ZONE_REPORT) {
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+
+ zrasf = (dw13 >> 8) & 0xff;
+ if (zrasf > NVME_ZONE_REPORT_OFFLINE) {
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+
+ if (data_size < sizeof(NvmeZoneReportHeader)) {
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+
+ status = nvme_check_mdts(n, data_size);
+ if (status) {
+ trace_pci_nvme_err_mdts(nvme_cid(req), data_size);
+ return status;
+ }
+
+ partial = (dw13 >> 16) & 0x01;
+
+ zone_entry_sz = sizeof(NvmeZoneDescr);
+
+ max_zones = (data_size - sizeof(NvmeZoneReportHeader)) / zone_entry_sz;
+ buf = g_malloc0(data_size);
+
+ zone = &ns->zone_array[zone_idx];
+ for (; slba < capacity; slba += ns->zone_size) {
+ if (partial && nr_zones >= max_zones) {
+ break;
+ }
+ if (nvme_zone_matches_filter(zrasf, zone++)) {
+ nr_zones++;
+ }
+ }
+ header = (NvmeZoneReportHeader *)buf;
+ header->nr_zones = cpu_to_le64(nr_zones);
+
+ buf_p = buf + sizeof(NvmeZoneReportHeader);
+ for (; zone_idx < ns->num_zones && max_zones > 0; zone_idx++) {
+ zone = &ns->zone_array[zone_idx];
+ if (nvme_zone_matches_filter(zrasf, zone)) {
+ z = (NvmeZoneDescr *)buf_p;
+ buf_p += sizeof(NvmeZoneDescr);
+
+ z->zt = zone->d.zt;
+ z->zs = zone->d.zs;
+ z->zcap = cpu_to_le64(zone->d.zcap);
+ z->zslba = cpu_to_le64(zone->d.zslba);
+ z->za = zone->d.za;
+
+ if (nvme_wp_is_valid(zone)) {
+ z->wp = cpu_to_le64(zone->d.wp);
+ } else {
+ z->wp = cpu_to_le64(~0ULL);
+ }
+
+ max_zones--;
+ }
+ }
+
+ status = nvme_dma(n, (uint8_t *)buf, data_size,
+ DMA_DIRECTION_FROM_DEVICE, req);
+
+ g_free(buf);
+
+ return status;
}
static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
@@ -1244,12 +1958,18 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
return nvme_flush(n, req);
case NVME_CMD_WRITE_ZEROES:
return nvme_write_zeroes(n, req);
+ case NVME_CMD_ZONE_APPEND:
+ return nvme_zone_append(n, req);
case NVME_CMD_WRITE:
return nvme_write(n, req);
case NVME_CMD_READ:
return nvme_read(n, req);
case NVME_CMD_DSM:
return nvme_dsm(n, req);
+ case NVME_CMD_ZONE_MGMT_SEND:
+ return nvme_zone_mgmt_send(n, req);
+ case NVME_CMD_ZONE_MGMT_RECV:
+ return nvme_zone_mgmt_recv(n, req);
default:
assert(false);
}
@@ -1511,6 +2231,9 @@ static uint16_t nvme_cmd_effects(NvmeCtrl *n, uint8_t csi, uint32_t buf_len,
case NVME_CSI_NVM:
src_iocs = nvme_cse_iocs_nvm;
break;
+ case NVME_CSI_ZONED:
+ src_iocs = nvme_cse_iocs_zoned;
+ break;
}
}
@@ -1692,6 +2415,16 @@ static uint16_t nvme_rpt_empty_id_struct(NvmeCtrl *n, NvmeRequest *req)
return nvme_dma(n, id, sizeof(id), DMA_DIRECTION_FROM_DEVICE, req);
}
+static inline bool nvme_csi_has_nvm_support(NvmeNamespace *ns)
+{
+ switch (ns->csi) {
+ case NVME_CSI_NVM:
+ case NVME_CSI_ZONED:
+ return true;
+ }
+ return false;
+}
+
static uint16_t nvme_identify_ctrl(NvmeCtrl *n, NvmeRequest *req)
{
trace_pci_nvme_identify_ctrl();
@@ -1703,11 +2436,18 @@ static uint16_t nvme_identify_ctrl(NvmeCtrl *n, NvmeRequest *req)
static uint16_t nvme_identify_ctrl_csi(NvmeCtrl *n, NvmeRequest *req)
{
NvmeIdentify *c = (NvmeIdentify *)&req->cmd;
+ NvmeIdCtrlZoned id = {};
trace_pci_nvme_identify_ctrl_csi(c->csi);
if (c->csi == NVME_CSI_NVM) {
return nvme_rpt_empty_id_struct(n, req);
+ } else if (c->csi == NVME_CSI_ZONED) {
+ if (n->params.zasl_bs) {
+ id.zasl = n->zasl;
+ }
+ return nvme_dma(n, (uint8_t *)&id, sizeof(id),
+ DMA_DIRECTION_FROM_DEVICE, req);
}
return NVME_INVALID_FIELD | NVME_DNR;
@@ -1730,8 +2470,12 @@ static uint16_t nvme_identify_ns(NvmeCtrl *n, NvmeRequest *req)
return nvme_rpt_empty_id_struct(n, req);
}
- return nvme_dma(n, (uint8_t *)&ns->id_ns, sizeof(NvmeIdNs),
- DMA_DIRECTION_FROM_DEVICE, req);
+ if (c->csi == NVME_CSI_NVM && nvme_csi_has_nvm_support(ns)) {
+ return nvme_dma(n, (uint8_t *)&ns->id_ns, sizeof(NvmeIdNs),
+ DMA_DIRECTION_FROM_DEVICE, req);
+ }
+
+ return NVME_INVALID_CMD_SET | NVME_DNR;
}
static uint16_t nvme_identify_ns_csi(NvmeCtrl *n, NvmeRequest *req)
@@ -1751,8 +2495,11 @@ static uint16_t nvme_identify_ns_csi(NvmeCtrl *n, NvmeRequest *req)
return nvme_rpt_empty_id_struct(n, req);
}
- if (c->csi == NVME_CSI_NVM) {
+ if (c->csi == NVME_CSI_NVM && nvme_csi_has_nvm_support(ns)) {
return nvme_rpt_empty_id_struct(n, req);
+ } else if (c->csi == NVME_CSI_ZONED && ns->csi == NVME_CSI_ZONED) {
+ return nvme_dma(n, (uint8_t *)ns->id_ns_zoned, sizeof(NvmeIdNsZoned),
+ DMA_DIRECTION_FROM_DEVICE, req);
}
return NVME_INVALID_FIELD | NVME_DNR;
@@ -1816,7 +2563,7 @@ static uint16_t nvme_identify_nslist_csi(NvmeCtrl *n, NvmeRequest *req)
return NVME_INVALID_NSID | NVME_DNR;
}
- if (c->csi != NVME_CSI_NVM) {
+ if (c->csi != NVME_CSI_NVM && c->csi != NVME_CSI_ZONED) {
return NVME_INVALID_FIELD | NVME_DNR;
}
@@ -1825,7 +2572,7 @@ static uint16_t nvme_identify_nslist_csi(NvmeCtrl *n, NvmeRequest *req)
if (!ns) {
continue;
}
- if (ns->params.nsid <= min_nsid) {
+ if (ns->params.nsid <= min_nsid || c->csi != ns->csi) {
continue;
}
list_ptr[j++] = cpu_to_le32(ns->params.nsid);
@@ -1892,6 +2639,8 @@ static uint16_t nvme_identify_cmd_set(NvmeCtrl *n, NvmeRequest *req)
trace_pci_nvme_identify_cmd_set();
NVME_SET_CSI(*list, NVME_CSI_NVM);
+ NVME_SET_CSI(*list, NVME_CSI_ZONED);
+
return nvme_dma(n, list, data_len, DMA_DIRECTION_FROM_DEVICE, req);
}
@@ -2461,6 +3210,13 @@ static void nvme_select_ns_iocs(NvmeCtrl *n)
ns->iocs = nvme_cse_iocs_nvm;
}
break;
+ case NVME_CSI_ZONED:
+ if (NVME_CC_CSS(n->bar.cc) == NVME_CC_CSS_CSI) {
+ ns->iocs = nvme_cse_iocs_zoned;
+ } else if (NVME_CC_CSS(n->bar.cc) == NVME_CC_CSS_NVM) {
+ ns->iocs = nvme_cse_iocs_nvm;
+ }
+ break;
}
}
}
@@ -2559,6 +3315,17 @@ static int nvme_start_ctrl(NvmeCtrl *n)
nvme_init_sq(&n->admin_sq, n, n->bar.asq, 0, 0,
NVME_AQA_ASQS(n->bar.aqa) + 1);
+ if (!n->params.zasl_bs) {
+ n->zasl = n->params.mdts;
+ } else {
+ if (n->params.zasl_bs < n->page_size) {
+ trace_pci_nvme_err_startfail_zasl_too_small(n->params.zasl_bs,
+ n->page_size);
+ return -1;
+ }
+ n->zasl = 31 - clz32(n->params.zasl_bs / n->page_size);
+ }
+
nvme_set_timestamp(n, 0ULL);
QTAILQ_INIT(&n->aer_queue);
@@ -2983,6 +3750,13 @@ static void nvme_check_constraints(NvmeCtrl *n, Error **errp)
host_memory_backend_set_mapped(n->pmrdev, true);
}
+
+ if (n->params.zasl_bs) {
+ if (!is_power_of_2(n->params.zasl_bs)) {
+ error_setg(errp, "zone append size limit has to be a power of 2");
+ return;
+ }
+ }
}
static void nvme_init_state(NvmeCtrl *n)
@@ -3247,8 +4021,20 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp)
static void nvme_exit(PCIDevice *pci_dev)
{
NvmeCtrl *n = NVME(pci_dev);
+ NvmeNamespace *ns;
+ int i;
nvme_ctrl_shutdown(n);
+
+ for (i = 1; i <= n->num_namespaces; i++) {
+ ns = nvme_ns(n, i);
+ if (!ns) {
+ continue;
+ }
+
+ nvme_ns_cleanup(ns);
+ }
+
g_free(n->cq);
g_free(n->sq);
g_free(n->aer_reqs);
@@ -3276,6 +4062,8 @@ static Property nvme_props[] = {
DEFINE_PROP_UINT32("aer_max_queued", NvmeCtrl, params.aer_max_queued, 64),
DEFINE_PROP_UINT8("mdts", NvmeCtrl, params.mdts, 7),
DEFINE_PROP_BOOL("use-intel-id", NvmeCtrl, params.use_intel_id, false),
+ DEFINE_PROP_SIZE32("zoned.append_size_limit", NvmeCtrl, params.zasl_bs,
+ NVME_DEFAULT_MAX_ZA_SIZE),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/block/trace-events b/hw/block/trace-events
index 8b697664d3..63db3a353e 100644
--- a/hw/block/trace-events
+++ b/hw/block/trace-events
@@ -93,6 +93,14 @@ pci_nvme_mmio_start_success(void) "setting controller enable bit succeeded"
pci_nvme_mmio_stopped(void) "cleared controller enable bit"
pci_nvme_mmio_shutdown_set(void) "shutdown bit set"
pci_nvme_mmio_shutdown_cleared(void) "shutdown bit cleared"
+pci_nvme_open_zone(uint64_t slba, uint32_t zone_idx, int all) "open zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32""
+pci_nvme_close_zone(uint64_t slba, uint32_t zone_idx, int all) "close zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32""
+pci_nvme_finish_zone(uint64_t slba, uint32_t zone_idx, int all) "finish zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32""
+pci_nvme_reset_zone(uint64_t slba, uint32_t zone_idx, int all) "reset zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32""
+pci_nvme_offline_zone(uint64_t slba, uint32_t zone_idx, int all) "offline zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32""
+pci_nvme_set_descriptor_extension(uint64_t slba, uint32_t zone_idx) "set zone descriptor extension, slba=%"PRIu64", idx=%"PRIu32""
+pci_nvme_clear_ns_close(uint32_t state, uint64_t slba) "zone state=%"PRIu32", slba=%"PRIu64" transitioned to Closed state"
+pci_nvme_clear_ns_reset(uint32_t state, uint64_t slba) "zone state=%"PRIu32", slba=%"PRIu64" transitioned to Empty state"
# nvme traces for error conditions
pci_nvme_err_mdts(uint16_t cid, size_t len) "cid %"PRIu16" len %zu"
@@ -111,6 +119,13 @@ pci_nvme_err_invalid_opc(uint8_t opc) "invalid opcode 0x%"PRIx8""
pci_nvme_err_invalid_admin_opc(uint8_t opc) "invalid admin opcode 0x%"PRIx8""
pci_nvme_err_invalid_lba_range(uint64_t start, uint64_t len, uint64_t limit) "Invalid LBA start=%"PRIu64" len=%"PRIu64" limit=%"PRIu64""
pci_nvme_err_invalid_log_page_offset(uint64_t ofs, uint64_t size) "must be <= %"PRIu64", got %"PRIu64""
+pci_nvme_err_unaligned_zone_cmd(uint8_t action, uint64_t slba, uint64_t zslba) "unaligned zone op 0x%"PRIx32", got slba=%"PRIu64", zslba=%"PRIu64""
+pci_nvme_err_invalid_zone_state_transition(uint8_t action, uint64_t slba, uint8_t attrs) "action=0x%"PRIx8", slba=%"PRIu64", attrs=0x%"PRIx32""
+pci_nvme_err_write_not_at_wp(uint64_t slba, uint64_t zone, uint64_t wp) "writing at slba=%"PRIu64", zone=%"PRIu64", but wp=%"PRIu64""
+pci_nvme_err_append_not_at_start(uint64_t slba, uint64_t zone) "appending at slba=%"PRIu64", but zone=%"PRIu64""
+pci_nvme_err_zone_write_not_ok(uint64_t slba, uint32_t nlb, uint32_t status) "slba=%"PRIu64", nlb=%"PRIu32", status=0x%"PRIx16""
+pci_nvme_err_zone_read_not_ok(uint64_t slba, uint32_t nlb, uint32_t status) "slba=%"PRIu64", nlb=%"PRIu32", status=0x%"PRIx16""
+pci_nvme_err_append_too_large(uint64_t slba, uint32_t nlb, uint8_t zasl) "slba=%"PRIu64", nlb=%"PRIu32", zasl=%"PRIu8""
pci_nvme_err_invalid_iocsci(uint32_t idx) "unsupported command set combination index %"PRIu32""
pci_nvme_err_invalid_del_sq(uint16_t qid) "invalid submission queue deletion, sid=%"PRIu16""
pci_nvme_err_invalid_create_sq_cqid(uint16_t cqid) "failed creating submission queue, invalid cqid=%"PRIu16""
@@ -144,7 +159,9 @@ pci_nvme_err_startfail_sqent_too_large(uint8_t log2ps, uint8_t maxlog2ps) "nvme_
pci_nvme_err_startfail_css(uint8_t css) "nvme_start_ctrl failed because invalid command set selected:%u"
pci_nvme_err_startfail_asqent_sz_zero(void) "nvme_start_ctrl failed because the admin submission queue size is zero"
pci_nvme_err_startfail_acqent_sz_zero(void) "nvme_start_ctrl failed because the admin completion queue size is zero"
+pci_nvme_err_startfail_zasl_too_small(uint32_t zasl, uint32_t pagesz) "nvme_start_ctrl failed because zone append size limit %"PRIu32" is too small, needs to be >= %"PRIu32""
pci_nvme_err_startfail(void) "setting controller enable bit failed"
+pci_nvme_err_invalid_mgmt_action(int action) "action=0x%"PRIx8""
# Traces for undefined behavior
pci_nvme_ub_mmiowr_misaligned32(uint64_t offset) "MMIO write not 32-bit aligned, offset=0x%"PRIx64""
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 10/13] hw/block/nvme: Introduce max active and open zone limits
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (8 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 09/13] hw/block/nvme: Support Zoned Namespace Command Set Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 11/13] hw/block/nvme: Support Zone Descriptor Extensions Dmitry Fomichev
` (4 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
Add two module properties, "zoned.max_active" and "zoned.max_open"
to control the maximum number of zones that can be active or open.
Once these variables are set to non-default values, these limits are
checked during I/O and Too Many Active or Too Many Open command status
is returned if they are exceeded.
Signed-off-by: Hans Holmberg <hans.holmberg@wdc.com>
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Niklas Cassel <Niklas.Cassel@wdc.com>
---
hw/block/nvme-ns.h | 41 +++++++++++++++++++
hw/block/nvme-ns.c | 31 ++++++++++++++-
hw/block/nvme.c | 92 +++++++++++++++++++++++++++++++++++++++++++
hw/block/trace-events | 2 +
4 files changed, 164 insertions(+), 2 deletions(-)
diff --git a/hw/block/nvme-ns.h b/hw/block/nvme-ns.h
index 388381dda0..7e1fd26909 100644
--- a/hw/block/nvme-ns.h
+++ b/hw/block/nvme-ns.h
@@ -33,6 +33,8 @@ typedef struct NvmeNamespaceParams {
bool cross_zone_read;
uint64_t zone_size_bs;
uint64_t zone_cap_bs;
+ uint32_t max_active_zones;
+ uint32_t max_open_zones;
} NvmeNamespaceParams;
typedef struct NvmeNamespace {
@@ -54,6 +56,8 @@ typedef struct NvmeNamespace {
uint64_t zone_size;
uint64_t zone_capacity;
uint32_t zone_size_log2;
+ int32_t nr_open_zones;
+ int32_t nr_active_zones;
NvmeNamespaceParams params;
@@ -125,6 +129,43 @@ static inline bool nvme_wp_is_valid(NvmeZone *zone)
st != NVME_ZONE_STATE_OFFLINE;
}
+static inline void nvme_aor_inc_open(NvmeNamespace *ns)
+{
+ assert(ns->nr_open_zones >= 0);
+ if (ns->params.max_open_zones) {
+ ns->nr_open_zones++;
+ assert(ns->nr_open_zones <= ns->params.max_open_zones);
+ }
+}
+
+static inline void nvme_aor_dec_open(NvmeNamespace *ns)
+{
+ if (ns->params.max_open_zones) {
+ assert(ns->nr_open_zones > 0);
+ ns->nr_open_zones--;
+ }
+ assert(ns->nr_open_zones >= 0);
+}
+
+static inline void nvme_aor_inc_active(NvmeNamespace *ns)
+{
+ assert(ns->nr_active_zones >= 0);
+ if (ns->params.max_active_zones) {
+ ns->nr_active_zones++;
+ assert(ns->nr_active_zones <= ns->params.max_active_zones);
+ }
+}
+
+static inline void nvme_aor_dec_active(NvmeNamespace *ns)
+{
+ if (ns->params.max_active_zones) {
+ assert(ns->nr_active_zones > 0);
+ ns->nr_active_zones--;
+ assert(ns->nr_active_zones >= ns->nr_open_zones);
+ }
+ assert(ns->nr_active_zones >= 0);
+}
+
int nvme_ns_setup(NvmeCtrl *n, NvmeNamespace *ns, Error **errp);
void nvme_ns_drain(NvmeNamespace *ns);
void nvme_ns_shutdown(NvmeNamespace *ns);
diff --git a/hw/block/nvme-ns.c b/hw/block/nvme-ns.c
index 1df45bbe35..aaef69fb47 100644
--- a/hw/block/nvme-ns.c
+++ b/hw/block/nvme-ns.c
@@ -136,6 +136,21 @@ static int nvme_ns_zoned_check_calc_geometry(NvmeNamespace *ns, Error **errp)
ns->zone_size = zone_size / lbasz;
ns->zone_capacity = zone_cap / lbasz;
ns->num_zones = ns->size / lbasz / ns->zone_size;
+
+ /* Do a few more sanity checks of ZNS properties */
+ if (ns->params.max_open_zones > ns->num_zones) {
+ error_setg(errp,
+ "max_open_zones value %u exceeds the number of zones %u",
+ ns->params.max_open_zones, ns->num_zones);
+ return -1;
+ }
+ if (ns->params.max_active_zones > ns->num_zones) {
+ error_setg(errp,
+ "max_active_zones value %u exceeds the number of zones %u",
+ ns->params.max_active_zones, ns->num_zones);
+ return -1;
+ }
+
return 0;
}
@@ -183,8 +198,8 @@ static void nvme_ns_init_zoned(NvmeCtrl *n, NvmeNamespace *ns, int lba_index)
id_ns_z = g_malloc0(sizeof(NvmeIdNsZoned));
/* MAR/MOR are zeroes-based, 0xffffffff means no limit */
- id_ns_z->mar = 0xffffffff;
- id_ns_z->mor = 0xffffffff;
+ id_ns_z->mar = cpu_to_le32(ns->params.max_active_zones - 1);
+ id_ns_z->mor = cpu_to_le32(ns->params.max_open_zones - 1);
id_ns_z->zoc = 0;
id_ns_z->ozcs = ns->params.cross_zone_read ? 0x01 : 0x00;
@@ -210,6 +225,7 @@ static void nvme_clear_zone(NvmeNamespace *ns, NvmeZone *zone)
trace_pci_nvme_clear_ns_close(state, zone->d.zslba);
nvme_set_zone_state(zone, NVME_ZONE_STATE_CLOSED);
}
+ nvme_aor_inc_active(ns);
QTAILQ_INSERT_HEAD(&ns->closed_zones, zone, entry);
} else {
trace_pci_nvme_clear_ns_reset(state, zone->d.zslba);
@@ -226,16 +242,23 @@ static void nvme_zoned_ns_shutdown(NvmeNamespace *ns)
QTAILQ_FOREACH_SAFE(zone, &ns->closed_zones, entry, next) {
QTAILQ_REMOVE(&ns->closed_zones, zone, entry);
+ nvme_aor_dec_active(ns);
nvme_clear_zone(ns, zone);
}
QTAILQ_FOREACH_SAFE(zone, &ns->imp_open_zones, entry, next) {
QTAILQ_REMOVE(&ns->imp_open_zones, zone, entry);
+ nvme_aor_dec_open(ns);
+ nvme_aor_dec_active(ns);
nvme_clear_zone(ns, zone);
}
QTAILQ_FOREACH_SAFE(zone, &ns->exp_open_zones, entry, next) {
QTAILQ_REMOVE(&ns->exp_open_zones, zone, entry);
+ nvme_aor_dec_open(ns);
+ nvme_aor_dec_active(ns);
nvme_clear_zone(ns, zone);
}
+
+ assert(ns->nr_open_zones == 0);
}
static int nvme_ns_check_constraints(NvmeNamespace *ns, Error **errp)
@@ -320,6 +343,10 @@ static Property nvme_ns_props[] = {
DEFINE_PROP_SIZE("zoned.zcap", NvmeNamespace, params.zone_cap_bs, 0),
DEFINE_PROP_BOOL("zoned.cross_read", NvmeNamespace,
params.cross_zone_read, false),
+ DEFINE_PROP_UINT32("zoned.max_active", NvmeNamespace,
+ params.max_active_zones, 0),
+ DEFINE_PROP_UINT32("zoned.max_open", NvmeNamespace,
+ params.max_open_zones, 0),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index d1c57cb322..8b97b713a3 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -202,6 +202,26 @@ static void nvme_assign_zone_state(NvmeNamespace *ns, NvmeZone *zone,
}
}
+/*
+ * Check if we can open a zone without exceeding open/active limits.
+ * AOR stands for "Active and Open Resources" (see TP 4053 section 2.5).
+ */
+static int nvme_aor_check(NvmeNamespace *ns, uint32_t act, uint32_t opn)
+{
+ if (ns->params.max_active_zones != 0 &&
+ ns->nr_active_zones + act > ns->params.max_active_zones) {
+ trace_pci_nvme_err_insuff_active_res(ns->params.max_active_zones);
+ return NVME_ZONE_TOO_MANY_ACTIVE | NVME_DNR;
+ }
+ if (ns->params.max_open_zones != 0 &&
+ ns->nr_open_zones + opn > ns->params.max_open_zones) {
+ trace_pci_nvme_err_insuff_open_res(ns->params.max_open_zones);
+ return NVME_ZONE_TOO_MANY_OPEN | NVME_DNR;
+ }
+
+ return NVME_SUCCESS;
+}
+
static bool nvme_addr_is_cmb(NvmeCtrl *n, hwaddr addr)
{
hwaddr low = n->ctrl_mem.addr;
@@ -1127,6 +1147,40 @@ static uint16_t nvme_check_zone_read(NvmeNamespace *ns, uint64_t slba,
return status;
}
+static void nvme_auto_transition_zone(NvmeNamespace *ns)
+{
+ NvmeZone *zone;
+
+ if (ns->params.max_open_zones &&
+ ns->nr_open_zones == ns->params.max_open_zones) {
+ zone = QTAILQ_FIRST(&ns->imp_open_zones);
+ if (zone) {
+ /*
+ * Automatically close this implicitly open zone.
+ */
+ QTAILQ_REMOVE(&ns->imp_open_zones, zone, entry);
+ nvme_aor_dec_open(ns);
+ nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_CLOSED);
+ }
+ }
+}
+
+static uint16_t nvme_auto_open_zone(NvmeNamespace *ns, NvmeZone *zone)
+{
+ uint16_t status = NVME_SUCCESS;
+ uint8_t zs = nvme_get_zone_state(zone);
+
+ if (zs == NVME_ZONE_STATE_EMPTY) {
+ nvme_auto_transition_zone(ns);
+ status = nvme_aor_check(ns, 1, 1);
+ } else if (zs == NVME_ZONE_STATE_CLOSED) {
+ nvme_auto_transition_zone(ns);
+ status = nvme_aor_check(ns, 0, 1);
+ }
+
+ return status;
+}
+
static void nvme_finalize_zoned_write(NvmeNamespace *ns, NvmeRequest *req,
bool failed)
{
@@ -1147,7 +1201,11 @@ static void nvme_finalize_zoned_write(NvmeNamespace *ns, NvmeRequest *req,
switch (nvme_get_zone_state(zone)) {
case NVME_ZONE_STATE_IMPLICITLY_OPEN:
case NVME_ZONE_STATE_EXPLICITLY_OPEN:
+ nvme_aor_dec_open(ns);
+ /* fall through */
case NVME_ZONE_STATE_CLOSED:
+ nvme_aor_dec_active(ns);
+ /* fall through */
case NVME_ZONE_STATE_EMPTY:
nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_FULL);
/* fall through */
@@ -1174,7 +1232,10 @@ static uint64_t nvme_advance_zone_wp(NvmeNamespace *ns, NvmeZone *zone,
zs = nvme_get_zone_state(zone);
switch (zs) {
case NVME_ZONE_STATE_EMPTY:
+ nvme_aor_inc_active(ns);
+ /* fall through */
case NVME_ZONE_STATE_CLOSED:
+ nvme_aor_inc_open(ns);
nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_IMPLICITLY_OPEN);
}
}
@@ -1448,6 +1509,11 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeRequest *req, bool append,
goto invalid;
}
+ status = nvme_auto_open_zone(ns, zone);
+ if (status != NVME_SUCCESS) {
+ goto invalid;
+ }
+
if (append) {
slba = zone->w_ptr;
}
@@ -1543,9 +1609,26 @@ enum NvmeZoneProcessingMask {
static uint16_t nvme_open_zone(NvmeNamespace *ns, NvmeZone *zone,
enum NvmeZoneState state)
{
+ uint16_t status;
+
switch (state) {
case NVME_ZONE_STATE_EMPTY:
+ status = nvme_aor_check(ns, 1, 0);
+ if (status != NVME_SUCCESS) {
+ return status;
+ }
+ nvme_aor_inc_active(ns);
+ /* fall through */
case NVME_ZONE_STATE_CLOSED:
+ status = nvme_aor_check(ns, 0, 1);
+ if (status != NVME_SUCCESS) {
+ if (state == NVME_ZONE_STATE_EMPTY) {
+ nvme_aor_dec_active(ns);
+ }
+ return status;
+ }
+ nvme_aor_inc_open(ns);
+ /* fall through */
case NVME_ZONE_STATE_IMPLICITLY_OPEN:
nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_EXPLICITLY_OPEN);
/* fall through */
@@ -1562,6 +1645,7 @@ static uint16_t nvme_close_zone(NvmeNamespace *ns, NvmeZone *zone,
switch (state) {
case NVME_ZONE_STATE_EXPLICITLY_OPEN:
case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ nvme_aor_dec_open(ns);
nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_CLOSED);
/* fall through */
case NVME_ZONE_STATE_CLOSED:
@@ -1577,7 +1661,11 @@ static uint16_t nvme_finish_zone(NvmeNamespace *ns, NvmeZone *zone,
switch (state) {
case NVME_ZONE_STATE_EXPLICITLY_OPEN:
case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ nvme_aor_dec_open(ns);
+ /* fall through */
case NVME_ZONE_STATE_CLOSED:
+ nvme_aor_dec_active(ns);
+ /* fall through */
case NVME_ZONE_STATE_EMPTY:
zone->w_ptr = nvme_zone_wr_boundary(zone);
zone->d.wp = zone->w_ptr;
@@ -1596,7 +1684,11 @@ static uint16_t nvme_reset_zone(NvmeNamespace *ns, NvmeZone *zone,
switch (state) {
case NVME_ZONE_STATE_EXPLICITLY_OPEN:
case NVME_ZONE_STATE_IMPLICITLY_OPEN:
+ nvme_aor_dec_open(ns);
+ /* fall through */
case NVME_ZONE_STATE_CLOSED:
+ nvme_aor_dec_active(ns);
+ /* fall through */
case NVME_ZONE_STATE_FULL:
zone->w_ptr = zone->d.zslba;
zone->d.wp = zone->w_ptr;
diff --git a/hw/block/trace-events b/hw/block/trace-events
index 63db3a353e..0b8564e028 100644
--- a/hw/block/trace-events
+++ b/hw/block/trace-events
@@ -126,6 +126,8 @@ pci_nvme_err_append_not_at_start(uint64_t slba, uint64_t zone) "appending at slb
pci_nvme_err_zone_write_not_ok(uint64_t slba, uint32_t nlb, uint32_t status) "slba=%"PRIu64", nlb=%"PRIu32", status=0x%"PRIx16""
pci_nvme_err_zone_read_not_ok(uint64_t slba, uint32_t nlb, uint32_t status) "slba=%"PRIu64", nlb=%"PRIu32", status=0x%"PRIx16""
pci_nvme_err_append_too_large(uint64_t slba, uint32_t nlb, uint8_t zasl) "slba=%"PRIu64", nlb=%"PRIu32", zasl=%"PRIu8""
+pci_nvme_err_insuff_active_res(uint32_t max_active) "max_active=%"PRIu32" zone limit exceeded"
+pci_nvme_err_insuff_open_res(uint32_t max_open) "max_open=%"PRIu32" zone limit exceeded"
pci_nvme_err_invalid_iocsci(uint32_t idx) "unsupported command set combination index %"PRIu32""
pci_nvme_err_invalid_del_sq(uint16_t qid) "invalid submission queue deletion, sid=%"PRIu16""
pci_nvme_err_invalid_create_sq_cqid(uint16_t cqid) "failed creating submission queue, invalid cqid=%"PRIu16""
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 11/13] hw/block/nvme: Support Zone Descriptor Extensions
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (9 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 10/13] hw/block/nvme: Introduce max active and open zone limits Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 12/13] hw/block/nvme: Add injection of Offline/Read-Only zones Dmitry Fomichev
` (3 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
Zone Descriptor Extension is a label that can be assigned to a zone.
It can be set to an Empty zone and it stays assigned until the zone
is reset.
This commit adds a new optional module property,
"zoned.descr_ext_size". Its value must be a multiple of 64 bytes.
If this value is non-zero, it becomes possible to assign extensions
of that size to any Empty zones. The default value for this property
is 0, therefore setting extensions is disabled by default.
Signed-off-by: Hans Holmberg <hans.holmberg@wdc.com>
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Niklas Cassel <Niklas.Cassel@wdc.com>
---
hw/block/nvme-ns.h | 8 +++++++
hw/block/nvme-ns.c | 25 ++++++++++++++++++--
hw/block/nvme.c | 53 +++++++++++++++++++++++++++++++++++++++++--
hw/block/trace-events | 2 ++
4 files changed, 84 insertions(+), 4 deletions(-)
diff --git a/hw/block/nvme-ns.h b/hw/block/nvme-ns.h
index 7e1fd26909..f8f3c28c36 100644
--- a/hw/block/nvme-ns.h
+++ b/hw/block/nvme-ns.h
@@ -35,6 +35,7 @@ typedef struct NvmeNamespaceParams {
uint64_t zone_cap_bs;
uint32_t max_active_zones;
uint32_t max_open_zones;
+ uint32_t zd_extension_size;
} NvmeNamespaceParams;
typedef struct NvmeNamespace {
@@ -56,6 +57,7 @@ typedef struct NvmeNamespace {
uint64_t zone_size;
uint64_t zone_capacity;
uint32_t zone_size_log2;
+ uint8_t *zd_extensions;
int32_t nr_open_zones;
int32_t nr_active_zones;
@@ -129,6 +131,12 @@ static inline bool nvme_wp_is_valid(NvmeZone *zone)
st != NVME_ZONE_STATE_OFFLINE;
}
+static inline uint8_t *nvme_get_zd_extension(NvmeNamespace *ns,
+ uint32_t zone_idx)
+{
+ return &ns->zd_extensions[zone_idx * ns->params.zd_extension_size];
+}
+
static inline void nvme_aor_inc_open(NvmeNamespace *ns)
{
assert(ns->nr_open_zones >= 0);
diff --git a/hw/block/nvme-ns.c b/hw/block/nvme-ns.c
index aaef69fb47..c5a7bafcf7 100644
--- a/hw/block/nvme-ns.c
+++ b/hw/block/nvme-ns.c
@@ -151,6 +151,18 @@ static int nvme_ns_zoned_check_calc_geometry(NvmeNamespace *ns, Error **errp)
return -1;
}
+ if (ns->params.zd_extension_size) {
+ if (ns->params.zd_extension_size & 0x3f) {
+ error_setg(errp,
+ "zone descriptor extension size must be a multiple of 64B");
+ return -1;
+ }
+ if ((ns->params.zd_extension_size >> 6) > 0xff) {
+ error_setg(errp, "zone descriptor extension size is too large");
+ return -1;
+ }
+ }
+
return 0;
}
@@ -162,6 +174,10 @@ static void nvme_ns_zoned_init_state(NvmeNamespace *ns)
int i;
ns->zone_array = g_new0(NvmeZone, ns->num_zones);
+ if (ns->params.zd_extension_size) {
+ ns->zd_extensions = g_malloc0(ns->params.zd_extension_size *
+ ns->num_zones);
+ }
QTAILQ_INIT(&ns->exp_open_zones);
QTAILQ_INIT(&ns->imp_open_zones);
@@ -204,7 +220,8 @@ static void nvme_ns_init_zoned(NvmeCtrl *n, NvmeNamespace *ns, int lba_index)
id_ns_z->ozcs = ns->params.cross_zone_read ? 0x01 : 0x00;
id_ns_z->lbafe[lba_index].zsze = cpu_to_le64(ns->zone_size);
- id_ns_z->lbafe[lba_index].zdes = 0;
+ id_ns_z->lbafe[lba_index].zdes =
+ ns->params.zd_extension_size >> 6; /* Units of 64B */
ns->csi = NVME_CSI_ZONED;
ns->id_ns.nsze = cpu_to_le64(ns->num_zones * ns->zone_size);
@@ -220,7 +237,8 @@ static void nvme_clear_zone(NvmeNamespace *ns, NvmeZone *zone)
zone->w_ptr = zone->d.wp;
state = nvme_get_zone_state(zone);
- if (zone->d.wp != zone->d.zslba) {
+ if (zone->d.wp != zone->d.zslba ||
+ (zone->d.za & NVME_ZA_ZD_EXT_VALID)) {
if (state != NVME_ZONE_STATE_CLOSED) {
trace_pci_nvme_clear_ns_close(state, zone->d.zslba);
nvme_set_zone_state(zone, NVME_ZONE_STATE_CLOSED);
@@ -316,6 +334,7 @@ void nvme_ns_cleanup(NvmeNamespace *ns)
if (ns->params.zoned) {
g_free(ns->id_ns_zoned);
g_free(ns->zone_array);
+ g_free(ns->zd_extensions);
}
}
@@ -347,6 +366,8 @@ static Property nvme_ns_props[] = {
params.max_active_zones, 0),
DEFINE_PROP_UINT32("zoned.max_open", NvmeNamespace,
params.max_open_zones, 0),
+ DEFINE_PROP_UINT32("zoned.descr_ext_size", NvmeNamespace,
+ params.zd_extension_size, 0),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 8b97b713a3..c2336bfd67 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -1715,6 +1715,25 @@ static uint16_t nvme_offline_zone(NvmeNamespace *ns, NvmeZone *zone,
}
}
+static uint16_t nvme_set_zd_ext(NvmeNamespace *ns, NvmeZone *zone)
+{
+ uint16_t status;
+ uint8_t state = nvme_get_zone_state(zone);
+
+ if (state == NVME_ZONE_STATE_EMPTY) {
+ status = nvme_aor_check(ns, 1, 0);
+ if (status != NVME_SUCCESS) {
+ return status;
+ }
+ nvme_aor_inc_active(ns);
+ zone->d.za |= NVME_ZA_ZD_EXT_VALID;
+ nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_CLOSED);
+ return NVME_SUCCESS;
+ }
+
+ return NVME_ZONE_INVAL_TRANSITION;
+}
+
static uint16_t nvme_bulk_proc_zone(NvmeNamespace *ns, NvmeZone *zone,
enum NvmeZoneProcessingMask proc_mask,
op_handler_t op_hndlr)
@@ -1813,6 +1832,7 @@ static uint16_t nvme_zone_mgmt_send(NvmeCtrl *n, NvmeRequest *req)
NvmeCmd *cmd = (NvmeCmd *)&req->cmd;
NvmeNamespace *ns = req->ns;
NvmeZone *zone;
+ uint8_t *zd_ext;
uint32_t dw13 = le32_to_cpu(cmd->cdw13);
uint64_t slba = 0;
uint32_t zone_idx = 0;
@@ -1885,7 +1905,22 @@ static uint16_t nvme_zone_mgmt_send(NvmeCtrl *n, NvmeRequest *req)
case NVME_ZONE_ACTION_SET_ZD_EXT:
trace_pci_nvme_set_descriptor_extension(slba, zone_idx);
- return NVME_INVALID_FIELD | NVME_DNR;
+ if (all || !ns->params.zd_extension_size) {
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+ zd_ext = nvme_get_zd_extension(ns, zone_idx);
+ status = nvme_dma(n, zd_ext, ns->params.zd_extension_size,
+ DMA_DIRECTION_TO_DEVICE, req);
+ if (status) {
+ trace_pci_nvme_err_zd_extension_map_error(zone_idx);
+ return status;
+ }
+
+ status = nvme_set_zd_ext(ns, zone);
+ if (status == NVME_SUCCESS) {
+ trace_pci_nvme_zd_extension_set(zone_idx);
+ return status;
+ }
break;
default:
@@ -1955,7 +1990,10 @@ static uint16_t nvme_zone_mgmt_recv(NvmeCtrl *n, NvmeRequest *req)
}
zra = dw13 & 0xff;
- if (zra != NVME_ZONE_REPORT) {
+ if (zra != NVME_ZONE_REPORT && zra != NVME_ZONE_REPORT_EXTENDED) {
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+ if (zra == NVME_ZONE_REPORT_EXTENDED && !ns->params.zd_extension_size) {
return NVME_INVALID_FIELD | NVME_DNR;
}
@@ -1977,6 +2015,9 @@ static uint16_t nvme_zone_mgmt_recv(NvmeCtrl *n, NvmeRequest *req)
partial = (dw13 >> 16) & 0x01;
zone_entry_sz = sizeof(NvmeZoneDescr);
+ if (zra == NVME_ZONE_REPORT_EXTENDED) {
+ zone_entry_sz += ns->params.zd_extension_size;
+ }
max_zones = (data_size - sizeof(NvmeZoneReportHeader)) / zone_entry_sz;
buf = g_malloc0(data_size);
@@ -2012,6 +2053,14 @@ static uint16_t nvme_zone_mgmt_recv(NvmeCtrl *n, NvmeRequest *req)
z->wp = cpu_to_le64(~0ULL);
}
+ if (zra == NVME_ZONE_REPORT_EXTENDED) {
+ if (zone->d.za & NVME_ZA_ZD_EXT_VALID) {
+ memcpy(buf_p, nvme_get_zd_extension(ns, zone_idx),
+ ns->params.zd_extension_size);
+ }
+ buf_p += ns->params.zd_extension_size;
+ }
+
max_zones--;
}
}
diff --git a/hw/block/trace-events b/hw/block/trace-events
index 0b8564e028..0b7a132c88 100644
--- a/hw/block/trace-events
+++ b/hw/block/trace-events
@@ -99,6 +99,7 @@ pci_nvme_finish_zone(uint64_t slba, uint32_t zone_idx, int all) "finish zone, sl
pci_nvme_reset_zone(uint64_t slba, uint32_t zone_idx, int all) "reset zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32""
pci_nvme_offline_zone(uint64_t slba, uint32_t zone_idx, int all) "offline zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32""
pci_nvme_set_descriptor_extension(uint64_t slba, uint32_t zone_idx) "set zone descriptor extension, slba=%"PRIu64", idx=%"PRIu32""
+pci_nvme_zd_extension_set(uint32_t zone_idx) "set descriptor extension for zone_idx=%"PRIu32""
pci_nvme_clear_ns_close(uint32_t state, uint64_t slba) "zone state=%"PRIu32", slba=%"PRIu64" transitioned to Closed state"
pci_nvme_clear_ns_reset(uint32_t state, uint64_t slba) "zone state=%"PRIu32", slba=%"PRIu64" transitioned to Empty state"
@@ -128,6 +129,7 @@ pci_nvme_err_zone_read_not_ok(uint64_t slba, uint32_t nlb, uint32_t status) "slb
pci_nvme_err_append_too_large(uint64_t slba, uint32_t nlb, uint8_t zasl) "slba=%"PRIu64", nlb=%"PRIu32", zasl=%"PRIu8""
pci_nvme_err_insuff_active_res(uint32_t max_active) "max_active=%"PRIu32" zone limit exceeded"
pci_nvme_err_insuff_open_res(uint32_t max_open) "max_open=%"PRIu32" zone limit exceeded"
+pci_nvme_err_zd_extension_map_error(uint32_t zone_idx) "can't map descriptor extension for zone_idx=%"PRIu32""
pci_nvme_err_invalid_iocsci(uint32_t idx) "unsupported command set combination index %"PRIu32""
pci_nvme_err_invalid_del_sq(uint16_t qid) "invalid submission queue deletion, sid=%"PRIu16""
pci_nvme_err_invalid_create_sq_cqid(uint16_t cqid) "failed creating submission queue, invalid cqid=%"PRIu16""
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 12/13] hw/block/nvme: Add injection of Offline/Read-Only zones
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (10 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 11/13] hw/block/nvme: Support Zone Descriptor Extensions Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 13/13] hw/block/nvme: Document zoned parameters in usage text Dmitry Fomichev
` (2 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
ZNS specification defines two zone conditions for the zones that no
longer can function properly, possibly because of flash wear or other
internal fault. It is useful to be able to "inject" a small number of
such zones for testing purposes.
This commit defines two optional device properties, "offline_zones"
and "rdonly_zones". Users can assign non-zero values to these variables
to specify the number of zones to be initialized as Offline or
Read-Only. The actual number of injected zones may be smaller than the
requested amount - Read-Only and Offline counts are expected to be much
smaller than the total number of zones on a drive.
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Niklas Cassel <Niklas.Cassel@wdc.com>
---
hw/block/nvme-ns.h | 2 ++
hw/block/nvme-ns.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 55 insertions(+)
diff --git a/hw/block/nvme-ns.h b/hw/block/nvme-ns.h
index f8f3c28c36..1196865b7a 100644
--- a/hw/block/nvme-ns.h
+++ b/hw/block/nvme-ns.h
@@ -36,6 +36,8 @@ typedef struct NvmeNamespaceParams {
uint32_t max_active_zones;
uint32_t max_open_zones;
uint32_t zd_extension_size;
+ uint32_t nr_offline_zones;
+ uint32_t nr_rdonly_zones;
} NvmeNamespaceParams;
typedef struct NvmeNamespace {
diff --git a/hw/block/nvme-ns.c b/hw/block/nvme-ns.c
index c5a7bafcf7..0a8b741bc9 100644
--- a/hw/block/nvme-ns.c
+++ b/hw/block/nvme-ns.c
@@ -21,6 +21,7 @@
#include "sysemu/sysemu.h"
#include "sysemu/block-backend.h"
#include "qapi/error.h"
+#include "crypto/random.h"
#include "hw/qdev-properties.h"
#include "hw/qdev-core.h"
@@ -163,6 +164,21 @@ static int nvme_ns_zoned_check_calc_geometry(NvmeNamespace *ns, Error **errp)
}
}
+ if (ns->params.max_open_zones < ns->num_zones) {
+ if (ns->params.nr_offline_zones >
+ ns->num_zones - ns->params.max_open_zones) {
+ error_setg(errp, "offline_zones value %u is too large",
+ ns->params.nr_offline_zones);
+ return -1;
+ }
+ if (ns->params.nr_rdonly_zones + ns->params.nr_offline_zones >
+ ns->num_zones - ns->params.max_open_zones) {
+ error_setg(errp, "rdonly_zones value %u is too large",
+ ns->params.nr_rdonly_zones);
+ return -1;
+ }
+ }
+
return 0;
}
@@ -171,7 +187,9 @@ static void nvme_ns_zoned_init_state(NvmeNamespace *ns)
uint64_t start = 0, zone_size = ns->zone_size;
uint64_t capacity = ns->num_zones * zone_size;
NvmeZone *zone;
+ uint32_t rnd;
int i;
+ uint16_t zs;
ns->zone_array = g_new0(NvmeZone, ns->num_zones);
if (ns->params.zd_extension_size) {
@@ -203,6 +221,37 @@ static void nvme_ns_zoned_init_state(NvmeNamespace *ns)
if (is_power_of_2(ns->zone_size)) {
ns->zone_size_log2 = 63 - clz64(ns->zone_size);
}
+
+ /* If required, make some zones Offline or Read Only */
+
+ for (i = 0; i < ns->params.nr_offline_zones; i++) {
+ do {
+ qcrypto_random_bytes(&rnd, sizeof(rnd), NULL);
+ rnd %= ns->num_zones;
+ } while (rnd < ns->params.max_open_zones);
+ zone = &ns->zone_array[rnd];
+ zs = nvme_get_zone_state(zone);
+ if (zs != NVME_ZONE_STATE_OFFLINE) {
+ nvme_set_zone_state(zone, NVME_ZONE_STATE_OFFLINE);
+ } else {
+ i--;
+ }
+ }
+
+ for (i = 0; i < ns->params.nr_rdonly_zones; i++) {
+ do {
+ qcrypto_random_bytes(&rnd, sizeof(rnd), NULL);
+ rnd %= ns->num_zones;
+ } while (rnd < ns->params.max_open_zones);
+ zone = &ns->zone_array[rnd];
+ zs = nvme_get_zone_state(zone);
+ if (zs != NVME_ZONE_STATE_OFFLINE &&
+ zs != NVME_ZONE_STATE_READ_ONLY) {
+ nvme_set_zone_state(zone, NVME_ZONE_STATE_READ_ONLY);
+ } else {
+ i--;
+ }
+ }
}
static void nvme_ns_init_zoned(NvmeCtrl *n, NvmeNamespace *ns, int lba_index)
@@ -368,6 +417,10 @@ static Property nvme_ns_props[] = {
params.max_open_zones, 0),
DEFINE_PROP_UINT32("zoned.descr_ext_size", NvmeNamespace,
params.zd_extension_size, 0),
+ DEFINE_PROP_UINT32("zoned.offline_zones", NvmeNamespace,
+ params.nr_offline_zones, 0),
+ DEFINE_PROP_UINT32("zoned.rdonly_zones", NvmeNamespace,
+ params.nr_rdonly_zones, 0),
DEFINE_PROP_END_OF_LIST(),
};
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v11 13/13] hw/block/nvme: Document zoned parameters in usage text
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (11 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 12/13] hw/block/nvme: Add injection of Offline/Read-Only zones Dmitry Fomichev
@ 2020-12-08 20:04 ` Dmitry Fomichev
2020-12-09 9:57 ` [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Klaus Jensen
2020-12-16 0:23 ` Keith Busch
14 siblings, 0 replies; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-08 20:04 UTC (permalink / raw)
To: Keith Busch, Klaus Jensen, Kevin Wolf,
Philippe Mathieu-Daudé,
Max Reitz, Maxim Levitsky, Fam Zheng
Cc: Niklas Cassel, Damien Le Moal, qemu-block, Dmitry Fomichev,
qemu-devel, Alistair Francis, Matias Bjorling
Added brief descriptions of the new device properties that are
now available to users to configure features of Zoned Namespace
Command Set in the emulator.
This patch is for documentation only, no functionality change.
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Niklas Cassel <Niklas.Cassel@wdc.com>
---
hw/block/nvme.c | 47 ++++++++++++++++++++++++++++++++++++++++++-----
1 file changed, 42 insertions(+), 5 deletions(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index c2336bfd67..fbb69c82c6 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -9,7 +9,7 @@
*/
/**
- * Reference Specs: http://www.nvmexpress.org, 1.2, 1.1, 1.0e
+ * Reference Specs: http://www.nvmexpress.org, 1.4, 1.3, 1.2, 1.1, 1.0e
*
* https://nvmexpress.org/developers/nvme-specification/
*/
@@ -22,8 +22,9 @@
* [pmrdev=<mem_backend_file_id>,] \
* max_ioqpairs=<N[optional]>, \
* aerl=<N[optional]>, aer_max_queued=<N[optional]>, \
- * mdts=<N[optional]>
- * -device nvme-ns,drive=<drive_id>,bus=bus_name,nsid=<nsid>
+ * mdts=<N[optional]>,zoned.append_size_limit=<N[optional]> \
+ * -device nvme-ns,drive=<drive_id>,bus=<bus_name>,nsid=<nsid>,\
+ * zoned=<true|false[optional]>
*
* Note cmb_size_mb denotes size of CMB in MB. CMB is assumed to be at
* offset 0 in BAR2 and supports only WDS, RDS and SQS for now.
@@ -41,14 +42,50 @@
* ~~~~~~~~~~~~~~~~~~~~~~
* - `aerl`
* The Asynchronous Event Request Limit (AERL). Indicates the maximum number
- * of concurrently outstanding Asynchronous Event Request commands suppoert
+ * of concurrently outstanding Asynchronous Event Request commands support
* by the controller. This is a 0's based value.
*
* - `aer_max_queued`
* This is the maximum number of events that the device will enqueue for
- * completion when there are no oustanding AERs. When the maximum number of
+ * completion when there are no outstanding AERs. When the maximum number of
* enqueued events are reached, subsequent events will be dropped.
*
+ * - `zoned.append_size_limit`
+ * The maximum I/O size in bytes that is allowed in Zone Append command.
+ * The default is 128KiB. Since internally this this value is maintained as
+ * ZASL = log2(<maximum append size> / <page size>), some values assigned
+ * to this property may be rounded down and result in a lower maximum ZA
+ * data size being in effect. By setting this property to 0, users can make
+ * ZASL to be equal to MDTS. This property only affects zoned namespaces.
+ *
+ * Setting `zoned` to true selects Zoned Command Set at the namespace.
+ * In this case, the following namespace properties are available to configure
+ * zoned operation:
+ * zoned.zsze=<zone size in bytes, default: 128MiB>
+ * The number may be followed by K, M, G as in kilo-, mega- or giga-.
+ *
+ * zoned.zcap=<zone capacity in bytes, default: zone size>
+ * The value 0 (default) forces zone capacity to be the same as zone
+ * size. The value of this property may not exceed zone size.
+ *
+ * zoned.descr_ext_size=<zone descriptor extension size, default 0>
+ * This value needs to be specified in 64B units. If it is zero,
+ * namespace(s) will not support zone descriptor extensions.
+ *
+ * zoned.max_active=<Maximum Active Resources (zones), default: 0>
+ * The default value means there is no limit to the number of
+ * concurrently active zones.
+ *
+ * zoned.max_open=<Maximum Open Resources (zones), default: 0>
+ * The default value means there is no limit to the number of
+ * concurrently open zones.
+ *
+ * zoned.offline_zones=<the number of offline zones to inject, default: 0>
+ *
+ * zoned.rdonly_zones=<the number of read-only zones to inject, default: 0>
+ *
+ * zoned.cross_zone_read=<enable RAZB, default: false>
+ * Setting this property to true enables Read Across Zone Boundaries.
*/
#include "qemu/osdep.h"
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v11 08/13] block/nvme: Make ZNS-related definitions
2020-12-08 20:04 ` [PATCH v11 08/13] block/nvme: Make ZNS-related definitions Dmitry Fomichev
@ 2020-12-09 6:37 ` Klaus Jensen
2020-12-15 16:28 ` Stefan Hajnoczi
0 siblings, 1 reply; 21+ messages in thread
From: Klaus Jensen @ 2020-12-09 6:37 UTC (permalink / raw)
To: Dmitry Fomichev
Cc: Kevin Wolf, Fam Zheng, Damien Le Moal, qemu-block, Niklas Cassel,
Klaus Jensen, qemu-devel, Maxim Levitsky, Alistair Francis,
Stefan Hajnoczi, Keith Busch, Max Reitz,
Philippe Mathieu-Daudé,
Matias Bjorling
[-- Attachment #1: Type: text/plain, Size: 7302 bytes --]
CC for Stefan (nvme block driver co-maintainer).
On Dec 9 05:04, Dmitry Fomichev wrote:
> Define values and structures that are needed to support Zoned
> Namespace Command Set (NVMe TP 4053).
>
> Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
> ---
> include/block/nvme.h | 114 ++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 113 insertions(+), 1 deletion(-)
>
> diff --git a/include/block/nvme.h b/include/block/nvme.h
> index 29d826ab19..a9165402d6 100644
> --- a/include/block/nvme.h
> +++ b/include/block/nvme.h
> @@ -489,6 +489,9 @@ enum NvmeIoCommands {
> NVME_CMD_COMPARE = 0x05,
> NVME_CMD_WRITE_ZEROES = 0x08,
> NVME_CMD_DSM = 0x09,
> + NVME_CMD_ZONE_MGMT_SEND = 0x79,
> + NVME_CMD_ZONE_MGMT_RECV = 0x7a,
> + NVME_CMD_ZONE_APPEND = 0x7d,
> };
>
> typedef struct QEMU_PACKED NvmeDeleteQ {
> @@ -648,9 +651,13 @@ typedef struct QEMU_PACKED NvmeAerResult {
> uint8_t resv;
> } NvmeAerResult;
>
> +typedef struct QEMU_PACKED NvmeZonedResult {
> + uint64_t slba;
> +} NvmeZonedResult;
> +
> typedef struct QEMU_PACKED NvmeCqe {
> uint32_t result;
> - uint32_t rsvd;
> + uint32_t dw1;
> uint16_t sq_head;
> uint16_t sq_id;
> uint16_t cid;
> @@ -679,6 +686,7 @@ enum NvmeStatusCodes {
> NVME_INVALID_USE_OF_CMB = 0x0012,
> NVME_INVALID_PRP_OFFSET = 0x0013,
> NVME_CMD_SET_CMB_REJECTED = 0x002b,
> + NVME_INVALID_CMD_SET = 0x002c,
> NVME_LBA_RANGE = 0x0080,
> NVME_CAP_EXCEEDED = 0x0081,
> NVME_NS_NOT_READY = 0x0082,
> @@ -703,6 +711,14 @@ enum NvmeStatusCodes {
> NVME_CONFLICTING_ATTRS = 0x0180,
> NVME_INVALID_PROT_INFO = 0x0181,
> NVME_WRITE_TO_RO = 0x0182,
> + NVME_ZONE_BOUNDARY_ERROR = 0x01b8,
> + NVME_ZONE_FULL = 0x01b9,
> + NVME_ZONE_READ_ONLY = 0x01ba,
> + NVME_ZONE_OFFLINE = 0x01bb,
> + NVME_ZONE_INVALID_WRITE = 0x01bc,
> + NVME_ZONE_TOO_MANY_ACTIVE = 0x01bd,
> + NVME_ZONE_TOO_MANY_OPEN = 0x01be,
> + NVME_ZONE_INVAL_TRANSITION = 0x01bf,
> NVME_WRITE_FAULT = 0x0280,
> NVME_UNRECOVERED_READ = 0x0281,
> NVME_E2E_GUARD_ERROR = 0x0282,
> @@ -888,6 +904,11 @@ typedef struct QEMU_PACKED NvmeIdCtrl {
> uint8_t vs[1024];
> } NvmeIdCtrl;
>
> +typedef struct NvmeIdCtrlZoned {
> + uint8_t zasl;
> + uint8_t rsvd1[4095];
> +} NvmeIdCtrlZoned;
> +
> enum NvmeIdCtrlOacs {
> NVME_OACS_SECURITY = 1 << 0,
> NVME_OACS_FORMAT = 1 << 1,
> @@ -1016,6 +1037,12 @@ typedef struct QEMU_PACKED NvmeLBAF {
> uint8_t rp;
> } NvmeLBAF;
>
> +typedef struct QEMU_PACKED NvmeLBAFE {
> + uint64_t zsze;
> + uint8_t zdes;
> + uint8_t rsvd9[7];
> +} NvmeLBAFE;
> +
> #define NVME_NSID_BROADCAST 0xffffffff
>
> typedef struct QEMU_PACKED NvmeIdNs {
> @@ -1075,10 +1102,24 @@ enum NvmeNsIdentifierType {
>
> enum NvmeCsi {
> NVME_CSI_NVM = 0x00,
> + NVME_CSI_ZONED = 0x02,
> };
>
> #define NVME_SET_CSI(vec, csi) (vec |= (uint8_t)(1 << (csi)))
>
> +typedef struct QEMU_PACKED NvmeIdNsZoned {
> + uint16_t zoc;
> + uint16_t ozcs;
> + uint32_t mar;
> + uint32_t mor;
> + uint32_t rrl;
> + uint32_t frl;
> + uint8_t rsvd20[2796];
> + NvmeLBAFE lbafe[16];
> + uint8_t rsvd3072[768];
> + uint8_t vs[256];
> +} NvmeIdNsZoned;
> +
> /*Deallocate Logical Block Features*/
> #define NVME_ID_NS_DLFEAT_GUARD_CRC(dlfeat) ((dlfeat) & 0x10)
> #define NVME_ID_NS_DLFEAT_WRITE_ZEROES(dlfeat) ((dlfeat) & 0x08)
> @@ -1111,10 +1152,76 @@ enum NvmeIdNsDps {
> DPS_FIRST_EIGHT = 8,
> };
>
> +enum NvmeZoneAttr {
> + NVME_ZA_FINISHED_BY_CTLR = 1 << 0,
> + NVME_ZA_FINISH_RECOMMENDED = 1 << 1,
> + NVME_ZA_RESET_RECOMMENDED = 1 << 2,
> + NVME_ZA_ZD_EXT_VALID = 1 << 7,
> +};
> +
> +typedef struct QEMU_PACKED NvmeZoneReportHeader {
> + uint64_t nr_zones;
> + uint8_t rsvd[56];
> +} NvmeZoneReportHeader;
> +
> +enum NvmeZoneReceiveAction {
> + NVME_ZONE_REPORT = 0,
> + NVME_ZONE_REPORT_EXTENDED = 1,
> +};
> +
> +enum NvmeZoneReportType {
> + NVME_ZONE_REPORT_ALL = 0,
> + NVME_ZONE_REPORT_EMPTY = 1,
> + NVME_ZONE_REPORT_IMPLICITLY_OPEN = 2,
> + NVME_ZONE_REPORT_EXPLICITLY_OPEN = 3,
> + NVME_ZONE_REPORT_CLOSED = 4,
> + NVME_ZONE_REPORT_FULL = 5,
> + NVME_ZONE_REPORT_READ_ONLY = 6,
> + NVME_ZONE_REPORT_OFFLINE = 7,
> +};
> +
> +enum NvmeZoneType {
> + NVME_ZONE_TYPE_RESERVED = 0x00,
> + NVME_ZONE_TYPE_SEQ_WRITE = 0x02,
> +};
> +
> +enum NvmeZoneSendAction {
> + NVME_ZONE_ACTION_RSD = 0x00,
> + NVME_ZONE_ACTION_CLOSE = 0x01,
> + NVME_ZONE_ACTION_FINISH = 0x02,
> + NVME_ZONE_ACTION_OPEN = 0x03,
> + NVME_ZONE_ACTION_RESET = 0x04,
> + NVME_ZONE_ACTION_OFFLINE = 0x05,
> + NVME_ZONE_ACTION_SET_ZD_EXT = 0x10,
> +};
> +
> +typedef struct QEMU_PACKED NvmeZoneDescr {
> + uint8_t zt;
> + uint8_t zs;
> + uint8_t za;
> + uint8_t rsvd3[5];
> + uint64_t zcap;
> + uint64_t zslba;
> + uint64_t wp;
> + uint8_t rsvd32[32];
> +} NvmeZoneDescr;
> +
> +enum NvmeZoneState {
> + NVME_ZONE_STATE_RESERVED = 0x00,
> + NVME_ZONE_STATE_EMPTY = 0x01,
> + NVME_ZONE_STATE_IMPLICITLY_OPEN = 0x02,
> + NVME_ZONE_STATE_EXPLICITLY_OPEN = 0x03,
> + NVME_ZONE_STATE_CLOSED = 0x04,
> + NVME_ZONE_STATE_READ_ONLY = 0x0D,
> + NVME_ZONE_STATE_FULL = 0x0E,
> + NVME_ZONE_STATE_OFFLINE = 0x0F,
> +};
> +
> static inline void _nvme_check_size(void)
> {
> QEMU_BUILD_BUG_ON(sizeof(NvmeBar) != 4096);
> QEMU_BUILD_BUG_ON(sizeof(NvmeAerResult) != 4);
> + QEMU_BUILD_BUG_ON(sizeof(NvmeZonedResult) != 8);
> QEMU_BUILD_BUG_ON(sizeof(NvmeCqe) != 16);
> QEMU_BUILD_BUG_ON(sizeof(NvmeDsmRange) != 16);
> QEMU_BUILD_BUG_ON(sizeof(NvmeCmd) != 64);
> @@ -1130,8 +1237,13 @@ static inline void _nvme_check_size(void)
> QEMU_BUILD_BUG_ON(sizeof(NvmeSmartLog) != 512);
> QEMU_BUILD_BUG_ON(sizeof(NvmeEffectsLog) != 4096);
> QEMU_BUILD_BUG_ON(sizeof(NvmeIdCtrl) != 4096);
> + QEMU_BUILD_BUG_ON(sizeof(NvmeIdCtrlZoned) != 4096);
> + QEMU_BUILD_BUG_ON(sizeof(NvmeLBAF) != 4);
> + QEMU_BUILD_BUG_ON(sizeof(NvmeLBAFE) != 16);
> QEMU_BUILD_BUG_ON(sizeof(NvmeIdNs) != 4096);
> + QEMU_BUILD_BUG_ON(sizeof(NvmeIdNsZoned) != 4096);
> QEMU_BUILD_BUG_ON(sizeof(NvmeSglDescriptor) != 16);
> QEMU_BUILD_BUG_ON(sizeof(NvmeIdNsDescr) != 4);
> + QEMU_BUILD_BUG_ON(sizeof(NvmeZoneDescr) != 64);
> }
> #endif
> --
> 2.28.0
>
>
--
One of us - No more doubt, silence or taboo about mental illness.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (12 preceding siblings ...)
2020-12-08 20:04 ` [PATCH v11 13/13] hw/block/nvme: Document zoned parameters in usage text Dmitry Fomichev
@ 2020-12-09 9:57 ` Klaus Jensen
2020-12-10 19:25 ` Dmitry Fomichev
2021-01-08 6:51 ` Klaus Jensen
2020-12-16 0:23 ` Keith Busch
14 siblings, 2 replies; 21+ messages in thread
From: Klaus Jensen @ 2020-12-09 9:57 UTC (permalink / raw)
To: Dmitry Fomichev
Cc: Kevin Wolf, Fam Zheng, Damien Le Moal, qemu-block, Niklas Cassel,
Klaus Jensen, qemu-devel, Maxim Levitsky, Alistair Francis,
Keith Busch, Max Reitz, Philippe Mathieu-Daudé,
Matias Bjorling
[-- Attachment #1: Type: text/plain, Size: 11874 bytes --]
Hi Dmitry,
By and large, this looks OK to me. There are still some issues here and
there, and some comments of mine that you did not address, but I will
follow up with patches to fix that. Let's get this merged.
It looks like the nvme-next you rebased on is slightly old and missing
two commits:
"hw/block/nvme: remove superfluous NvmeCtrl parameter" and
"hw/block/nvme: pull aio error handling"
It caused a couple of conflicts, but nothing that I couldn't fix up.
Since I didn't manage to convince anyone about the zsze and zcap
parameters being in terms of LBAs, I'll revert that to be
'zoned.zone_size' and 'zoned.zone_capacity'.
Finally, would you accept that we skip "hw/block/nvme: Add injection of
Offline/Read-Only zones" for now? I'd like to discuss it a bit since I
think the random injects feels a bit ad-hoc. Back when I did OCSSD
emulation with Hans, we did something like this for setting up state
through a descriptor text file - I think we should explore something
like that before we lock down the two parameters. I'll amend the final
documentation commit to not include those parameters.
Sounds good?
Otherwise, I think this is mergeable to nvme-next. So, for the series
(excluding "hw/block/nvme: Add injection of Offline/Read-Only zones"):
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
On Dec 9 05:03, Dmitry Fomichev wrote:
> v10 -> v11:
>
> - Address review comments by Klaus.
>
> - Add a patch to separate the handling of controller reset
> and subsystem shutdown. Place the patch at the beginning
> of the series so it can be picked up separately.
>
> - Rebase on the current nvme-next branch.
>
> v9 -> v10:
>
> - Correctly check for MDTS in Zone Management Receive handler.
>
> - Change Klaus' "Reviewed-by" email in UUID patch.
>
> v8 -> v9:
>
> - Move the modifications to "include/block/nvme.h" made to
> introduce ZNS-related definitions to a separate patch.
>
> - Add a new struct, NvmeZonedResult, along the same lines as the
> existing NvmeAerResult, to carry Zone Append LBA returned to
> the host. Now, there is no need to modify NvmeCqe struct except
> renaming DW1 field from "rsvd" to "dw1".
>
> - Add check for MDTS in Zone Management Receive handler.
>
> - Remove checks for ns->attached since the value of this flag
> is always true for now.
>
> - Rebase to the current quemu-nvme/nvme-next branch.
>
> v7 -> v8:
>
> - Move refactoring commits to the front of the series.
>
> - Remove "attached" and "fill_pattern" device properties.
>
> - Only close open zones upon subsystem shutdown, not when CC.EN flag
> is set to 0. Avoid looping through all zones by iterating through
> lists of open and closed zones.
>
> - Improve bulk processing of zones aka zoned operations with "all"
> flag set. Avoid looping through the entire zone array for all zone
> operations except Offline Zone.
>
> - Prefix ZNS-related property names with "zoned.". The "zoned" Boolean
> property is retained to turn on zoned command set as it is much more
> intuitive and user-friendly compared to setting a magic number value
> to csi property.
>
> - Address review comments.
>
> - Remove unused trace events.
>
> v6 -> v7:
>
> - Introduce ns->iocs initialization function earlier in the series,
> in CSE Log patch.
>
> - Set NVM iocs for zoned namespaces when CC.CSS is set to
> NVME_CC_CSS_NVM.
>
> - Clean up code in CSE log handler.
>
> v5 -> v6:
>
> - Remove zoned state persistence code. Replace position-independent
> zone lists with QTAILQs.
>
> - Close all open zones upon clearing of the controller. This is
> a similar procedure to the one previously performed upon powering
> up with zone persistence.
>
> - Squash NS Types and ZNS triplets of commits to keep definitions
> and trace event definitions together with the implementation code.
>
> - Move namespace UUID generation to a separate patch. Add the new
> "uuid" property as suggested by Klaus.
>
> - Rework Commands and Effects patch to make sure that the log is
> always in sync with the actual set of commands supported.
>
> - Add two refactoring commits at the end of the series to
> optimize read and write i/o path.
>
> - Incorporate feedback from Keith, Klaus and Niklas:
>
> * fix rebase errors in nvme_identify_ns_descr_list()
> * remove unnecessary code from nvme_write_bar()
> * move csi to NvmeNamespace and use it from the beginning in NSTypes
> patch
> * change zone read processing to cover all corner cases with RAZB=1
> * sync w_ptr and d.wp in case of a i/o error at the preceding zone
> * reword the commit message in active/inactive patch with the new
> text from Niklas
> * correct dlfeat reporting depending on the fill pattern set
> * add more checks for "attached" n/s parameter to prevent i/o and
> get/set features on inactive namespaces
> * Use DEFINE_PROP_SIZE and DEFINE_PROP_SIZE32 for zone size/capacity
> and ZASL respectively
> * Improve zone size and capacity validation
> * Correctly report NSZE
>
> v4 -> v5:
>
> - Rebase to the current qemu-nvme.
>
> - Use HostMemoryBackendFile as the backing storage for persistent
> zone metadata.
>
> - Fix the issue with filling the valid data in the next zone if RAZB
> is enabled.
>
> v3 -> v4:
>
> - Fix bugs introduced in v2/v3 for QD > 1 operation. Now, all writes
> to a zone happen at the new write pointer variable, zone->w_ptr,
> that is advanced right after submitting the backend i/o. The existing
> zone->d.wp variable is updated upon the successful write completion
> and it is used for zone reporting. Some code has been split from
> nvme_finalize_zoned_write() function to a new function,
> nvme_advance_zone_wp().
>
> - Make the code compile under mingw. Switch to using QEMU API for
> mmap/msync, i.e. memory_region...(). Since mmap is not available in
> mingw (even though there is mman-win32 library available on Github),
> conditional compilation is added around these calls to avoid
> undefined symbols under mingw. A better fix would be to add stub
> functions to softmmu/memory.c for the case when CONFIG_POSIX is not
> defined, but such change is beyond the scope of this patchset and it
> can be made in a separate patch.
>
> - Correct permission mask used to open zone metadata file.
>
> - Fold "Define 64 bit cqe.result" patch into ZNS commit.
>
> - Use clz64/clz32 instead of defining nvme_ilog2() function.
>
> - Simplify rpt_empty_id_struct() code, move nvme_fill_data() back
> to ZNS patch.
>
> - Fix a power-on processing bug.
>
> - Rename NVME_CMD_ZONE_APND to NVME_CMD_ZONE_APPEND.
>
> - Make the list of review comments addressed in v2 of the series
> (see below).
>
> v2 -> v3:
>
> - Moved nvme_fill_data() function to the NSTypes patch as it is
> now used there to output empty namespace identify structs.
> - Fixed typo in Maxim's email address.
>
> v1 -> v2:
>
> - Rebased on top of qemu-nvme/next branch.
> - Incorporated feedback from Klaus and Alistair.
> * Allow a subset of CSE log to be read, not the entire log
> * Assign admin command entries in CSE log to ACS fields
> * Set LPA bit 1 to indicate support of CSE log page
> * Rename CC.CSS value CSS_ALL_NSTYPES (110b) to CSS_CSI
> * Move the code to assign lbaf.ds to a separate patch
> * Remove the change in firmware revision
> * Change "driver" to "device" in comments and annotations
> * Rename ZAMDS to ZASL
> * Correct a few format expressions and some wording in
> trace event definitions
> * Remove validation code to return NVME_CAP_EXCEEDED error
> * Make ZASL to be equal to MDTS if "zone_append_size_limit"
> module parameter is not set
> * Clean up nvme_zoned_init_ctrl() to make size calculations
> less confusing
> * Avoid changing module parameters, use separate n/s variables
> if additional calculations are necessary to convert parameters
> to running values
> * Use NVME_DEFAULT_ZONE_SIZE to assign the default zone size value
> * Use default 0 for zone capacity meaning that zone capacity will
> be equal to zone size by default
> * Issue warnings if user MAR/MOR values are too large and have
> to be adjusted
> * Use unsigned values for MAR/MOR
> - Dropped "Simulate Zone Active excursions" patch.
> Excursion behavior may depend on the internal controller
> architecture and therefore be vendor-specific.
> - Dropped support for Zone Attributes and zoned AENs for now.
> These features can be added in a future series.
> - NS Types support is extended to handle active/inactive namespaces.
> - Update the write pointer after backing storage I/O completion, not
> before. This makes the emulation to run correctly in case of
> backing device failures.
> - Avoid division in the I/O path if the device zone size is
> a power of two (the most common case). Zone index then can be
> calculated by using bit shift.
> - A few reported bugs have been fixed.
> - Indentation in function definitions has been changed to make it
> the same as the rest of the code.
>
>
> Zoned Namespace (ZNS) Command Set is a newly introduced command set
> published by the NVM Express, Inc. organization as TP 4053. The main
> design goals of ZNS are to provide hardware designers the means to
> reduce NVMe controller complexity and to allow achieving a better I/O
> latency and throughput. SSDs that implement this interface are
> commonly known as ZNS SSDs.
>
> This command set is implementing a zoned storage model, similarly to
> ZAC/ZBC. As such, there is already support in Linux, allowing one to
> perform the majority of tasks needed for managing ZNS SSDs.
>
> The Zoned Namespace Command Set relies on another TP, known as
> Namespace Types (NVMe TP 4056), which introduces support for having
> multiple command sets per namespace.
>
> Both ZNS and Namespace Types specifications can be downloaded by
> visiting the following link -
>
> https://nvmexpress.org/wp-content/uploads/NVM-Express-1.4-Ratified-TPs.zip
>
> This patch series adds Namespace Types support and zoned namespace
> emulation capability to the existing NVMe PCI device.
>
>
> Based-on: <20201104102248.32168-1-its@irrelevant.dk>
> Dmitry Fomichev (11):
> hw/block/nvme: Process controller reset and shutdown differently
> hw/block/nvme: Generate namespace UUIDs
> hw/block/nvme: Separate read and write handlers
> hw/block/nvme: Combine nvme_write_zeroes() and nvme_write()
> hw/block/nvme: Add Commands Supported and Effects log
> block/nvme: Make ZNS-related definitions
> hw/block/nvme: Support Zoned Namespace Command Set
> hw/block/nvme: Introduce max active and open zone limits
> hw/block/nvme: Support Zone Descriptor Extensions
> hw/block/nvme: Add injection of Offline/Read-Only zones
> hw/block/nvme: Document zoned parameters in usage text
>
> Niklas Cassel (2):
> hw/block/nvme: Add support for Namespace Types
> hw/block/nvme: Support allocated CNS command variants
>
> hw/block/nvme-ns.h | 108 +++-
> hw/block/nvme.h | 6 +
> include/block/nvme.h | 201 +++++-
> hw/block/nvme-ns.c | 271 +++++++-
> hw/block/nvme.c | 1432 ++++++++++++++++++++++++++++++++++++++---
> hw/block/trace-events | 32 +-
> 6 files changed, 1927 insertions(+), 123 deletions(-)
>
> --
> 2.28.0
>
>
--
One of us - No more doubt, silence or taboo about mental illness.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set
2020-12-09 9:57 ` [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Klaus Jensen
@ 2020-12-10 19:25 ` Dmitry Fomichev
2020-12-11 6:37 ` Klaus Jensen
2021-01-08 6:51 ` Klaus Jensen
1 sibling, 1 reply; 21+ messages in thread
From: Dmitry Fomichev @ 2020-12-10 19:25 UTC (permalink / raw)
To: Klaus Jensen
Cc: Kevin Wolf, Fam Zheng, Damien Le Moal, qemu-block, Niklas Cassel,
Klaus Jensen, qemu-devel, Maxim Levitsky, Alistair Francis,
Keith Busch, Max Reitz, Philippe Mathieu-Daudé,
Matias Bjorling
> -----Original Message-----
> From: Klaus Jensen <its@irrelevant.dk>
> Sent: Wednesday, December 9, 2020 4:58 AM
> To: Dmitry Fomichev <Dmitry.Fomichev@wdc.com>
> Cc: Keith Busch <kbusch@kernel.org>; Klaus Jensen
> <k.jensen@samsung.com>; Kevin Wolf <kwolf@redhat.com>; Philippe
> Mathieu-Daudé <philmd@redhat.com>; Max Reitz <mreitz@redhat.com>;
> Maxim Levitsky <mlevitsk@redhat.com>; Fam Zheng <fam@euphon.net>;
> Niklas Cassel <Niklas.Cassel@wdc.com>; Damien Le Moal
> <Damien.LeMoal@wdc.com>; qemu-block@nongnu.org; qemu-
> devel@nongnu.org; Alistair Francis <Alistair.Francis@wdc.com>; Matias
> Bjorling <Matias.Bjorling@wdc.com>
> Subject: Re: [PATCH v11 00/13] hw/block/nvme: Support Namespace Types
> and Zoned Namespace Command Set
>
> Hi Dmitry,
>
> By and large, this looks OK to me. There are still some issues here and
> there, and some comments of mine that you did not address, but I will
> follow up with patches to fix that. Let's get this merged.
>
> It looks like the nvme-next you rebased on is slightly old and missing
> two commits:
>
> "hw/block/nvme: remove superfluous NvmeCtrl parameter" and
> "hw/block/nvme: pull aio error handling"
>
> It caused a couple of conflicts, but nothing that I couldn't fix up.
>
> Since I didn't manage to convince anyone about the zsze and zcap
> parameters being in terms of LBAs, I'll revert that to be
> 'zoned.zone_size' and 'zoned.zone_capacity'.
>
> Finally, would you accept that we skip "hw/block/nvme: Add injection of
> Offline/Read-Only zones" for now? I'd like to discuss it a bit since I
> think the random injects feels a bit ad-hoc. Back when I did OCSSD
> emulation with Hans, we did something like this for setting up state
> through a descriptor text file - I think we should explore something
> like that before we lock down the two parameters. I'll amend the final
> documentation commit to not include those parameters.
>
> Sounds good?
Klaus,
Sounds great! Sure, we can leave out the injection patch. It was made
to increase our internal test coverage, but it is not ideal. Since the zones
are injected randomly, there is no consistency between test runs and
it is impossible to reliably create many specific test cases (e.g. the first or
the last zone is offline). The descriptor input file seems like a much more
flexible and capable approach. If you have something in works, I'll be
happy to discuss or review.
Thank you for your very thorough reviews!
Cheers,
Dmitry
>
> Otherwise, I think this is mergeable to nvme-next. So, for the series
> (excluding "hw/block/nvme: Add injection of Offline/Read-Only zones"):
>
> Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
>
> On Dec 9 05:03, Dmitry Fomichev wrote:
> > v10 -> v11:
> >
> > - Address review comments by Klaus.
> >
> > - Add a patch to separate the handling of controller reset
> > and subsystem shutdown. Place the patch at the beginning
> > of the series so it can be picked up separately.
> >
> > - Rebase on the current nvme-next branch.
> >
> > v9 -> v10:
> >
> > - Correctly check for MDTS in Zone Management Receive handler.
> >
> > - Change Klaus' "Reviewed-by" email in UUID patch.
> >
> > v8 -> v9:
> >
> > - Move the modifications to "include/block/nvme.h" made to
> > introduce ZNS-related definitions to a separate patch.
> >
> > - Add a new struct, NvmeZonedResult, along the same lines as the
> > existing NvmeAerResult, to carry Zone Append LBA returned to
> > the host. Now, there is no need to modify NvmeCqe struct except
> > renaming DW1 field from "rsvd" to "dw1".
> >
> > - Add check for MDTS in Zone Management Receive handler.
> >
> > - Remove checks for ns->attached since the value of this flag
> > is always true for now.
> >
> > - Rebase to the current quemu-nvme/nvme-next branch.
> >
> > v7 -> v8:
> >
> > - Move refactoring commits to the front of the series.
> >
> > - Remove "attached" and "fill_pattern" device properties.
> >
> > - Only close open zones upon subsystem shutdown, not when CC.EN flag
> > is set to 0. Avoid looping through all zones by iterating through
> > lists of open and closed zones.
> >
> > - Improve bulk processing of zones aka zoned operations with "all"
> > flag set. Avoid looping through the entire zone array for all zone
> > operations except Offline Zone.
> >
> > - Prefix ZNS-related property names with "zoned.". The "zoned" Boolean
> > property is retained to turn on zoned command set as it is much more
> > intuitive and user-friendly compared to setting a magic number value
> > to csi property.
> >
> > - Address review comments.
> >
> > - Remove unused trace events.
> >
> > v6 -> v7:
> >
> > - Introduce ns->iocs initialization function earlier in the series,
> > in CSE Log patch.
> >
> > - Set NVM iocs for zoned namespaces when CC.CSS is set to
> > NVME_CC_CSS_NVM.
> >
> > - Clean up code in CSE log handler.
> >
> > v5 -> v6:
> >
> > - Remove zoned state persistence code. Replace position-independent
> > zone lists with QTAILQs.
> >
> > - Close all open zones upon clearing of the controller. This is
> > a similar procedure to the one previously performed upon powering
> > up with zone persistence.
> >
> > - Squash NS Types and ZNS triplets of commits to keep definitions
> > and trace event definitions together with the implementation code.
> >
> > - Move namespace UUID generation to a separate patch. Add the new
> > "uuid" property as suggested by Klaus.
> >
> > - Rework Commands and Effects patch to make sure that the log is
> > always in sync with the actual set of commands supported.
> >
> > - Add two refactoring commits at the end of the series to
> > optimize read and write i/o path.
> >
> > - Incorporate feedback from Keith, Klaus and Niklas:
> >
> > * fix rebase errors in nvme_identify_ns_descr_list()
> > * remove unnecessary code from nvme_write_bar()
> > * move csi to NvmeNamespace and use it from the beginning in NSTypes
> > patch
> > * change zone read processing to cover all corner cases with RAZB=1
> > * sync w_ptr and d.wp in case of a i/o error at the preceding zone
> > * reword the commit message in active/inactive patch with the new
> > text from Niklas
> > * correct dlfeat reporting depending on the fill pattern set
> > * add more checks for "attached" n/s parameter to prevent i/o and
> > get/set features on inactive namespaces
> > * Use DEFINE_PROP_SIZE and DEFINE_PROP_SIZE32 for zone
> size/capacity
> > and ZASL respectively
> > * Improve zone size and capacity validation
> > * Correctly report NSZE
> >
> > v4 -> v5:
> >
> > - Rebase to the current qemu-nvme.
> >
> > - Use HostMemoryBackendFile as the backing storage for persistent
> > zone metadata.
> >
> > - Fix the issue with filling the valid data in the next zone if RAZB
> > is enabled.
> >
> > v3 -> v4:
> >
> > - Fix bugs introduced in v2/v3 for QD > 1 operation. Now, all writes
> > to a zone happen at the new write pointer variable, zone->w_ptr,
> > that is advanced right after submitting the backend i/o. The existing
> > zone->d.wp variable is updated upon the successful write completion
> > and it is used for zone reporting. Some code has been split from
> > nvme_finalize_zoned_write() function to a new function,
> > nvme_advance_zone_wp().
> >
> > - Make the code compile under mingw. Switch to using QEMU API for
> > mmap/msync, i.e. memory_region...(). Since mmap is not available in
> > mingw (even though there is mman-win32 library available on Github),
> > conditional compilation is added around these calls to avoid
> > undefined symbols under mingw. A better fix would be to add stub
> > functions to softmmu/memory.c for the case when CONFIG_POSIX is not
> > defined, but such change is beyond the scope of this patchset and it
> > can be made in a separate patch.
> >
> > - Correct permission mask used to open zone metadata file.
> >
> > - Fold "Define 64 bit cqe.result" patch into ZNS commit.
> >
> > - Use clz64/clz32 instead of defining nvme_ilog2() function.
> >
> > - Simplify rpt_empty_id_struct() code, move nvme_fill_data() back
> > to ZNS patch.
> >
> > - Fix a power-on processing bug.
> >
> > - Rename NVME_CMD_ZONE_APND to NVME_CMD_ZONE_APPEND.
> >
> > - Make the list of review comments addressed in v2 of the series
> > (see below).
> >
> > v2 -> v3:
> >
> > - Moved nvme_fill_data() function to the NSTypes patch as it is
> > now used there to output empty namespace identify structs.
> > - Fixed typo in Maxim's email address.
> >
> > v1 -> v2:
> >
> > - Rebased on top of qemu-nvme/next branch.
> > - Incorporated feedback from Klaus and Alistair.
> > * Allow a subset of CSE log to be read, not the entire log
> > * Assign admin command entries in CSE log to ACS fields
> > * Set LPA bit 1 to indicate support of CSE log page
> > * Rename CC.CSS value CSS_ALL_NSTYPES (110b) to CSS_CSI
> > * Move the code to assign lbaf.ds to a separate patch
> > * Remove the change in firmware revision
> > * Change "driver" to "device" in comments and annotations
> > * Rename ZAMDS to ZASL
> > * Correct a few format expressions and some wording in
> > trace event definitions
> > * Remove validation code to return NVME_CAP_EXCEEDED error
> > * Make ZASL to be equal to MDTS if "zone_append_size_limit"
> > module parameter is not set
> > * Clean up nvme_zoned_init_ctrl() to make size calculations
> > less confusing
> > * Avoid changing module parameters, use separate n/s variables
> > if additional calculations are necessary to convert parameters
> > to running values
> > * Use NVME_DEFAULT_ZONE_SIZE to assign the default zone size value
> > * Use default 0 for zone capacity meaning that zone capacity will
> > be equal to zone size by default
> > * Issue warnings if user MAR/MOR values are too large and have
> > to be adjusted
> > * Use unsigned values for MAR/MOR
> > - Dropped "Simulate Zone Active excursions" patch.
> > Excursion behavior may depend on the internal controller
> > architecture and therefore be vendor-specific.
> > - Dropped support for Zone Attributes and zoned AENs for now.
> > These features can be added in a future series.
> > - NS Types support is extended to handle active/inactive namespaces.
> > - Update the write pointer after backing storage I/O completion, not
> > before. This makes the emulation to run correctly in case of
> > backing device failures.
> > - Avoid division in the I/O path if the device zone size is
> > a power of two (the most common case). Zone index then can be
> > calculated by using bit shift.
> > - A few reported bugs have been fixed.
> > - Indentation in function definitions has been changed to make it
> > the same as the rest of the code.
> >
> >
> > Zoned Namespace (ZNS) Command Set is a newly introduced command set
> > published by the NVM Express, Inc. organization as TP 4053. The main
> > design goals of ZNS are to provide hardware designers the means to
> > reduce NVMe controller complexity and to allow achieving a better I/O
> > latency and throughput. SSDs that implement this interface are
> > commonly known as ZNS SSDs.
> >
> > This command set is implementing a zoned storage model, similarly to
> > ZAC/ZBC. As such, there is already support in Linux, allowing one to
> > perform the majority of tasks needed for managing ZNS SSDs.
> >
> > The Zoned Namespace Command Set relies on another TP, known as
> > Namespace Types (NVMe TP 4056), which introduces support for having
> > multiple command sets per namespace.
> >
> > Both ZNS and Namespace Types specifications can be downloaded by
> > visiting the following link -
> >
> > https://nvmexpress.org/wp-content/uploads/NVM-Express-1.4-Ratified-
> TPs.zip
> >
> > This patch series adds Namespace Types support and zoned namespace
> > emulation capability to the existing NVMe PCI device.
> >
> >
> > Based-on: <20201104102248.32168-1-its@irrelevant.dk>
> > Dmitry Fomichev (11):
> > hw/block/nvme: Process controller reset and shutdown differently
> > hw/block/nvme: Generate namespace UUIDs
> > hw/block/nvme: Separate read and write handlers
> > hw/block/nvme: Combine nvme_write_zeroes() and nvme_write()
> > hw/block/nvme: Add Commands Supported and Effects log
> > block/nvme: Make ZNS-related definitions
> > hw/block/nvme: Support Zoned Namespace Command Set
> > hw/block/nvme: Introduce max active and open zone limits
> > hw/block/nvme: Support Zone Descriptor Extensions
> > hw/block/nvme: Add injection of Offline/Read-Only zones
> > hw/block/nvme: Document zoned parameters in usage text
> >
> > Niklas Cassel (2):
> > hw/block/nvme: Add support for Namespace Types
> > hw/block/nvme: Support allocated CNS command variants
> >
> > hw/block/nvme-ns.h | 108 +++-
> > hw/block/nvme.h | 6 +
> > include/block/nvme.h | 201 +++++-
> > hw/block/nvme-ns.c | 271 +++++++-
> > hw/block/nvme.c | 1432
> ++++++++++++++++++++++++++++++++++++++---
> > hw/block/trace-events | 32 +-
> > 6 files changed, 1927 insertions(+), 123 deletions(-)
> >
> > --
> > 2.28.0
> >
> >
>
> --
> One of us - No more doubt, silence or taboo about mental illness.
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set
2020-12-10 19:25 ` Dmitry Fomichev
@ 2020-12-11 6:37 ` Klaus Jensen
0 siblings, 0 replies; 21+ messages in thread
From: Klaus Jensen @ 2020-12-11 6:37 UTC (permalink / raw)
To: Dmitry Fomichev
Cc: Kevin Wolf, Fam Zheng, Damien Le Moal, qemu-block, Niklas Cassel,
Klaus Jensen, qemu-devel, Max Reitz, Alistair Francis,
Keith Busch, Philippe Mathieu-Daudé,
Matias Bjorling
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On Dec 10 19:25, Dmitry Fomichev wrote:
> > -----Original Message-----
> > From: Klaus Jensen <its@irrelevant.dk>
> > Sent: Wednesday, December 9, 2020 4:58 AM
> > To: Dmitry Fomichev <Dmitry.Fomichev@wdc.com>
> > Cc: Keith Busch <kbusch@kernel.org>; Klaus Jensen
> > <k.jensen@samsung.com>; Kevin Wolf <kwolf@redhat.com>; Philippe
> > Mathieu-Daudé <philmd@redhat.com>; Max Reitz <mreitz@redhat.com>;
> > Maxim Levitsky <mlevitsk@redhat.com>; Fam Zheng <fam@euphon.net>;
> > Niklas Cassel <Niklas.Cassel@wdc.com>; Damien Le Moal
> > <Damien.LeMoal@wdc.com>; qemu-block@nongnu.org; qemu-
> > devel@nongnu.org; Alistair Francis <Alistair.Francis@wdc.com>; Matias
> > Bjorling <Matias.Bjorling@wdc.com>
> > Subject: Re: [PATCH v11 00/13] hw/block/nvme: Support Namespace Types
> > and Zoned Namespace Command Set
> >
> > Hi Dmitry,
> >
> > By and large, this looks OK to me. There are still some issues here and
> > there, and some comments of mine that you did not address, but I will
> > follow up with patches to fix that. Let's get this merged.
> >
> > It looks like the nvme-next you rebased on is slightly old and missing
> > two commits:
> >
> > "hw/block/nvme: remove superfluous NvmeCtrl parameter" and
> > "hw/block/nvme: pull aio error handling"
> >
> > It caused a couple of conflicts, but nothing that I couldn't fix up.
> >
> > Since I didn't manage to convince anyone about the zsze and zcap
> > parameters being in terms of LBAs, I'll revert that to be
> > 'zoned.zone_size' and 'zoned.zone_capacity'.
> >
> > Finally, would you accept that we skip "hw/block/nvme: Add injection of
> > Offline/Read-Only zones" for now? I'd like to discuss it a bit since I
> > think the random injects feels a bit ad-hoc. Back when I did OCSSD
> > emulation with Hans, we did something like this for setting up state
> > through a descriptor text file - I think we should explore something
> > like that before we lock down the two parameters. I'll amend the final
> > documentation commit to not include those parameters.
> >
> > Sounds good?
>
> Klaus,
>
> Sounds great! Sure, we can leave out the injection patch. It was made
> to increase our internal test coverage, but it is not ideal. Since the zones
> are injected randomly, there is no consistency between test runs and
> it is impossible to reliably create many specific test cases (e.g. the first or
> the last zone is offline).
Yes, exactly.
> The descriptor input file seems like a much more
> flexible and capable approach. If you have something in works, I'll be
> happy to discuss or review.
>
Sure, I'll rip some stuff from OCSSD and cook up a patch.
> Thank you for your very thorough reviews!
>
Thanks for contributing this.
Keith, you wanna take a look an give this an Ack or so?
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v11 08/13] block/nvme: Make ZNS-related definitions
2020-12-09 6:37 ` Klaus Jensen
@ 2020-12-15 16:28 ` Stefan Hajnoczi
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Hajnoczi @ 2020-12-15 16:28 UTC (permalink / raw)
To: Klaus Jensen
Cc: Kevin Wolf, Fam Zheng, Damien Le Moal, qemu-block, Niklas Cassel,
Dmitry Fomichev, Klaus Jensen, qemu-devel, Max Reitz,
Alistair Francis, Keith Busch, Maxim Levitsky,
Philippe Mathieu-Daudé,
Matias Bjorling
[-- Attachment #1: Type: text/plain, Size: 7842 bytes --]
On Wed, Dec 09, 2020 at 07:37:11AM +0100, Klaus Jensen wrote:
> CC for Stefan (nvme block driver co-maintainer).
>
> On Dec 9 05:04, Dmitry Fomichev wrote:
> > Define values and structures that are needed to support Zoned
> > Namespace Command Set (NVMe TP 4053).
> >
> > Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
> > ---
> > include/block/nvme.h | 114 ++++++++++++++++++++++++++++++++++++++++++-
> > 1 file changed, 113 insertions(+), 1 deletion(-)
> >
> > diff --git a/include/block/nvme.h b/include/block/nvme.h
> > index 29d826ab19..a9165402d6 100644
> > --- a/include/block/nvme.h
> > +++ b/include/block/nvme.h
> > @@ -489,6 +489,9 @@ enum NvmeIoCommands {
> > NVME_CMD_COMPARE = 0x05,
> > NVME_CMD_WRITE_ZEROES = 0x08,
> > NVME_CMD_DSM = 0x09,
> > + NVME_CMD_ZONE_MGMT_SEND = 0x79,
> > + NVME_CMD_ZONE_MGMT_RECV = 0x7a,
> > + NVME_CMD_ZONE_APPEND = 0x7d,
> > };
> >
> > typedef struct QEMU_PACKED NvmeDeleteQ {
> > @@ -648,9 +651,13 @@ typedef struct QEMU_PACKED NvmeAerResult {
> > uint8_t resv;
> > } NvmeAerResult;
> >
> > +typedef struct QEMU_PACKED NvmeZonedResult {
> > + uint64_t slba;
> > +} NvmeZonedResult;
> > +
> > typedef struct QEMU_PACKED NvmeCqe {
> > uint32_t result;
> > - uint32_t rsvd;
> > + uint32_t dw1;
> > uint16_t sq_head;
> > uint16_t sq_id;
> > uint16_t cid;
> > @@ -679,6 +686,7 @@ enum NvmeStatusCodes {
> > NVME_INVALID_USE_OF_CMB = 0x0012,
> > NVME_INVALID_PRP_OFFSET = 0x0013,
> > NVME_CMD_SET_CMB_REJECTED = 0x002b,
> > + NVME_INVALID_CMD_SET = 0x002c,
> > NVME_LBA_RANGE = 0x0080,
> > NVME_CAP_EXCEEDED = 0x0081,
> > NVME_NS_NOT_READY = 0x0082,
> > @@ -703,6 +711,14 @@ enum NvmeStatusCodes {
> > NVME_CONFLICTING_ATTRS = 0x0180,
> > NVME_INVALID_PROT_INFO = 0x0181,
> > NVME_WRITE_TO_RO = 0x0182,
> > + NVME_ZONE_BOUNDARY_ERROR = 0x01b8,
> > + NVME_ZONE_FULL = 0x01b9,
> > + NVME_ZONE_READ_ONLY = 0x01ba,
> > + NVME_ZONE_OFFLINE = 0x01bb,
> > + NVME_ZONE_INVALID_WRITE = 0x01bc,
> > + NVME_ZONE_TOO_MANY_ACTIVE = 0x01bd,
> > + NVME_ZONE_TOO_MANY_OPEN = 0x01be,
> > + NVME_ZONE_INVAL_TRANSITION = 0x01bf,
> > NVME_WRITE_FAULT = 0x0280,
> > NVME_UNRECOVERED_READ = 0x0281,
> > NVME_E2E_GUARD_ERROR = 0x0282,
> > @@ -888,6 +904,11 @@ typedef struct QEMU_PACKED NvmeIdCtrl {
> > uint8_t vs[1024];
> > } NvmeIdCtrl;
> >
> > +typedef struct NvmeIdCtrlZoned {
> > + uint8_t zasl;
> > + uint8_t rsvd1[4095];
> > +} NvmeIdCtrlZoned;
> > +
> > enum NvmeIdCtrlOacs {
> > NVME_OACS_SECURITY = 1 << 0,
> > NVME_OACS_FORMAT = 1 << 1,
> > @@ -1016,6 +1037,12 @@ typedef struct QEMU_PACKED NvmeLBAF {
> > uint8_t rp;
> > } NvmeLBAF;
> >
> > +typedef struct QEMU_PACKED NvmeLBAFE {
> > + uint64_t zsze;
> > + uint8_t zdes;
> > + uint8_t rsvd9[7];
> > +} NvmeLBAFE;
> > +
> > #define NVME_NSID_BROADCAST 0xffffffff
> >
> > typedef struct QEMU_PACKED NvmeIdNs {
> > @@ -1075,10 +1102,24 @@ enum NvmeNsIdentifierType {
> >
> > enum NvmeCsi {
> > NVME_CSI_NVM = 0x00,
> > + NVME_CSI_ZONED = 0x02,
> > };
> >
> > #define NVME_SET_CSI(vec, csi) (vec |= (uint8_t)(1 << (csi)))
> >
> > +typedef struct QEMU_PACKED NvmeIdNsZoned {
> > + uint16_t zoc;
> > + uint16_t ozcs;
> > + uint32_t mar;
> > + uint32_t mor;
> > + uint32_t rrl;
> > + uint32_t frl;
> > + uint8_t rsvd20[2796];
> > + NvmeLBAFE lbafe[16];
> > + uint8_t rsvd3072[768];
> > + uint8_t vs[256];
> > +} NvmeIdNsZoned;
> > +
> > /*Deallocate Logical Block Features*/
> > #define NVME_ID_NS_DLFEAT_GUARD_CRC(dlfeat) ((dlfeat) & 0x10)
> > #define NVME_ID_NS_DLFEAT_WRITE_ZEROES(dlfeat) ((dlfeat) & 0x08)
> > @@ -1111,10 +1152,76 @@ enum NvmeIdNsDps {
> > DPS_FIRST_EIGHT = 8,
> > };
> >
> > +enum NvmeZoneAttr {
> > + NVME_ZA_FINISHED_BY_CTLR = 1 << 0,
> > + NVME_ZA_FINISH_RECOMMENDED = 1 << 1,
> > + NVME_ZA_RESET_RECOMMENDED = 1 << 2,
> > + NVME_ZA_ZD_EXT_VALID = 1 << 7,
> > +};
> > +
> > +typedef struct QEMU_PACKED NvmeZoneReportHeader {
> > + uint64_t nr_zones;
> > + uint8_t rsvd[56];
> > +} NvmeZoneReportHeader;
> > +
> > +enum NvmeZoneReceiveAction {
> > + NVME_ZONE_REPORT = 0,
> > + NVME_ZONE_REPORT_EXTENDED = 1,
> > +};
> > +
> > +enum NvmeZoneReportType {
> > + NVME_ZONE_REPORT_ALL = 0,
> > + NVME_ZONE_REPORT_EMPTY = 1,
> > + NVME_ZONE_REPORT_IMPLICITLY_OPEN = 2,
> > + NVME_ZONE_REPORT_EXPLICITLY_OPEN = 3,
> > + NVME_ZONE_REPORT_CLOSED = 4,
> > + NVME_ZONE_REPORT_FULL = 5,
> > + NVME_ZONE_REPORT_READ_ONLY = 6,
> > + NVME_ZONE_REPORT_OFFLINE = 7,
> > +};
> > +
> > +enum NvmeZoneType {
> > + NVME_ZONE_TYPE_RESERVED = 0x00,
> > + NVME_ZONE_TYPE_SEQ_WRITE = 0x02,
> > +};
> > +
> > +enum NvmeZoneSendAction {
> > + NVME_ZONE_ACTION_RSD = 0x00,
> > + NVME_ZONE_ACTION_CLOSE = 0x01,
> > + NVME_ZONE_ACTION_FINISH = 0x02,
> > + NVME_ZONE_ACTION_OPEN = 0x03,
> > + NVME_ZONE_ACTION_RESET = 0x04,
> > + NVME_ZONE_ACTION_OFFLINE = 0x05,
> > + NVME_ZONE_ACTION_SET_ZD_EXT = 0x10,
> > +};
> > +
> > +typedef struct QEMU_PACKED NvmeZoneDescr {
> > + uint8_t zt;
> > + uint8_t zs;
> > + uint8_t za;
> > + uint8_t rsvd3[5];
> > + uint64_t zcap;
> > + uint64_t zslba;
> > + uint64_t wp;
> > + uint8_t rsvd32[32];
> > +} NvmeZoneDescr;
> > +
> > +enum NvmeZoneState {
> > + NVME_ZONE_STATE_RESERVED = 0x00,
> > + NVME_ZONE_STATE_EMPTY = 0x01,
> > + NVME_ZONE_STATE_IMPLICITLY_OPEN = 0x02,
> > + NVME_ZONE_STATE_EXPLICITLY_OPEN = 0x03,
> > + NVME_ZONE_STATE_CLOSED = 0x04,
> > + NVME_ZONE_STATE_READ_ONLY = 0x0D,
> > + NVME_ZONE_STATE_FULL = 0x0E,
> > + NVME_ZONE_STATE_OFFLINE = 0x0F,
> > +};
> > +
> > static inline void _nvme_check_size(void)
> > {
> > QEMU_BUILD_BUG_ON(sizeof(NvmeBar) != 4096);
> > QEMU_BUILD_BUG_ON(sizeof(NvmeAerResult) != 4);
> > + QEMU_BUILD_BUG_ON(sizeof(NvmeZonedResult) != 8);
> > QEMU_BUILD_BUG_ON(sizeof(NvmeCqe) != 16);
> > QEMU_BUILD_BUG_ON(sizeof(NvmeDsmRange) != 16);
> > QEMU_BUILD_BUG_ON(sizeof(NvmeCmd) != 64);
> > @@ -1130,8 +1237,13 @@ static inline void _nvme_check_size(void)
> > QEMU_BUILD_BUG_ON(sizeof(NvmeSmartLog) != 512);
> > QEMU_BUILD_BUG_ON(sizeof(NvmeEffectsLog) != 4096);
> > QEMU_BUILD_BUG_ON(sizeof(NvmeIdCtrl) != 4096);
> > + QEMU_BUILD_BUG_ON(sizeof(NvmeIdCtrlZoned) != 4096);
> > + QEMU_BUILD_BUG_ON(sizeof(NvmeLBAF) != 4);
> > + QEMU_BUILD_BUG_ON(sizeof(NvmeLBAFE) != 16);
> > QEMU_BUILD_BUG_ON(sizeof(NvmeIdNs) != 4096);
> > + QEMU_BUILD_BUG_ON(sizeof(NvmeIdNsZoned) != 4096);
> > QEMU_BUILD_BUG_ON(sizeof(NvmeSglDescriptor) != 16);
> > QEMU_BUILD_BUG_ON(sizeof(NvmeIdNsDescr) != 4);
> > + QEMU_BUILD_BUG_ON(sizeof(NvmeZoneDescr) != 64);
> > }
> > #endif
> > --
> > 2.28.0
> >
> >
>
> --
> One of us - No more doubt, silence or taboo about mental illness.
Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
` (13 preceding siblings ...)
2020-12-09 9:57 ` [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Klaus Jensen
@ 2020-12-16 0:23 ` Keith Busch
14 siblings, 0 replies; 21+ messages in thread
From: Keith Busch @ 2020-12-16 0:23 UTC (permalink / raw)
To: Dmitry Fomichev
Cc: Kevin Wolf, Fam Zheng, Damien Le Moal, qemu-block, Niklas Cassel,
Klaus Jensen, qemu-devel, Maxim Levitsky, Alistair Francis,
Max Reitz, Philippe Mathieu-Daudé,
Matias Bjorling
Hi Dmitry,
Looks good to me, thanks for sticking with it.
Reviewed-by: Keith Busch <kbusch@kernel.org>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set
2020-12-09 9:57 ` [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Klaus Jensen
2020-12-10 19:25 ` Dmitry Fomichev
@ 2021-01-08 6:51 ` Klaus Jensen
1 sibling, 0 replies; 21+ messages in thread
From: Klaus Jensen @ 2021-01-08 6:51 UTC (permalink / raw)
To: Dmitry Fomichev
Cc: Kevin Wolf, Fam Zheng, Damien Le Moal, qemu-block, Niklas Cassel,
Klaus Jensen, qemu-devel, Max Reitz, Alistair Francis,
Keith Busch, Philippe Mathieu-Daudé,
Matias Bjorling
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On Dec 9 10:57, Klaus Jensen wrote:
> Hi Dmitry,
>
> By and large, this looks OK to me. There are still some issues here and
> there, and some comments of mine that you did not address, but I will
> follow up with patches to fix that. Let's get this merged.
>
> It looks like the nvme-next you rebased on is slightly old and missing
> two commits:
>
> "hw/block/nvme: remove superfluous NvmeCtrl parameter" and
> "hw/block/nvme: pull aio error handling"
>
> It caused a couple of conflicts, but nothing that I couldn't fix up.
>
> Since I didn't manage to convince anyone about the zsze and zcap
> parameters being in terms of LBAs, I'll revert that to be
> 'zoned.zone_size' and 'zoned.zone_capacity'.
>
> Finally, would you accept that we skip "hw/block/nvme: Add injection of
> Offline/Read-Only zones" for now? I'd like to discuss it a bit since I
> think the random injects feels a bit ad-hoc. Back when I did OCSSD
> emulation with Hans, we did something like this for setting up state
> through a descriptor text file - I think we should explore something
> like that before we lock down the two parameters. I'll amend the final
> documentation commit to not include those parameters.
>
> Sounds good?
>
> Otherwise, I think this is mergeable to nvme-next. So, for the series
> (excluding "hw/block/nvme: Add injection of Offline/Read-Only zones"):
>
> Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
>
I've applied this series to my local nvme-next. Our repo host is
unavailable this morning (infradead.org), but I will push as soon as
possible.
Thanks!
Klaus
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^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2021-01-08 6:54 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-08 20:03 [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Dmitry Fomichev
2020-12-08 20:03 ` [PATCH v11 01/13] hw/block/nvme: Process controller reset and shutdown differently Dmitry Fomichev
2020-12-08 20:03 ` [PATCH v11 02/13] hw/block/nvme: Generate namespace UUIDs Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 03/13] hw/block/nvme: Separate read and write handlers Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 04/13] hw/block/nvme: Combine nvme_write_zeroes() and nvme_write() Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 05/13] hw/block/nvme: Add Commands Supported and Effects log Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 06/13] hw/block/nvme: Add support for Namespace Types Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 07/13] hw/block/nvme: Support allocated CNS command variants Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 08/13] block/nvme: Make ZNS-related definitions Dmitry Fomichev
2020-12-09 6:37 ` Klaus Jensen
2020-12-15 16:28 ` Stefan Hajnoczi
2020-12-08 20:04 ` [PATCH v11 09/13] hw/block/nvme: Support Zoned Namespace Command Set Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 10/13] hw/block/nvme: Introduce max active and open zone limits Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 11/13] hw/block/nvme: Support Zone Descriptor Extensions Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 12/13] hw/block/nvme: Add injection of Offline/Read-Only zones Dmitry Fomichev
2020-12-08 20:04 ` [PATCH v11 13/13] hw/block/nvme: Document zoned parameters in usage text Dmitry Fomichev
2020-12-09 9:57 ` [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set Klaus Jensen
2020-12-10 19:25 ` Dmitry Fomichev
2020-12-11 6:37 ` Klaus Jensen
2021-01-08 6:51 ` Klaus Jensen
2020-12-16 0:23 ` Keith Busch
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