[bug report] mtd: rawnand: Add NAND controller support on Intel LGM SoC

[bug report] mtd: rawnand: Add NAND controller support on Intel LGM SoC

[Dan Carpenter]

Hello Ramuthevar Vadivel Murugan,

The patch 0b1039f016e8: "mtd: rawnand: Add NAND controller support on
Intel LGM SoC" from Nov 10, 2020, leads to the following static
checker warning:

	drivers/mtd/nand/raw/intel-nand-controller.c:683 ebu_nand_probe()
	warn: 'ebu_host->clk' not released on lines: 633,638,644,652.

drivers/mtd/nand/raw/intel-nand-controller.c
   617                  return PTR_ERR(ebu_host->cs[cs].chipaddr);
   618  
   619          ebu_host->clk = devm_clk_get(dev, NULL);
   620          if (IS_ERR(ebu_host->clk))
   621                  return dev_err_probe(dev, PTR_ERR(ebu_host->clk),
   622                                       "failed to get clock\n");
   623  
   624          ret = clk_prepare_enable(ebu_host->clk);
   625          if (ret) {
   626                  dev_err(dev, "failed to enable clock: %d\n", ret);
   627                  return ret;
   628          }
   629          ebu_host->clk_rate = clk_get_rate(ebu_host->clk);
   630  
   631          ebu_host->dma_tx = dma_request_chan(dev, "tx");
   632          if (IS_ERR(ebu_host->dma_tx))
   633                  return dev_err_probe(dev, PTR_ERR(ebu_host->dma_tx),
   634                                       "failed to request DMA tx chan!.\n");

clk_disable_unprepare(ebu_host->clk); before returning?

   635  
   636          ebu_host->dma_rx = dma_request_chan(dev, "rx");
   637          if (IS_ERR(ebu_host->dma_rx))
   638                  return dev_err_probe(dev, PTR_ERR(ebu_host->dma_rx),
   639                                       "failed to request DMA rx chan!.\n");

Here

   640  
   641          resname = devm_kasprintf(dev, GFP_KERNEL, "addr_sel%d", cs);
   642          res = platform_get_resource_byname(pdev, IORESOURCE_MEM, resname);
   643          if (!res)
   644                  return -EINVAL;

here

   645          ebu_host->cs[cs].addr_sel = res->start;
   646          writel(ebu_host->cs[cs].addr_sel | EBU_ADDR_MASK(5) | EBU_ADDR_SEL_REGEN,
   647                 ebu_host->ebu + EBU_ADDR_SEL(cs));
   648  
   649          nand_set_flash_node(&ebu_host->chip, dev->of_node);
   650          if (!mtd->name) {
   651                  dev_err(ebu_host->dev, "NAND label property is mandatory\n");
   652                  return -EINVAL;

here

   653          }
   654  
   655          mtd = nand_to_mtd(&ebu_host->chip);
   656          mtd->dev.parent = dev;
   657          ebu_host->dev = dev;
   658  
   659          platform_set_drvdata(pdev, ebu_host);
   660          nand_set_controller_data(&ebu_host->chip, ebu_host);
   661  
   662          nand = &ebu_host->chip;
   663          nand->controller = &ebu_host->controller;
   664          nand->controller->ops = &ebu_nand_controller_ops;
   665  
   666          /* Scan to find existence of the device */
   667          ret = nand_scan(&ebu_host->chip, 1);
   668          if (ret)
   669                  goto err_cleanup_dma;
   670  
   671          ret = mtd_device_register(mtd, NULL, 0);
   672          if (ret)
   673                  goto err_clean_nand;
   674  
   675          return 0;
   676  
   677  err_clean_nand:
   678          nand_cleanup(&ebu_host->chip);
   679  err_cleanup_dma:
   680          ebu_dma_cleanup(ebu_host);
   681          clk_disable_unprepare(ebu_host->clk);
   682  
   683          return ret;
   684  }

regards,
dan carpenter

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