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* [PATCH] clk: renesas: r8a779g0: Add SDHI clocks
@ 2022-10-12  7:05 Geert Uytterhoeven
  2022-10-12 18:53 ` Wolfram Sang
  0 siblings, 1 reply; 2+ messages in thread
From: Geert Uytterhoeven @ 2022-10-12  7:05 UTC (permalink / raw)
  To: Michael Turquette, Stephen Boyd, Wolfram Sang
  Cc: linux-clk, linux-renesas-soc, Geert Uytterhoeven

Add the SD0H core clock and the SDHI module clock, which are used by the
SD Card/MMC Interface on the Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
To be queued in renesas-clk for v6.2.

 drivers/clk/renesas/r8a779g0-cpg-mssr.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
index 5cc5ee1295d9fe68..390162a07595a681 100644
--- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
@@ -144,7 +144,8 @@ static const struct cpg_core_clk r8a779g0_core_clks[] __initconst = {
 	DEF_FIXED("vcbus",	R8A779G0_CLK_VCBUS,	CLK_VC,		1, 1),
 	DEF_FIXED("vcbusd2",	R8A779G0_CLK_VCBUSD2,	CLK_VC,		2, 1),
 
-	DEF_GEN4_SD("sd0",	R8A779G0_CLK_SD0,	CLK_SDSRC,	0x870),
+	DEF_GEN4_SDH("sd0h",	R8A779G0_CLK_SD0H,	CLK_SDSRC,	   0x870),
+	DEF_GEN4_SD("sd0",	R8A779G0_CLK_SD0,	R8A779G0_CLK_SD0H, 0x870),
 	DEF_DIV6P1("mso",	R8A779G0_CLK_MSO,	CLK_PLL5_DIV4,	0x87c),
 
 	DEF_BASE("rpc",		R8A779G0_CLK_RPC,	CLK_TYPE_GEN4_RPC, CLK_RPCSRC),
@@ -180,6 +181,7 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {
 	DEF_MOD("scif1",	703,	R8A779G0_CLK_SASYNCPERD4),
 	DEF_MOD("scif3",	704,	R8A779G0_CLK_SASYNCPERD4),
 	DEF_MOD("scif4",	705,	R8A779G0_CLK_SASYNCPERD4),
+	DEF_MOD("sdhi",		706,	R8A779G0_CLK_SD0),
 	DEF_MOD("sydm0",	709,	R8A779G0_CLK_S0D6_PER),
 	DEF_MOD("sydm1",	710,	R8A779G0_CLK_S0D6_PER),
 	DEF_MOD("tpu0",		718,	R8A779G0_CLK_SASYNCPERD4),
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] clk: renesas: r8a779g0: Add SDHI clocks
  2022-10-12  7:05 [PATCH] clk: renesas: r8a779g0: Add SDHI clocks Geert Uytterhoeven
@ 2022-10-12 18:53 ` Wolfram Sang
  0 siblings, 0 replies; 2+ messages in thread
From: Wolfram Sang @ 2022-10-12 18:53 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Michael Turquette, Stephen Boyd, linux-clk, linux-renesas-soc

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On Wed, Oct 12, 2022 at 09:05:05AM +0200, Geert Uytterhoeven wrote:
> Add the SD0H core clock and the SDHI module clock, which are used by the
> SD Card/MMC Interface on the Renesas R-Car V4H (R8A779G0) SoC.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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