* [PATCH 00/11] ARM: sa1100, mmp: drop unused board files
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann, Rafael J. Wysocki, Alan Stern,
Dominik Brodowski, Greg Kroah-Hartman, Helge Deller, Lee Jones,
Miquel Raynal, Peter Chubb, Richard Weinberger,
Stefan Eletzhofer, Vignesh Raghavendra, Vinod Koul, Viresh Kumar,
linux-pm, dmaengine, linux-mtd, linux-usb, linux-fbdev,
dri-devel
From: Arnd Bergmann <arnd@arndb.de>
A number of board files were marked as 'unused' in 2022 and can
get removed in linux-6.2 at the beginning of 2023.
I wanted to group these two platforms with the PXA series, but
that one is already too big.
MMP is now DT-only, which allows removing most of the platform
specific source code.
On SA1100, four boards that have no apparent users get removed,
while another four boards each had one person saying they would
like to keep it around.
Arnd Bergmann (11):
ARM: sa1100: un-deprecate jornada720
ARM: sa1100: remove unused board files
ARM: sa1100: remove irda references
ARM: sa1100: make cpufreq driver build standalone
cpufreq: remove sa1100 driver
mtd: remove lart flash driver
ARM: mmp: select specific CPU implementation
ARM: mmp: remove all board files
ARM: mmp: remove custom sram code
ARM: mmp: remove device definitions
ARM: mmp: remove old PM support
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Helge Deller <deller@gmx.de>
Cc: Lee Jones <lee@kernel.org>
Cc: Lubomir Rintel <lkundrak@v3.sk>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Peter Chubb <peter.chubb@unsw.edu.au>
Cc: Richard Weinberger <richard@nod.at>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-pm@vger.kernel.org
Cc: dmaengine@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-usb@vger.kernel.org
Cc: linux-fbdev@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
MAINTAINERS | 11 -
arch/arm/Kconfig | 6 -
arch/arm/boot/compressed/head-sa1100.S | 4 -
arch/arm/configs/badge4_defconfig | 105 ---
arch/arm/configs/cerfcube_defconfig | 73 --
arch/arm/configs/hackkit_defconfig | 48 --
arch/arm/configs/jornada720_defconfig | 1 -
arch/arm/configs/lart_defconfig | 64 --
arch/arm/configs/pleb_defconfig | 53 --
arch/arm/configs/pxa168_defconfig | 3 -
arch/arm/configs/pxa910_defconfig | 2 -
arch/arm/configs/shannon_defconfig | 45 --
arch/arm/configs/simpad_defconfig | 100 ---
arch/arm/mach-mmp/Kconfig | 96 ---
arch/arm/mach-mmp/Makefile | 21 +-
arch/arm/mach-mmp/aspenite.c | 284 --------
arch/arm/mach-mmp/avengers_lite.c | 55 --
arch/arm/mach-mmp/brownstone.c | 237 ------
arch/arm/mach-mmp/common.c | 5 -
arch/arm/mach-mmp/common.h | 2 -
arch/arm/mach-mmp/devices.c | 359 ---------
arch/arm/mach-mmp/devices.h | 57 --
arch/arm/mach-mmp/flint.c | 131 ----
arch/arm/mach-mmp/gplugd.c | 206 ------
arch/arm/mach-mmp/irqs.h | 240 ------
arch/arm/mach-mmp/jasper.c | 185 -----
arch/arm/mach-mmp/mfp-mmp2.h | 396 ----------
arch/arm/mach-mmp/mfp-pxa168.h | 355 ---------
arch/arm/mach-mmp/mfp-pxa910.h | 170 -----
arch/arm/mach-mmp/mfp.h | 35 -
arch/arm/mach-mmp/mmp2.c | 175 -----
arch/arm/mach-mmp/mmp2.h | 104 ---
arch/arm/mach-mmp/pm-mmp2.c | 248 -------
arch/arm/mach-mmp/pm-mmp2.h | 59 --
arch/arm/mach-mmp/pm-pxa910.c | 272 -------
arch/arm/mach-mmp/pm-pxa910.h | 75 --
arch/arm/mach-mmp/pxa168.c | 175 -----
arch/arm/mach-mmp/pxa168.h | 139 ----
arch/arm/mach-mmp/pxa910.c | 190 -----
arch/arm/mach-mmp/pxa910.h | 90 ---
arch/arm/mach-mmp/regs-apbc.h | 19 -
arch/arm/mach-mmp/regs-apmu.h | 28 -
arch/arm/mach-mmp/regs-icu.h | 69 --
arch/arm/mach-mmp/regs-timers.h | 5 -
arch/arm/mach-mmp/regs-usb.h | 155 ----
arch/arm/mach-mmp/sram.c | 167 -----
arch/arm/mach-mmp/teton_bga.c | 100 ---
arch/arm/mach-mmp/teton_bga.h | 22 -
arch/arm/mach-mmp/time.c | 9 +-
arch/arm/mach-mmp/ttc_dkb.c | 315 --------
arch/arm/mach-sa1100/Kconfig | 112 ---
arch/arm/mach-sa1100/Makefile | 21 -
arch/arm/mach-sa1100/assabet.c | 1 -
arch/arm/mach-sa1100/badge4.c | 338 ---------
arch/arm/mach-sa1100/cerf.c | 181 -----
arch/arm/mach-sa1100/collie.c | 1 -
arch/arm/mach-sa1100/generic.c | 32 -
arch/arm/mach-sa1100/generic.h | 4 -
arch/arm/mach-sa1100/h3100.c | 140 ----
arch/arm/mach-sa1100/h3600.c | 1 -
arch/arm/mach-sa1100/hackkit.c | 184 -----
arch/arm/mach-sa1100/include/mach/badge4.h | 71 --
arch/arm/mach-sa1100/include/mach/cerf.h | 20 -
arch/arm/mach-sa1100/include/mach/generic.h | 1 -
.../arm/mach-sa1100/include/mach/nanoengine.h | 48 --
arch/arm/mach-sa1100/include/mach/shannon.h | 40 -
arch/arm/mach-sa1100/include/mach/simpad.h | 159 ----
arch/arm/mach-sa1100/lart.c | 177 -----
arch/arm/mach-sa1100/nanoengine.c | 136 ----
arch/arm/mach-sa1100/pci-nanoengine.c | 191 -----
arch/arm/mach-sa1100/pleb.c | 148 ----
arch/arm/mach-sa1100/shannon.c | 157 ----
arch/arm/mach-sa1100/simpad.c | 423 -----------
drivers/cpufreq/Kconfig | 2 +-
drivers/cpufreq/Kconfig.arm | 3 -
drivers/cpufreq/Makefile | 1 -
drivers/cpufreq/sa1100-cpufreq.c | 206 ------
drivers/cpufreq/sa1110-cpufreq.c | 38 +-
drivers/dma/mmp_tdma.c | 7 +-
drivers/mfd/Kconfig | 2 +-
drivers/mtd/devices/Kconfig | 8 -
drivers/mtd/devices/Makefile | 1 -
drivers/mtd/devices/lart.c | 682 ------------------
drivers/pcmcia/sa1100_generic.c | 5 +-
drivers/pcmcia/sa1100_h3600.c | 2 +-
drivers/pcmcia/sa1111_generic.c | 4 -
drivers/usb/host/ohci-sa1111.c | 5 +-
drivers/video/fbdev/sa1100fb.c | 1 -
include/linux/platform_data/dma-mmp_tdma.h | 36 -
include/linux/platform_data/irda-sa11x0.h | 17 -
include/linux/soc/mmp/cputype.h | 24 +-
91 files changed, 43 insertions(+), 9352 deletions(-)
delete mode 100644 arch/arm/configs/badge4_defconfig
delete mode 100644 arch/arm/configs/cerfcube_defconfig
delete mode 100644 arch/arm/configs/hackkit_defconfig
delete mode 100644 arch/arm/configs/lart_defconfig
delete mode 100644 arch/arm/configs/pleb_defconfig
delete mode 100644 arch/arm/configs/shannon_defconfig
delete mode 100644 arch/arm/configs/simpad_defconfig
delete mode 100644 arch/arm/mach-mmp/aspenite.c
delete mode 100644 arch/arm/mach-mmp/avengers_lite.c
delete mode 100644 arch/arm/mach-mmp/brownstone.c
delete mode 100644 arch/arm/mach-mmp/devices.c
delete mode 100644 arch/arm/mach-mmp/devices.h
delete mode 100644 arch/arm/mach-mmp/flint.c
delete mode 100644 arch/arm/mach-mmp/gplugd.c
delete mode 100644 arch/arm/mach-mmp/irqs.h
delete mode 100644 arch/arm/mach-mmp/jasper.c
delete mode 100644 arch/arm/mach-mmp/mfp-mmp2.h
delete mode 100644 arch/arm/mach-mmp/mfp-pxa168.h
delete mode 100644 arch/arm/mach-mmp/mfp-pxa910.h
delete mode 100644 arch/arm/mach-mmp/mfp.h
delete mode 100644 arch/arm/mach-mmp/mmp2.c
delete mode 100644 arch/arm/mach-mmp/mmp2.h
delete mode 100644 arch/arm/mach-mmp/pm-mmp2.c
delete mode 100644 arch/arm/mach-mmp/pm-mmp2.h
delete mode 100644 arch/arm/mach-mmp/pm-pxa910.c
delete mode 100644 arch/arm/mach-mmp/pm-pxa910.h
delete mode 100644 arch/arm/mach-mmp/pxa168.c
delete mode 100644 arch/arm/mach-mmp/pxa168.h
delete mode 100644 arch/arm/mach-mmp/pxa910.c
delete mode 100644 arch/arm/mach-mmp/pxa910.h
delete mode 100644 arch/arm/mach-mmp/regs-apbc.h
delete mode 100644 arch/arm/mach-mmp/regs-apmu.h
delete mode 100644 arch/arm/mach-mmp/regs-icu.h
delete mode 100644 arch/arm/mach-mmp/regs-usb.h
delete mode 100644 arch/arm/mach-mmp/sram.c
delete mode 100644 arch/arm/mach-mmp/teton_bga.c
delete mode 100644 arch/arm/mach-mmp/teton_bga.h
delete mode 100644 arch/arm/mach-mmp/ttc_dkb.c
delete mode 100644 arch/arm/mach-sa1100/badge4.c
delete mode 100644 arch/arm/mach-sa1100/cerf.c
delete mode 100644 arch/arm/mach-sa1100/h3100.c
delete mode 100644 arch/arm/mach-sa1100/hackkit.c
delete mode 100644 arch/arm/mach-sa1100/include/mach/badge4.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/cerf.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/generic.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/nanoengine.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/shannon.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/simpad.h
delete mode 100644 arch/arm/mach-sa1100/lart.c
delete mode 100644 arch/arm/mach-sa1100/nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pci-nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pleb.c
delete mode 100644 arch/arm/mach-sa1100/shannon.c
delete mode 100644 arch/arm/mach-sa1100/simpad.c
delete mode 100644 drivers/cpufreq/sa1100-cpufreq.c
delete mode 100644 drivers/mtd/devices/lart.c
delete mode 100644 include/linux/platform_data/dma-mmp_tdma.h
delete mode 100644 include/linux/platform_data/irda-sa11x0.h
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH 00/11] ARM: sa1100, mmp: drop unused board files
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: Stefan Eletzhofer, Vinod Koul, linux-fbdev, linux-usb,
Vignesh Raghavendra, Arnd Bergmann, Rafael J. Wysocki, dmaengine,
Greg Kroah-Hartman, Helge Deller, Lee Jones, linux-kernel,
Dominik Brodowski, Viresh Kumar, Richard Weinberger, Peter Chubb,
Alan Stern, dri-devel, Miquel Raynal, linux-pm, linux-mtd
From: Arnd Bergmann <arnd@arndb.de>
A number of board files were marked as 'unused' in 2022 and can
get removed in linux-6.2 at the beginning of 2023.
I wanted to group these two platforms with the PXA series, but
that one is already too big.
MMP is now DT-only, which allows removing most of the platform
specific source code.
On SA1100, four boards that have no apparent users get removed,
while another four boards each had one person saying they would
like to keep it around.
Arnd Bergmann (11):
ARM: sa1100: un-deprecate jornada720
ARM: sa1100: remove unused board files
ARM: sa1100: remove irda references
ARM: sa1100: make cpufreq driver build standalone
cpufreq: remove sa1100 driver
mtd: remove lart flash driver
ARM: mmp: select specific CPU implementation
ARM: mmp: remove all board files
ARM: mmp: remove custom sram code
ARM: mmp: remove device definitions
ARM: mmp: remove old PM support
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Helge Deller <deller@gmx.de>
Cc: Lee Jones <lee@kernel.org>
Cc: Lubomir Rintel <lkundrak@v3.sk>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Peter Chubb <peter.chubb@unsw.edu.au>
Cc: Richard Weinberger <richard@nod.at>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-pm@vger.kernel.org
Cc: dmaengine@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-usb@vger.kernel.org
Cc: linux-fbdev@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
MAINTAINERS | 11 -
arch/arm/Kconfig | 6 -
arch/arm/boot/compressed/head-sa1100.S | 4 -
arch/arm/configs/badge4_defconfig | 105 ---
arch/arm/configs/cerfcube_defconfig | 73 --
arch/arm/configs/hackkit_defconfig | 48 --
arch/arm/configs/jornada720_defconfig | 1 -
arch/arm/configs/lart_defconfig | 64 --
arch/arm/configs/pleb_defconfig | 53 --
arch/arm/configs/pxa168_defconfig | 3 -
arch/arm/configs/pxa910_defconfig | 2 -
arch/arm/configs/shannon_defconfig | 45 --
arch/arm/configs/simpad_defconfig | 100 ---
arch/arm/mach-mmp/Kconfig | 96 ---
arch/arm/mach-mmp/Makefile | 21 +-
arch/arm/mach-mmp/aspenite.c | 284 --------
arch/arm/mach-mmp/avengers_lite.c | 55 --
arch/arm/mach-mmp/brownstone.c | 237 ------
arch/arm/mach-mmp/common.c | 5 -
arch/arm/mach-mmp/common.h | 2 -
arch/arm/mach-mmp/devices.c | 359 ---------
arch/arm/mach-mmp/devices.h | 57 --
arch/arm/mach-mmp/flint.c | 131 ----
arch/arm/mach-mmp/gplugd.c | 206 ------
arch/arm/mach-mmp/irqs.h | 240 ------
arch/arm/mach-mmp/jasper.c | 185 -----
arch/arm/mach-mmp/mfp-mmp2.h | 396 ----------
arch/arm/mach-mmp/mfp-pxa168.h | 355 ---------
arch/arm/mach-mmp/mfp-pxa910.h | 170 -----
arch/arm/mach-mmp/mfp.h | 35 -
arch/arm/mach-mmp/mmp2.c | 175 -----
arch/arm/mach-mmp/mmp2.h | 104 ---
arch/arm/mach-mmp/pm-mmp2.c | 248 -------
arch/arm/mach-mmp/pm-mmp2.h | 59 --
arch/arm/mach-mmp/pm-pxa910.c | 272 -------
arch/arm/mach-mmp/pm-pxa910.h | 75 --
arch/arm/mach-mmp/pxa168.c | 175 -----
arch/arm/mach-mmp/pxa168.h | 139 ----
arch/arm/mach-mmp/pxa910.c | 190 -----
arch/arm/mach-mmp/pxa910.h | 90 ---
arch/arm/mach-mmp/regs-apbc.h | 19 -
arch/arm/mach-mmp/regs-apmu.h | 28 -
arch/arm/mach-mmp/regs-icu.h | 69 --
arch/arm/mach-mmp/regs-timers.h | 5 -
arch/arm/mach-mmp/regs-usb.h | 155 ----
arch/arm/mach-mmp/sram.c | 167 -----
arch/arm/mach-mmp/teton_bga.c | 100 ---
arch/arm/mach-mmp/teton_bga.h | 22 -
arch/arm/mach-mmp/time.c | 9 +-
arch/arm/mach-mmp/ttc_dkb.c | 315 --------
arch/arm/mach-sa1100/Kconfig | 112 ---
arch/arm/mach-sa1100/Makefile | 21 -
arch/arm/mach-sa1100/assabet.c | 1 -
arch/arm/mach-sa1100/badge4.c | 338 ---------
arch/arm/mach-sa1100/cerf.c | 181 -----
arch/arm/mach-sa1100/collie.c | 1 -
arch/arm/mach-sa1100/generic.c | 32 -
arch/arm/mach-sa1100/generic.h | 4 -
arch/arm/mach-sa1100/h3100.c | 140 ----
arch/arm/mach-sa1100/h3600.c | 1 -
arch/arm/mach-sa1100/hackkit.c | 184 -----
arch/arm/mach-sa1100/include/mach/badge4.h | 71 --
arch/arm/mach-sa1100/include/mach/cerf.h | 20 -
arch/arm/mach-sa1100/include/mach/generic.h | 1 -
.../arm/mach-sa1100/include/mach/nanoengine.h | 48 --
arch/arm/mach-sa1100/include/mach/shannon.h | 40 -
arch/arm/mach-sa1100/include/mach/simpad.h | 159 ----
arch/arm/mach-sa1100/lart.c | 177 -----
arch/arm/mach-sa1100/nanoengine.c | 136 ----
arch/arm/mach-sa1100/pci-nanoengine.c | 191 -----
arch/arm/mach-sa1100/pleb.c | 148 ----
arch/arm/mach-sa1100/shannon.c | 157 ----
arch/arm/mach-sa1100/simpad.c | 423 -----------
drivers/cpufreq/Kconfig | 2 +-
drivers/cpufreq/Kconfig.arm | 3 -
drivers/cpufreq/Makefile | 1 -
drivers/cpufreq/sa1100-cpufreq.c | 206 ------
drivers/cpufreq/sa1110-cpufreq.c | 38 +-
drivers/dma/mmp_tdma.c | 7 +-
drivers/mfd/Kconfig | 2 +-
drivers/mtd/devices/Kconfig | 8 -
drivers/mtd/devices/Makefile | 1 -
drivers/mtd/devices/lart.c | 682 ------------------
drivers/pcmcia/sa1100_generic.c | 5 +-
drivers/pcmcia/sa1100_h3600.c | 2 +-
drivers/pcmcia/sa1111_generic.c | 4 -
drivers/usb/host/ohci-sa1111.c | 5 +-
drivers/video/fbdev/sa1100fb.c | 1 -
include/linux/platform_data/dma-mmp_tdma.h | 36 -
include/linux/platform_data/irda-sa11x0.h | 17 -
include/linux/soc/mmp/cputype.h | 24 +-
91 files changed, 43 insertions(+), 9352 deletions(-)
delete mode 100644 arch/arm/configs/badge4_defconfig
delete mode 100644 arch/arm/configs/cerfcube_defconfig
delete mode 100644 arch/arm/configs/hackkit_defconfig
delete mode 100644 arch/arm/configs/lart_defconfig
delete mode 100644 arch/arm/configs/pleb_defconfig
delete mode 100644 arch/arm/configs/shannon_defconfig
delete mode 100644 arch/arm/configs/simpad_defconfig
delete mode 100644 arch/arm/mach-mmp/aspenite.c
delete mode 100644 arch/arm/mach-mmp/avengers_lite.c
delete mode 100644 arch/arm/mach-mmp/brownstone.c
delete mode 100644 arch/arm/mach-mmp/devices.c
delete mode 100644 arch/arm/mach-mmp/devices.h
delete mode 100644 arch/arm/mach-mmp/flint.c
delete mode 100644 arch/arm/mach-mmp/gplugd.c
delete mode 100644 arch/arm/mach-mmp/irqs.h
delete mode 100644 arch/arm/mach-mmp/jasper.c
delete mode 100644 arch/arm/mach-mmp/mfp-mmp2.h
delete mode 100644 arch/arm/mach-mmp/mfp-pxa168.h
delete mode 100644 arch/arm/mach-mmp/mfp-pxa910.h
delete mode 100644 arch/arm/mach-mmp/mfp.h
delete mode 100644 arch/arm/mach-mmp/mmp2.c
delete mode 100644 arch/arm/mach-mmp/mmp2.h
delete mode 100644 arch/arm/mach-mmp/pm-mmp2.c
delete mode 100644 arch/arm/mach-mmp/pm-mmp2.h
delete mode 100644 arch/arm/mach-mmp/pm-pxa910.c
delete mode 100644 arch/arm/mach-mmp/pm-pxa910.h
delete mode 100644 arch/arm/mach-mmp/pxa168.c
delete mode 100644 arch/arm/mach-mmp/pxa168.h
delete mode 100644 arch/arm/mach-mmp/pxa910.c
delete mode 100644 arch/arm/mach-mmp/pxa910.h
delete mode 100644 arch/arm/mach-mmp/regs-apbc.h
delete mode 100644 arch/arm/mach-mmp/regs-apmu.h
delete mode 100644 arch/arm/mach-mmp/regs-icu.h
delete mode 100644 arch/arm/mach-mmp/regs-usb.h
delete mode 100644 arch/arm/mach-mmp/sram.c
delete mode 100644 arch/arm/mach-mmp/teton_bga.c
delete mode 100644 arch/arm/mach-mmp/teton_bga.h
delete mode 100644 arch/arm/mach-mmp/ttc_dkb.c
delete mode 100644 arch/arm/mach-sa1100/badge4.c
delete mode 100644 arch/arm/mach-sa1100/cerf.c
delete mode 100644 arch/arm/mach-sa1100/h3100.c
delete mode 100644 arch/arm/mach-sa1100/hackkit.c
delete mode 100644 arch/arm/mach-sa1100/include/mach/badge4.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/cerf.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/generic.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/nanoengine.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/shannon.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/simpad.h
delete mode 100644 arch/arm/mach-sa1100/lart.c
delete mode 100644 arch/arm/mach-sa1100/nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pci-nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pleb.c
delete mode 100644 arch/arm/mach-sa1100/shannon.c
delete mode 100644 arch/arm/mach-sa1100/simpad.c
delete mode 100644 drivers/cpufreq/sa1100-cpufreq.c
delete mode 100644 drivers/mtd/devices/lart.c
delete mode 100644 include/linux/platform_data/dma-mmp_tdma.h
delete mode 100644 include/linux/platform_data/irda-sa11x0.h
--
2.29.2
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH 00/11] ARM: sa1100, mmp: drop unused board files
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann, Rafael J. Wysocki, Alan Stern,
Dominik Brodowski, Greg Kroah-Hartman, Helge Deller, Lee Jones,
Miquel Raynal, Peter Chubb, Richard Weinberger,
Stefan Eletzhofer, Vignesh Raghavendra, Vinod Koul, Viresh Kumar,
linux-pm, dmaengine, linux-mtd, linux-usb, linux-fbdev,
dri-devel
From: Arnd Bergmann <arnd@arndb.de>
A number of board files were marked as 'unused' in 2022 and can
get removed in linux-6.2 at the beginning of 2023.
I wanted to group these two platforms with the PXA series, but
that one is already too big.
MMP is now DT-only, which allows removing most of the platform
specific source code.
On SA1100, four boards that have no apparent users get removed,
while another four boards each had one person saying they would
like to keep it around.
Arnd Bergmann (11):
ARM: sa1100: un-deprecate jornada720
ARM: sa1100: remove unused board files
ARM: sa1100: remove irda references
ARM: sa1100: make cpufreq driver build standalone
cpufreq: remove sa1100 driver
mtd: remove lart flash driver
ARM: mmp: select specific CPU implementation
ARM: mmp: remove all board files
ARM: mmp: remove custom sram code
ARM: mmp: remove device definitions
ARM: mmp: remove old PM support
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Helge Deller <deller@gmx.de>
Cc: Lee Jones <lee@kernel.org>
Cc: Lubomir Rintel <lkundrak@v3.sk>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Peter Chubb <peter.chubb@unsw.edu.au>
Cc: Richard Weinberger <richard@nod.at>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-pm@vger.kernel.org
Cc: dmaengine@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-usb@vger.kernel.org
Cc: linux-fbdev@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
MAINTAINERS | 11 -
arch/arm/Kconfig | 6 -
arch/arm/boot/compressed/head-sa1100.S | 4 -
arch/arm/configs/badge4_defconfig | 105 ---
arch/arm/configs/cerfcube_defconfig | 73 --
arch/arm/configs/hackkit_defconfig | 48 --
arch/arm/configs/jornada720_defconfig | 1 -
arch/arm/configs/lart_defconfig | 64 --
arch/arm/configs/pleb_defconfig | 53 --
arch/arm/configs/pxa168_defconfig | 3 -
arch/arm/configs/pxa910_defconfig | 2 -
arch/arm/configs/shannon_defconfig | 45 --
arch/arm/configs/simpad_defconfig | 100 ---
arch/arm/mach-mmp/Kconfig | 96 ---
arch/arm/mach-mmp/Makefile | 21 +-
arch/arm/mach-mmp/aspenite.c | 284 --------
arch/arm/mach-mmp/avengers_lite.c | 55 --
arch/arm/mach-mmp/brownstone.c | 237 ------
arch/arm/mach-mmp/common.c | 5 -
arch/arm/mach-mmp/common.h | 2 -
arch/arm/mach-mmp/devices.c | 359 ---------
arch/arm/mach-mmp/devices.h | 57 --
arch/arm/mach-mmp/flint.c | 131 ----
arch/arm/mach-mmp/gplugd.c | 206 ------
arch/arm/mach-mmp/irqs.h | 240 ------
arch/arm/mach-mmp/jasper.c | 185 -----
arch/arm/mach-mmp/mfp-mmp2.h | 396 ----------
arch/arm/mach-mmp/mfp-pxa168.h | 355 ---------
arch/arm/mach-mmp/mfp-pxa910.h | 170 -----
arch/arm/mach-mmp/mfp.h | 35 -
arch/arm/mach-mmp/mmp2.c | 175 -----
arch/arm/mach-mmp/mmp2.h | 104 ---
arch/arm/mach-mmp/pm-mmp2.c | 248 -------
arch/arm/mach-mmp/pm-mmp2.h | 59 --
arch/arm/mach-mmp/pm-pxa910.c | 272 -------
arch/arm/mach-mmp/pm-pxa910.h | 75 --
arch/arm/mach-mmp/pxa168.c | 175 -----
arch/arm/mach-mmp/pxa168.h | 139 ----
arch/arm/mach-mmp/pxa910.c | 190 -----
arch/arm/mach-mmp/pxa910.h | 90 ---
arch/arm/mach-mmp/regs-apbc.h | 19 -
arch/arm/mach-mmp/regs-apmu.h | 28 -
arch/arm/mach-mmp/regs-icu.h | 69 --
arch/arm/mach-mmp/regs-timers.h | 5 -
arch/arm/mach-mmp/regs-usb.h | 155 ----
arch/arm/mach-mmp/sram.c | 167 -----
arch/arm/mach-mmp/teton_bga.c | 100 ---
arch/arm/mach-mmp/teton_bga.h | 22 -
arch/arm/mach-mmp/time.c | 9 +-
arch/arm/mach-mmp/ttc_dkb.c | 315 --------
arch/arm/mach-sa1100/Kconfig | 112 ---
arch/arm/mach-sa1100/Makefile | 21 -
arch/arm/mach-sa1100/assabet.c | 1 -
arch/arm/mach-sa1100/badge4.c | 338 ---------
arch/arm/mach-sa1100/cerf.c | 181 -----
arch/arm/mach-sa1100/collie.c | 1 -
arch/arm/mach-sa1100/generic.c | 32 -
arch/arm/mach-sa1100/generic.h | 4 -
arch/arm/mach-sa1100/h3100.c | 140 ----
arch/arm/mach-sa1100/h3600.c | 1 -
arch/arm/mach-sa1100/hackkit.c | 184 -----
arch/arm/mach-sa1100/include/mach/badge4.h | 71 --
arch/arm/mach-sa1100/include/mach/cerf.h | 20 -
arch/arm/mach-sa1100/include/mach/generic.h | 1 -
.../arm/mach-sa1100/include/mach/nanoengine.h | 48 --
arch/arm/mach-sa1100/include/mach/shannon.h | 40 -
arch/arm/mach-sa1100/include/mach/simpad.h | 159 ----
arch/arm/mach-sa1100/lart.c | 177 -----
arch/arm/mach-sa1100/nanoengine.c | 136 ----
arch/arm/mach-sa1100/pci-nanoengine.c | 191 -----
arch/arm/mach-sa1100/pleb.c | 148 ----
arch/arm/mach-sa1100/shannon.c | 157 ----
arch/arm/mach-sa1100/simpad.c | 423 -----------
drivers/cpufreq/Kconfig | 2 +-
drivers/cpufreq/Kconfig.arm | 3 -
drivers/cpufreq/Makefile | 1 -
drivers/cpufreq/sa1100-cpufreq.c | 206 ------
drivers/cpufreq/sa1110-cpufreq.c | 38 +-
drivers/dma/mmp_tdma.c | 7 +-
drivers/mfd/Kconfig | 2 +-
drivers/mtd/devices/Kconfig | 8 -
drivers/mtd/devices/Makefile | 1 -
drivers/mtd/devices/lart.c | 682 ------------------
drivers/pcmcia/sa1100_generic.c | 5 +-
drivers/pcmcia/sa1100_h3600.c | 2 +-
drivers/pcmcia/sa1111_generic.c | 4 -
drivers/usb/host/ohci-sa1111.c | 5 +-
drivers/video/fbdev/sa1100fb.c | 1 -
include/linux/platform_data/dma-mmp_tdma.h | 36 -
include/linux/platform_data/irda-sa11x0.h | 17 -
include/linux/soc/mmp/cputype.h | 24 +-
91 files changed, 43 insertions(+), 9352 deletions(-)
delete mode 100644 arch/arm/configs/badge4_defconfig
delete mode 100644 arch/arm/configs/cerfcube_defconfig
delete mode 100644 arch/arm/configs/hackkit_defconfig
delete mode 100644 arch/arm/configs/lart_defconfig
delete mode 100644 arch/arm/configs/pleb_defconfig
delete mode 100644 arch/arm/configs/shannon_defconfig
delete mode 100644 arch/arm/configs/simpad_defconfig
delete mode 100644 arch/arm/mach-mmp/aspenite.c
delete mode 100644 arch/arm/mach-mmp/avengers_lite.c
delete mode 100644 arch/arm/mach-mmp/brownstone.c
delete mode 100644 arch/arm/mach-mmp/devices.c
delete mode 100644 arch/arm/mach-mmp/devices.h
delete mode 100644 arch/arm/mach-mmp/flint.c
delete mode 100644 arch/arm/mach-mmp/gplugd.c
delete mode 100644 arch/arm/mach-mmp/irqs.h
delete mode 100644 arch/arm/mach-mmp/jasper.c
delete mode 100644 arch/arm/mach-mmp/mfp-mmp2.h
delete mode 100644 arch/arm/mach-mmp/mfp-pxa168.h
delete mode 100644 arch/arm/mach-mmp/mfp-pxa910.h
delete mode 100644 arch/arm/mach-mmp/mfp.h
delete mode 100644 arch/arm/mach-mmp/mmp2.c
delete mode 100644 arch/arm/mach-mmp/mmp2.h
delete mode 100644 arch/arm/mach-mmp/pm-mmp2.c
delete mode 100644 arch/arm/mach-mmp/pm-mmp2.h
delete mode 100644 arch/arm/mach-mmp/pm-pxa910.c
delete mode 100644 arch/arm/mach-mmp/pm-pxa910.h
delete mode 100644 arch/arm/mach-mmp/pxa168.c
delete mode 100644 arch/arm/mach-mmp/pxa168.h
delete mode 100644 arch/arm/mach-mmp/pxa910.c
delete mode 100644 arch/arm/mach-mmp/pxa910.h
delete mode 100644 arch/arm/mach-mmp/regs-apbc.h
delete mode 100644 arch/arm/mach-mmp/regs-apmu.h
delete mode 100644 arch/arm/mach-mmp/regs-icu.h
delete mode 100644 arch/arm/mach-mmp/regs-usb.h
delete mode 100644 arch/arm/mach-mmp/sram.c
delete mode 100644 arch/arm/mach-mmp/teton_bga.c
delete mode 100644 arch/arm/mach-mmp/teton_bga.h
delete mode 100644 arch/arm/mach-mmp/ttc_dkb.c
delete mode 100644 arch/arm/mach-sa1100/badge4.c
delete mode 100644 arch/arm/mach-sa1100/cerf.c
delete mode 100644 arch/arm/mach-sa1100/h3100.c
delete mode 100644 arch/arm/mach-sa1100/hackkit.c
delete mode 100644 arch/arm/mach-sa1100/include/mach/badge4.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/cerf.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/generic.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/nanoengine.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/shannon.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/simpad.h
delete mode 100644 arch/arm/mach-sa1100/lart.c
delete mode 100644 arch/arm/mach-sa1100/nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pci-nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pleb.c
delete mode 100644 arch/arm/mach-sa1100/shannon.c
delete mode 100644 arch/arm/mach-sa1100/simpad.c
delete mode 100644 drivers/cpufreq/sa1100-cpufreq.c
delete mode 100644 drivers/mtd/devices/lart.c
delete mode 100644 include/linux/platform_data/dma-mmp_tdma.h
delete mode 100644 include/linux/platform_data/irda-sa11x0.h
--
2.29.2
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH 01/11] ARM: sa1100: un-deprecate jornada720
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann, Stefan Lehner
From: Arnd Bergmann <arnd@arndb.de>
Stefan is still trying to get this machine working again, so it won't
be removed in this round.
Cc: Stefan Lehner <stefan-lehner@aon.at>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/configs/jornada720_defconfig | 1 -
arch/arm/mach-sa1100/Kconfig | 1 -
2 files changed, 2 deletions(-)
diff --git a/arch/arm/configs/jornada720_defconfig b/arch/arm/configs/jornada720_defconfig
index ae1d68da4f2a..91bdcc095884 100644
--- a/arch/arm/configs/jornada720_defconfig
+++ b/arch/arm/configs/jornada720_defconfig
@@ -6,7 +6,6 @@ CONFIG_ARCH_MULTI_V4=y
CONFIG_ARCH_SA1100=y
CONFIG_SA1100_JORNADA720=y
CONFIG_SA1100_JORNADA720_SSP=y
-CONFIG_UNUSED_BOARD_FILES=y
CONFIG_FPE_NWFPE=y
CONFIG_PM=y
CONFIG_MODULES=y
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig
index fb9cd10705de..8b6360e363d1 100644
--- a/arch/arm/mach-sa1100/Kconfig
+++ b/arch/arm/mach-sa1100/Kconfig
@@ -109,7 +109,6 @@ config SA1100_BADGE4
config SA1100_JORNADA720
bool "HP Jornada 720"
- depends on UNUSED_BOARD_FILES
# FIXME: select ARM_SA11x0_CPUFREQ
select SA1111
help
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread
* [PATCH 01/11] ARM: sa1100: un-deprecate jornada720
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann, Stefan Lehner
From: Arnd Bergmann <arnd@arndb.de>
Stefan is still trying to get this machine working again, so it won't
be removed in this round.
Cc: Stefan Lehner <stefan-lehner@aon.at>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/configs/jornada720_defconfig | 1 -
arch/arm/mach-sa1100/Kconfig | 1 -
2 files changed, 2 deletions(-)
diff --git a/arch/arm/configs/jornada720_defconfig b/arch/arm/configs/jornada720_defconfig
index ae1d68da4f2a..91bdcc095884 100644
--- a/arch/arm/configs/jornada720_defconfig
+++ b/arch/arm/configs/jornada720_defconfig
@@ -6,7 +6,6 @@ CONFIG_ARCH_MULTI_V4=y
CONFIG_ARCH_SA1100=y
CONFIG_SA1100_JORNADA720=y
CONFIG_SA1100_JORNADA720_SSP=y
-CONFIG_UNUSED_BOARD_FILES=y
CONFIG_FPE_NWFPE=y
CONFIG_PM=y
CONFIG_MODULES=y
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig
index fb9cd10705de..8b6360e363d1 100644
--- a/arch/arm/mach-sa1100/Kconfig
+++ b/arch/arm/mach-sa1100/Kconfig
@@ -109,7 +109,6 @@ config SA1100_BADGE4
config SA1100_JORNADA720
bool "HP Jornada 720"
- depends on UNUSED_BOARD_FILES
# FIXME: select ARM_SA11x0_CPUFREQ
select SA1111
help
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 55+ messages in thread
* [PATCH 02/11] ARM: sa1100: remove unused board files
2022-10-21 15:49 ` Arnd Bergmann
(?)
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann, Peter Chubb, Stefan Eletzhofer,
Rafael J. Wysocki, Viresh Kumar, Lee Jones, Dominik Brodowski,
Alan Stern, Greg Kroah-Hartman, Helge Deller, linux-pm,
linux-usb, linux-fbdev, dri-devel
From: Arnd Bergmann <arnd@arndb.de>
The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
Simpad machines were all marked as unused as there are no known users
left. Remove all of these, along with references to them in defconfig
files and drivers.
Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
and Jornada 720, each of which had one person still using them, with
Collie also being supported in Qemu.
Cc: Peter Chubb <peter.chubb@unsw.edu.au>
Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
MAINTAINERS | 11 -
arch/arm/Kconfig | 6 -
arch/arm/boot/compressed/head-sa1100.S | 4 -
arch/arm/configs/badge4_defconfig | 105 -----
arch/arm/configs/cerfcube_defconfig | 73 ---
arch/arm/configs/hackkit_defconfig | 48 --
arch/arm/configs/lart_defconfig | 64 ---
arch/arm/configs/pleb_defconfig | 53 ---
arch/arm/configs/shannon_defconfig | 45 --
arch/arm/configs/simpad_defconfig | 100 -----
arch/arm/mach-sa1100/Kconfig | 111 -----
arch/arm/mach-sa1100/Makefile | 21 -
arch/arm/mach-sa1100/badge4.c | 338 --------------
arch/arm/mach-sa1100/cerf.c | 181 --------
arch/arm/mach-sa1100/h3100.c | 140 ------
arch/arm/mach-sa1100/hackkit.c | 184 --------
arch/arm/mach-sa1100/include/mach/badge4.h | 71 ---
arch/arm/mach-sa1100/include/mach/cerf.h | 20 -
.../arm/mach-sa1100/include/mach/nanoengine.h | 48 --
arch/arm/mach-sa1100/include/mach/shannon.h | 40 --
arch/arm/mach-sa1100/include/mach/simpad.h | 159 -------
arch/arm/mach-sa1100/lart.c | 177 --------
arch/arm/mach-sa1100/nanoengine.c | 136 ------
arch/arm/mach-sa1100/pci-nanoengine.c | 191 --------
arch/arm/mach-sa1100/pleb.c | 148 ------
arch/arm/mach-sa1100/shannon.c | 157 -------
arch/arm/mach-sa1100/simpad.c | 423 ------------------
drivers/cpufreq/sa1110-cpufreq.c | 6 -
drivers/mfd/Kconfig | 2 +-
drivers/pcmcia/sa1100_generic.c | 5 +-
drivers/pcmcia/sa1100_h3600.c | 2 +-
drivers/pcmcia/sa1111_generic.c | 4 -
drivers/usb/host/ohci-sa1111.c | 5 +-
drivers/video/fbdev/sa1100fb.c | 1 -
34 files changed, 4 insertions(+), 3075 deletions(-)
delete mode 100644 arch/arm/configs/badge4_defconfig
delete mode 100644 arch/arm/configs/cerfcube_defconfig
delete mode 100644 arch/arm/configs/hackkit_defconfig
delete mode 100644 arch/arm/configs/lart_defconfig
delete mode 100644 arch/arm/configs/pleb_defconfig
delete mode 100644 arch/arm/configs/shannon_defconfig
delete mode 100644 arch/arm/configs/simpad_defconfig
delete mode 100644 arch/arm/mach-sa1100/badge4.c
delete mode 100644 arch/arm/mach-sa1100/cerf.c
delete mode 100644 arch/arm/mach-sa1100/h3100.c
delete mode 100644 arch/arm/mach-sa1100/hackkit.c
delete mode 100644 arch/arm/mach-sa1100/include/mach/badge4.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/cerf.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/nanoengine.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/shannon.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/simpad.h
delete mode 100644 arch/arm/mach-sa1100/lart.c
delete mode 100644 arch/arm/mach-sa1100/nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pci-nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pleb.c
delete mode 100644 arch/arm/mach-sa1100/shannon.c
delete mode 100644 arch/arm/mach-sa1100/simpad.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 77f913567c7e..ec3d53b5e1d1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2486,17 +2486,6 @@ F: arch/arm/mach-oxnas/
F: drivers/power/reset/oxnas-restart.c
N: oxnas
-ARM/PLEB SUPPORT
-M: Peter Chubb <pleb@gelato.unsw.edu.au>
-S: Maintained
-W: http://www.disy.cse.unsw.edu.au/Hardware/PLEB
-
-ARM/PT DIGITAL BOARD PORT
-M: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Maintained
-W: http://www.armlinux.org.uk/
-
ARM/QUALCOMM SUPPORT
M: Andy Gross <agross@kernel.org>
M: Bjorn Andersson <andersson@kernel.org>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ac4c58d9497f..c1614f91e04c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -922,12 +922,6 @@ config ISA
config ISA_DMA_API
bool
-config PCI_NANOENGINE
- bool "BSE nanoEngine PCI support"
- depends on SA1100_NANOENGINE
- help
- Enable PCI on the BSE nanoEngine board.
-
config ARM_ERRATA_814220
bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
depends on CPU_V7
diff --git a/arch/arm/boot/compressed/head-sa1100.S b/arch/arm/boot/compressed/head-sa1100.S
index 95abdd850fe3..23eae1a65064 100644
--- a/arch/arm/boot/compressed/head-sa1100.S
+++ b/arch/arm/boot/compressed/head-sa1100.S
@@ -19,10 +19,6 @@ __SA1100_start:
@ Preserve r8/r7 i.e. kernel entry values
#ifdef CONFIG_SA1100_COLLIE
mov r7, #MACH_TYPE_COLLIE
-#endif
-#ifdef CONFIG_SA1100_SIMPAD
- @ UNTIL we've something like an open bootldr
- mov r7, #MACH_TYPE_SIMPAD @should be 87
#endif
mrc p15, 0, r0, c1, c0, 0 @ read control reg
ands r0, r0, #0x0d
diff --git a/arch/arm/configs/badge4_defconfig b/arch/arm/configs/badge4_defconfig
deleted file mode 100644
index 337e5c9718ae..000000000000
--- a/arch/arm/configs/badge4_defconfig
+++ /dev/null
@@ -1,105 +0,0 @@
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_BADGE4=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="init=/linuxrc root=/dev/mtdblock3"
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_MODVERSIONS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BINFMT_MISC=m
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIVHCI=m
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_SA1100=y
-CONFIG_PARPORT=m
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=y
-CONFIG_NETDEVICES=y
-CONFIG_USB_CATC=m
-CONFIG_USB_KAWETH=m
-CONFIG_USB_PEGASUS=m
-CONFIG_USB_USBNET=m
-CONFIG_USB_ALI_M5632=y
-CONFIG_USB_AN2720=y
-CONFIG_USB_EPSON2888=y
-CONFIG_USB_KC2190=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_I2C=m
-CONFIG_I2C_CHARDEV=m
-CONFIG_I2C_ELEKTOR=m
-CONFIG_WATCHDOG=y
-CONFIG_SOFT_WATCHDOG=m
-CONFIG_SA1100_WATCHDOG=m
-CONFIG_SOUND=y
-CONFIG_SOUND_PRIME=y
-CONFIG_USB=y
-CONFIG_USB_MON=y
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_MDC800=m
-CONFIG_USB_MICROTEK=m
-CONFIG_USB_USS720=m
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_BELKIN=m
-CONFIG_USB_SERIAL_WHITEHEAT=m
-CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
-CONFIG_USB_SERIAL_EMPEG=m
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_VISOR=m
-CONFIG_USB_SERIAL_IR=m
-CONFIG_USB_SERIAL_EDGEPORT=m
-CONFIG_USB_SERIAL_KEYSPAN_PDA=m
-CONFIG_USB_SERIAL_KEYSPAN=m
-CONFIG_USB_SERIAL_MCT_U232=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_SERIAL_CYBERJACK=m
-CONFIG_USB_SERIAL_OMNINET=m
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=m
-CONFIG_MINIX_FS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_SMB_FS=m
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/cerfcube_defconfig b/arch/arm/configs/cerfcube_defconfig
deleted file mode 100644
index 9ada868e2648..000000000000
--- a/arch/arm/configs/cerfcube_defconfig
+++ /dev/null
@@ -1,73 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_CERF=y
-CONFIG_SA1100_CERF_FLASH_16MB=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,38400 root=/dev/mtdblock3 rootfstype=jffs2 rw mem=32M init=/linuxrc"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_FPE_FASTFPE=y
-CONFIG_PM=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_IPV6 is not set
-CONFIG_PCCARD=m
-CONFIG_PCMCIA_SA1100=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=m
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V4=y
-CONFIG_SMB_FS=m
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_DEBUG_KERNEL=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/hackkit_defconfig b/arch/arm/configs/hackkit_defconfig
deleted file mode 100644
index 3c91a851fd08..000000000000
--- a/arch/arm/configs/hackkit_defconfig
+++ /dev/null
@@ -1,48 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_HACKKIT=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,115200 root=/dev/ram0 initrd=0xc0400000,8M init=/rootshell"
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=3
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/lart_defconfig b/arch/arm/configs/lart_defconfig
deleted file mode 100644
index 916177d07a39..000000000000
--- a/arch/arm/configs/lart_defconfig
+++ /dev/null
@@ -1,64 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_LART=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,9600 root=/dev/ram"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_MODULES=y
-CONFIG_NET=y
-CONFIG_PACKET=m
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=1
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_LART=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-CONFIG_NET_ETHERNET=y
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=m
-CONFIG_REISERFS_FS=m
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=m
-CONFIG_JFFS2_FS_DEBUG=1
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFSD=m
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_UTF8=m
-CONFIG_DEBUG_USER=y
-CONFIG_CRC32=m
diff --git a/arch/arm/configs/pleb_defconfig b/arch/arm/configs/pleb_defconfig
deleted file mode 100644
index fd2667873273..000000000000
--- a/arch/arm/configs/pleb_defconfig
+++ /dev/null
@@ -1,53 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_HOTPLUG is not set
-# CONFIG_SHMEM is not set
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_PLEB=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,9600 mem=16M@0xc0000000 mem=16M@0xc8000000 root=/dev/ram initrd=0xc0400000,4M"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-# CONFIG_SWAP is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NLS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
diff --git a/arch/arm/configs/shannon_defconfig b/arch/arm/configs/shannon_defconfig
deleted file mode 100644
index dfcea70b8034..000000000000
--- a/arch/arm/configs/shannon_defconfig
+++ /dev/null
@@ -1,45 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_SHANNON=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,9600 console=tty1 root=/dev/mtdblock2 init=/linuxrc"
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_MTD=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=y
-CONFIG_PCMCIA_SMC91C92=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_SA1100=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_MINIX_FS=y
-CONFIG_NFS_FS=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/simpad_defconfig b/arch/arm/configs/simpad_defconfig
deleted file mode 100644
index 4e00a4c2c287..000000000000
--- a/arch/arm/configs/simpad_defconfig
+++ /dev/null
@@ -1,100 +0,0 @@
-CONFIG_LOCALVERSION="oe1"
-CONFIG_SYSVIPC=y
-CONFIG_PREEMPT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_SIMPAD=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="mtdparts=sa1100:512k(boot),1m(kernel),-(root) console=ttySA0 root=1f02 noinitrd mem=64M jffs2_orphaned_inodes=delete rootfstype=jffs2"
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=m
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C574=m
-CONFIG_PCMCIA_3C589=m
-CONFIG_PCMCIA_PCNET=m
-CONFIG_PCMCIA_SMC91C92=m
-CONFIG_PCMCIA_XIRC2PS=m
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPPOE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=800
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=600
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_EVBUG=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIO=m
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_FB=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_REISERFS_FS=m
-CONFIG_REISERFS_PROC_INFO=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_SMB_FS=m
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig
index 8b6360e363d1..0fb4c24cfad5 100644
--- a/arch/arm/mach-sa1100/Kconfig
+++ b/arch/arm/mach-sa1100/Kconfig
@@ -41,35 +41,6 @@ config ASSABET_NEPONSET
Microprocessor Development Board (Assabet) with the SA-1111
Development Board (Nepon).
-config SA1100_CERF
- bool "CerfBoard"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- select LEDS_GPIO_REGISTER
- help
- The Intrinsyc CerfBoard is based on the StrongARM 1110 (Discontinued).
- More information is available at:
- <http://www.intrinsyc.com/products/cerfboard/>.
-
- Say Y if configuring for an Intrinsyc CerfBoard.
- Say N otherwise.
-
-choice
- prompt "Cerf Flash available"
- depends on SA1100_CERF
- default SA1100_CERF_FLASH_8MB
-
-config SA1100_CERF_FLASH_8MB
- bool "8MB"
-
-config SA1100_CERF_FLASH_16MB
- bool "16MB"
-
-config SA1100_CERF_FLASH_32MB
- bool "32MB"
-
-endchoice
-
config SA1100_COLLIE
bool "Sharp Zaurus SL5500"
# FIXME: select ARM_SA11x0_CPUFREQ
@@ -79,16 +50,6 @@ config SA1100_COLLIE
help
Say Y here to support the Sharp Zaurus SL5500 PDAs.
-config SA1100_H3100
- bool "Compaq iPAQ H3100"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- select HTC_EGPIO
- select MFD_IPAQ_MICRO
- help
- Say Y here if you intend to run this kernel on the Compaq iPAQ
- H3100 handheld computer.
-
config SA1100_H3600
bool "Compaq iPAQ H3600/H3700"
select ARM_SA1110_CPUFREQ
@@ -98,15 +59,6 @@ config SA1100_H3600
Say Y here if you intend to run this kernel on the Compaq iPAQ
H3600 and H3700 handheld computers.
-config SA1100_BADGE4
- bool "HP Labs BadgePAD 4"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- select SA1111
- help
- Say Y here if you want to build a kernel for the HP Laboratories
- BadgePAD 4.
-
config SA1100_JORNADA720
bool "HP Jornada 720"
# FIXME: select ARM_SA11x0_CPUFREQ
@@ -126,71 +78,8 @@ config SA1100_JORNADA720_SSP
keyboard, touchscreen, backlight and battery. This driver also activates
the generic SSP which it extends.
-config SA1100_HACKKIT
- bool "HackKit Core CPU Board"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- help
- Say Y here to support the HackKit Core CPU Board
- <http://hackkit.eletztrick.de>;
-
-config SA1100_LART
- bool "LART"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- help
- Say Y here if you are using the Linux Advanced Radio Terminal
- (also known as the LART). See <http://www.lartmaker.nl/> for
- information on the LART.
-
-config SA1100_NANOENGINE
- bool "nanoEngine"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- select FORCE_PCI
- select PCI_NANOENGINE
- help
- Say Y here if you are using the Bright Star Engineering nanoEngine.
- See <http://www.brightstareng.com/arm/nanoeng.htm> for information
- on the BSE nanoEngine.
-
-config SA1100_PLEB
- bool "PLEB"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- help
- Say Y here if you are using version 1 of the Portable Linux
- Embedded Board (also known as PLEB).
- See <http://www.disy.cse.unsw.edu.au/Hardware/PLEB/>
- for more information.
-
-config SA1100_SHANNON
- bool "Shannon"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- select REGULATOR
- select REGULATOR_FIXED_VOLTAGE
- help
- The Shannon (also known as a Tuxscreen, and also as a IS2630) was a
- limited edition webphone produced by Philips. The Shannon is a SA1100
- platform with a 640x480 LCD, touchscreen, CIR keyboard, PCMCIA slots,
- and a telco interface.
-
-config SA1100_SIMPAD
- bool "Simpad"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- help
- The SIEMENS webpad SIMpad is based on the StrongARM 1110. There
- are two different versions CL4 and SL4. CL4 has 32MB RAM and 16MB
- FLASH. The SL4 version got 64 MB RAM and 32 MB FLASH and a
- PCMCIA-Slot. The version for the Germany Telecom (DTAG) is the same
- like CL4 in additional it has a PCMCIA-Slot. For more information
- visit <http://www.usa.siemens.com/> or <http://www.siemens.ch/>.
-
config SA1100_SSP
tristate "Generic PIO SSP"
- depends on UNUSED_BOARD_FILES
help
Say Y here to enable support for the generic PIO SSP driver.
This isn't for audio support, but for attached sensors and
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index 28c1cae0053f..b5816d675152 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -9,32 +9,11 @@ obj-y := clock.o generic.o #nmi-oopser.o
# Specific board support
obj-$(CONFIG_SA1100_ASSABET) += assabet.o
obj-$(CONFIG_ASSABET_NEPONSET) += neponset.o
-
-obj-$(CONFIG_SA1100_BADGE4) += badge4.o
-
-obj-$(CONFIG_SA1100_CERF) += cerf.o
-
obj-$(CONFIG_SA1100_COLLIE) += collie.o
-
-obj-$(CONFIG_SA1100_H3100) += h3100.o h3xxx.o
obj-$(CONFIG_SA1100_H3600) += h3600.o h3xxx.o
-
-obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o
-
obj-$(CONFIG_SA1100_JORNADA720) += jornada720.o
obj-$(CONFIG_SA1100_JORNADA720_SSP) += jornada720_ssp.o
-obj-$(CONFIG_SA1100_LART) += lart.o
-
-obj-$(CONFIG_SA1100_NANOENGINE) += nanoengine.o
-obj-$(CONFIG_PCI_NANOENGINE) += pci-nanoengine.o
-
-obj-$(CONFIG_SA1100_PLEB) += pleb.o
-
-obj-$(CONFIG_SA1100_SHANNON) += shannon.o
-
-obj-$(CONFIG_SA1100_SIMPAD) += simpad.o
-
# Miscellaneous functions
obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_SA1100_SSP) += ssp.o
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
deleted file mode 100644
index de79f3502045..000000000000
--- a/arch/arm/mach-sa1100/badge4.c
+++ /dev/null
@@ -1,338 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/badge4.c
- *
- * BadgePAD 4 specific initialization
- *
- * Tim Connors <connors@hpl.hp.com>
- * Christopher Hoover <ch@hpl.hp.com>
- *
- * Copyright (C) 2002 Hewlett-Packard Company
- */
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/delay.h>
-#include <linux/tty.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/errno.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <mach/irqs.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <asm/hardware/sa1111.h>
-
-#include <mach/badge4.h>
-
-#include "generic.h"
-
-static struct resource sa1111_resources[] = {
- [0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000),
- [1] = DEFINE_RES_IRQ(BADGE4_IRQ_GPIO_SA1111),
-};
-
-static int badge4_sa1111_enable(void *data, unsigned devid)
-{
- if (devid == SA1111_DEVID_USB)
- badge4_set_5V(BADGE4_5V_USB, 1);
- return 0;
-}
-
-static void badge4_sa1111_disable(void *data, unsigned devid)
-{
- if (devid == SA1111_DEVID_USB)
- badge4_set_5V(BADGE4_5V_USB, 0);
-}
-
-static struct sa1111_platform_data sa1111_info = {
- .disable_devs = SA1111_DEVID_PS2_MSE,
- .enable = badge4_sa1111_enable,
- .disable = badge4_sa1111_disable,
-};
-
-static u64 sa1111_dmamask = 0xffffffffUL;
-
-static struct platform_device sa1111_device = {
- .name = "sa1111",
- .id = 0,
- .dev = {
- .dma_mask = &sa1111_dmamask,
- .coherent_dma_mask = 0xffffffff,
- .platform_data = &sa1111_info,
- },
- .num_resources = ARRAY_SIZE(sa1111_resources),
- .resource = sa1111_resources,
-};
-
-/* LEDs */
-struct gpio_led badge4_gpio_leds[] = {
- {
- .name = "badge4:red",
- .default_trigger = "heartbeat",
- .gpio = 7,
- },
- {
- .name = "badge4:green",
- .default_trigger = "cpu0",
- .gpio = 9,
- },
-};
-
-static struct gpio_led_platform_data badge4_gpio_led_info = {
- .leds = badge4_gpio_leds,
- .num_leds = ARRAY_SIZE(badge4_gpio_leds),
-};
-
-static struct platform_device badge4_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &badge4_gpio_led_info,
- }
-};
-
-static struct platform_device *devices[] __initdata = {
- &sa1111_device,
- &badge4_leds,
-};
-
-static int __init badge4_sa1111_init(void)
-{
- /*
- * Ensure that the memory bus request/grant signals are setup,
- * and the grant is held in its inactive state
- */
- sa1110_mb_disable();
-
- /*
- * Probe for SA1111.
- */
- return platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-
-/*
- * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit)
- * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
- * Sixty-three 32 KiW Main Blocks (4032 Ki b)
- *
- * <or>
- *
- * 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit)
- * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
- * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
- */
-static struct mtd_partition badge4_partitions[] = {
- {
- .name = "BLOB boot loader",
- .offset = 0,
- .size = 0x0000A000
- }, {
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00006000
- }, {
- .name = "root",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL
- }
-};
-
-static struct flash_platform_data badge4_flash_data = {
- .map_name = "cfi_probe",
- .parts = badge4_partitions,
- .nr_parts = ARRAY_SIZE(badge4_partitions),
-};
-
-static struct resource badge4_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M);
-
-static int five_v_on __initdata = 0;
-
-static int __init five_v_on_setup(char *ignore)
-{
- five_v_on = 1;
- return 1;
-}
-__setup("five_v_on", five_v_on_setup);
-
-
-static int __init badge4_init(void)
-{
- int ret;
-
- if (!machine_is_badge4())
- return -ENODEV;
-
- /* LCD */
- GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
- BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
- BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
- BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
- BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
- BADGE4_GPIO_GPC_VID);
- GPDR &= ~BADGE4_GPIO_INT_VID;
- GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
- BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
- BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
- BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
- BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
- BADGE4_GPIO_GPC_VID);
-
- /* SDRAM SPD i2c */
- GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
- GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
-
- /* uart */
- GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
- GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
-
- /* CPLD muxsel0 input for mux/adc chip select */
- GPCR = BADGE4_GPIO_MUXSEL0;
- GPDR |= BADGE4_GPIO_MUXSEL0;
-
- /* test points: J5, J6 as inputs, J7 outputs */
- GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6);
- GPCR = BADGE4_GPIO_TESTPT_J7;
- GPDR |= BADGE4_GPIO_TESTPT_J7;
-
- /* 5V supply rail. */
- GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
- GPDR |= BADGE4_GPIO_PCMEN5V;
-
- /* CPLD sdram type inputs; set up by blob */
- //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
- printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
- !!(GPLR & BADGE4_GPIO_SDTYP1),
- !!(GPLR & BADGE4_GPIO_SDTYP0));
-
- /* SA1111 reset pin; set up by blob */
- //GPSR = BADGE4_GPIO_SA1111_NRST;
- //GPDR |= BADGE4_GPIO_SA1111_NRST;
-
-
- /* power management cruft */
- PGSR = 0;
- PWER = 0;
- PCFR = 0;
- PSDR = 0;
-
- PWER |= PWER_GPIO26; /* wake up on an edge from TESTPT_J5 */
- PWER |= PWER_RTC; /* wake up if rtc fires */
-
- /* drive sa1111_nrst during sleep */
- PGSR |= BADGE4_GPIO_SA1111_NRST;
- /* drive CPLD as is during sleep */
- PGSR |= (GPLR & (BADGE4_GPIO_SDTYP0|BADGE4_GPIO_SDTYP1));
-
-
- /* Now bring up the SA-1111. */
- ret = badge4_sa1111_init();
- if (ret < 0)
- printk(KERN_ERR
- "%s: SA-1111 initialization failed (%d)\n",
- __func__, ret);
-
-
- /* maybe turn on 5v0 from the start */
- badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on);
-
- sa11x0_register_mtd(&badge4_flash_data, &badge4_flash_resource, 1);
-
- return 0;
-}
-
-arch_initcall(badge4_init);
-
-
-static unsigned badge4_5V_bitmap = 0;
-
-void badge4_set_5V(unsigned subsystem, int on)
-{
- unsigned long flags;
- unsigned old_5V_bitmap;
-
- local_irq_save(flags);
-
- old_5V_bitmap = badge4_5V_bitmap;
-
- if (on) {
- badge4_5V_bitmap |= subsystem;
- } else {
- badge4_5V_bitmap &= ~subsystem;
- }
-
- /* detect on->off and off->on transitions */
- if ((!old_5V_bitmap) && (badge4_5V_bitmap)) {
- /* was off, now on */
- printk(KERN_INFO "%s: enabling 5V supply rail\n", __func__);
- GPSR = BADGE4_GPIO_PCMEN5V;
- } else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) {
- /* was on, now off */
- printk(KERN_INFO "%s: disabling 5V supply rail\n", __func__);
- GPCR = BADGE4_GPIO_PCMEN5V;
- }
-
- local_irq_restore(flags);
-}
-EXPORT_SYMBOL(badge4_set_5V);
-
-
-static struct map_desc badge4_io_desc[] __initdata = {
- { /* SRAM bank 1 */
- .virtual = 0xf1000000,
- .pfn = __phys_to_pfn(0x08000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }, { /* SRAM bank 2 */
- .virtual = 0xf2000000,
- .pfn = __phys_to_pfn(0x10000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }
-};
-
-static void
-badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- if (!state) {
- Ser1SDCR0 |= SDCR0_UART;
- }
-}
-
-static struct sa1100_port_fns badge4_port_fns __initdata = {
- .pm = badge4_uart_pm,
-};
-
-static void __init badge4_map_io(void)
-{
- sa1100_map_io();
- iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc));
-
- sa1100_register_uart_fns(&badge4_port_fns);
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-}
-
-MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
- .atag_offset = 0x100,
- .map_io = badge4_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_late = sa11x0_init_late,
- .init_time = sa1100_timer_init,
-#ifdef CONFIG_SA1111
- .dma_zone_size = SZ_1M,
-#endif
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
deleted file mode 100644
index f9243a3fd69c..000000000000
--- a/arch/arm/mach-sa1100/cerf.c
+++ /dev/null
@@ -1,181 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/cerf.c
- *
- * Apr-2003 : Removed some old PDA crud [FB]
- * Oct-2003 : Added uart2 resource [FB]
- * Jan-2004 : Removed io map for flash [FB]
- */
-
-#include <linux/init.h>
-#include <linux/gpio/machine.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-
-#include <mach/cerf.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/irqs.h>
-#include "generic.h"
-
-static struct resource cerfuart2_resources[] = {
- [0] = DEFINE_RES_MEM(0x80030000, SZ_64K),
-};
-
-static struct platform_device cerfuart2_device = {
- .name = "sa11x0-uart",
- .id = 2,
- .num_resources = ARRAY_SIZE(cerfuart2_resources),
- .resource = cerfuart2_resources,
-};
-
-/* Compact Flash */
-static struct gpiod_lookup_table cerf_cf_gpio_table = {
- .dev_id = "sa11x0-pcmcia.1",
- .table = {
- GPIO_LOOKUP("gpio", 19, "bvd2", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 20, "bvd1", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 21, "reset", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 22, "ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 23, "detect", GPIO_ACTIVE_LOW),
- { },
- },
-};
-
-/* LEDs */
-struct gpio_led cerf_gpio_leds[] = {
- {
- .name = "cerf:d0",
- .default_trigger = "heartbeat",
- .gpio = 0,
- },
- {
- .name = "cerf:d1",
- .default_trigger = "cpu0",
- .gpio = 1,
- },
- {
- .name = "cerf:d2",
- .default_trigger = "default-on",
- .gpio = 2,
- },
- {
- .name = "cerf:d3",
- .default_trigger = "default-on",
- .gpio = 3,
- },
-
-};
-
-static struct gpio_led_platform_data cerf_gpio_led_info = {
- .leds = cerf_gpio_leds,
- .num_leds = ARRAY_SIZE(cerf_gpio_leds),
-};
-
-static struct platform_device *cerf_devices[] __initdata = {
- &cerfuart2_device,
-};
-
-#ifdef CONFIG_SA1100_CERF_FLASH_32MB
-# define CERF_FLASH_SIZE 0x02000000
-#elif defined CONFIG_SA1100_CERF_FLASH_16MB
-# define CERF_FLASH_SIZE 0x01000000
-#elif defined CONFIG_SA1100_CERF_FLASH_8MB
-# define CERF_FLASH_SIZE 0x00800000
-#else
-# error "Undefined flash size for CERF"
-#endif
-
-static struct mtd_partition cerf_partitions[] = {
- {
- .name = "Bootloader",
- .size = 0x00020000,
- .offset = 0x00000000,
- }, {
- .name = "Params",
- .size = 0x00040000,
- .offset = 0x00020000,
- }, {
- .name = "Kernel",
- .size = 0x00100000,
- .offset = 0x00060000,
- }, {
- .name = "Filesystem",
- .size = CERF_FLASH_SIZE-0x00160000,
- .offset = 0x00160000,
- }
-};
-
-static struct flash_platform_data cerf_flash_data = {
- .map_name = "cfi_probe",
- .parts = cerf_partitions,
- .nr_parts = ARRAY_SIZE(cerf_partitions),
-};
-
-static struct resource cerf_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
-
-static void __init cerf_init_irq(void)
-{
- sa1100_init_irq();
- irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
-}
-
-static struct map_desc cerf_io_desc[] __initdata = {
- { /* Crystal Ethernet Chip */
- .virtual = 0xf0000000,
- .pfn = __phys_to_pfn(0x08000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }
-};
-
-static void __init cerf_map_io(void)
-{
- sa1100_map_io();
- iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 2); /* disable this and the uart2 device for sa1100_fir */
- sa1100_register_uart(2, 1);
-}
-
-static struct mcp_plat_data cerf_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
-};
-
-static void __init cerf_init(void)
-{
- sa11x0_ppc_configure_mcp();
- platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
- gpio_led_register_device(-1, &cerf_gpio_led_info);
- sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
- sa11x0_register_mcp(&cerf_mcp_data);
- sa11x0_register_pcmcia(1, &cerf_cf_gpio_table);
-}
-
-MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
- /* Maintainer: support@intrinsyc.com */
- .map_io = cerf_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = cerf_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = cerf_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c
deleted file mode 100644
index 51eaeeaf3f10..000000000000
--- a/arch/arm/mach-sa1100/h3100.c
+++ /dev/null
@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Support for Compaq iPAQ H3100 handheld computer
- *
- * Copyright (c) 2000,1 Compaq Computer Corporation. (Author: Jamey Hicks)
- * Copyright (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru>
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-
-#include <video/sa1100fb.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <linux/platform_data/irda-sa11x0.h>
-
-#include <mach/h3xxx.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-/*
- * helper for sa1100fb
- */
-static struct gpio h3100_lcd_gpio[] = {
- { H3100_GPIO_LCD_3V_ON, GPIOF_OUT_INIT_LOW, "LCD 3V" },
- { H3XXX_EGPIO_LCD_ON, GPIOF_OUT_INIT_LOW, "LCD ON" },
-};
-
-static bool h3100_lcd_request(void)
-{
- static bool h3100_lcd_ok;
- int rc;
-
- if (h3100_lcd_ok)
- return true;
-
- rc = gpio_request_array(h3100_lcd_gpio, ARRAY_SIZE(h3100_lcd_gpio));
- if (rc)
- pr_err("%s: can't request GPIOs\n", __func__);
- else
- h3100_lcd_ok = true;
-
- return h3100_lcd_ok;
-}
-
-static void h3100_lcd_power(int enable)
-{
- if (!h3100_lcd_request())
- return;
-
- gpio_set_value(H3100_GPIO_LCD_3V_ON, enable);
- gpio_set_value(H3XXX_EGPIO_LCD_ON, enable);
-}
-
-static struct sa1100fb_mach_info h3100_lcd_info = {
- .pixclock = 406977, .bpp = 4,
- .xres = 320, .yres = 240,
-
- .hsync_len = 26, .vsync_len = 41,
- .left_margin = 4, .upper_margin = 0,
- .right_margin = 4, .lower_margin = 0,
-
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
- .cmap_greyscale = 1,
- .cmap_inverse = 1,
-
- .lccr0 = LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
-
- .lcd_power = h3100_lcd_power,
-};
-
-static void __init h3100_map_io(void)
-{
- h3xxx_map_io();
-
- /* Older bootldrs put GPIO2-9 in alternate mode on the
- assumption that they are used for video */
- GAFR &= ~0x000001fb;
-}
-
-/*
- * This turns the IRDA power on or off on the Compaq H3100
- */
-static struct gpio h3100_irda_gpio[] = {
- { H3100_GPIO_IR_ON, GPIOF_OUT_INIT_LOW, "IrDA power" },
- { H3100_GPIO_IR_FSEL, GPIOF_OUT_INIT_LOW, "IrDA fsel" },
-};
-
-static int h3100_irda_set_power(struct device *dev, unsigned int state)
-{
- gpio_set_value(H3100_GPIO_IR_ON, state);
- return 0;
-}
-
-static void h3100_irda_set_speed(struct device *dev, unsigned int speed)
-{
- gpio_set_value(H3100_GPIO_IR_FSEL, !(speed < 4000000));
-}
-
-static int h3100_irda_startup(struct device *dev)
-{
- return gpio_request_array(h3100_irda_gpio, sizeof(h3100_irda_gpio));
-}
-
-static void h3100_irda_shutdown(struct device *dev)
-{
- return gpio_free_array(h3100_irda_gpio, sizeof(h3100_irda_gpio));
-}
-
-static struct irda_platform_data h3100_irda_data = {
- .set_power = h3100_irda_set_power,
- .set_speed = h3100_irda_set_speed,
- .startup = h3100_irda_startup,
- .shutdown = h3100_irda_shutdown,
-};
-
-static void __init h3100_mach_init(void)
-{
- h3xxx_mach_init();
-
- sa11x0_register_pcmcia(-1, NULL);
- sa11x0_register_lcd(&h3100_lcd_info);
- sa11x0_register_irda(&h3100_irda_data);
-}
-
-MACHINE_START(H3100, "Compaq iPAQ H3100")
- .atag_offset = 0x100,
- .map_io = h3100_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = h3100_mach_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
-
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
deleted file mode 100644
index 3085f1c2e586..000000000000
--- a/arch/arm/mach-sa1100/hackkit.c
+++ /dev/null
@@ -1,184 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/hackkit.c
- *
- * Copyright (C) 2002 Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
- *
- * This file contains all HackKit tweaks. Based on original work from
- * Nicolas Pitre's assabet fixes
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/tty.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/cpufreq.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/serial_core.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/tty.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <linux/platform_device.h>
-#include <linux/pgtable.h>
-
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-/**********************************************************************
- * prototypes
- */
-
-/* init funcs */
-static void __init hackkit_map_io(void);
-
-static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate);
-
-/**********************************************************************
- * global data
- */
-
-/**********************************************************************
- * static data
- */
-
-static struct map_desc hackkit_io_desc[] __initdata = {
- { /* Flash bank 0 */
- .virtual = 0xe8000000,
- .pfn = __phys_to_pfn(0x00000000),
- .length = 0x01000000,
- .type = MT_DEVICE
- },
-};
-
-static struct sa1100_port_fns hackkit_port_fns __initdata = {
- .pm = hackkit_uart_pm,
-};
-
-/**********************************************************************
- * Static functions
- */
-
-static void __init hackkit_map_io(void)
-{
- sa1100_map_io();
- iotable_init(hackkit_io_desc, ARRAY_SIZE(hackkit_io_desc));
-
- sa1100_register_uart_fns(&hackkit_port_fns);
- sa1100_register_uart(0, 1); /* com port */
- sa1100_register_uart(1, 2);
- sa1100_register_uart(2, 3); /* radio module */
-
- Ser1SDCR0 |= SDCR0_SUS;
-}
-
-/**
- * hackkit_uart_pm - powermgmt callback function for system 3 UART
- * @port: uart port structure
- * @state: pm state
- * @oldstate: old pm state
- *
- */
-static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- /* TODO: switch on/off uart in powersave mode */
-}
-
-static struct mtd_partition hackkit_partitions[] = {
- {
- .name = "BLOB",
- .size = 0x00040000,
- .offset = 0x00000000,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- }, {
- .name = "config",
- .size = 0x00040000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "kernel",
- .size = 0x00100000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "initrd",
- .size = 0x00180000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "rootfs",
- .size = 0x700000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "data",
- .size = MTDPART_SIZ_FULL,
- .offset = MTDPART_OFS_APPEND,
- }
-};
-
-static struct flash_platform_data hackkit_flash_data = {
- .map_name = "cfi_probe",
- .parts = hackkit_partitions,
- .nr_parts = ARRAY_SIZE(hackkit_partitions),
-};
-
-static struct resource hackkit_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
-
-/* LEDs */
-struct gpio_led hackkit_gpio_leds[] = {
- {
- .name = "hackkit:red",
- .default_trigger = "cpu0",
- .gpio = 22,
- },
- {
- .name = "hackkit:green",
- .default_trigger = "heartbeat",
- .gpio = 23,
- },
-};
-
-static struct gpio_led_platform_data hackkit_gpio_led_info = {
- .leds = hackkit_gpio_leds,
- .num_leds = ARRAY_SIZE(hackkit_gpio_leds),
-};
-
-static struct platform_device hackkit_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &hackkit_gpio_led_info,
- }
-};
-
-static void __init hackkit_init(void)
-{
- sa11x0_register_mtd(&hackkit_flash_data, &hackkit_flash_resource, 1);
- platform_device_register(&hackkit_leds);
-}
-
-/**********************************************************************
- * Exported Functions
- */
-
-MACHINE_START(HACKKIT, "HackKit Cpu Board")
- .atag_offset = 0x100,
- .map_io = hackkit_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = hackkit_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/include/mach/badge4.h b/arch/arm/mach-sa1100/include/mach/badge4.h
deleted file mode 100644
index 90e744a54ed5..000000000000
--- a/arch/arm/mach-sa1100/include/mach/badge4.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/mach-sa1100/include/mach/badge4.h
- *
- * Tim Connors <connors@hpl.hp.com>
- * Christopher Hoover <ch@hpl.hp.com>
- *
- * Copyright (C) 2002 Hewlett-Packard Company
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <mach/hardware.h> instead"
-#endif
-
-#define BADGE4_SA1111_BASE (0x48000000)
-
-/* GPIOs on the BadgePAD 4 */
-#define BADGE4_GPIO_INT_1111 GPIO_GPIO0 /* SA-1111 IRQ */
-
-#define BADGE4_GPIO_INT_VID GPIO_GPIO1 /* Video expansion */
-#define BADGE4_GPIO_LGP2 GPIO_GPIO2 /* GPIO_LDD8 */
-#define BADGE4_GPIO_LGP3 GPIO_GPIO3 /* GPIO_LDD9 */
-#define BADGE4_GPIO_LGP4 GPIO_GPIO4 /* GPIO_LDD10 */
-#define BADGE4_GPIO_LGP5 GPIO_GPIO5 /* GPIO_LDD11 */
-#define BADGE4_GPIO_LGP6 GPIO_GPIO6 /* GPIO_LDD12 */
-#define BADGE4_GPIO_LGP7 GPIO_GPIO7 /* GPIO_LDD13 */
-#define BADGE4_GPIO_LGP8 GPIO_GPIO8 /* GPIO_LDD14 */
-#define BADGE4_GPIO_LGP9 GPIO_GPIO9 /* GPIO_LDD15 */
-#define BADGE4_GPIO_GPA_VID GPIO_GPIO10 /* Video expansion */
-#define BADGE4_GPIO_GPB_VID GPIO_GPIO11 /* Video expansion */
-#define BADGE4_GPIO_GPC_VID GPIO_GPIO12 /* Video expansion */
-
-#define BADGE4_GPIO_UART_HS1 GPIO_GPIO13
-#define BADGE4_GPIO_UART_HS2 GPIO_GPIO14
-
-#define BADGE4_GPIO_MUXSEL0 GPIO_GPIO15
-#define BADGE4_GPIO_TESTPT_J7 GPIO_GPIO16
-
-#define BADGE4_GPIO_SDSDA GPIO_GPIO17 /* SDRAM SPD Data */
-#define BADGE4_GPIO_SDSCL GPIO_GPIO18 /* SDRAM SPD Clock */
-#define BADGE4_GPIO_SDTYP0 GPIO_GPIO19 /* SDRAM Type Control */
-#define BADGE4_GPIO_SDTYP1 GPIO_GPIO20 /* SDRAM Type Control */
-
-#define BADGE4_GPIO_BGNT_1111 GPIO_GPIO21 /* GPIO_MBGNT */
-#define BADGE4_GPIO_BREQ_1111 GPIO_GPIO22 /* GPIO_TREQA */
-
-#define BADGE4_GPIO_TESTPT_J6 GPIO_GPIO23
-
-#define BADGE4_GPIO_PCMEN5V GPIO_GPIO24 /* 5V power */
-
-#define BADGE4_GPIO_SA1111_NRST GPIO_GPIO25 /* SA-1111 nRESET */
-
-#define BADGE4_GPIO_TESTPT_J5 GPIO_GPIO26
-
-#define BADGE4_GPIO_CLK_1111 GPIO_GPIO27 /* GPIO_32_768kHz */
-
-/* Interrupts on the BadgePAD 4 */
-#define BADGE4_IRQ_GPIO_SA1111 IRQ_GPIO0 /* SA-1111 interrupt */
-
-
-/* PCM5ENV Usage tracking */
-
-#define BADGE4_5V_PCMCIA_SOCK0 (1<<0)
-#define BADGE4_5V_PCMCIA_SOCK1 (1<<1)
-#define BADGE4_5V_PCMCIA_SOCK(n) (1<<(n))
-#define BADGE4_5V_USB (1<<2)
-#define BADGE4_5V_INITIALLY (1<<3)
-
-#ifndef __ASSEMBLY__
-extern void badge4_set_5V(unsigned subsystem, int on);
-#endif
diff --git a/arch/arm/mach-sa1100/include/mach/cerf.h b/arch/arm/mach-sa1100/include/mach/cerf.h
deleted file mode 100644
index 59c185ebd494..000000000000
--- a/arch/arm/mach-sa1100/include/mach/cerf.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/mach-sa1100/include/mach/cerf.h
- *
- * Apr-2003 : Removed some old PDA crud [FB]
- */
-#ifndef _INCLUDE_CERF_H_
-#define _INCLUDE_CERF_H_
-
-
-#define CERF_ETH_IO 0xf0000000
-#define CERF_ETH_IRQ IRQ_GPIO26
-
-#define CERF_GPIO_CF_BVD2 19
-#define CERF_GPIO_CF_BVD1 20
-#define CERF_GPIO_CF_RESET 21
-#define CERF_GPIO_CF_IRQ 22
-#define CERF_GPIO_CF_CD 23
-
-#endif // _INCLUDE_CERF_H_
diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h
deleted file mode 100644
index 8d5ee1438956..000000000000
--- a/arch/arm/mach-sa1100/include/mach/nanoengine.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/mach-sa1100/include/mach/nanoengine.h
- *
- * This file contains the hardware specific definitions for nanoEngine.
- * Only include this file from SA1100-specific files.
- *
- * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
- */
-#ifndef __ASM_ARCH_NANOENGINE_H
-#define __ASM_ARCH_NANOENGINE_H
-
-#include <mach/irqs.h>
-
-#define GPIO_PC_READY0 11 /* ready for socket 0 (active high)*/
-#define GPIO_PC_READY1 12 /* ready for socket 1 (active high) */
-#define GPIO_PC_CD0 13 /* detect for socket 0 (active low) */
-#define GPIO_PC_CD1 14 /* detect for socket 1 (active low) */
-#define GPIO_PC_RESET0 15 /* reset socket 0 */
-#define GPIO_PC_RESET1 16 /* reset socket 1 */
-
-#define NANOENGINE_IRQ_GPIO_PCI IRQ_GPIO0
-#define NANOENGINE_IRQ_GPIO_PC_READY0 IRQ_GPIO11
-#define NANOENGINE_IRQ_GPIO_PC_READY1 IRQ_GPIO12
-#define NANOENGINE_IRQ_GPIO_PC_CD0 IRQ_GPIO13
-#define NANOENGINE_IRQ_GPIO_PC_CD1 IRQ_GPIO14
-
-/*
- * nanoEngine Memory Map:
- *
- * 0000.0000 - 003F.0000 - 4 MB Flash
- * C000.0000 - C1FF.FFFF - 32 MB SDRAM
- * 1860.0000 - 186F.FFFF - 1 MB Internal PCI Memory Read/Write
- * 18A1.0000 - 18A1.FFFF - 64 KB Internal PCI Config Space
- * 4000.0000 - 47FF.FFFF - 128 MB External Bus I/O - Multiplexed Mode
- * 4800.0000 - 4FFF.FFFF - 128 MB External Bus I/O - Non-Multiplexed Mode
- *
- */
-
-#define NANO_PCI_MEM_RW_PHYS 0x18600000
-#define NANO_PCI_MEM_RW_VIRT 0xf1000000
-#define NANO_PCI_MEM_RW_SIZE SZ_1M
-#define NANO_PCI_CONFIG_SPACE_PHYS 0x18A10000
-#define NANO_PCI_CONFIG_SPACE_VIRT 0xf2000000
-#define NANO_PCI_CONFIG_SPACE_SIZE SZ_64K
-
-#endif
-
diff --git a/arch/arm/mach-sa1100/include/mach/shannon.h b/arch/arm/mach-sa1100/include/mach/shannon.h
deleted file mode 100644
index d830375f329c..000000000000
--- a/arch/arm/mach-sa1100/include/mach/shannon.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _INCLUDE_SHANNON_H
-#define _INCLUDE_SHANNON_H
-
-/* taken from comp.os.inferno Tue, 12 Sep 2000 09:21:50 GMT,
- * written by <forsyth@vitanuova.com> */
-
-#define SHANNON_GPIO_SPI_FLASH GPIO_GPIO (0) /* Output - Driven low, enables SPI to flash */
-#define SHANNON_GPIO_SPI_DSP GPIO_GPIO (1) /* Output - Driven low, enables SPI to DSP */
-/* lcd lower = GPIO 2-9 */
-#define SHANNON_GPIO_SPI_OUTPUT GPIO_GPIO (10) /* Output - SPI output to DSP */
-#define SHANNON_GPIO_SPI_INPUT GPIO_GPIO (11) /* Input - SPI input from DSP */
-#define SHANNON_GPIO_SPI_CLOCK GPIO_GPIO (12) /* Output - Clock for SPI */
-#define SHANNON_GPIO_SPI_FRAME GPIO_GPIO (13) /* Output - Frame marker - not used */
-#define SHANNON_GPIO_SPI_RTS GPIO_GPIO (14) /* Input - SPI Ready to Send */
-#define SHANNON_IRQ_GPIO_SPI_RTS IRQ_GPIO14
-#define SHANNON_GPIO_SPI_CTS GPIO_GPIO (15) /* Output - SPI Clear to Send */
-#define SHANNON_GPIO_IRQ_CODEC GPIO_GPIO (16) /* in, irq from ucb1200 */
-#define SHANNON_IRQ_GPIO_IRQ_CODEC IRQ_GPIO16
-#define SHANNON_GPIO_DSP_RESET GPIO_GPIO (17) /* Output - Drive low to reset the DSP */
-#define SHANNON_GPIO_CODEC_RESET GPIO_GPIO (18) /* Output - Drive low to reset the UCB1x00 */
-#define SHANNON_GPIO_U3_RTS GPIO_GPIO (19) /* ?? */
-#define SHANNON_GPIO_U3_CTS GPIO_GPIO (20) /* ?? */
-#define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */
-#define SHANNON_GPIO_DISP_EN 22 /* out */
-/* XXX GPIO 23 unaccounted for */
-#define SHANNON_GPIO_EJECT_0 24 /* in */
-#define SHANNON_GPIO_EJECT_1 25 /* in */
-#define SHANNON_GPIO_RDY_0 26 /* in */
-#define SHANNON_GPIO_RDY_1 27 /* in */
-
-/* MCP UCB codec GPIO pins... */
-
-#define SHANNON_UCB_GPIO_BACKLIGHT 9
-#define SHANNON_UCB_GPIO_BRIGHT_MASK 7
-#define SHANNON_UCB_GPIO_BRIGHT 6
-#define SHANNON_UCB_GPIO_CONTRAST_MASK 0x3f
-#define SHANNON_UCB_GPIO_CONTRAST 0
-
-#endif
diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h
deleted file mode 100644
index d53d680de3d9..000000000000
--- a/arch/arm/mach-sa1100/include/mach/simpad.h
+++ /dev/null
@@ -1,159 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * arch/arm/mach-sa1100/include/mach/simpad.h
- *
- * based of assabet.h same as HUW_Webpanel
- *
- * This file contains the hardware specific definitions for SIMpad
- *
- * 2001/05/14 Juergen Messerer <juergen.messerer@freesurf.ch>
- */
-
-#ifndef __ASM_ARCH_SIMPAD_H
-#define __ASM_ARCH_SIMPAD_H
-
-
-#define GPIO_UART1_RTS GPIO_GPIO14
-#define GPIO_UART1_DTR GPIO_GPIO7
-#define GPIO_UART1_CTS GPIO_GPIO8
-#define GPIO_UART1_DCD GPIO_GPIO23
-#define GPIO_UART1_DSR GPIO_GPIO6
-
-#define GPIO_UART3_RTS GPIO_GPIO12
-#define GPIO_UART3_DTR GPIO_GPIO16
-#define GPIO_UART3_CTS GPIO_GPIO13
-#define GPIO_UART3_DCD GPIO_GPIO18
-#define GPIO_UART3_DSR GPIO_GPIO17
-
-#define GPIO_POWER_BUTTON GPIO_GPIO0
-#define GPIO_UCB1300_IRQ GPIO_GPIO22 /* UCB GPIO and touchscreen */
-
-#define IRQ_UART1_CTS IRQ_GPIO15
-#define IRQ_UART1_DCD GPIO_GPIO23
-#define IRQ_UART1_DSR GPIO_GPIO6
-#define IRQ_UART3_CTS GPIO_GPIO13
-#define IRQ_UART3_DCD GPIO_GPIO18
-#define IRQ_UART3_DSR GPIO_GPIO17
-
-#define IRQ_GPIO_UCB1300_IRQ IRQ_GPIO22
-#define IRQ_GPIO_POWER_BUTTON IRQ_GPIO0
-
-
-/*--- PCMCIA ---*/
-#define GPIO_CF_CD 24
-#define GPIO_CF_IRQ 1
-
-/*--- SmartCard ---*/
-#define GPIO_SMART_CARD GPIO_GPIO10
-#define IRQ_GPIO_SMARD_CARD IRQ_GPIO10
-
-/*--- ucb1x00 GPIO ---*/
-#define SIMPAD_UCB1X00_GPIO_BASE (GPIO_MAX + 1)
-#define SIMPAD_UCB1X00_GPIO_PROG1 (SIMPAD_UCB1X00_GPIO_BASE)
-#define SIMPAD_UCB1X00_GPIO_PROG2 (SIMPAD_UCB1X00_GPIO_BASE + 1)
-#define SIMPAD_UCB1X00_GPIO_UP (SIMPAD_UCB1X00_GPIO_BASE + 2)
-#define SIMPAD_UCB1X00_GPIO_DOWN (SIMPAD_UCB1X00_GPIO_BASE + 3)
-#define SIMPAD_UCB1X00_GPIO_LEFT (SIMPAD_UCB1X00_GPIO_BASE + 4)
-#define SIMPAD_UCB1X00_GPIO_RIGHT (SIMPAD_UCB1X00_GPIO_BASE + 5)
-#define SIMPAD_UCB1X00_GPIO_6 (SIMPAD_UCB1X00_GPIO_BASE + 6)
-#define SIMPAD_UCB1X00_GPIO_7 (SIMPAD_UCB1X00_GPIO_BASE + 7)
-#define SIMPAD_UCB1X00_GPIO_HEADSET (SIMPAD_UCB1X00_GPIO_BASE + 8)
-#define SIMPAD_UCB1X00_GPIO_SPEAKER (SIMPAD_UCB1X00_GPIO_BASE + 9)
-
-/*--- CS3 Latch ---*/
-#define SIMPAD_CS3_GPIO_BASE (GPIO_MAX + 11)
-#define SIMPAD_CS3_VCC_5V_EN (SIMPAD_CS3_GPIO_BASE)
-#define SIMPAD_CS3_VCC_3V_EN (SIMPAD_CS3_GPIO_BASE + 1)
-#define SIMPAD_CS3_EN1 (SIMPAD_CS3_GPIO_BASE + 2)
-#define SIMPAD_CS3_EN0 (SIMPAD_CS3_GPIO_BASE + 3)
-#define SIMPAD_CS3_DISPLAY_ON (SIMPAD_CS3_GPIO_BASE + 4)
-#define SIMPAD_CS3_PCMCIA_BUFF_DIS (SIMPAD_CS3_GPIO_BASE + 5)
-#define SIMPAD_CS3_MQ_RESET (SIMPAD_CS3_GPIO_BASE + 6)
-#define SIMPAD_CS3_PCMCIA_RESET (SIMPAD_CS3_GPIO_BASE + 7)
-#define SIMPAD_CS3_DECT_POWER_ON (SIMPAD_CS3_GPIO_BASE + 8)
-#define SIMPAD_CS3_IRDA_SD (SIMPAD_CS3_GPIO_BASE + 9)
-#define SIMPAD_CS3_RS232_ON (SIMPAD_CS3_GPIO_BASE + 10)
-#define SIMPAD_CS3_SD_MEDIAQ (SIMPAD_CS3_GPIO_BASE + 11)
-#define SIMPAD_CS3_LED2_ON (SIMPAD_CS3_GPIO_BASE + 12)
-#define SIMPAD_CS3_IRDA_MODE (SIMPAD_CS3_GPIO_BASE + 13)
-#define SIMPAD_CS3_ENABLE_5V (SIMPAD_CS3_GPIO_BASE + 14)
-#define SIMPAD_CS3_RESET_SIMCARD (SIMPAD_CS3_GPIO_BASE + 15)
-
-#define SIMPAD_CS3_PCMCIA_BVD1 (SIMPAD_CS3_GPIO_BASE + 16)
-#define SIMPAD_CS3_PCMCIA_BVD2 (SIMPAD_CS3_GPIO_BASE + 17)
-#define SIMPAD_CS3_PCMCIA_VS1 (SIMPAD_CS3_GPIO_BASE + 18)
-#define SIMPAD_CS3_PCMCIA_VS2 (SIMPAD_CS3_GPIO_BASE + 19)
-#define SIMPAD_CS3_LOCK_IND (SIMPAD_CS3_GPIO_BASE + 20)
-#define SIMPAD_CS3_CHARGING_STATE (SIMPAD_CS3_GPIO_BASE + 21)
-#define SIMPAD_CS3_PCMCIA_SHORT (SIMPAD_CS3_GPIO_BASE + 22)
-#define SIMPAD_CS3_GPIO_23 (SIMPAD_CS3_GPIO_BASE + 23)
-
-#define CS3_BASE IOMEM(0xf1000000)
-
-long simpad_get_cs3_ro(void);
-long simpad_get_cs3_shadow(void);
-void simpad_set_cs3_bit(int value);
-void simpad_clear_cs3_bit(int value);
-
-#define VCC_5V_EN 0x0001 /* For 5V PCMCIA */
-#define VCC_3V_EN 0x0002 /* FOR 3.3V PCMCIA */
-#define EN1 0x0004 /* This is only for EPROM's */
-#define EN0 0x0008 /* Both should be enable for 3.3V or 5V */
-#define DISPLAY_ON 0x0010
-#define PCMCIA_BUFF_DIS 0x0020
-#define MQ_RESET 0x0040
-#define PCMCIA_RESET 0x0080
-#define DECT_POWER_ON 0x0100
-#define IRDA_SD 0x0200 /* Shutdown for powersave */
-#define RS232_ON 0x0400
-#define SD_MEDIAQ 0x0800 /* Shutdown for powersave */
-#define LED2_ON 0x1000
-#define IRDA_MODE 0x2000 /* Fast/Slow IrDA mode */
-#define ENABLE_5V 0x4000 /* Enable 5V circuit */
-#define RESET_SIMCARD 0x8000
-
-#define PCMCIA_BVD1 0x01
-#define PCMCIA_BVD2 0x02
-#define PCMCIA_VS1 0x04
-#define PCMCIA_VS2 0x08
-#define LOCK_IND 0x10
-#define CHARGING_STATE 0x20
-#define PCMCIA_SHORT 0x40
-
-/*--- Battery ---*/
-struct simpad_battery {
- unsigned char ac_status; /* line connected yes/no */
- unsigned char status; /* battery loading yes/no */
- unsigned char percentage; /* percentage loaded */
- unsigned short life; /* life till empty */
-};
-
-/* These should match the apm_bios.h definitions */
-#define SIMPAD_AC_STATUS_AC_OFFLINE 0x00
-#define SIMPAD_AC_STATUS_AC_ONLINE 0x01
-#define SIMPAD_AC_STATUS_AC_BACKUP 0x02 /* What does this mean? */
-#define SIMPAD_AC_STATUS_AC_UNKNOWN 0xff
-
-/* These bitfields are rarely "or'd" together */
-#define SIMPAD_BATT_STATUS_HIGH 0x01
-#define SIMPAD_BATT_STATUS_LOW 0x02
-#define SIMPAD_BATT_STATUS_CRITICAL 0x04
-#define SIMPAD_BATT_STATUS_CHARGING 0x08
-#define SIMPAD_BATT_STATUS_CHARGE_MAIN 0x10
-#define SIMPAD_BATT_STATUS_DEAD 0x20 /* Battery will not charge */
-#define SIMPAD_BATT_NOT_INSTALLED 0x20 /* For expansion pack batteries */
-#define SIMPAD_BATT_STATUS_FULL 0x40 /* Battery fully charged (and connected to AC) */
-#define SIMPAD_BATT_STATUS_NOBATT 0x80
-#define SIMPAD_BATT_STATUS_UNKNOWN 0xff
-
-extern int simpad_get_battery(struct simpad_battery* );
-
-#endif // __ASM_ARCH_SIMPAD_H
-
-
-
-
-
-
-
-
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
deleted file mode 100644
index e3a0279750e3..000000000000
--- a/arch/arm/mach-sa1100/lart.c
+++ /dev/null
@@ -1,177 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/lart.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/tty.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <linux/platform_device.h>
-
-#include <video/sa1100fb.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-static struct mcp_plat_data lart_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
-};
-
-#ifdef LART_GREY_LCD
-static struct sa1100fb_mach_info lart_grey_info = {
- .pixclock = 150000, .bpp = 4,
- .xres = 320, .yres = 240,
-
- .hsync_len = 1, .vsync_len = 1,
- .left_margin = 4, .upper_margin = 0,
- .right_margin = 2, .lower_margin = 0,
-
- .cmap_greyscale = 1,
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-
- .lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
-};
-#endif
-#ifdef LART_COLOR_LCD
-static struct sa1100fb_mach_info lart_color_info = {
- .pixclock = 150000, .bpp = 16,
- .xres = 320, .yres = 240,
-
- .hsync_len = 2, .vsync_len = 3,
- .left_margin = 69, .upper_margin = 14,
- .right_margin = 8, .lower_margin = 4,
-
- .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
-};
-#endif
-#ifdef LART_VIDEO_OUT
-static struct sa1100fb_mach_info lart_video_info = {
- .pixclock = 39721, .bpp = 16,
- .xres = 640, .yres = 480,
-
- .hsync_len = 95, .vsync_len = 2,
- .left_margin = 40, .upper_margin = 32,
- .right_margin = 24, .lower_margin = 11,
-
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-
- .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
- .lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
-};
-#endif
-
-#ifdef LART_KIT01_LCD
-static struct sa1100fb_mach_info lart_kit01_info = {
- .pixclock = 63291, .bpp = 16,
- .xres = 640, .yres = 480,
-
- .hsync_len = 64, .vsync_len = 3,
- .left_margin = 122, .upper_margin = 45,
- .right_margin = 10, .lower_margin = 10,
-
- .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg
-};
-#endif
-
-static void __init lart_init(void)
-{
- struct sa1100fb_mach_info *inf = NULL;
-
-#ifdef LART_GREY_LCD
- inf = &lart_grey_info;
-#endif
-#ifdef LART_COLOR_LCD
- inf = &lart_color_info;
-#endif
-#ifdef LART_VIDEO_OUT
- inf = &lart_video_info;
-#endif
-#ifdef LART_KIT01_LCD
- inf = &lart_kit01_info;
-#endif
-
- if (inf)
- sa11x0_register_lcd(inf);
-
- sa11x0_ppc_configure_mcp();
- sa11x0_register_mcp(&lart_mcp_data);
-}
-
-static struct map_desc lart_io_desc[] __initdata = {
- { /* main flash memory */
- .virtual = 0xe8000000,
- .pfn = __phys_to_pfn(0x00000000),
- .length = 0x00400000,
- .type = MT_DEVICE
- }, { /* main flash, alternative location */
- .virtual = 0xec000000,
- .pfn = __phys_to_pfn(0x08000000),
- .length = 0x00400000,
- .type = MT_DEVICE
- }
-};
-
-/* LEDs */
-struct gpio_led lart_gpio_leds[] = {
- {
- .name = "lart:red",
- .default_trigger = "cpu0",
- .gpio = 23,
- },
-};
-
-static struct gpio_led_platform_data lart_gpio_led_info = {
- .leds = lart_gpio_leds,
- .num_leds = ARRAY_SIZE(lart_gpio_leds),
-};
-
-static struct platform_device lart_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &lart_gpio_led_info,
- }
-};
-static void __init lart_map_io(void)
-{
- sa1100_map_io();
- iotable_init(lart_io_desc, ARRAY_SIZE(lart_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
- sa1100_register_uart(2, 2);
-
- GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
- GPDR |= GPIO_UART_TXD;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- platform_device_register(&lart_leds);
-}
-
-MACHINE_START(LART, "LART")
- .atag_offset = 0x100,
- .map_io = lart_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_machine = lart_init,
- .init_late = sa11x0_init_late,
- .init_time = sa1100_timer_init,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c
deleted file mode 100644
index f6c9c19c39fb..000000000000
--- a/arch/arm/mach-sa1100/nanoengine.c
+++ /dev/null
@@ -1,136 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/nanoengine.c
- *
- * Bright Star Engineering's nanoEngine board init code.
- *
- * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
- */
-
-#include <linux/init.h>
-#include <linux/gpio/machine.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/root_dev.h>
-
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-
-#include <mach/hardware.h>
-#include <mach/nanoengine.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-/* Flash bank 0 */
-static struct mtd_partition nanoengine_partitions[] = {
- {
- .name = "nanoEngine boot firmware and parameter table",
- .size = 0x00010000, /* 32K */
- .offset = 0,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "kernel/initrd reserved",
- .size = 0x002f0000,
- .offset = 0x00010000,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "experimental filesystem allocation",
- .size = 0x00100000,
- .offset = 0x00300000,
- .mask_flags = MTD_WRITEABLE,
- }
-};
-
-static struct flash_platform_data nanoengine_flash_data = {
- .map_name = "jedec_probe",
- .parts = nanoengine_partitions,
- .nr_parts = ARRAY_SIZE(nanoengine_partitions),
-};
-
-static struct resource nanoengine_flash_resources[] = {
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
- DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
-};
-
-static struct map_desc nanoengine_io_desc[] __initdata = {
- {
- /* System Registers */
- .virtual = 0xf0000000,
- .pfn = __phys_to_pfn(0x10000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }, {
- /* Internal PCI Memory Read/Write */
- .virtual = NANO_PCI_MEM_RW_VIRT,
- .pfn = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS),
- .length = NANO_PCI_MEM_RW_SIZE,
- .type = MT_DEVICE
- }, {
- /* Internal PCI Config Space */
- .virtual = NANO_PCI_CONFIG_SPACE_VIRT,
- .pfn = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS),
- .length = NANO_PCI_CONFIG_SPACE_SIZE,
- .type = MT_DEVICE
- }
-};
-
-static void __init nanoengine_map_io(void)
-{
- sa1100_map_io();
- iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
-
- sa1100_register_uart(0, 1);
- sa1100_register_uart(1, 2);
- sa1100_register_uart(2, 3);
- Ser1SDCR0 |= SDCR0_UART;
- /* disable IRDA -- UART2 is used as a normal serial port */
- Ser2UTCR4 = 0;
- Ser2HSCR0 = 0;
-}
-
-static struct gpiod_lookup_table nanoengine_pcmcia0_gpio_table = {
- .dev_id = "sa11x0-pcmcia.0",
- .table = {
- GPIO_LOOKUP("gpio", 11, "ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 13, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 15, "reset", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct gpiod_lookup_table nanoengine_pcmcia1_gpio_table = {
- .dev_id = "sa11x0-pcmcia.1",
- .table = {
- GPIO_LOOKUP("gpio", 12, "ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 14, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 16, "reset", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static void __init nanoengine_init(void)
-{
- sa11x0_register_pcmcia(0, &nanoengine_pcmcia0_gpio_table);
- sa11x0_register_pcmcia(1, &nanoengine_pcmcia1_gpio_table);
- sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources,
- ARRAY_SIZE(nanoengine_flash_resources));
-}
-
-MACHINE_START(NANOENGINE, "BSE nanoEngine")
- .atag_offset = 0x100,
- .map_io = nanoengine_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = nanoengine_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
deleted file mode 100644
index 0791d11ff4d4..000000000000
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ /dev/null
@@ -1,191 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * linux/arch/arm/mach-sa1100/pci-nanoengine.c
- *
- * PCI functions for BSE nanoEngine PCI
- *
- * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
- */
-#include <linux/kernel.h>
-#include <linux/irq.h>
-#include <linux/pci.h>
-
-#include <asm/mach/pci.h>
-#include <asm/mach-types.h>
-
-#include <mach/nanoengine.h>
-#include <mach/hardware.h>
-
-static void __iomem *nanoengine_pci_map_bus(struct pci_bus *bus,
- unsigned int devfn, int where)
-{
- if (bus->number != 0 || (devfn >> 3) != 0)
- return NULL;
-
- return (void __iomem *)NANO_PCI_CONFIG_SPACE_VIRT +
- ((bus->number << 16) | (devfn << 8) | (where & ~3));
-}
-
-static struct pci_ops pci_nano_ops = {
- .map_bus = nanoengine_pci_map_bus,
- .read = pci_generic_config_read32,
- .write = pci_generic_config_write32,
-};
-
-static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,
- u8 pin)
-{
- return NANOENGINE_IRQ_GPIO_PCI;
-}
-
-static struct resource pci_io_ports =
- DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO");
-
-static struct resource pci_non_prefetchable_memory = {
- .name = "PCI non-prefetchable",
- .start = NANO_PCI_MEM_RW_PHYS,
- /* nanoEngine documentation says there is a 1 Megabyte window here,
- * but PCI reports just 128 + 8 kbytes. */
- .end = NANO_PCI_MEM_RW_PHYS + NANO_PCI_MEM_RW_SIZE - 1,
-/* .end = NANO_PCI_MEM_RW_PHYS + SZ_128K + SZ_8K - 1,*/
- .flags = IORESOURCE_MEM,
-};
-
-/*
- * nanoEngine PCI reports 1 Megabyte of prefetchable memory, but it
- * overlaps with previously defined memory.
- *
- * Here is what happens:
- *
-# dmesg
-...
-pci 0000:00:00.0: [8086:1209] type 0 class 0x000200
-pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff]
-pci 0000:00:00.0: reg 14: [io 0x0000-0x003f]
-pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff]
-pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref]
-pci 0000:00:00.0: supports D1 D2
-pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot
-pci 0000:00:00.0: PME# disabled
-PCI: bus0: Fast back to back transfers enabled
-pci 0000:00:00.0: BAR 6: can't assign mem pref (size 0x100000)
-pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff]
-pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff])
-pci 0000:00:00.0: BAR 0: assigned [mem 0x18620000-0x18620fff]
-pci 0000:00:00.0: BAR 0: set to [mem 0x18620000-0x18620fff] (PCI address [0x20000-0x20fff])
-pci 0000:00:00.0: BAR 1: assigned [io 0x0400-0x043f]
-pci 0000:00:00.0: BAR 1: set to [io 0x0400-0x043f] (PCI address [0x0-0x3f])
- *
- * On the other hand, if we do not request the prefetchable memory resource,
- * linux will alloc it first and the two non-prefetchable memory areas that
- * are our real interest will not be mapped. So we choose to map it to an
- * unused area. It gets recognized as expansion ROM, but becomes disabled.
- *
- * Here is what happens then:
- *
-# dmesg
-...
-pci 0000:00:00.0: [8086:1209] type 0 class 0x000200
-pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff]
-pci 0000:00:00.0: reg 14: [io 0x0000-0x003f]
-pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff]
-pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref]
-pci 0000:00:00.0: supports D1 D2
-pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot
-pci 0000:00:00.0: PME# disabled
-PCI: bus0: Fast back to back transfers enabled
-pci 0000:00:00.0: BAR 6: assigned [mem 0x78000000-0x780fffff pref]
-pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff]
-pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff])
-pci 0000:00:00.0: BAR 0: assigned [mem 0x18620000-0x18620fff]
-pci 0000:00:00.0: BAR 0: set to [mem 0x18620000-0x18620fff] (PCI address [0x20000-0x20fff])
-pci 0000:00:00.0: BAR 1: assigned [io 0x0400-0x043f]
-pci 0000:00:00.0: BAR 1: set to [io 0x0400-0x043f] (PCI address [0x0-0x3f])
-
-# lspci -vv -s 0000:00:00.0
-00:00.0 Class 0200: Device 8086:1209 (rev 09)
- Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR+ <PERR+ INTx-
- Latency: 0 (2000ns min, 14000ns max), Cache Line Size: 32 bytes
- Interrupt: pin A routed to IRQ 0
- Region 0: Memory at 18620000 (32-bit, non-prefetchable) [size=4K]
- Region 1: I/O ports at 0400 [size=64]
- Region 2: [virtual] Memory at 18600000 (32-bit, non-prefetchable) [size=128K]
- [virtual] Expansion ROM at 78000000 [disabled] [size=1M]
- Capabilities: [dc] Power Management version 2
- Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
- Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME-
- Kernel driver in use: e100
- Kernel modules: e100
- *
- */
-static struct resource pci_prefetchable_memory = {
- .name = "PCI prefetchable",
- .start = 0x78000000,
- .end = 0x78000000 + NANO_PCI_MEM_RW_SIZE - 1,
- .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
-};
-
-static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys)
-{
- if (request_resource(&ioport_resource, &pci_io_ports)) {
- printk(KERN_ERR "PCI: unable to allocate io port region\n");
- return -EBUSY;
- }
- if (request_resource(&iomem_resource, &pci_non_prefetchable_memory)) {
- release_resource(&pci_io_ports);
- printk(KERN_ERR "PCI: unable to allocate non prefetchable\n");
- return -EBUSY;
- }
- if (request_resource(&iomem_resource, &pci_prefetchable_memory)) {
- release_resource(&pci_io_ports);
- release_resource(&pci_non_prefetchable_memory);
- printk(KERN_ERR "PCI: unable to allocate prefetchable\n");
- return -EBUSY;
- }
- pci_add_resource_offset(&sys->resources, &pci_io_ports, sys->io_offset);
- pci_add_resource_offset(&sys->resources,
- &pci_non_prefetchable_memory, sys->mem_offset);
- pci_add_resource_offset(&sys->resources,
- &pci_prefetchable_memory, sys->mem_offset);
-
- return 1;
-}
-
-int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)
-{
- int ret = 0;
-
- pcibios_min_io = 0;
- pcibios_min_mem = 0;
-
- if (nr == 0) {
- sys->mem_offset = NANO_PCI_MEM_RW_PHYS;
- sys->io_offset = 0x400;
- ret = pci_nanoengine_setup_resources(sys);
- /* Enable alternate memory bus master mode, see
- * "Intel StrongARM SA1110 Developer's Manual",
- * section 10.8, "Alternate Memory Bus Master Mode". */
- GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
- GAFR |= GPIO_MBGNT | GPIO_MBREQ;
- TUCR |= TUCR_MBGPIO;
- }
-
- return ret;
-}
-
-static struct hw_pci nanoengine_pci __initdata = {
- .map_irq = pci_nanoengine_map_irq,
- .nr_controllers = 1,
- .ops = &pci_nano_ops,
- .setup = pci_nanoengine_setup,
-};
-
-static int __init nanoengine_pci_init(void)
-{
- if (machine_is_nanoengine())
- pci_common_init(&nanoengine_pci);
- return 0;
-}
-
-subsys_initcall(nanoengine_pci_init);
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
deleted file mode 100644
index b2b0c9fc18f7..000000000000
--- a/arch/arm/mach-sa1100/pleb.c
+++ /dev/null
@@ -1,148 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/pleb.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/ioport.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/mtd/partitions.h>
-#include <linux/smc91x.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/flash.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-
-/*
- * Ethernet IRQ mappings
- */
-
-#define PLEB_ETH0_P (0x20000300) /* Ethernet 0 in PCMCIA0 IO */
-#define PLEB_ETH0_V (0xf6000300)
-
-#define GPIO_ETH0_IRQ GPIO_GPIO(21)
-#define GPIO_ETH0_EN GPIO_GPIO(26)
-
-#define IRQ_GPIO_ETH0_IRQ IRQ_GPIO21
-
-static struct resource smc91x_resources[] = {
- [0] = DEFINE_RES_MEM(PLEB_ETH0_P, 0x04000000),
-#if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */
- [1] = DEFINE_RES_IRQ(IRQ_GPIO_ETH0_IRQ),
-#endif
-};
-
-static struct smc91x_platdata smc91x_platdata = {
- .flags = SMC91X_USE_16BIT | SMC91X_USE_8BIT | SMC91X_NOWAIT,
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
- .dev = {
- .platform_data = &smc91x_platdata,
- },
-};
-
-static struct platform_device *devices[] __initdata = {
- &smc91x_device,
-};
-
-
-/*
- * Pleb's memory map
- * has flash memory (typically 4 or 8 meg) selected by
- * the two SA1100 lowest chip select outputs.
- */
-static struct resource pleb_flash_resources[] = {
- [0] = DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_8M),
- [1] = DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_8M),
-};
-
-
-static struct mtd_partition pleb_partitions[] = {
- {
- .name = "blob",
- .offset = 0,
- .size = 0x00020000,
- }, {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x000e0000,
- }, {
- .name = "rootfs",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00300000,
- }
-};
-
-
-static struct flash_platform_data pleb_flash_data = {
- .map_name = "cfi_probe",
- .parts = pleb_partitions,
- .nr_parts = ARRAY_SIZE(pleb_partitions),
-};
-
-
-static void __init pleb_init(void)
-{
- sa11x0_register_mtd(&pleb_flash_data, pleb_flash_resources,
- ARRAY_SIZE(pleb_flash_resources));
-
-
- platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-
-static void __init pleb_map_io(void)
-{
- sa1100_map_io();
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-
- GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
- GPDR |= GPIO_UART_TXD;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- /*
- * Fix expansion memory timing for network card
- */
- MECR = ((2<<10) | (2<<5) | (2<<0));
-
- /*
- * Enable the SMC ethernet controller
- */
- GPDR |= GPIO_ETH0_EN; /* set to output */
- GPCR = GPIO_ETH0_EN; /* clear MCLK (enable smc) */
-
- GPDR &= ~GPIO_ETH0_IRQ;
-
- irq_set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING);
-}
-
-MACHINE_START(PLEB, "PLEB")
- .map_io = pleb_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = pleb_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
deleted file mode 100644
index 351f891b4842..000000000000
--- a/arch/arm/mach-sa1100/shannon.c
+++ /dev/null
@@ -1,157 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/shannon.c
- */
-
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/gpio/machine.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/tty.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
-
-#include <video/sa1100fb.h>
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/shannon.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-static struct mtd_partition shannon_partitions[] = {
- {
- .name = "BLOB boot loader",
- .offset = 0,
- .size = 0x20000
- },
- {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = 0xe0000
- },
- {
- .name = "initrd",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL
- }
-};
-
-static struct flash_platform_data shannon_flash_data = {
- .map_name = "cfi_probe",
- .parts = shannon_partitions,
- .nr_parts = ARRAY_SIZE(shannon_partitions),
-};
-
-static struct resource shannon_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M);
-
-static struct mcp_plat_data shannon_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
-};
-
-static struct sa1100fb_mach_info shannon_lcd_info = {
- .pixclock = 152500, .bpp = 8,
- .xres = 640, .yres = 480,
-
- .hsync_len = 4, .vsync_len = 3,
- .left_margin = 2, .upper_margin = 0,
- .right_margin = 1, .lower_margin = 0,
-
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-
- .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
- .lccr3 = LCCR3_ACBsDiv(512),
-};
-
-static struct gpiod_lookup_table shannon_pcmcia0_gpio_table = {
- .dev_id = "sa11x0-pcmcia.0",
- .table = {
- GPIO_LOOKUP("gpio", 24, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 26, "ready", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct gpiod_lookup_table shannon_pcmcia1_gpio_table = {
- .dev_id = "sa11x0-pcmcia.1",
- .table = {
- GPIO_LOOKUP("gpio", 25, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 27, "ready", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct regulator_consumer_supply shannon_cf_vcc_consumers[] = {
- REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.0"),
- REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"),
-};
-
-static struct fixed_voltage_config shannon_cf_vcc_pdata __initdata = {
- .supply_name = "cf-power",
- .microvolts = 3300000,
- .enabled_at_boot = 1,
-};
-
-static struct gpiod_lookup_table shannon_display_gpio_table = {
- .dev_id = "sa11x0-fb",
- .table = {
- GPIO_LOOKUP("gpio", 22, "shannon-lcden", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static void __init shannon_init(void)
-{
- sa11x0_register_fixed_regulator(0, &shannon_cf_vcc_pdata,
- shannon_cf_vcc_consumers,
- ARRAY_SIZE(shannon_cf_vcc_consumers),
- false);
- sa11x0_register_pcmcia(0, &shannon_pcmcia0_gpio_table);
- sa11x0_register_pcmcia(1, &shannon_pcmcia1_gpio_table);
- sa11x0_ppc_configure_mcp();
- gpiod_add_lookup_table(&shannon_display_gpio_table);
- sa11x0_register_lcd(&shannon_lcd_info);
- sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
- sa11x0_register_mcp(&shannon_mcp_data);
-}
-
-static void __init shannon_map_io(void)
-{
- sa1100_map_io();
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-
- Ser1SDCR0 |= SDCR0_SUS;
- GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
- GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- /* reset the codec */
- GPCR = SHANNON_GPIO_CODEC_RESET;
- GPSR = SHANNON_GPIO_CODEC_RESET;
-}
-
-MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
- .atag_offset = 0x100,
- .map_io = shannon_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = shannon_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
deleted file mode 100644
index c7fb9a73e4c5..000000000000
--- a/arch/arm/mach-sa1100/simpad.c
+++ /dev/null
@@ -1,423 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/simpad.c
- */
-
-#include <linux/module.h>
-#include <linux/gpio/machine.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/proc_fs.h>
-#include <linux/string.h>
-#include <linux/pm.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/mfd/ucb1x00.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/io.h>
-#include <linux/gpio/driver.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/simpad.h>
-#include <mach/irqs.h>
-
-#include <linux/serial_core.h>
-#include <linux/ioport.h>
-#include <linux/input.h>
-#include <linux/gpio_keys.h>
-#include <linux/leds.h>
-#include <linux/platform_data/i2c-gpio.h>
-
-#include "generic.h"
-
-/*
- * CS3 support
- */
-
-static long cs3_shadow;
-static spinlock_t cs3_lock;
-static struct gpio_chip cs3_gpio;
-
-long simpad_get_cs3_ro(void)
-{
- return readl(CS3_BASE);
-}
-EXPORT_SYMBOL(simpad_get_cs3_ro);
-
-long simpad_get_cs3_shadow(void)
-{
- return cs3_shadow;
-}
-EXPORT_SYMBOL(simpad_get_cs3_shadow);
-
-static void __simpad_write_cs3(void)
-{
- writel(cs3_shadow, CS3_BASE);
-}
-
-void simpad_set_cs3_bit(int value)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&cs3_lock, flags);
- cs3_shadow |= value;
- __simpad_write_cs3();
- spin_unlock_irqrestore(&cs3_lock, flags);
-}
-EXPORT_SYMBOL(simpad_set_cs3_bit);
-
-void simpad_clear_cs3_bit(int value)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&cs3_lock, flags);
- cs3_shadow &= ~value;
- __simpad_write_cs3();
- spin_unlock_irqrestore(&cs3_lock, flags);
-}
-EXPORT_SYMBOL(simpad_clear_cs3_bit);
-
-static void cs3_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
- if (offset > 15)
- return;
- if (value)
- simpad_set_cs3_bit(1 << offset);
- else
- simpad_clear_cs3_bit(1 << offset);
-};
-
-static int cs3_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
- if (offset > 15)
- return !!(simpad_get_cs3_ro() & (1 << (offset - 16)));
- return !!(simpad_get_cs3_shadow() & (1 << offset));
-};
-
-static int cs3_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-{
- if (offset > 15)
- return 0;
- return -EINVAL;
-};
-
-static int cs3_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
- int value)
-{
- if (offset > 15)
- return -EINVAL;
- cs3_gpio_set(chip, offset, value);
- return 0;
-};
-
-static struct map_desc simpad_io_desc[] __initdata = {
- { /* MQ200 */
- .virtual = 0xf2800000,
- .pfn = __phys_to_pfn(0x4b800000),
- .length = 0x00800000,
- .type = MT_DEVICE
- }, { /* Simpad CS3 */
- .virtual = (unsigned long)CS3_BASE,
- .pfn = __phys_to_pfn(SA1100_CS3_PHYS),
- .length = 0x00100000,
- .type = MT_DEVICE
- },
-};
-
-
-static void simpad_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- if (port->mapbase == (u_int)&Ser1UTCR0) {
- if (state)
- {
- simpad_clear_cs3_bit(RS232_ON);
- simpad_clear_cs3_bit(DECT_POWER_ON);
- }else
- {
- simpad_set_cs3_bit(RS232_ON);
- simpad_set_cs3_bit(DECT_POWER_ON);
- }
- }
-}
-
-static struct sa1100_port_fns simpad_port_fns __initdata = {
- .pm = simpad_uart_pm,
-};
-
-
-static struct mtd_partition simpad_partitions[] = {
- {
- .name = "SIMpad boot firmware",
- .size = 0x00080000,
- .offset = 0,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "SIMpad kernel",
- .size = 0x0010000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "SIMpad root jffs2",
- .size = MTDPART_SIZ_FULL,
- .offset = MTDPART_OFS_APPEND,
- }
-};
-
-static struct flash_platform_data simpad_flash_data = {
- .map_name = "cfi_probe",
- .parts = simpad_partitions,
- .nr_parts = ARRAY_SIZE(simpad_partitions),
-};
-
-
-static struct resource simpad_flash_resources [] = {
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_16M),
- DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_16M),
-};
-
-static struct ucb1x00_plat_data simpad_ucb1x00_data = {
- .gpio_base = SIMPAD_UCB1X00_GPIO_BASE,
-};
-
-static struct mcp_plat_data simpad_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
- .codec_pdata = &simpad_ucb1x00_data,
-};
-
-
-
-static void __init simpad_map_io(void)
-{
- sa1100_map_io();
-
- iotable_init(simpad_io_desc, ARRAY_SIZE(simpad_io_desc));
-
- /* Initialize CS3 */
- cs3_shadow = (EN1 | EN0 | LED2_ON | DISPLAY_ON |
- RS232_ON | ENABLE_5V | RESET_SIMCARD | DECT_POWER_ON);
- __simpad_write_cs3(); /* Spinlocks not yet initialized */
-
- sa1100_register_uart_fns(&simpad_port_fns);
- sa1100_register_uart(0, 3); /* serial interface */
- sa1100_register_uart(1, 1); /* DECT */
-
- // Reassign UART 1 pins
- GAFR |= GPIO_UART_TXD | GPIO_UART_RXD;
- GPDR |= GPIO_UART_TXD | GPIO_LDD13 | GPIO_LDD15;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- /*
- * Set up registers for sleep mode.
- */
-
-
- PWER = PWER_GPIO0| PWER_RTC;
- PGSR = 0x818;
- PCFR = 0;
- PSDR = 0;
-
-}
-
-static void simpad_power_off(void)
-{
- local_irq_disable();
- cs3_shadow = SD_MEDIAQ;
- __simpad_write_cs3(); /* Bypass spinlock here */
-
- /* disable internal oscillator, float CS lines */
- PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
- /* enable wake-up on GPIO0 */
- PWER = GFER = GRER = PWER_GPIO0;
- /*
- * set scratchpad to zero, just in case it is used as a
- * restart address by the bootloader.
- */
- PSPR = 0;
- PGSR = 0;
- /* enter sleep mode */
- PMCR = PMCR_SF;
- while(1);
-
- local_irq_enable(); /* we won't ever call it */
-
-
-}
-
-/*
- * gpio_keys
-*/
-
-static struct gpio_keys_button simpad_button_table[] = {
- { KEY_POWER, IRQ_GPIO_POWER_BUTTON, 1, "power button" },
-};
-
-static struct gpio_keys_platform_data simpad_keys_data = {
- .buttons = simpad_button_table,
- .nbuttons = ARRAY_SIZE(simpad_button_table),
-};
-
-static struct platform_device simpad_keys = {
- .name = "gpio-keys",
- .dev = {
- .platform_data = &simpad_keys_data,
- },
-};
-
-static struct gpio_keys_button simpad_polled_button_table[] = {
- { KEY_PROG1, SIMPAD_UCB1X00_GPIO_PROG1, 1, "prog1 button" },
- { KEY_PROG2, SIMPAD_UCB1X00_GPIO_PROG2, 1, "prog2 button" },
- { KEY_UP, SIMPAD_UCB1X00_GPIO_UP, 1, "up button" },
- { KEY_DOWN, SIMPAD_UCB1X00_GPIO_DOWN, 1, "down button" },
- { KEY_LEFT, SIMPAD_UCB1X00_GPIO_LEFT, 1, "left button" },
- { KEY_RIGHT, SIMPAD_UCB1X00_GPIO_RIGHT, 1, "right button" },
-};
-
-static struct gpio_keys_platform_data simpad_polled_keys_data = {
- .buttons = simpad_polled_button_table,
- .nbuttons = ARRAY_SIZE(simpad_polled_button_table),
- .poll_interval = 50,
-};
-
-static struct platform_device simpad_polled_keys = {
- .name = "gpio-keys-polled",
- .dev = {
- .platform_data = &simpad_polled_keys_data,
- },
-};
-
-/*
- * GPIO LEDs
- */
-
-static struct gpio_led simpad_leds[] = {
- {
- .name = "simpad:power",
- .gpio = SIMPAD_CS3_LED2_ON,
- .active_low = 0,
- .default_trigger = "default-on",
- },
-};
-
-static struct gpio_led_platform_data simpad_led_data = {
- .num_leds = ARRAY_SIZE(simpad_leds),
- .leds = simpad_leds,
-};
-
-static struct platform_device simpad_gpio_leds = {
- .name = "leds-gpio",
- .id = 0,
- .dev = {
- .platform_data = &simpad_led_data,
- },
-};
-
-/*
- * i2c
- */
-static struct gpiod_lookup_table simpad_i2c_gpiod_table = {
- .dev_id = "i2c-gpio.0",
- .table = {
- GPIO_LOOKUP_IDX("gpio", 21, NULL, 0,
- GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- GPIO_LOOKUP_IDX("gpio", 25, NULL, 1,
- GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- },
-};
-
-static struct i2c_gpio_platform_data simpad_i2c_data = {
- .udelay = 10,
- .timeout = HZ,
-};
-
-static struct platform_device simpad_i2c = {
- .name = "i2c-gpio",
- .id = 0,
- .dev = {
- .platform_data = &simpad_i2c_data,
- },
-};
-
-/*
- * MediaQ Video Device
- */
-static struct platform_device simpad_mq200fb = {
- .name = "simpad-mq200",
- .id = 0,
-};
-
-static struct platform_device *devices[] __initdata = {
- &simpad_keys,
- &simpad_polled_keys,
- &simpad_mq200fb,
- &simpad_gpio_leds,
- &simpad_i2c,
-};
-
-/* Compact Flash */
-static struct gpiod_lookup_table simpad_cf_gpio_table = {
- .dev_id = "sa11x0-pcmcia",
- .table = {
- GPIO_LOOKUP("gpio", GPIO_CF_IRQ, "cf-ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", GPIO_CF_CD, "cf-detect", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-
-static int __init simpad_init(void)
-{
- int ret;
-
- spin_lock_init(&cs3_lock);
-
- cs3_gpio.label = "simpad_cs3";
- cs3_gpio.base = SIMPAD_CS3_GPIO_BASE;
- cs3_gpio.ngpio = 24;
- cs3_gpio.set = cs3_gpio_set;
- cs3_gpio.get = cs3_gpio_get;
- cs3_gpio.direction_input = cs3_gpio_direction_input;
- cs3_gpio.direction_output = cs3_gpio_direction_output;
- ret = gpiochip_add_data(&cs3_gpio, NULL);
- if (ret)
- printk(KERN_WARNING "simpad: Unable to register cs3 GPIO device");
-
- pm_power_off = simpad_power_off;
-
- sa11x0_register_pcmcia(-1, &simpad_cf_gpio_table);
- sa11x0_ppc_configure_mcp();
- sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources,
- ARRAY_SIZE(simpad_flash_resources));
- sa11x0_register_mcp(&simpad_mcp_data);
-
- gpiod_add_lookup_table(&simpad_i2c_gpiod_table);
- ret = platform_add_devices(devices, ARRAY_SIZE(devices));
- if(ret)
- printk(KERN_WARNING "simpad: Unable to register mq200 framebuffer device");
-
- return 0;
-}
-
-arch_initcall(simpad_init);
-
-
-MACHINE_START(SIMPAD, "Simpad")
- /* Maintainer: Holger Freyther */
- .atag_offset = 0x100,
- .map_io = simpad_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_late = sa11x0_init_late,
- .init_time = sa1100_timer_init,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c
index 1a83c8678a63..bb7f591a8b05 100644
--- a/drivers/cpufreq/sa1110-cpufreq.c
+++ b/drivers/cpufreq/sa1110-cpufreq.c
@@ -344,14 +344,8 @@ static int __init sa1110_clk_init(void)
if (!name[0]) {
if (machine_is_assabet())
name = "TC59SM716-CL3";
- if (machine_is_pt_system3())
- name = "K4S641632D";
- if (machine_is_h3100())
- name = "KM416S4030CT";
if (machine_is_jornada720() || machine_is_h3600())
name = "K4S281632B-1H";
- if (machine_is_nanoengine())
- name = "MT48LC8M16A2TG-75";
}
sdram = sa1110_find_sdram(name);
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index d655a135a886..ad469b8985bd 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -672,7 +672,7 @@ config MFD_INTEL_PMC_BXT
config MFD_IPAQ_MICRO
bool "Atmel Micro ASIC (iPAQ h3100/h3600/h3700) Support"
- depends on SA1100_H3100 || SA1100_H3600
+ depends on SA1100_H3600
select MFD_CORE
help
Select this to get support for the Microcontroller found in
diff --git a/drivers/pcmcia/sa1100_generic.c b/drivers/pcmcia/sa1100_generic.c
index c2b6e828c2c6..89d4ba58c891 100644
--- a/drivers/pcmcia/sa1100_generic.c
+++ b/drivers/pcmcia/sa1100_generic.c
@@ -98,12 +98,9 @@ static struct pcmcia_low_level sa11x0_cf_ops = {
int __init pcmcia_collie_init(struct device *dev);
static int (*sa11x0_pcmcia_legacy_hw_init[])(struct device *dev) = {
-#if defined(CONFIG_SA1100_H3100) || defined(CONFIG_SA1100_H3600)
+#ifdef CONFIG_SA1100_H3600
pcmcia_h3600_init,
#endif
-#ifdef CONFIG_SA1100_SIMPAD
- pcmcia_simpad_init,
-#endif
#ifdef CONFIG_SA1100_COLLIE
pcmcia_collie_init,
#endif
diff --git a/drivers/pcmcia/sa1100_h3600.c b/drivers/pcmcia/sa1100_h3600.c
index a91222bc3824..10cb99c20a7f 100644
--- a/drivers/pcmcia/sa1100_h3600.c
+++ b/drivers/pcmcia/sa1100_h3600.c
@@ -156,7 +156,7 @@ int pcmcia_h3600_init(struct device *dev)
{
int ret = -ENODEV;
- if (machine_is_h3600() || machine_is_h3100())
+ if (machine_is_h3600())
ret = sa11xx_drv_pcmcia_probe(dev, &h3600_pcmcia_ops, 0, 2);
return ret;
diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index 71bf1b279a5a..2a67e33fb5f0 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -212,10 +212,6 @@ static int pcmcia_probe(struct sa1111_dev *dev)
writel_relaxed(PCCR_S0_FLT | PCCR_S1_FLT, base + PCCR);
ret = -ENODEV;
-#ifdef CONFIG_SA1100_BADGE4
- if (machine_is_badge4())
- ret = pcmcia_badge4_init(dev);
-#endif
#ifdef CONFIG_SA1100_JORNADA720
if (machine_is_jornada720())
ret = pcmcia_jornada720_init(dev);
diff --git a/drivers/usb/host/ohci-sa1111.c b/drivers/usb/host/ohci-sa1111.c
index 75c2b28b3379..aca0338a2983 100644
--- a/drivers/usb/host/ohci-sa1111.c
+++ b/drivers/usb/host/ohci-sa1111.c
@@ -125,10 +125,7 @@ static int sa1111_start_hc(struct sa1111_dev *dev)
dev_dbg(&dev->dev, "starting SA-1111 OHCI USB Controller\n");
- if (machine_is_xp860() ||
- machine_is_assabet() ||
- machine_is_pfs168() ||
- machine_is_badge4())
+ if (machine_is_assabet())
usb_rst = USB_RESET_PWRSENSELOW | USB_RESET_PWRCTRLLOW;
/*
diff --git a/drivers/video/fbdev/sa1100fb.c b/drivers/video/fbdev/sa1100fb.c
index 017c8efe8267..b1b8ccdbac4a 100644
--- a/drivers/video/fbdev/sa1100fb.c
+++ b/drivers/video/fbdev/sa1100fb.c
@@ -184,7 +184,6 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
-#include <mach/shannon.h>
/*
* Complain if VAR is out of range.
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 02/11] ARM: sa1100: remove unused board files
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann, Peter Chubb, Stefan Eletzhofer,
Rafael J. Wysocki, Viresh Kumar, Lee Jones, Dominik Brodowski,
Alan Stern, Greg Kroah-Hartman, Helge Deller, linux-pm,
linux-usb, linux-fbdev, dri-devel
From: Arnd Bergmann <arnd@arndb.de>
The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
Simpad machines were all marked as unused as there are no known users
left. Remove all of these, along with references to them in defconfig
files and drivers.
Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
and Jornada 720, each of which had one person still using them, with
Collie also being supported in Qemu.
Cc: Peter Chubb <peter.chubb@unsw.edu.au>
Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
MAINTAINERS | 11 -
arch/arm/Kconfig | 6 -
arch/arm/boot/compressed/head-sa1100.S | 4 -
arch/arm/configs/badge4_defconfig | 105 -----
arch/arm/configs/cerfcube_defconfig | 73 ---
arch/arm/configs/hackkit_defconfig | 48 --
arch/arm/configs/lart_defconfig | 64 ---
arch/arm/configs/pleb_defconfig | 53 ---
arch/arm/configs/shannon_defconfig | 45 --
arch/arm/configs/simpad_defconfig | 100 -----
arch/arm/mach-sa1100/Kconfig | 111 -----
arch/arm/mach-sa1100/Makefile | 21 -
arch/arm/mach-sa1100/badge4.c | 338 --------------
arch/arm/mach-sa1100/cerf.c | 181 --------
arch/arm/mach-sa1100/h3100.c | 140 ------
arch/arm/mach-sa1100/hackkit.c | 184 --------
arch/arm/mach-sa1100/include/mach/badge4.h | 71 ---
arch/arm/mach-sa1100/include/mach/cerf.h | 20 -
.../arm/mach-sa1100/include/mach/nanoengine.h | 48 --
arch/arm/mach-sa1100/include/mach/shannon.h | 40 --
arch/arm/mach-sa1100/include/mach/simpad.h | 159 -------
arch/arm/mach-sa1100/lart.c | 177 --------
arch/arm/mach-sa1100/nanoengine.c | 136 ------
arch/arm/mach-sa1100/pci-nanoengine.c | 191 --------
arch/arm/mach-sa1100/pleb.c | 148 ------
arch/arm/mach-sa1100/shannon.c | 157 -------
arch/arm/mach-sa1100/simpad.c | 423 ------------------
drivers/cpufreq/sa1110-cpufreq.c | 6 -
drivers/mfd/Kconfig | 2 +-
drivers/pcmcia/sa1100_generic.c | 5 +-
drivers/pcmcia/sa1100_h3600.c | 2 +-
drivers/pcmcia/sa1111_generic.c | 4 -
drivers/usb/host/ohci-sa1111.c | 5 +-
drivers/video/fbdev/sa1100fb.c | 1 -
34 files changed, 4 insertions(+), 3075 deletions(-)
delete mode 100644 arch/arm/configs/badge4_defconfig
delete mode 100644 arch/arm/configs/cerfcube_defconfig
delete mode 100644 arch/arm/configs/hackkit_defconfig
delete mode 100644 arch/arm/configs/lart_defconfig
delete mode 100644 arch/arm/configs/pleb_defconfig
delete mode 100644 arch/arm/configs/shannon_defconfig
delete mode 100644 arch/arm/configs/simpad_defconfig
delete mode 100644 arch/arm/mach-sa1100/badge4.c
delete mode 100644 arch/arm/mach-sa1100/cerf.c
delete mode 100644 arch/arm/mach-sa1100/h3100.c
delete mode 100644 arch/arm/mach-sa1100/hackkit.c
delete mode 100644 arch/arm/mach-sa1100/include/mach/badge4.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/cerf.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/nanoengine.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/shannon.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/simpad.h
delete mode 100644 arch/arm/mach-sa1100/lart.c
delete mode 100644 arch/arm/mach-sa1100/nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pci-nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pleb.c
delete mode 100644 arch/arm/mach-sa1100/shannon.c
delete mode 100644 arch/arm/mach-sa1100/simpad.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 77f913567c7e..ec3d53b5e1d1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2486,17 +2486,6 @@ F: arch/arm/mach-oxnas/
F: drivers/power/reset/oxnas-restart.c
N: oxnas
-ARM/PLEB SUPPORT
-M: Peter Chubb <pleb@gelato.unsw.edu.au>
-S: Maintained
-W: http://www.disy.cse.unsw.edu.au/Hardware/PLEB
-
-ARM/PT DIGITAL BOARD PORT
-M: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Maintained
-W: http://www.armlinux.org.uk/
-
ARM/QUALCOMM SUPPORT
M: Andy Gross <agross@kernel.org>
M: Bjorn Andersson <andersson@kernel.org>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ac4c58d9497f..c1614f91e04c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -922,12 +922,6 @@ config ISA
config ISA_DMA_API
bool
-config PCI_NANOENGINE
- bool "BSE nanoEngine PCI support"
- depends on SA1100_NANOENGINE
- help
- Enable PCI on the BSE nanoEngine board.
-
config ARM_ERRATA_814220
bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
depends on CPU_V7
diff --git a/arch/arm/boot/compressed/head-sa1100.S b/arch/arm/boot/compressed/head-sa1100.S
index 95abdd850fe3..23eae1a65064 100644
--- a/arch/arm/boot/compressed/head-sa1100.S
+++ b/arch/arm/boot/compressed/head-sa1100.S
@@ -19,10 +19,6 @@ __SA1100_start:
@ Preserve r8/r7 i.e. kernel entry values
#ifdef CONFIG_SA1100_COLLIE
mov r7, #MACH_TYPE_COLLIE
-#endif
-#ifdef CONFIG_SA1100_SIMPAD
- @ UNTIL we've something like an open bootldr
- mov r7, #MACH_TYPE_SIMPAD @should be 87
#endif
mrc p15, 0, r0, c1, c0, 0 @ read control reg
ands r0, r0, #0x0d
diff --git a/arch/arm/configs/badge4_defconfig b/arch/arm/configs/badge4_defconfig
deleted file mode 100644
index 337e5c9718ae..000000000000
--- a/arch/arm/configs/badge4_defconfig
+++ /dev/null
@@ -1,105 +0,0 @@
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_BADGE4=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="init=/linuxrc root=/dev/mtdblock3"
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_MODVERSIONS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BINFMT_MISC=m
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIVHCI=m
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_SA1100=y
-CONFIG_PARPORT=m
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=y
-CONFIG_NETDEVICES=y
-CONFIG_USB_CATC=m
-CONFIG_USB_KAWETH=m
-CONFIG_USB_PEGASUS=m
-CONFIG_USB_USBNET=m
-CONFIG_USB_ALI_M5632=y
-CONFIG_USB_AN2720=y
-CONFIG_USB_EPSON2888=y
-CONFIG_USB_KC2190=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_I2C=m
-CONFIG_I2C_CHARDEV=m
-CONFIG_I2C_ELEKTOR=m
-CONFIG_WATCHDOG=y
-CONFIG_SOFT_WATCHDOG=m
-CONFIG_SA1100_WATCHDOG=m
-CONFIG_SOUND=y
-CONFIG_SOUND_PRIME=y
-CONFIG_USB=y
-CONFIG_USB_MON=y
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_MDC800=m
-CONFIG_USB_MICROTEK=m
-CONFIG_USB_USS720=m
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_BELKIN=m
-CONFIG_USB_SERIAL_WHITEHEAT=m
-CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
-CONFIG_USB_SERIAL_EMPEG=m
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_VISOR=m
-CONFIG_USB_SERIAL_IR=m
-CONFIG_USB_SERIAL_EDGEPORT=m
-CONFIG_USB_SERIAL_KEYSPAN_PDA=m
-CONFIG_USB_SERIAL_KEYSPAN=m
-CONFIG_USB_SERIAL_MCT_U232=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_SERIAL_CYBERJACK=m
-CONFIG_USB_SERIAL_OMNINET=m
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=m
-CONFIG_MINIX_FS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_SMB_FS=m
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/cerfcube_defconfig b/arch/arm/configs/cerfcube_defconfig
deleted file mode 100644
index 9ada868e2648..000000000000
--- a/arch/arm/configs/cerfcube_defconfig
+++ /dev/null
@@ -1,73 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_CERF=y
-CONFIG_SA1100_CERF_FLASH_16MB=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,38400 root=/dev/mtdblock3 rootfstype=jffs2 rw mem=32M init=/linuxrc"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_FPE_FASTFPE=y
-CONFIG_PM=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_IPV6 is not set
-CONFIG_PCCARD=m
-CONFIG_PCMCIA_SA1100=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=m
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V4=y
-CONFIG_SMB_FS=m
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_DEBUG_KERNEL=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/hackkit_defconfig b/arch/arm/configs/hackkit_defconfig
deleted file mode 100644
index 3c91a851fd08..000000000000
--- a/arch/arm/configs/hackkit_defconfig
+++ /dev/null
@@ -1,48 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_HACKKIT=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,115200 root=/dev/ram0 initrd=0xc0400000,8M init=/rootshell"
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=3
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/lart_defconfig b/arch/arm/configs/lart_defconfig
deleted file mode 100644
index 916177d07a39..000000000000
--- a/arch/arm/configs/lart_defconfig
+++ /dev/null
@@ -1,64 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_LART=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,9600 root=/dev/ram"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_MODULES=y
-CONFIG_NET=y
-CONFIG_PACKET=m
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=1
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_LART=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-CONFIG_NET_ETHERNET=y
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=m
-CONFIG_REISERFS_FS=m
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=m
-CONFIG_JFFS2_FS_DEBUG=1
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFSD=m
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_UTF8=m
-CONFIG_DEBUG_USER=y
-CONFIG_CRC32=m
diff --git a/arch/arm/configs/pleb_defconfig b/arch/arm/configs/pleb_defconfig
deleted file mode 100644
index fd2667873273..000000000000
--- a/arch/arm/configs/pleb_defconfig
+++ /dev/null
@@ -1,53 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_HOTPLUG is not set
-# CONFIG_SHMEM is not set
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_PLEB=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,9600 mem=16M@0xc0000000 mem=16M@0xc8000000 root=/dev/ram initrd=0xc0400000,4M"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-# CONFIG_SWAP is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NLS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
diff --git a/arch/arm/configs/shannon_defconfig b/arch/arm/configs/shannon_defconfig
deleted file mode 100644
index dfcea70b8034..000000000000
--- a/arch/arm/configs/shannon_defconfig
+++ /dev/null
@@ -1,45 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_SHANNON=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,9600 console=tty1 root=/dev/mtdblock2 init=/linuxrc"
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_MTD=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=y
-CONFIG_PCMCIA_SMC91C92=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_SA1100=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_MINIX_FS=y
-CONFIG_NFS_FS=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/simpad_defconfig b/arch/arm/configs/simpad_defconfig
deleted file mode 100644
index 4e00a4c2c287..000000000000
--- a/arch/arm/configs/simpad_defconfig
+++ /dev/null
@@ -1,100 +0,0 @@
-CONFIG_LOCALVERSION="oe1"
-CONFIG_SYSVIPC=y
-CONFIG_PREEMPT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_SIMPAD=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="mtdparts=sa1100:512k(boot),1m(kernel),-(root) console=ttySA0 root=1f02 noinitrd mem=64M jffs2_orphaned_inodes=delete rootfstype=jffs2"
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=m
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C574=m
-CONFIG_PCMCIA_3C589=m
-CONFIG_PCMCIA_PCNET=m
-CONFIG_PCMCIA_SMC91C92=m
-CONFIG_PCMCIA_XIRC2PS=m
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPPOE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=800
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=600
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_EVBUG=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIO=m
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_FB=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_REISERFS_FS=m
-CONFIG_REISERFS_PROC_INFO=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_SMB_FS=m
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig
index 8b6360e363d1..0fb4c24cfad5 100644
--- a/arch/arm/mach-sa1100/Kconfig
+++ b/arch/arm/mach-sa1100/Kconfig
@@ -41,35 +41,6 @@ config ASSABET_NEPONSET
Microprocessor Development Board (Assabet) with the SA-1111
Development Board (Nepon).
-config SA1100_CERF
- bool "CerfBoard"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- select LEDS_GPIO_REGISTER
- help
- The Intrinsyc CerfBoard is based on the StrongARM 1110 (Discontinued).
- More information is available at:
- <http://www.intrinsyc.com/products/cerfboard/>.
-
- Say Y if configuring for an Intrinsyc CerfBoard.
- Say N otherwise.
-
-choice
- prompt "Cerf Flash available"
- depends on SA1100_CERF
- default SA1100_CERF_FLASH_8MB
-
-config SA1100_CERF_FLASH_8MB
- bool "8MB"
-
-config SA1100_CERF_FLASH_16MB
- bool "16MB"
-
-config SA1100_CERF_FLASH_32MB
- bool "32MB"
-
-endchoice
-
config SA1100_COLLIE
bool "Sharp Zaurus SL5500"
# FIXME: select ARM_SA11x0_CPUFREQ
@@ -79,16 +50,6 @@ config SA1100_COLLIE
help
Say Y here to support the Sharp Zaurus SL5500 PDAs.
-config SA1100_H3100
- bool "Compaq iPAQ H3100"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- select HTC_EGPIO
- select MFD_IPAQ_MICRO
- help
- Say Y here if you intend to run this kernel on the Compaq iPAQ
- H3100 handheld computer.
-
config SA1100_H3600
bool "Compaq iPAQ H3600/H3700"
select ARM_SA1110_CPUFREQ
@@ -98,15 +59,6 @@ config SA1100_H3600
Say Y here if you intend to run this kernel on the Compaq iPAQ
H3600 and H3700 handheld computers.
-config SA1100_BADGE4
- bool "HP Labs BadgePAD 4"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- select SA1111
- help
- Say Y here if you want to build a kernel for the HP Laboratories
- BadgePAD 4.
-
config SA1100_JORNADA720
bool "HP Jornada 720"
# FIXME: select ARM_SA11x0_CPUFREQ
@@ -126,71 +78,8 @@ config SA1100_JORNADA720_SSP
keyboard, touchscreen, backlight and battery. This driver also activates
the generic SSP which it extends.
-config SA1100_HACKKIT
- bool "HackKit Core CPU Board"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- help
- Say Y here to support the HackKit Core CPU Board
- <http://hackkit.eletztrick.de>;
-
-config SA1100_LART
- bool "LART"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- help
- Say Y here if you are using the Linux Advanced Radio Terminal
- (also known as the LART). See <http://www.lartmaker.nl/> for
- information on the LART.
-
-config SA1100_NANOENGINE
- bool "nanoEngine"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- select FORCE_PCI
- select PCI_NANOENGINE
- help
- Say Y here if you are using the Bright Star Engineering nanoEngine.
- See <http://www.brightstareng.com/arm/nanoeng.htm> for information
- on the BSE nanoEngine.
-
-config SA1100_PLEB
- bool "PLEB"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- help
- Say Y here if you are using version 1 of the Portable Linux
- Embedded Board (also known as PLEB).
- See <http://www.disy.cse.unsw.edu.au/Hardware/PLEB/>
- for more information.
-
-config SA1100_SHANNON
- bool "Shannon"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- select REGULATOR
- select REGULATOR_FIXED_VOLTAGE
- help
- The Shannon (also known as a Tuxscreen, and also as a IS2630) was a
- limited edition webphone produced by Philips. The Shannon is a SA1100
- platform with a 640x480 LCD, touchscreen, CIR keyboard, PCMCIA slots,
- and a telco interface.
-
-config SA1100_SIMPAD
- bool "Simpad"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- help
- The SIEMENS webpad SIMpad is based on the StrongARM 1110. There
- are two different versions CL4 and SL4. CL4 has 32MB RAM and 16MB
- FLASH. The SL4 version got 64 MB RAM and 32 MB FLASH and a
- PCMCIA-Slot. The version for the Germany Telecom (DTAG) is the same
- like CL4 in additional it has a PCMCIA-Slot. For more information
- visit <http://www.usa.siemens.com/> or <http://www.siemens.ch/>.
-
config SA1100_SSP
tristate "Generic PIO SSP"
- depends on UNUSED_BOARD_FILES
help
Say Y here to enable support for the generic PIO SSP driver.
This isn't for audio support, but for attached sensors and
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index 28c1cae0053f..b5816d675152 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -9,32 +9,11 @@ obj-y := clock.o generic.o #nmi-oopser.o
# Specific board support
obj-$(CONFIG_SA1100_ASSABET) += assabet.o
obj-$(CONFIG_ASSABET_NEPONSET) += neponset.o
-
-obj-$(CONFIG_SA1100_BADGE4) += badge4.o
-
-obj-$(CONFIG_SA1100_CERF) += cerf.o
-
obj-$(CONFIG_SA1100_COLLIE) += collie.o
-
-obj-$(CONFIG_SA1100_H3100) += h3100.o h3xxx.o
obj-$(CONFIG_SA1100_H3600) += h3600.o h3xxx.o
-
-obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o
-
obj-$(CONFIG_SA1100_JORNADA720) += jornada720.o
obj-$(CONFIG_SA1100_JORNADA720_SSP) += jornada720_ssp.o
-obj-$(CONFIG_SA1100_LART) += lart.o
-
-obj-$(CONFIG_SA1100_NANOENGINE) += nanoengine.o
-obj-$(CONFIG_PCI_NANOENGINE) += pci-nanoengine.o
-
-obj-$(CONFIG_SA1100_PLEB) += pleb.o
-
-obj-$(CONFIG_SA1100_SHANNON) += shannon.o
-
-obj-$(CONFIG_SA1100_SIMPAD) += simpad.o
-
# Miscellaneous functions
obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_SA1100_SSP) += ssp.o
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
deleted file mode 100644
index de79f3502045..000000000000
--- a/arch/arm/mach-sa1100/badge4.c
+++ /dev/null
@@ -1,338 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/badge4.c
- *
- * BadgePAD 4 specific initialization
- *
- * Tim Connors <connors@hpl.hp.com>
- * Christopher Hoover <ch@hpl.hp.com>
- *
- * Copyright (C) 2002 Hewlett-Packard Company
- */
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/delay.h>
-#include <linux/tty.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/errno.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <mach/irqs.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <asm/hardware/sa1111.h>
-
-#include <mach/badge4.h>
-
-#include "generic.h"
-
-static struct resource sa1111_resources[] = {
- [0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000),
- [1] = DEFINE_RES_IRQ(BADGE4_IRQ_GPIO_SA1111),
-};
-
-static int badge4_sa1111_enable(void *data, unsigned devid)
-{
- if (devid == SA1111_DEVID_USB)
- badge4_set_5V(BADGE4_5V_USB, 1);
- return 0;
-}
-
-static void badge4_sa1111_disable(void *data, unsigned devid)
-{
- if (devid == SA1111_DEVID_USB)
- badge4_set_5V(BADGE4_5V_USB, 0);
-}
-
-static struct sa1111_platform_data sa1111_info = {
- .disable_devs = SA1111_DEVID_PS2_MSE,
- .enable = badge4_sa1111_enable,
- .disable = badge4_sa1111_disable,
-};
-
-static u64 sa1111_dmamask = 0xffffffffUL;
-
-static struct platform_device sa1111_device = {
- .name = "sa1111",
- .id = 0,
- .dev = {
- .dma_mask = &sa1111_dmamask,
- .coherent_dma_mask = 0xffffffff,
- .platform_data = &sa1111_info,
- },
- .num_resources = ARRAY_SIZE(sa1111_resources),
- .resource = sa1111_resources,
-};
-
-/* LEDs */
-struct gpio_led badge4_gpio_leds[] = {
- {
- .name = "badge4:red",
- .default_trigger = "heartbeat",
- .gpio = 7,
- },
- {
- .name = "badge4:green",
- .default_trigger = "cpu0",
- .gpio = 9,
- },
-};
-
-static struct gpio_led_platform_data badge4_gpio_led_info = {
- .leds = badge4_gpio_leds,
- .num_leds = ARRAY_SIZE(badge4_gpio_leds),
-};
-
-static struct platform_device badge4_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &badge4_gpio_led_info,
- }
-};
-
-static struct platform_device *devices[] __initdata = {
- &sa1111_device,
- &badge4_leds,
-};
-
-static int __init badge4_sa1111_init(void)
-{
- /*
- * Ensure that the memory bus request/grant signals are setup,
- * and the grant is held in its inactive state
- */
- sa1110_mb_disable();
-
- /*
- * Probe for SA1111.
- */
- return platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-
-/*
- * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit)
- * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
- * Sixty-three 32 KiW Main Blocks (4032 Ki b)
- *
- * <or>
- *
- * 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit)
- * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
- * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
- */
-static struct mtd_partition badge4_partitions[] = {
- {
- .name = "BLOB boot loader",
- .offset = 0,
- .size = 0x0000A000
- }, {
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00006000
- }, {
- .name = "root",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL
- }
-};
-
-static struct flash_platform_data badge4_flash_data = {
- .map_name = "cfi_probe",
- .parts = badge4_partitions,
- .nr_parts = ARRAY_SIZE(badge4_partitions),
-};
-
-static struct resource badge4_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M);
-
-static int five_v_on __initdata = 0;
-
-static int __init five_v_on_setup(char *ignore)
-{
- five_v_on = 1;
- return 1;
-}
-__setup("five_v_on", five_v_on_setup);
-
-
-static int __init badge4_init(void)
-{
- int ret;
-
- if (!machine_is_badge4())
- return -ENODEV;
-
- /* LCD */
- GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
- BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
- BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
- BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
- BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
- BADGE4_GPIO_GPC_VID);
- GPDR &= ~BADGE4_GPIO_INT_VID;
- GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
- BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
- BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
- BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
- BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
- BADGE4_GPIO_GPC_VID);
-
- /* SDRAM SPD i2c */
- GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
- GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
-
- /* uart */
- GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
- GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
-
- /* CPLD muxsel0 input for mux/adc chip select */
- GPCR = BADGE4_GPIO_MUXSEL0;
- GPDR |= BADGE4_GPIO_MUXSEL0;
-
- /* test points: J5, J6 as inputs, J7 outputs */
- GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6);
- GPCR = BADGE4_GPIO_TESTPT_J7;
- GPDR |= BADGE4_GPIO_TESTPT_J7;
-
- /* 5V supply rail. */
- GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
- GPDR |= BADGE4_GPIO_PCMEN5V;
-
- /* CPLD sdram type inputs; set up by blob */
- //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
- printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
- !!(GPLR & BADGE4_GPIO_SDTYP1),
- !!(GPLR & BADGE4_GPIO_SDTYP0));
-
- /* SA1111 reset pin; set up by blob */
- //GPSR = BADGE4_GPIO_SA1111_NRST;
- //GPDR |= BADGE4_GPIO_SA1111_NRST;
-
-
- /* power management cruft */
- PGSR = 0;
- PWER = 0;
- PCFR = 0;
- PSDR = 0;
-
- PWER |= PWER_GPIO26; /* wake up on an edge from TESTPT_J5 */
- PWER |= PWER_RTC; /* wake up if rtc fires */
-
- /* drive sa1111_nrst during sleep */
- PGSR |= BADGE4_GPIO_SA1111_NRST;
- /* drive CPLD as is during sleep */
- PGSR |= (GPLR & (BADGE4_GPIO_SDTYP0|BADGE4_GPIO_SDTYP1));
-
-
- /* Now bring up the SA-1111. */
- ret = badge4_sa1111_init();
- if (ret < 0)
- printk(KERN_ERR
- "%s: SA-1111 initialization failed (%d)\n",
- __func__, ret);
-
-
- /* maybe turn on 5v0 from the start */
- badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on);
-
- sa11x0_register_mtd(&badge4_flash_data, &badge4_flash_resource, 1);
-
- return 0;
-}
-
-arch_initcall(badge4_init);
-
-
-static unsigned badge4_5V_bitmap = 0;
-
-void badge4_set_5V(unsigned subsystem, int on)
-{
- unsigned long flags;
- unsigned old_5V_bitmap;
-
- local_irq_save(flags);
-
- old_5V_bitmap = badge4_5V_bitmap;
-
- if (on) {
- badge4_5V_bitmap |= subsystem;
- } else {
- badge4_5V_bitmap &= ~subsystem;
- }
-
- /* detect on->off and off->on transitions */
- if ((!old_5V_bitmap) && (badge4_5V_bitmap)) {
- /* was off, now on */
- printk(KERN_INFO "%s: enabling 5V supply rail\n", __func__);
- GPSR = BADGE4_GPIO_PCMEN5V;
- } else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) {
- /* was on, now off */
- printk(KERN_INFO "%s: disabling 5V supply rail\n", __func__);
- GPCR = BADGE4_GPIO_PCMEN5V;
- }
-
- local_irq_restore(flags);
-}
-EXPORT_SYMBOL(badge4_set_5V);
-
-
-static struct map_desc badge4_io_desc[] __initdata = {
- { /* SRAM bank 1 */
- .virtual = 0xf1000000,
- .pfn = __phys_to_pfn(0x08000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }, { /* SRAM bank 2 */
- .virtual = 0xf2000000,
- .pfn = __phys_to_pfn(0x10000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }
-};
-
-static void
-badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- if (!state) {
- Ser1SDCR0 |= SDCR0_UART;
- }
-}
-
-static struct sa1100_port_fns badge4_port_fns __initdata = {
- .pm = badge4_uart_pm,
-};
-
-static void __init badge4_map_io(void)
-{
- sa1100_map_io();
- iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc));
-
- sa1100_register_uart_fns(&badge4_port_fns);
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-}
-
-MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
- .atag_offset = 0x100,
- .map_io = badge4_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_late = sa11x0_init_late,
- .init_time = sa1100_timer_init,
-#ifdef CONFIG_SA1111
- .dma_zone_size = SZ_1M,
-#endif
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
deleted file mode 100644
index f9243a3fd69c..000000000000
--- a/arch/arm/mach-sa1100/cerf.c
+++ /dev/null
@@ -1,181 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/cerf.c
- *
- * Apr-2003 : Removed some old PDA crud [FB]
- * Oct-2003 : Added uart2 resource [FB]
- * Jan-2004 : Removed io map for flash [FB]
- */
-
-#include <linux/init.h>
-#include <linux/gpio/machine.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-
-#include <mach/cerf.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/irqs.h>
-#include "generic.h"
-
-static struct resource cerfuart2_resources[] = {
- [0] = DEFINE_RES_MEM(0x80030000, SZ_64K),
-};
-
-static struct platform_device cerfuart2_device = {
- .name = "sa11x0-uart",
- .id = 2,
- .num_resources = ARRAY_SIZE(cerfuart2_resources),
- .resource = cerfuart2_resources,
-};
-
-/* Compact Flash */
-static struct gpiod_lookup_table cerf_cf_gpio_table = {
- .dev_id = "sa11x0-pcmcia.1",
- .table = {
- GPIO_LOOKUP("gpio", 19, "bvd2", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 20, "bvd1", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 21, "reset", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 22, "ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 23, "detect", GPIO_ACTIVE_LOW),
- { },
- },
-};
-
-/* LEDs */
-struct gpio_led cerf_gpio_leds[] = {
- {
- .name = "cerf:d0",
- .default_trigger = "heartbeat",
- .gpio = 0,
- },
- {
- .name = "cerf:d1",
- .default_trigger = "cpu0",
- .gpio = 1,
- },
- {
- .name = "cerf:d2",
- .default_trigger = "default-on",
- .gpio = 2,
- },
- {
- .name = "cerf:d3",
- .default_trigger = "default-on",
- .gpio = 3,
- },
-
-};
-
-static struct gpio_led_platform_data cerf_gpio_led_info = {
- .leds = cerf_gpio_leds,
- .num_leds = ARRAY_SIZE(cerf_gpio_leds),
-};
-
-static struct platform_device *cerf_devices[] __initdata = {
- &cerfuart2_device,
-};
-
-#ifdef CONFIG_SA1100_CERF_FLASH_32MB
-# define CERF_FLASH_SIZE 0x02000000
-#elif defined CONFIG_SA1100_CERF_FLASH_16MB
-# define CERF_FLASH_SIZE 0x01000000
-#elif defined CONFIG_SA1100_CERF_FLASH_8MB
-# define CERF_FLASH_SIZE 0x00800000
-#else
-# error "Undefined flash size for CERF"
-#endif
-
-static struct mtd_partition cerf_partitions[] = {
- {
- .name = "Bootloader",
- .size = 0x00020000,
- .offset = 0x00000000,
- }, {
- .name = "Params",
- .size = 0x00040000,
- .offset = 0x00020000,
- }, {
- .name = "Kernel",
- .size = 0x00100000,
- .offset = 0x00060000,
- }, {
- .name = "Filesystem",
- .size = CERF_FLASH_SIZE-0x00160000,
- .offset = 0x00160000,
- }
-};
-
-static struct flash_platform_data cerf_flash_data = {
- .map_name = "cfi_probe",
- .parts = cerf_partitions,
- .nr_parts = ARRAY_SIZE(cerf_partitions),
-};
-
-static struct resource cerf_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
-
-static void __init cerf_init_irq(void)
-{
- sa1100_init_irq();
- irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
-}
-
-static struct map_desc cerf_io_desc[] __initdata = {
- { /* Crystal Ethernet Chip */
- .virtual = 0xf0000000,
- .pfn = __phys_to_pfn(0x08000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }
-};
-
-static void __init cerf_map_io(void)
-{
- sa1100_map_io();
- iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 2); /* disable this and the uart2 device for sa1100_fir */
- sa1100_register_uart(2, 1);
-}
-
-static struct mcp_plat_data cerf_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
-};
-
-static void __init cerf_init(void)
-{
- sa11x0_ppc_configure_mcp();
- platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
- gpio_led_register_device(-1, &cerf_gpio_led_info);
- sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
- sa11x0_register_mcp(&cerf_mcp_data);
- sa11x0_register_pcmcia(1, &cerf_cf_gpio_table);
-}
-
-MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
- /* Maintainer: support@intrinsyc.com */
- .map_io = cerf_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = cerf_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = cerf_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c
deleted file mode 100644
index 51eaeeaf3f10..000000000000
--- a/arch/arm/mach-sa1100/h3100.c
+++ /dev/null
@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Support for Compaq iPAQ H3100 handheld computer
- *
- * Copyright (c) 2000,1 Compaq Computer Corporation. (Author: Jamey Hicks)
- * Copyright (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru>
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-
-#include <video/sa1100fb.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <linux/platform_data/irda-sa11x0.h>
-
-#include <mach/h3xxx.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-/*
- * helper for sa1100fb
- */
-static struct gpio h3100_lcd_gpio[] = {
- { H3100_GPIO_LCD_3V_ON, GPIOF_OUT_INIT_LOW, "LCD 3V" },
- { H3XXX_EGPIO_LCD_ON, GPIOF_OUT_INIT_LOW, "LCD ON" },
-};
-
-static bool h3100_lcd_request(void)
-{
- static bool h3100_lcd_ok;
- int rc;
-
- if (h3100_lcd_ok)
- return true;
-
- rc = gpio_request_array(h3100_lcd_gpio, ARRAY_SIZE(h3100_lcd_gpio));
- if (rc)
- pr_err("%s: can't request GPIOs\n", __func__);
- else
- h3100_lcd_ok = true;
-
- return h3100_lcd_ok;
-}
-
-static void h3100_lcd_power(int enable)
-{
- if (!h3100_lcd_request())
- return;
-
- gpio_set_value(H3100_GPIO_LCD_3V_ON, enable);
- gpio_set_value(H3XXX_EGPIO_LCD_ON, enable);
-}
-
-static struct sa1100fb_mach_info h3100_lcd_info = {
- .pixclock = 406977, .bpp = 4,
- .xres = 320, .yres = 240,
-
- .hsync_len = 26, .vsync_len = 41,
- .left_margin = 4, .upper_margin = 0,
- .right_margin = 4, .lower_margin = 0,
-
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
- .cmap_greyscale = 1,
- .cmap_inverse = 1,
-
- .lccr0 = LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
-
- .lcd_power = h3100_lcd_power,
-};
-
-static void __init h3100_map_io(void)
-{
- h3xxx_map_io();
-
- /* Older bootldrs put GPIO2-9 in alternate mode on the
- assumption that they are used for video */
- GAFR &= ~0x000001fb;
-}
-
-/*
- * This turns the IRDA power on or off on the Compaq H3100
- */
-static struct gpio h3100_irda_gpio[] = {
- { H3100_GPIO_IR_ON, GPIOF_OUT_INIT_LOW, "IrDA power" },
- { H3100_GPIO_IR_FSEL, GPIOF_OUT_INIT_LOW, "IrDA fsel" },
-};
-
-static int h3100_irda_set_power(struct device *dev, unsigned int state)
-{
- gpio_set_value(H3100_GPIO_IR_ON, state);
- return 0;
-}
-
-static void h3100_irda_set_speed(struct device *dev, unsigned int speed)
-{
- gpio_set_value(H3100_GPIO_IR_FSEL, !(speed < 4000000));
-}
-
-static int h3100_irda_startup(struct device *dev)
-{
- return gpio_request_array(h3100_irda_gpio, sizeof(h3100_irda_gpio));
-}
-
-static void h3100_irda_shutdown(struct device *dev)
-{
- return gpio_free_array(h3100_irda_gpio, sizeof(h3100_irda_gpio));
-}
-
-static struct irda_platform_data h3100_irda_data = {
- .set_power = h3100_irda_set_power,
- .set_speed = h3100_irda_set_speed,
- .startup = h3100_irda_startup,
- .shutdown = h3100_irda_shutdown,
-};
-
-static void __init h3100_mach_init(void)
-{
- h3xxx_mach_init();
-
- sa11x0_register_pcmcia(-1, NULL);
- sa11x0_register_lcd(&h3100_lcd_info);
- sa11x0_register_irda(&h3100_irda_data);
-}
-
-MACHINE_START(H3100, "Compaq iPAQ H3100")
- .atag_offset = 0x100,
- .map_io = h3100_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = h3100_mach_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
-
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
deleted file mode 100644
index 3085f1c2e586..000000000000
--- a/arch/arm/mach-sa1100/hackkit.c
+++ /dev/null
@@ -1,184 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/hackkit.c
- *
- * Copyright (C) 2002 Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
- *
- * This file contains all HackKit tweaks. Based on original work from
- * Nicolas Pitre's assabet fixes
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/tty.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/cpufreq.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/serial_core.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/tty.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <linux/platform_device.h>
-#include <linux/pgtable.h>
-
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-/**********************************************************************
- * prototypes
- */
-
-/* init funcs */
-static void __init hackkit_map_io(void);
-
-static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate);
-
-/**********************************************************************
- * global data
- */
-
-/**********************************************************************
- * static data
- */
-
-static struct map_desc hackkit_io_desc[] __initdata = {
- { /* Flash bank 0 */
- .virtual = 0xe8000000,
- .pfn = __phys_to_pfn(0x00000000),
- .length = 0x01000000,
- .type = MT_DEVICE
- },
-};
-
-static struct sa1100_port_fns hackkit_port_fns __initdata = {
- .pm = hackkit_uart_pm,
-};
-
-/**********************************************************************
- * Static functions
- */
-
-static void __init hackkit_map_io(void)
-{
- sa1100_map_io();
- iotable_init(hackkit_io_desc, ARRAY_SIZE(hackkit_io_desc));
-
- sa1100_register_uart_fns(&hackkit_port_fns);
- sa1100_register_uart(0, 1); /* com port */
- sa1100_register_uart(1, 2);
- sa1100_register_uart(2, 3); /* radio module */
-
- Ser1SDCR0 |= SDCR0_SUS;
-}
-
-/**
- * hackkit_uart_pm - powermgmt callback function for system 3 UART
- * @port: uart port structure
- * @state: pm state
- * @oldstate: old pm state
- *
- */
-static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- /* TODO: switch on/off uart in powersave mode */
-}
-
-static struct mtd_partition hackkit_partitions[] = {
- {
- .name = "BLOB",
- .size = 0x00040000,
- .offset = 0x00000000,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- }, {
- .name = "config",
- .size = 0x00040000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "kernel",
- .size = 0x00100000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "initrd",
- .size = 0x00180000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "rootfs",
- .size = 0x700000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "data",
- .size = MTDPART_SIZ_FULL,
- .offset = MTDPART_OFS_APPEND,
- }
-};
-
-static struct flash_platform_data hackkit_flash_data = {
- .map_name = "cfi_probe",
- .parts = hackkit_partitions,
- .nr_parts = ARRAY_SIZE(hackkit_partitions),
-};
-
-static struct resource hackkit_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
-
-/* LEDs */
-struct gpio_led hackkit_gpio_leds[] = {
- {
- .name = "hackkit:red",
- .default_trigger = "cpu0",
- .gpio = 22,
- },
- {
- .name = "hackkit:green",
- .default_trigger = "heartbeat",
- .gpio = 23,
- },
-};
-
-static struct gpio_led_platform_data hackkit_gpio_led_info = {
- .leds = hackkit_gpio_leds,
- .num_leds = ARRAY_SIZE(hackkit_gpio_leds),
-};
-
-static struct platform_device hackkit_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &hackkit_gpio_led_info,
- }
-};
-
-static void __init hackkit_init(void)
-{
- sa11x0_register_mtd(&hackkit_flash_data, &hackkit_flash_resource, 1);
- platform_device_register(&hackkit_leds);
-}
-
-/**********************************************************************
- * Exported Functions
- */
-
-MACHINE_START(HACKKIT, "HackKit Cpu Board")
- .atag_offset = 0x100,
- .map_io = hackkit_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = hackkit_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/include/mach/badge4.h b/arch/arm/mach-sa1100/include/mach/badge4.h
deleted file mode 100644
index 90e744a54ed5..000000000000
--- a/arch/arm/mach-sa1100/include/mach/badge4.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/mach-sa1100/include/mach/badge4.h
- *
- * Tim Connors <connors@hpl.hp.com>
- * Christopher Hoover <ch@hpl.hp.com>
- *
- * Copyright (C) 2002 Hewlett-Packard Company
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <mach/hardware.h> instead"
-#endif
-
-#define BADGE4_SA1111_BASE (0x48000000)
-
-/* GPIOs on the BadgePAD 4 */
-#define BADGE4_GPIO_INT_1111 GPIO_GPIO0 /* SA-1111 IRQ */
-
-#define BADGE4_GPIO_INT_VID GPIO_GPIO1 /* Video expansion */
-#define BADGE4_GPIO_LGP2 GPIO_GPIO2 /* GPIO_LDD8 */
-#define BADGE4_GPIO_LGP3 GPIO_GPIO3 /* GPIO_LDD9 */
-#define BADGE4_GPIO_LGP4 GPIO_GPIO4 /* GPIO_LDD10 */
-#define BADGE4_GPIO_LGP5 GPIO_GPIO5 /* GPIO_LDD11 */
-#define BADGE4_GPIO_LGP6 GPIO_GPIO6 /* GPIO_LDD12 */
-#define BADGE4_GPIO_LGP7 GPIO_GPIO7 /* GPIO_LDD13 */
-#define BADGE4_GPIO_LGP8 GPIO_GPIO8 /* GPIO_LDD14 */
-#define BADGE4_GPIO_LGP9 GPIO_GPIO9 /* GPIO_LDD15 */
-#define BADGE4_GPIO_GPA_VID GPIO_GPIO10 /* Video expansion */
-#define BADGE4_GPIO_GPB_VID GPIO_GPIO11 /* Video expansion */
-#define BADGE4_GPIO_GPC_VID GPIO_GPIO12 /* Video expansion */
-
-#define BADGE4_GPIO_UART_HS1 GPIO_GPIO13
-#define BADGE4_GPIO_UART_HS2 GPIO_GPIO14
-
-#define BADGE4_GPIO_MUXSEL0 GPIO_GPIO15
-#define BADGE4_GPIO_TESTPT_J7 GPIO_GPIO16
-
-#define BADGE4_GPIO_SDSDA GPIO_GPIO17 /* SDRAM SPD Data */
-#define BADGE4_GPIO_SDSCL GPIO_GPIO18 /* SDRAM SPD Clock */
-#define BADGE4_GPIO_SDTYP0 GPIO_GPIO19 /* SDRAM Type Control */
-#define BADGE4_GPIO_SDTYP1 GPIO_GPIO20 /* SDRAM Type Control */
-
-#define BADGE4_GPIO_BGNT_1111 GPIO_GPIO21 /* GPIO_MBGNT */
-#define BADGE4_GPIO_BREQ_1111 GPIO_GPIO22 /* GPIO_TREQA */
-
-#define BADGE4_GPIO_TESTPT_J6 GPIO_GPIO23
-
-#define BADGE4_GPIO_PCMEN5V GPIO_GPIO24 /* 5V power */
-
-#define BADGE4_GPIO_SA1111_NRST GPIO_GPIO25 /* SA-1111 nRESET */
-
-#define BADGE4_GPIO_TESTPT_J5 GPIO_GPIO26
-
-#define BADGE4_GPIO_CLK_1111 GPIO_GPIO27 /* GPIO_32_768kHz */
-
-/* Interrupts on the BadgePAD 4 */
-#define BADGE4_IRQ_GPIO_SA1111 IRQ_GPIO0 /* SA-1111 interrupt */
-
-
-/* PCM5ENV Usage tracking */
-
-#define BADGE4_5V_PCMCIA_SOCK0 (1<<0)
-#define BADGE4_5V_PCMCIA_SOCK1 (1<<1)
-#define BADGE4_5V_PCMCIA_SOCK(n) (1<<(n))
-#define BADGE4_5V_USB (1<<2)
-#define BADGE4_5V_INITIALLY (1<<3)
-
-#ifndef __ASSEMBLY__
-extern void badge4_set_5V(unsigned subsystem, int on);
-#endif
diff --git a/arch/arm/mach-sa1100/include/mach/cerf.h b/arch/arm/mach-sa1100/include/mach/cerf.h
deleted file mode 100644
index 59c185ebd494..000000000000
--- a/arch/arm/mach-sa1100/include/mach/cerf.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/mach-sa1100/include/mach/cerf.h
- *
- * Apr-2003 : Removed some old PDA crud [FB]
- */
-#ifndef _INCLUDE_CERF_H_
-#define _INCLUDE_CERF_H_
-
-
-#define CERF_ETH_IO 0xf0000000
-#define CERF_ETH_IRQ IRQ_GPIO26
-
-#define CERF_GPIO_CF_BVD2 19
-#define CERF_GPIO_CF_BVD1 20
-#define CERF_GPIO_CF_RESET 21
-#define CERF_GPIO_CF_IRQ 22
-#define CERF_GPIO_CF_CD 23
-
-#endif // _INCLUDE_CERF_H_
diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h
deleted file mode 100644
index 8d5ee1438956..000000000000
--- a/arch/arm/mach-sa1100/include/mach/nanoengine.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/mach-sa1100/include/mach/nanoengine.h
- *
- * This file contains the hardware specific definitions for nanoEngine.
- * Only include this file from SA1100-specific files.
- *
- * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
- */
-#ifndef __ASM_ARCH_NANOENGINE_H
-#define __ASM_ARCH_NANOENGINE_H
-
-#include <mach/irqs.h>
-
-#define GPIO_PC_READY0 11 /* ready for socket 0 (active high)*/
-#define GPIO_PC_READY1 12 /* ready for socket 1 (active high) */
-#define GPIO_PC_CD0 13 /* detect for socket 0 (active low) */
-#define GPIO_PC_CD1 14 /* detect for socket 1 (active low) */
-#define GPIO_PC_RESET0 15 /* reset socket 0 */
-#define GPIO_PC_RESET1 16 /* reset socket 1 */
-
-#define NANOENGINE_IRQ_GPIO_PCI IRQ_GPIO0
-#define NANOENGINE_IRQ_GPIO_PC_READY0 IRQ_GPIO11
-#define NANOENGINE_IRQ_GPIO_PC_READY1 IRQ_GPIO12
-#define NANOENGINE_IRQ_GPIO_PC_CD0 IRQ_GPIO13
-#define NANOENGINE_IRQ_GPIO_PC_CD1 IRQ_GPIO14
-
-/*
- * nanoEngine Memory Map:
- *
- * 0000.0000 - 003F.0000 - 4 MB Flash
- * C000.0000 - C1FF.FFFF - 32 MB SDRAM
- * 1860.0000 - 186F.FFFF - 1 MB Internal PCI Memory Read/Write
- * 18A1.0000 - 18A1.FFFF - 64 KB Internal PCI Config Space
- * 4000.0000 - 47FF.FFFF - 128 MB External Bus I/O - Multiplexed Mode
- * 4800.0000 - 4FFF.FFFF - 128 MB External Bus I/O - Non-Multiplexed Mode
- *
- */
-
-#define NANO_PCI_MEM_RW_PHYS 0x18600000
-#define NANO_PCI_MEM_RW_VIRT 0xf1000000
-#define NANO_PCI_MEM_RW_SIZE SZ_1M
-#define NANO_PCI_CONFIG_SPACE_PHYS 0x18A10000
-#define NANO_PCI_CONFIG_SPACE_VIRT 0xf2000000
-#define NANO_PCI_CONFIG_SPACE_SIZE SZ_64K
-
-#endif
-
diff --git a/arch/arm/mach-sa1100/include/mach/shannon.h b/arch/arm/mach-sa1100/include/mach/shannon.h
deleted file mode 100644
index d830375f329c..000000000000
--- a/arch/arm/mach-sa1100/include/mach/shannon.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _INCLUDE_SHANNON_H
-#define _INCLUDE_SHANNON_H
-
-/* taken from comp.os.inferno Tue, 12 Sep 2000 09:21:50 GMT,
- * written by <forsyth@vitanuova.com> */
-
-#define SHANNON_GPIO_SPI_FLASH GPIO_GPIO (0) /* Output - Driven low, enables SPI to flash */
-#define SHANNON_GPIO_SPI_DSP GPIO_GPIO (1) /* Output - Driven low, enables SPI to DSP */
-/* lcd lower = GPIO 2-9 */
-#define SHANNON_GPIO_SPI_OUTPUT GPIO_GPIO (10) /* Output - SPI output to DSP */
-#define SHANNON_GPIO_SPI_INPUT GPIO_GPIO (11) /* Input - SPI input from DSP */
-#define SHANNON_GPIO_SPI_CLOCK GPIO_GPIO (12) /* Output - Clock for SPI */
-#define SHANNON_GPIO_SPI_FRAME GPIO_GPIO (13) /* Output - Frame marker - not used */
-#define SHANNON_GPIO_SPI_RTS GPIO_GPIO (14) /* Input - SPI Ready to Send */
-#define SHANNON_IRQ_GPIO_SPI_RTS IRQ_GPIO14
-#define SHANNON_GPIO_SPI_CTS GPIO_GPIO (15) /* Output - SPI Clear to Send */
-#define SHANNON_GPIO_IRQ_CODEC GPIO_GPIO (16) /* in, irq from ucb1200 */
-#define SHANNON_IRQ_GPIO_IRQ_CODEC IRQ_GPIO16
-#define SHANNON_GPIO_DSP_RESET GPIO_GPIO (17) /* Output - Drive low to reset the DSP */
-#define SHANNON_GPIO_CODEC_RESET GPIO_GPIO (18) /* Output - Drive low to reset the UCB1x00 */
-#define SHANNON_GPIO_U3_RTS GPIO_GPIO (19) /* ?? */
-#define SHANNON_GPIO_U3_CTS GPIO_GPIO (20) /* ?? */
-#define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */
-#define SHANNON_GPIO_DISP_EN 22 /* out */
-/* XXX GPIO 23 unaccounted for */
-#define SHANNON_GPIO_EJECT_0 24 /* in */
-#define SHANNON_GPIO_EJECT_1 25 /* in */
-#define SHANNON_GPIO_RDY_0 26 /* in */
-#define SHANNON_GPIO_RDY_1 27 /* in */
-
-/* MCP UCB codec GPIO pins... */
-
-#define SHANNON_UCB_GPIO_BACKLIGHT 9
-#define SHANNON_UCB_GPIO_BRIGHT_MASK 7
-#define SHANNON_UCB_GPIO_BRIGHT 6
-#define SHANNON_UCB_GPIO_CONTRAST_MASK 0x3f
-#define SHANNON_UCB_GPIO_CONTRAST 0
-
-#endif
diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h
deleted file mode 100644
index d53d680de3d9..000000000000
--- a/arch/arm/mach-sa1100/include/mach/simpad.h
+++ /dev/null
@@ -1,159 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * arch/arm/mach-sa1100/include/mach/simpad.h
- *
- * based of assabet.h same as HUW_Webpanel
- *
- * This file contains the hardware specific definitions for SIMpad
- *
- * 2001/05/14 Juergen Messerer <juergen.messerer@freesurf.ch>
- */
-
-#ifndef __ASM_ARCH_SIMPAD_H
-#define __ASM_ARCH_SIMPAD_H
-
-
-#define GPIO_UART1_RTS GPIO_GPIO14
-#define GPIO_UART1_DTR GPIO_GPIO7
-#define GPIO_UART1_CTS GPIO_GPIO8
-#define GPIO_UART1_DCD GPIO_GPIO23
-#define GPIO_UART1_DSR GPIO_GPIO6
-
-#define GPIO_UART3_RTS GPIO_GPIO12
-#define GPIO_UART3_DTR GPIO_GPIO16
-#define GPIO_UART3_CTS GPIO_GPIO13
-#define GPIO_UART3_DCD GPIO_GPIO18
-#define GPIO_UART3_DSR GPIO_GPIO17
-
-#define GPIO_POWER_BUTTON GPIO_GPIO0
-#define GPIO_UCB1300_IRQ GPIO_GPIO22 /* UCB GPIO and touchscreen */
-
-#define IRQ_UART1_CTS IRQ_GPIO15
-#define IRQ_UART1_DCD GPIO_GPIO23
-#define IRQ_UART1_DSR GPIO_GPIO6
-#define IRQ_UART3_CTS GPIO_GPIO13
-#define IRQ_UART3_DCD GPIO_GPIO18
-#define IRQ_UART3_DSR GPIO_GPIO17
-
-#define IRQ_GPIO_UCB1300_IRQ IRQ_GPIO22
-#define IRQ_GPIO_POWER_BUTTON IRQ_GPIO0
-
-
-/*--- PCMCIA ---*/
-#define GPIO_CF_CD 24
-#define GPIO_CF_IRQ 1
-
-/*--- SmartCard ---*/
-#define GPIO_SMART_CARD GPIO_GPIO10
-#define IRQ_GPIO_SMARD_CARD IRQ_GPIO10
-
-/*--- ucb1x00 GPIO ---*/
-#define SIMPAD_UCB1X00_GPIO_BASE (GPIO_MAX + 1)
-#define SIMPAD_UCB1X00_GPIO_PROG1 (SIMPAD_UCB1X00_GPIO_BASE)
-#define SIMPAD_UCB1X00_GPIO_PROG2 (SIMPAD_UCB1X00_GPIO_BASE + 1)
-#define SIMPAD_UCB1X00_GPIO_UP (SIMPAD_UCB1X00_GPIO_BASE + 2)
-#define SIMPAD_UCB1X00_GPIO_DOWN (SIMPAD_UCB1X00_GPIO_BASE + 3)
-#define SIMPAD_UCB1X00_GPIO_LEFT (SIMPAD_UCB1X00_GPIO_BASE + 4)
-#define SIMPAD_UCB1X00_GPIO_RIGHT (SIMPAD_UCB1X00_GPIO_BASE + 5)
-#define SIMPAD_UCB1X00_GPIO_6 (SIMPAD_UCB1X00_GPIO_BASE + 6)
-#define SIMPAD_UCB1X00_GPIO_7 (SIMPAD_UCB1X00_GPIO_BASE + 7)
-#define SIMPAD_UCB1X00_GPIO_HEADSET (SIMPAD_UCB1X00_GPIO_BASE + 8)
-#define SIMPAD_UCB1X00_GPIO_SPEAKER (SIMPAD_UCB1X00_GPIO_BASE + 9)
-
-/*--- CS3 Latch ---*/
-#define SIMPAD_CS3_GPIO_BASE (GPIO_MAX + 11)
-#define SIMPAD_CS3_VCC_5V_EN (SIMPAD_CS3_GPIO_BASE)
-#define SIMPAD_CS3_VCC_3V_EN (SIMPAD_CS3_GPIO_BASE + 1)
-#define SIMPAD_CS3_EN1 (SIMPAD_CS3_GPIO_BASE + 2)
-#define SIMPAD_CS3_EN0 (SIMPAD_CS3_GPIO_BASE + 3)
-#define SIMPAD_CS3_DISPLAY_ON (SIMPAD_CS3_GPIO_BASE + 4)
-#define SIMPAD_CS3_PCMCIA_BUFF_DIS (SIMPAD_CS3_GPIO_BASE + 5)
-#define SIMPAD_CS3_MQ_RESET (SIMPAD_CS3_GPIO_BASE + 6)
-#define SIMPAD_CS3_PCMCIA_RESET (SIMPAD_CS3_GPIO_BASE + 7)
-#define SIMPAD_CS3_DECT_POWER_ON (SIMPAD_CS3_GPIO_BASE + 8)
-#define SIMPAD_CS3_IRDA_SD (SIMPAD_CS3_GPIO_BASE + 9)
-#define SIMPAD_CS3_RS232_ON (SIMPAD_CS3_GPIO_BASE + 10)
-#define SIMPAD_CS3_SD_MEDIAQ (SIMPAD_CS3_GPIO_BASE + 11)
-#define SIMPAD_CS3_LED2_ON (SIMPAD_CS3_GPIO_BASE + 12)
-#define SIMPAD_CS3_IRDA_MODE (SIMPAD_CS3_GPIO_BASE + 13)
-#define SIMPAD_CS3_ENABLE_5V (SIMPAD_CS3_GPIO_BASE + 14)
-#define SIMPAD_CS3_RESET_SIMCARD (SIMPAD_CS3_GPIO_BASE + 15)
-
-#define SIMPAD_CS3_PCMCIA_BVD1 (SIMPAD_CS3_GPIO_BASE + 16)
-#define SIMPAD_CS3_PCMCIA_BVD2 (SIMPAD_CS3_GPIO_BASE + 17)
-#define SIMPAD_CS3_PCMCIA_VS1 (SIMPAD_CS3_GPIO_BASE + 18)
-#define SIMPAD_CS3_PCMCIA_VS2 (SIMPAD_CS3_GPIO_BASE + 19)
-#define SIMPAD_CS3_LOCK_IND (SIMPAD_CS3_GPIO_BASE + 20)
-#define SIMPAD_CS3_CHARGING_STATE (SIMPAD_CS3_GPIO_BASE + 21)
-#define SIMPAD_CS3_PCMCIA_SHORT (SIMPAD_CS3_GPIO_BASE + 22)
-#define SIMPAD_CS3_GPIO_23 (SIMPAD_CS3_GPIO_BASE + 23)
-
-#define CS3_BASE IOMEM(0xf1000000)
-
-long simpad_get_cs3_ro(void);
-long simpad_get_cs3_shadow(void);
-void simpad_set_cs3_bit(int value);
-void simpad_clear_cs3_bit(int value);
-
-#define VCC_5V_EN 0x0001 /* For 5V PCMCIA */
-#define VCC_3V_EN 0x0002 /* FOR 3.3V PCMCIA */
-#define EN1 0x0004 /* This is only for EPROM's */
-#define EN0 0x0008 /* Both should be enable for 3.3V or 5V */
-#define DISPLAY_ON 0x0010
-#define PCMCIA_BUFF_DIS 0x0020
-#define MQ_RESET 0x0040
-#define PCMCIA_RESET 0x0080
-#define DECT_POWER_ON 0x0100
-#define IRDA_SD 0x0200 /* Shutdown for powersave */
-#define RS232_ON 0x0400
-#define SD_MEDIAQ 0x0800 /* Shutdown for powersave */
-#define LED2_ON 0x1000
-#define IRDA_MODE 0x2000 /* Fast/Slow IrDA mode */
-#define ENABLE_5V 0x4000 /* Enable 5V circuit */
-#define RESET_SIMCARD 0x8000
-
-#define PCMCIA_BVD1 0x01
-#define PCMCIA_BVD2 0x02
-#define PCMCIA_VS1 0x04
-#define PCMCIA_VS2 0x08
-#define LOCK_IND 0x10
-#define CHARGING_STATE 0x20
-#define PCMCIA_SHORT 0x40
-
-/*--- Battery ---*/
-struct simpad_battery {
- unsigned char ac_status; /* line connected yes/no */
- unsigned char status; /* battery loading yes/no */
- unsigned char percentage; /* percentage loaded */
- unsigned short life; /* life till empty */
-};
-
-/* These should match the apm_bios.h definitions */
-#define SIMPAD_AC_STATUS_AC_OFFLINE 0x00
-#define SIMPAD_AC_STATUS_AC_ONLINE 0x01
-#define SIMPAD_AC_STATUS_AC_BACKUP 0x02 /* What does this mean? */
-#define SIMPAD_AC_STATUS_AC_UNKNOWN 0xff
-
-/* These bitfields are rarely "or'd" together */
-#define SIMPAD_BATT_STATUS_HIGH 0x01
-#define SIMPAD_BATT_STATUS_LOW 0x02
-#define SIMPAD_BATT_STATUS_CRITICAL 0x04
-#define SIMPAD_BATT_STATUS_CHARGING 0x08
-#define SIMPAD_BATT_STATUS_CHARGE_MAIN 0x10
-#define SIMPAD_BATT_STATUS_DEAD 0x20 /* Battery will not charge */
-#define SIMPAD_BATT_NOT_INSTALLED 0x20 /* For expansion pack batteries */
-#define SIMPAD_BATT_STATUS_FULL 0x40 /* Battery fully charged (and connected to AC) */
-#define SIMPAD_BATT_STATUS_NOBATT 0x80
-#define SIMPAD_BATT_STATUS_UNKNOWN 0xff
-
-extern int simpad_get_battery(struct simpad_battery* );
-
-#endif // __ASM_ARCH_SIMPAD_H
-
-
-
-
-
-
-
-
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
deleted file mode 100644
index e3a0279750e3..000000000000
--- a/arch/arm/mach-sa1100/lart.c
+++ /dev/null
@@ -1,177 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/lart.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/tty.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <linux/platform_device.h>
-
-#include <video/sa1100fb.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-static struct mcp_plat_data lart_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
-};
-
-#ifdef LART_GREY_LCD
-static struct sa1100fb_mach_info lart_grey_info = {
- .pixclock = 150000, .bpp = 4,
- .xres = 320, .yres = 240,
-
- .hsync_len = 1, .vsync_len = 1,
- .left_margin = 4, .upper_margin = 0,
- .right_margin = 2, .lower_margin = 0,
-
- .cmap_greyscale = 1,
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-
- .lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
-};
-#endif
-#ifdef LART_COLOR_LCD
-static struct sa1100fb_mach_info lart_color_info = {
- .pixclock = 150000, .bpp = 16,
- .xres = 320, .yres = 240,
-
- .hsync_len = 2, .vsync_len = 3,
- .left_margin = 69, .upper_margin = 14,
- .right_margin = 8, .lower_margin = 4,
-
- .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
-};
-#endif
-#ifdef LART_VIDEO_OUT
-static struct sa1100fb_mach_info lart_video_info = {
- .pixclock = 39721, .bpp = 16,
- .xres = 640, .yres = 480,
-
- .hsync_len = 95, .vsync_len = 2,
- .left_margin = 40, .upper_margin = 32,
- .right_margin = 24, .lower_margin = 11,
-
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-
- .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
- .lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
-};
-#endif
-
-#ifdef LART_KIT01_LCD
-static struct sa1100fb_mach_info lart_kit01_info = {
- .pixclock = 63291, .bpp = 16,
- .xres = 640, .yres = 480,
-
- .hsync_len = 64, .vsync_len = 3,
- .left_margin = 122, .upper_margin = 45,
- .right_margin = 10, .lower_margin = 10,
-
- .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg
-};
-#endif
-
-static void __init lart_init(void)
-{
- struct sa1100fb_mach_info *inf = NULL;
-
-#ifdef LART_GREY_LCD
- inf = &lart_grey_info;
-#endif
-#ifdef LART_COLOR_LCD
- inf = &lart_color_info;
-#endif
-#ifdef LART_VIDEO_OUT
- inf = &lart_video_info;
-#endif
-#ifdef LART_KIT01_LCD
- inf = &lart_kit01_info;
-#endif
-
- if (inf)
- sa11x0_register_lcd(inf);
-
- sa11x0_ppc_configure_mcp();
- sa11x0_register_mcp(&lart_mcp_data);
-}
-
-static struct map_desc lart_io_desc[] __initdata = {
- { /* main flash memory */
- .virtual = 0xe8000000,
- .pfn = __phys_to_pfn(0x00000000),
- .length = 0x00400000,
- .type = MT_DEVICE
- }, { /* main flash, alternative location */
- .virtual = 0xec000000,
- .pfn = __phys_to_pfn(0x08000000),
- .length = 0x00400000,
- .type = MT_DEVICE
- }
-};
-
-/* LEDs */
-struct gpio_led lart_gpio_leds[] = {
- {
- .name = "lart:red",
- .default_trigger = "cpu0",
- .gpio = 23,
- },
-};
-
-static struct gpio_led_platform_data lart_gpio_led_info = {
- .leds = lart_gpio_leds,
- .num_leds = ARRAY_SIZE(lart_gpio_leds),
-};
-
-static struct platform_device lart_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &lart_gpio_led_info,
- }
-};
-static void __init lart_map_io(void)
-{
- sa1100_map_io();
- iotable_init(lart_io_desc, ARRAY_SIZE(lart_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
- sa1100_register_uart(2, 2);
-
- GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
- GPDR |= GPIO_UART_TXD;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- platform_device_register(&lart_leds);
-}
-
-MACHINE_START(LART, "LART")
- .atag_offset = 0x100,
- .map_io = lart_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_machine = lart_init,
- .init_late = sa11x0_init_late,
- .init_time = sa1100_timer_init,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c
deleted file mode 100644
index f6c9c19c39fb..000000000000
--- a/arch/arm/mach-sa1100/nanoengine.c
+++ /dev/null
@@ -1,136 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/nanoengine.c
- *
- * Bright Star Engineering's nanoEngine board init code.
- *
- * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
- */
-
-#include <linux/init.h>
-#include <linux/gpio/machine.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/root_dev.h>
-
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-
-#include <mach/hardware.h>
-#include <mach/nanoengine.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-/* Flash bank 0 */
-static struct mtd_partition nanoengine_partitions[] = {
- {
- .name = "nanoEngine boot firmware and parameter table",
- .size = 0x00010000, /* 32K */
- .offset = 0,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "kernel/initrd reserved",
- .size = 0x002f0000,
- .offset = 0x00010000,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "experimental filesystem allocation",
- .size = 0x00100000,
- .offset = 0x00300000,
- .mask_flags = MTD_WRITEABLE,
- }
-};
-
-static struct flash_platform_data nanoengine_flash_data = {
- .map_name = "jedec_probe",
- .parts = nanoengine_partitions,
- .nr_parts = ARRAY_SIZE(nanoengine_partitions),
-};
-
-static struct resource nanoengine_flash_resources[] = {
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
- DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
-};
-
-static struct map_desc nanoengine_io_desc[] __initdata = {
- {
- /* System Registers */
- .virtual = 0xf0000000,
- .pfn = __phys_to_pfn(0x10000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }, {
- /* Internal PCI Memory Read/Write */
- .virtual = NANO_PCI_MEM_RW_VIRT,
- .pfn = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS),
- .length = NANO_PCI_MEM_RW_SIZE,
- .type = MT_DEVICE
- }, {
- /* Internal PCI Config Space */
- .virtual = NANO_PCI_CONFIG_SPACE_VIRT,
- .pfn = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS),
- .length = NANO_PCI_CONFIG_SPACE_SIZE,
- .type = MT_DEVICE
- }
-};
-
-static void __init nanoengine_map_io(void)
-{
- sa1100_map_io();
- iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
-
- sa1100_register_uart(0, 1);
- sa1100_register_uart(1, 2);
- sa1100_register_uart(2, 3);
- Ser1SDCR0 |= SDCR0_UART;
- /* disable IRDA -- UART2 is used as a normal serial port */
- Ser2UTCR4 = 0;
- Ser2HSCR0 = 0;
-}
-
-static struct gpiod_lookup_table nanoengine_pcmcia0_gpio_table = {
- .dev_id = "sa11x0-pcmcia.0",
- .table = {
- GPIO_LOOKUP("gpio", 11, "ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 13, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 15, "reset", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct gpiod_lookup_table nanoengine_pcmcia1_gpio_table = {
- .dev_id = "sa11x0-pcmcia.1",
- .table = {
- GPIO_LOOKUP("gpio", 12, "ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 14, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 16, "reset", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static void __init nanoengine_init(void)
-{
- sa11x0_register_pcmcia(0, &nanoengine_pcmcia0_gpio_table);
- sa11x0_register_pcmcia(1, &nanoengine_pcmcia1_gpio_table);
- sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources,
- ARRAY_SIZE(nanoengine_flash_resources));
-}
-
-MACHINE_START(NANOENGINE, "BSE nanoEngine")
- .atag_offset = 0x100,
- .map_io = nanoengine_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = nanoengine_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
deleted file mode 100644
index 0791d11ff4d4..000000000000
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ /dev/null
@@ -1,191 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * linux/arch/arm/mach-sa1100/pci-nanoengine.c
- *
- * PCI functions for BSE nanoEngine PCI
- *
- * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
- */
-#include <linux/kernel.h>
-#include <linux/irq.h>
-#include <linux/pci.h>
-
-#include <asm/mach/pci.h>
-#include <asm/mach-types.h>
-
-#include <mach/nanoengine.h>
-#include <mach/hardware.h>
-
-static void __iomem *nanoengine_pci_map_bus(struct pci_bus *bus,
- unsigned int devfn, int where)
-{
- if (bus->number != 0 || (devfn >> 3) != 0)
- return NULL;
-
- return (void __iomem *)NANO_PCI_CONFIG_SPACE_VIRT +
- ((bus->number << 16) | (devfn << 8) | (where & ~3));
-}
-
-static struct pci_ops pci_nano_ops = {
- .map_bus = nanoengine_pci_map_bus,
- .read = pci_generic_config_read32,
- .write = pci_generic_config_write32,
-};
-
-static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,
- u8 pin)
-{
- return NANOENGINE_IRQ_GPIO_PCI;
-}
-
-static struct resource pci_io_ports =
- DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO");
-
-static struct resource pci_non_prefetchable_memory = {
- .name = "PCI non-prefetchable",
- .start = NANO_PCI_MEM_RW_PHYS,
- /* nanoEngine documentation says there is a 1 Megabyte window here,
- * but PCI reports just 128 + 8 kbytes. */
- .end = NANO_PCI_MEM_RW_PHYS + NANO_PCI_MEM_RW_SIZE - 1,
-/* .end = NANO_PCI_MEM_RW_PHYS + SZ_128K + SZ_8K - 1,*/
- .flags = IORESOURCE_MEM,
-};
-
-/*
- * nanoEngine PCI reports 1 Megabyte of prefetchable memory, but it
- * overlaps with previously defined memory.
- *
- * Here is what happens:
- *
-# dmesg
-...
-pci 0000:00:00.0: [8086:1209] type 0 class 0x000200
-pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff]
-pci 0000:00:00.0: reg 14: [io 0x0000-0x003f]
-pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff]
-pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref]
-pci 0000:00:00.0: supports D1 D2
-pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot
-pci 0000:00:00.0: PME# disabled
-PCI: bus0: Fast back to back transfers enabled
-pci 0000:00:00.0: BAR 6: can't assign mem pref (size 0x100000)
-pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff]
-pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff])
-pci 0000:00:00.0: BAR 0: assigned [mem 0x18620000-0x18620fff]
-pci 0000:00:00.0: BAR 0: set to [mem 0x18620000-0x18620fff] (PCI address [0x20000-0x20fff])
-pci 0000:00:00.0: BAR 1: assigned [io 0x0400-0x043f]
-pci 0000:00:00.0: BAR 1: set to [io 0x0400-0x043f] (PCI address [0x0-0x3f])
- *
- * On the other hand, if we do not request the prefetchable memory resource,
- * linux will alloc it first and the two non-prefetchable memory areas that
- * are our real interest will not be mapped. So we choose to map it to an
- * unused area. It gets recognized as expansion ROM, but becomes disabled.
- *
- * Here is what happens then:
- *
-# dmesg
-...
-pci 0000:00:00.0: [8086:1209] type 0 class 0x000200
-pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff]
-pci 0000:00:00.0: reg 14: [io 0x0000-0x003f]
-pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff]
-pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref]
-pci 0000:00:00.0: supports D1 D2
-pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot
-pci 0000:00:00.0: PME# disabled
-PCI: bus0: Fast back to back transfers enabled
-pci 0000:00:00.0: BAR 6: assigned [mem 0x78000000-0x780fffff pref]
-pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff]
-pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff])
-pci 0000:00:00.0: BAR 0: assigned [mem 0x18620000-0x18620fff]
-pci 0000:00:00.0: BAR 0: set to [mem 0x18620000-0x18620fff] (PCI address [0x20000-0x20fff])
-pci 0000:00:00.0: BAR 1: assigned [io 0x0400-0x043f]
-pci 0000:00:00.0: BAR 1: set to [io 0x0400-0x043f] (PCI address [0x0-0x3f])
-
-# lspci -vv -s 0000:00:00.0
-00:00.0 Class 0200: Device 8086:1209 (rev 09)
- Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR+ <PERR+ INTx-
- Latency: 0 (2000ns min, 14000ns max), Cache Line Size: 32 bytes
- Interrupt: pin A routed to IRQ 0
- Region 0: Memory at 18620000 (32-bit, non-prefetchable) [size=4K]
- Region 1: I/O ports at 0400 [size=64]
- Region 2: [virtual] Memory at 18600000 (32-bit, non-prefetchable) [size=128K]
- [virtual] Expansion ROM at 78000000 [disabled] [size=1M]
- Capabilities: [dc] Power Management version 2
- Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
- Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME-
- Kernel driver in use: e100
- Kernel modules: e100
- *
- */
-static struct resource pci_prefetchable_memory = {
- .name = "PCI prefetchable",
- .start = 0x78000000,
- .end = 0x78000000 + NANO_PCI_MEM_RW_SIZE - 1,
- .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
-};
-
-static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys)
-{
- if (request_resource(&ioport_resource, &pci_io_ports)) {
- printk(KERN_ERR "PCI: unable to allocate io port region\n");
- return -EBUSY;
- }
- if (request_resource(&iomem_resource, &pci_non_prefetchable_memory)) {
- release_resource(&pci_io_ports);
- printk(KERN_ERR "PCI: unable to allocate non prefetchable\n");
- return -EBUSY;
- }
- if (request_resource(&iomem_resource, &pci_prefetchable_memory)) {
- release_resource(&pci_io_ports);
- release_resource(&pci_non_prefetchable_memory);
- printk(KERN_ERR "PCI: unable to allocate prefetchable\n");
- return -EBUSY;
- }
- pci_add_resource_offset(&sys->resources, &pci_io_ports, sys->io_offset);
- pci_add_resource_offset(&sys->resources,
- &pci_non_prefetchable_memory, sys->mem_offset);
- pci_add_resource_offset(&sys->resources,
- &pci_prefetchable_memory, sys->mem_offset);
-
- return 1;
-}
-
-int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)
-{
- int ret = 0;
-
- pcibios_min_io = 0;
- pcibios_min_mem = 0;
-
- if (nr == 0) {
- sys->mem_offset = NANO_PCI_MEM_RW_PHYS;
- sys->io_offset = 0x400;
- ret = pci_nanoengine_setup_resources(sys);
- /* Enable alternate memory bus master mode, see
- * "Intel StrongARM SA1110 Developer's Manual",
- * section 10.8, "Alternate Memory Bus Master Mode". */
- GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
- GAFR |= GPIO_MBGNT | GPIO_MBREQ;
- TUCR |= TUCR_MBGPIO;
- }
-
- return ret;
-}
-
-static struct hw_pci nanoengine_pci __initdata = {
- .map_irq = pci_nanoengine_map_irq,
- .nr_controllers = 1,
- .ops = &pci_nano_ops,
- .setup = pci_nanoengine_setup,
-};
-
-static int __init nanoengine_pci_init(void)
-{
- if (machine_is_nanoengine())
- pci_common_init(&nanoengine_pci);
- return 0;
-}
-
-subsys_initcall(nanoengine_pci_init);
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
deleted file mode 100644
index b2b0c9fc18f7..000000000000
--- a/arch/arm/mach-sa1100/pleb.c
+++ /dev/null
@@ -1,148 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/pleb.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/ioport.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/mtd/partitions.h>
-#include <linux/smc91x.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/flash.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-
-/*
- * Ethernet IRQ mappings
- */
-
-#define PLEB_ETH0_P (0x20000300) /* Ethernet 0 in PCMCIA0 IO */
-#define PLEB_ETH0_V (0xf6000300)
-
-#define GPIO_ETH0_IRQ GPIO_GPIO(21)
-#define GPIO_ETH0_EN GPIO_GPIO(26)
-
-#define IRQ_GPIO_ETH0_IRQ IRQ_GPIO21
-
-static struct resource smc91x_resources[] = {
- [0] = DEFINE_RES_MEM(PLEB_ETH0_P, 0x04000000),
-#if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */
- [1] = DEFINE_RES_IRQ(IRQ_GPIO_ETH0_IRQ),
-#endif
-};
-
-static struct smc91x_platdata smc91x_platdata = {
- .flags = SMC91X_USE_16BIT | SMC91X_USE_8BIT | SMC91X_NOWAIT,
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
- .dev = {
- .platform_data = &smc91x_platdata,
- },
-};
-
-static struct platform_device *devices[] __initdata = {
- &smc91x_device,
-};
-
-
-/*
- * Pleb's memory map
- * has flash memory (typically 4 or 8 meg) selected by
- * the two SA1100 lowest chip select outputs.
- */
-static struct resource pleb_flash_resources[] = {
- [0] = DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_8M),
- [1] = DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_8M),
-};
-
-
-static struct mtd_partition pleb_partitions[] = {
- {
- .name = "blob",
- .offset = 0,
- .size = 0x00020000,
- }, {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x000e0000,
- }, {
- .name = "rootfs",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00300000,
- }
-};
-
-
-static struct flash_platform_data pleb_flash_data = {
- .map_name = "cfi_probe",
- .parts = pleb_partitions,
- .nr_parts = ARRAY_SIZE(pleb_partitions),
-};
-
-
-static void __init pleb_init(void)
-{
- sa11x0_register_mtd(&pleb_flash_data, pleb_flash_resources,
- ARRAY_SIZE(pleb_flash_resources));
-
-
- platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-
-static void __init pleb_map_io(void)
-{
- sa1100_map_io();
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-
- GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
- GPDR |= GPIO_UART_TXD;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- /*
- * Fix expansion memory timing for network card
- */
- MECR = ((2<<10) | (2<<5) | (2<<0));
-
- /*
- * Enable the SMC ethernet controller
- */
- GPDR |= GPIO_ETH0_EN; /* set to output */
- GPCR = GPIO_ETH0_EN; /* clear MCLK (enable smc) */
-
- GPDR &= ~GPIO_ETH0_IRQ;
-
- irq_set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING);
-}
-
-MACHINE_START(PLEB, "PLEB")
- .map_io = pleb_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = pleb_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
deleted file mode 100644
index 351f891b4842..000000000000
--- a/arch/arm/mach-sa1100/shannon.c
+++ /dev/null
@@ -1,157 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/shannon.c
- */
-
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/gpio/machine.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/tty.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
-
-#include <video/sa1100fb.h>
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/shannon.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-static struct mtd_partition shannon_partitions[] = {
- {
- .name = "BLOB boot loader",
- .offset = 0,
- .size = 0x20000
- },
- {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = 0xe0000
- },
- {
- .name = "initrd",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL
- }
-};
-
-static struct flash_platform_data shannon_flash_data = {
- .map_name = "cfi_probe",
- .parts = shannon_partitions,
- .nr_parts = ARRAY_SIZE(shannon_partitions),
-};
-
-static struct resource shannon_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M);
-
-static struct mcp_plat_data shannon_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
-};
-
-static struct sa1100fb_mach_info shannon_lcd_info = {
- .pixclock = 152500, .bpp = 8,
- .xres = 640, .yres = 480,
-
- .hsync_len = 4, .vsync_len = 3,
- .left_margin = 2, .upper_margin = 0,
- .right_margin = 1, .lower_margin = 0,
-
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-
- .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
- .lccr3 = LCCR3_ACBsDiv(512),
-};
-
-static struct gpiod_lookup_table shannon_pcmcia0_gpio_table = {
- .dev_id = "sa11x0-pcmcia.0",
- .table = {
- GPIO_LOOKUP("gpio", 24, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 26, "ready", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct gpiod_lookup_table shannon_pcmcia1_gpio_table = {
- .dev_id = "sa11x0-pcmcia.1",
- .table = {
- GPIO_LOOKUP("gpio", 25, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 27, "ready", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct regulator_consumer_supply shannon_cf_vcc_consumers[] = {
- REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.0"),
- REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"),
-};
-
-static struct fixed_voltage_config shannon_cf_vcc_pdata __initdata = {
- .supply_name = "cf-power",
- .microvolts = 3300000,
- .enabled_at_boot = 1,
-};
-
-static struct gpiod_lookup_table shannon_display_gpio_table = {
- .dev_id = "sa11x0-fb",
- .table = {
- GPIO_LOOKUP("gpio", 22, "shannon-lcden", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static void __init shannon_init(void)
-{
- sa11x0_register_fixed_regulator(0, &shannon_cf_vcc_pdata,
- shannon_cf_vcc_consumers,
- ARRAY_SIZE(shannon_cf_vcc_consumers),
- false);
- sa11x0_register_pcmcia(0, &shannon_pcmcia0_gpio_table);
- sa11x0_register_pcmcia(1, &shannon_pcmcia1_gpio_table);
- sa11x0_ppc_configure_mcp();
- gpiod_add_lookup_table(&shannon_display_gpio_table);
- sa11x0_register_lcd(&shannon_lcd_info);
- sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
- sa11x0_register_mcp(&shannon_mcp_data);
-}
-
-static void __init shannon_map_io(void)
-{
- sa1100_map_io();
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-
- Ser1SDCR0 |= SDCR0_SUS;
- GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
- GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- /* reset the codec */
- GPCR = SHANNON_GPIO_CODEC_RESET;
- GPSR = SHANNON_GPIO_CODEC_RESET;
-}
-
-MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
- .atag_offset = 0x100,
- .map_io = shannon_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = shannon_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
deleted file mode 100644
index c7fb9a73e4c5..000000000000
--- a/arch/arm/mach-sa1100/simpad.c
+++ /dev/null
@@ -1,423 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/simpad.c
- */
-
-#include <linux/module.h>
-#include <linux/gpio/machine.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/proc_fs.h>
-#include <linux/string.h>
-#include <linux/pm.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/mfd/ucb1x00.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/io.h>
-#include <linux/gpio/driver.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/simpad.h>
-#include <mach/irqs.h>
-
-#include <linux/serial_core.h>
-#include <linux/ioport.h>
-#include <linux/input.h>
-#include <linux/gpio_keys.h>
-#include <linux/leds.h>
-#include <linux/platform_data/i2c-gpio.h>
-
-#include "generic.h"
-
-/*
- * CS3 support
- */
-
-static long cs3_shadow;
-static spinlock_t cs3_lock;
-static struct gpio_chip cs3_gpio;
-
-long simpad_get_cs3_ro(void)
-{
- return readl(CS3_BASE);
-}
-EXPORT_SYMBOL(simpad_get_cs3_ro);
-
-long simpad_get_cs3_shadow(void)
-{
- return cs3_shadow;
-}
-EXPORT_SYMBOL(simpad_get_cs3_shadow);
-
-static void __simpad_write_cs3(void)
-{
- writel(cs3_shadow, CS3_BASE);
-}
-
-void simpad_set_cs3_bit(int value)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&cs3_lock, flags);
- cs3_shadow |= value;
- __simpad_write_cs3();
- spin_unlock_irqrestore(&cs3_lock, flags);
-}
-EXPORT_SYMBOL(simpad_set_cs3_bit);
-
-void simpad_clear_cs3_bit(int value)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&cs3_lock, flags);
- cs3_shadow &= ~value;
- __simpad_write_cs3();
- spin_unlock_irqrestore(&cs3_lock, flags);
-}
-EXPORT_SYMBOL(simpad_clear_cs3_bit);
-
-static void cs3_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
- if (offset > 15)
- return;
- if (value)
- simpad_set_cs3_bit(1 << offset);
- else
- simpad_clear_cs3_bit(1 << offset);
-};
-
-static int cs3_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
- if (offset > 15)
- return !!(simpad_get_cs3_ro() & (1 << (offset - 16)));
- return !!(simpad_get_cs3_shadow() & (1 << offset));
-};
-
-static int cs3_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-{
- if (offset > 15)
- return 0;
- return -EINVAL;
-};
-
-static int cs3_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
- int value)
-{
- if (offset > 15)
- return -EINVAL;
- cs3_gpio_set(chip, offset, value);
- return 0;
-};
-
-static struct map_desc simpad_io_desc[] __initdata = {
- { /* MQ200 */
- .virtual = 0xf2800000,
- .pfn = __phys_to_pfn(0x4b800000),
- .length = 0x00800000,
- .type = MT_DEVICE
- }, { /* Simpad CS3 */
- .virtual = (unsigned long)CS3_BASE,
- .pfn = __phys_to_pfn(SA1100_CS3_PHYS),
- .length = 0x00100000,
- .type = MT_DEVICE
- },
-};
-
-
-static void simpad_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- if (port->mapbase == (u_int)&Ser1UTCR0) {
- if (state)
- {
- simpad_clear_cs3_bit(RS232_ON);
- simpad_clear_cs3_bit(DECT_POWER_ON);
- }else
- {
- simpad_set_cs3_bit(RS232_ON);
- simpad_set_cs3_bit(DECT_POWER_ON);
- }
- }
-}
-
-static struct sa1100_port_fns simpad_port_fns __initdata = {
- .pm = simpad_uart_pm,
-};
-
-
-static struct mtd_partition simpad_partitions[] = {
- {
- .name = "SIMpad boot firmware",
- .size = 0x00080000,
- .offset = 0,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "SIMpad kernel",
- .size = 0x0010000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "SIMpad root jffs2",
- .size = MTDPART_SIZ_FULL,
- .offset = MTDPART_OFS_APPEND,
- }
-};
-
-static struct flash_platform_data simpad_flash_data = {
- .map_name = "cfi_probe",
- .parts = simpad_partitions,
- .nr_parts = ARRAY_SIZE(simpad_partitions),
-};
-
-
-static struct resource simpad_flash_resources [] = {
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_16M),
- DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_16M),
-};
-
-static struct ucb1x00_plat_data simpad_ucb1x00_data = {
- .gpio_base = SIMPAD_UCB1X00_GPIO_BASE,
-};
-
-static struct mcp_plat_data simpad_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
- .codec_pdata = &simpad_ucb1x00_data,
-};
-
-
-
-static void __init simpad_map_io(void)
-{
- sa1100_map_io();
-
- iotable_init(simpad_io_desc, ARRAY_SIZE(simpad_io_desc));
-
- /* Initialize CS3 */
- cs3_shadow = (EN1 | EN0 | LED2_ON | DISPLAY_ON |
- RS232_ON | ENABLE_5V | RESET_SIMCARD | DECT_POWER_ON);
- __simpad_write_cs3(); /* Spinlocks not yet initialized */
-
- sa1100_register_uart_fns(&simpad_port_fns);
- sa1100_register_uart(0, 3); /* serial interface */
- sa1100_register_uart(1, 1); /* DECT */
-
- // Reassign UART 1 pins
- GAFR |= GPIO_UART_TXD | GPIO_UART_RXD;
- GPDR |= GPIO_UART_TXD | GPIO_LDD13 | GPIO_LDD15;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- /*
- * Set up registers for sleep mode.
- */
-
-
- PWER = PWER_GPIO0| PWER_RTC;
- PGSR = 0x818;
- PCFR = 0;
- PSDR = 0;
-
-}
-
-static void simpad_power_off(void)
-{
- local_irq_disable();
- cs3_shadow = SD_MEDIAQ;
- __simpad_write_cs3(); /* Bypass spinlock here */
-
- /* disable internal oscillator, float CS lines */
- PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
- /* enable wake-up on GPIO0 */
- PWER = GFER = GRER = PWER_GPIO0;
- /*
- * set scratchpad to zero, just in case it is used as a
- * restart address by the bootloader.
- */
- PSPR = 0;
- PGSR = 0;
- /* enter sleep mode */
- PMCR = PMCR_SF;
- while(1);
-
- local_irq_enable(); /* we won't ever call it */
-
-
-}
-
-/*
- * gpio_keys
-*/
-
-static struct gpio_keys_button simpad_button_table[] = {
- { KEY_POWER, IRQ_GPIO_POWER_BUTTON, 1, "power button" },
-};
-
-static struct gpio_keys_platform_data simpad_keys_data = {
- .buttons = simpad_button_table,
- .nbuttons = ARRAY_SIZE(simpad_button_table),
-};
-
-static struct platform_device simpad_keys = {
- .name = "gpio-keys",
- .dev = {
- .platform_data = &simpad_keys_data,
- },
-};
-
-static struct gpio_keys_button simpad_polled_button_table[] = {
- { KEY_PROG1, SIMPAD_UCB1X00_GPIO_PROG1, 1, "prog1 button" },
- { KEY_PROG2, SIMPAD_UCB1X00_GPIO_PROG2, 1, "prog2 button" },
- { KEY_UP, SIMPAD_UCB1X00_GPIO_UP, 1, "up button" },
- { KEY_DOWN, SIMPAD_UCB1X00_GPIO_DOWN, 1, "down button" },
- { KEY_LEFT, SIMPAD_UCB1X00_GPIO_LEFT, 1, "left button" },
- { KEY_RIGHT, SIMPAD_UCB1X00_GPIO_RIGHT, 1, "right button" },
-};
-
-static struct gpio_keys_platform_data simpad_polled_keys_data = {
- .buttons = simpad_polled_button_table,
- .nbuttons = ARRAY_SIZE(simpad_polled_button_table),
- .poll_interval = 50,
-};
-
-static struct platform_device simpad_polled_keys = {
- .name = "gpio-keys-polled",
- .dev = {
- .platform_data = &simpad_polled_keys_data,
- },
-};
-
-/*
- * GPIO LEDs
- */
-
-static struct gpio_led simpad_leds[] = {
- {
- .name = "simpad:power",
- .gpio = SIMPAD_CS3_LED2_ON,
- .active_low = 0,
- .default_trigger = "default-on",
- },
-};
-
-static struct gpio_led_platform_data simpad_led_data = {
- .num_leds = ARRAY_SIZE(simpad_leds),
- .leds = simpad_leds,
-};
-
-static struct platform_device simpad_gpio_leds = {
- .name = "leds-gpio",
- .id = 0,
- .dev = {
- .platform_data = &simpad_led_data,
- },
-};
-
-/*
- * i2c
- */
-static struct gpiod_lookup_table simpad_i2c_gpiod_table = {
- .dev_id = "i2c-gpio.0",
- .table = {
- GPIO_LOOKUP_IDX("gpio", 21, NULL, 0,
- GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- GPIO_LOOKUP_IDX("gpio", 25, NULL, 1,
- GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- },
-};
-
-static struct i2c_gpio_platform_data simpad_i2c_data = {
- .udelay = 10,
- .timeout = HZ,
-};
-
-static struct platform_device simpad_i2c = {
- .name = "i2c-gpio",
- .id = 0,
- .dev = {
- .platform_data = &simpad_i2c_data,
- },
-};
-
-/*
- * MediaQ Video Device
- */
-static struct platform_device simpad_mq200fb = {
- .name = "simpad-mq200",
- .id = 0,
-};
-
-static struct platform_device *devices[] __initdata = {
- &simpad_keys,
- &simpad_polled_keys,
- &simpad_mq200fb,
- &simpad_gpio_leds,
- &simpad_i2c,
-};
-
-/* Compact Flash */
-static struct gpiod_lookup_table simpad_cf_gpio_table = {
- .dev_id = "sa11x0-pcmcia",
- .table = {
- GPIO_LOOKUP("gpio", GPIO_CF_IRQ, "cf-ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", GPIO_CF_CD, "cf-detect", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-
-static int __init simpad_init(void)
-{
- int ret;
-
- spin_lock_init(&cs3_lock);
-
- cs3_gpio.label = "simpad_cs3";
- cs3_gpio.base = SIMPAD_CS3_GPIO_BASE;
- cs3_gpio.ngpio = 24;
- cs3_gpio.set = cs3_gpio_set;
- cs3_gpio.get = cs3_gpio_get;
- cs3_gpio.direction_input = cs3_gpio_direction_input;
- cs3_gpio.direction_output = cs3_gpio_direction_output;
- ret = gpiochip_add_data(&cs3_gpio, NULL);
- if (ret)
- printk(KERN_WARNING "simpad: Unable to register cs3 GPIO device");
-
- pm_power_off = simpad_power_off;
-
- sa11x0_register_pcmcia(-1, &simpad_cf_gpio_table);
- sa11x0_ppc_configure_mcp();
- sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources,
- ARRAY_SIZE(simpad_flash_resources));
- sa11x0_register_mcp(&simpad_mcp_data);
-
- gpiod_add_lookup_table(&simpad_i2c_gpiod_table);
- ret = platform_add_devices(devices, ARRAY_SIZE(devices));
- if(ret)
- printk(KERN_WARNING "simpad: Unable to register mq200 framebuffer device");
-
- return 0;
-}
-
-arch_initcall(simpad_init);
-
-
-MACHINE_START(SIMPAD, "Simpad")
- /* Maintainer: Holger Freyther */
- .atag_offset = 0x100,
- .map_io = simpad_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_late = sa11x0_init_late,
- .init_time = sa1100_timer_init,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c
index 1a83c8678a63..bb7f591a8b05 100644
--- a/drivers/cpufreq/sa1110-cpufreq.c
+++ b/drivers/cpufreq/sa1110-cpufreq.c
@@ -344,14 +344,8 @@ static int __init sa1110_clk_init(void)
if (!name[0]) {
if (machine_is_assabet())
name = "TC59SM716-CL3";
- if (machine_is_pt_system3())
- name = "K4S641632D";
- if (machine_is_h3100())
- name = "KM416S4030CT";
if (machine_is_jornada720() || machine_is_h3600())
name = "K4S281632B-1H";
- if (machine_is_nanoengine())
- name = "MT48LC8M16A2TG-75";
}
sdram = sa1110_find_sdram(name);
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index d655a135a886..ad469b8985bd 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -672,7 +672,7 @@ config MFD_INTEL_PMC_BXT
config MFD_IPAQ_MICRO
bool "Atmel Micro ASIC (iPAQ h3100/h3600/h3700) Support"
- depends on SA1100_H3100 || SA1100_H3600
+ depends on SA1100_H3600
select MFD_CORE
help
Select this to get support for the Microcontroller found in
diff --git a/drivers/pcmcia/sa1100_generic.c b/drivers/pcmcia/sa1100_generic.c
index c2b6e828c2c6..89d4ba58c891 100644
--- a/drivers/pcmcia/sa1100_generic.c
+++ b/drivers/pcmcia/sa1100_generic.c
@@ -98,12 +98,9 @@ static struct pcmcia_low_level sa11x0_cf_ops = {
int __init pcmcia_collie_init(struct device *dev);
static int (*sa11x0_pcmcia_legacy_hw_init[])(struct device *dev) = {
-#if defined(CONFIG_SA1100_H3100) || defined(CONFIG_SA1100_H3600)
+#ifdef CONFIG_SA1100_H3600
pcmcia_h3600_init,
#endif
-#ifdef CONFIG_SA1100_SIMPAD
- pcmcia_simpad_init,
-#endif
#ifdef CONFIG_SA1100_COLLIE
pcmcia_collie_init,
#endif
diff --git a/drivers/pcmcia/sa1100_h3600.c b/drivers/pcmcia/sa1100_h3600.c
index a91222bc3824..10cb99c20a7f 100644
--- a/drivers/pcmcia/sa1100_h3600.c
+++ b/drivers/pcmcia/sa1100_h3600.c
@@ -156,7 +156,7 @@ int pcmcia_h3600_init(struct device *dev)
{
int ret = -ENODEV;
- if (machine_is_h3600() || machine_is_h3100())
+ if (machine_is_h3600())
ret = sa11xx_drv_pcmcia_probe(dev, &h3600_pcmcia_ops, 0, 2);
return ret;
diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index 71bf1b279a5a..2a67e33fb5f0 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -212,10 +212,6 @@ static int pcmcia_probe(struct sa1111_dev *dev)
writel_relaxed(PCCR_S0_FLT | PCCR_S1_FLT, base + PCCR);
ret = -ENODEV;
-#ifdef CONFIG_SA1100_BADGE4
- if (machine_is_badge4())
- ret = pcmcia_badge4_init(dev);
-#endif
#ifdef CONFIG_SA1100_JORNADA720
if (machine_is_jornada720())
ret = pcmcia_jornada720_init(dev);
diff --git a/drivers/usb/host/ohci-sa1111.c b/drivers/usb/host/ohci-sa1111.c
index 75c2b28b3379..aca0338a2983 100644
--- a/drivers/usb/host/ohci-sa1111.c
+++ b/drivers/usb/host/ohci-sa1111.c
@@ -125,10 +125,7 @@ static int sa1111_start_hc(struct sa1111_dev *dev)
dev_dbg(&dev->dev, "starting SA-1111 OHCI USB Controller\n");
- if (machine_is_xp860() ||
- machine_is_assabet() ||
- machine_is_pfs168() ||
- machine_is_badge4())
+ if (machine_is_assabet())
usb_rst = USB_RESET_PWRSENSELOW | USB_RESET_PWRCTRLLOW;
/*
diff --git a/drivers/video/fbdev/sa1100fb.c b/drivers/video/fbdev/sa1100fb.c
index 017c8efe8267..b1b8ccdbac4a 100644
--- a/drivers/video/fbdev/sa1100fb.c
+++ b/drivers/video/fbdev/sa1100fb.c
@@ -184,7 +184,6 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
-#include <mach/shannon.h>
/*
* Complain if VAR is out of range.
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 02/11] ARM: sa1100: remove unused board files
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: Stefan Eletzhofer, linux-fbdev, linux-usb, Arnd Bergmann,
Rafael J. Wysocki, Viresh Kumar, Helge Deller, Lee Jones,
linux-kernel, Dominik Brodowski, Peter Chubb, Alan Stern,
dri-devel, Greg Kroah-Hartman, linux-pm
From: Arnd Bergmann <arnd@arndb.de>
The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
Simpad machines were all marked as unused as there are no known users
left. Remove all of these, along with references to them in defconfig
files and drivers.
Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
and Jornada 720, each of which had one person still using them, with
Collie also being supported in Qemu.
Cc: Peter Chubb <peter.chubb@unsw.edu.au>
Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
MAINTAINERS | 11 -
arch/arm/Kconfig | 6 -
arch/arm/boot/compressed/head-sa1100.S | 4 -
arch/arm/configs/badge4_defconfig | 105 -----
arch/arm/configs/cerfcube_defconfig | 73 ---
arch/arm/configs/hackkit_defconfig | 48 --
arch/arm/configs/lart_defconfig | 64 ---
arch/arm/configs/pleb_defconfig | 53 ---
arch/arm/configs/shannon_defconfig | 45 --
arch/arm/configs/simpad_defconfig | 100 -----
arch/arm/mach-sa1100/Kconfig | 111 -----
arch/arm/mach-sa1100/Makefile | 21 -
arch/arm/mach-sa1100/badge4.c | 338 --------------
arch/arm/mach-sa1100/cerf.c | 181 --------
arch/arm/mach-sa1100/h3100.c | 140 ------
arch/arm/mach-sa1100/hackkit.c | 184 --------
arch/arm/mach-sa1100/include/mach/badge4.h | 71 ---
arch/arm/mach-sa1100/include/mach/cerf.h | 20 -
.../arm/mach-sa1100/include/mach/nanoengine.h | 48 --
arch/arm/mach-sa1100/include/mach/shannon.h | 40 --
arch/arm/mach-sa1100/include/mach/simpad.h | 159 -------
arch/arm/mach-sa1100/lart.c | 177 --------
arch/arm/mach-sa1100/nanoengine.c | 136 ------
arch/arm/mach-sa1100/pci-nanoengine.c | 191 --------
arch/arm/mach-sa1100/pleb.c | 148 ------
arch/arm/mach-sa1100/shannon.c | 157 -------
arch/arm/mach-sa1100/simpad.c | 423 ------------------
drivers/cpufreq/sa1110-cpufreq.c | 6 -
drivers/mfd/Kconfig | 2 +-
drivers/pcmcia/sa1100_generic.c | 5 +-
drivers/pcmcia/sa1100_h3600.c | 2 +-
drivers/pcmcia/sa1111_generic.c | 4 -
drivers/usb/host/ohci-sa1111.c | 5 +-
drivers/video/fbdev/sa1100fb.c | 1 -
34 files changed, 4 insertions(+), 3075 deletions(-)
delete mode 100644 arch/arm/configs/badge4_defconfig
delete mode 100644 arch/arm/configs/cerfcube_defconfig
delete mode 100644 arch/arm/configs/hackkit_defconfig
delete mode 100644 arch/arm/configs/lart_defconfig
delete mode 100644 arch/arm/configs/pleb_defconfig
delete mode 100644 arch/arm/configs/shannon_defconfig
delete mode 100644 arch/arm/configs/simpad_defconfig
delete mode 100644 arch/arm/mach-sa1100/badge4.c
delete mode 100644 arch/arm/mach-sa1100/cerf.c
delete mode 100644 arch/arm/mach-sa1100/h3100.c
delete mode 100644 arch/arm/mach-sa1100/hackkit.c
delete mode 100644 arch/arm/mach-sa1100/include/mach/badge4.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/cerf.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/nanoengine.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/shannon.h
delete mode 100644 arch/arm/mach-sa1100/include/mach/simpad.h
delete mode 100644 arch/arm/mach-sa1100/lart.c
delete mode 100644 arch/arm/mach-sa1100/nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pci-nanoengine.c
delete mode 100644 arch/arm/mach-sa1100/pleb.c
delete mode 100644 arch/arm/mach-sa1100/shannon.c
delete mode 100644 arch/arm/mach-sa1100/simpad.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 77f913567c7e..ec3d53b5e1d1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2486,17 +2486,6 @@ F: arch/arm/mach-oxnas/
F: drivers/power/reset/oxnas-restart.c
N: oxnas
-ARM/PLEB SUPPORT
-M: Peter Chubb <pleb@gelato.unsw.edu.au>
-S: Maintained
-W: http://www.disy.cse.unsw.edu.au/Hardware/PLEB
-
-ARM/PT DIGITAL BOARD PORT
-M: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Maintained
-W: http://www.armlinux.org.uk/
-
ARM/QUALCOMM SUPPORT
M: Andy Gross <agross@kernel.org>
M: Bjorn Andersson <andersson@kernel.org>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ac4c58d9497f..c1614f91e04c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -922,12 +922,6 @@ config ISA
config ISA_DMA_API
bool
-config PCI_NANOENGINE
- bool "BSE nanoEngine PCI support"
- depends on SA1100_NANOENGINE
- help
- Enable PCI on the BSE nanoEngine board.
-
config ARM_ERRATA_814220
bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
depends on CPU_V7
diff --git a/arch/arm/boot/compressed/head-sa1100.S b/arch/arm/boot/compressed/head-sa1100.S
index 95abdd850fe3..23eae1a65064 100644
--- a/arch/arm/boot/compressed/head-sa1100.S
+++ b/arch/arm/boot/compressed/head-sa1100.S
@@ -19,10 +19,6 @@ __SA1100_start:
@ Preserve r8/r7 i.e. kernel entry values
#ifdef CONFIG_SA1100_COLLIE
mov r7, #MACH_TYPE_COLLIE
-#endif
-#ifdef CONFIG_SA1100_SIMPAD
- @ UNTIL we've something like an open bootldr
- mov r7, #MACH_TYPE_SIMPAD @should be 87
#endif
mrc p15, 0, r0, c1, c0, 0 @ read control reg
ands r0, r0, #0x0d
diff --git a/arch/arm/configs/badge4_defconfig b/arch/arm/configs/badge4_defconfig
deleted file mode 100644
index 337e5c9718ae..000000000000
--- a/arch/arm/configs/badge4_defconfig
+++ /dev/null
@@ -1,105 +0,0 @@
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_BADGE4=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="init=/linuxrc root=/dev/mtdblock3"
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_MODVERSIONS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BINFMT_MISC=m
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIVHCI=m
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_SA1100=y
-CONFIG_PARPORT=m
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=y
-CONFIG_NETDEVICES=y
-CONFIG_USB_CATC=m
-CONFIG_USB_KAWETH=m
-CONFIG_USB_PEGASUS=m
-CONFIG_USB_USBNET=m
-CONFIG_USB_ALI_M5632=y
-CONFIG_USB_AN2720=y
-CONFIG_USB_EPSON2888=y
-CONFIG_USB_KC2190=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_I2C=m
-CONFIG_I2C_CHARDEV=m
-CONFIG_I2C_ELEKTOR=m
-CONFIG_WATCHDOG=y
-CONFIG_SOFT_WATCHDOG=m
-CONFIG_SA1100_WATCHDOG=m
-CONFIG_SOUND=y
-CONFIG_SOUND_PRIME=y
-CONFIG_USB=y
-CONFIG_USB_MON=y
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_MDC800=m
-CONFIG_USB_MICROTEK=m
-CONFIG_USB_USS720=m
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_BELKIN=m
-CONFIG_USB_SERIAL_WHITEHEAT=m
-CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
-CONFIG_USB_SERIAL_EMPEG=m
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_VISOR=m
-CONFIG_USB_SERIAL_IR=m
-CONFIG_USB_SERIAL_EDGEPORT=m
-CONFIG_USB_SERIAL_KEYSPAN_PDA=m
-CONFIG_USB_SERIAL_KEYSPAN=m
-CONFIG_USB_SERIAL_MCT_U232=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_SERIAL_CYBERJACK=m
-CONFIG_USB_SERIAL_OMNINET=m
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=m
-CONFIG_MINIX_FS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_SMB_FS=m
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/cerfcube_defconfig b/arch/arm/configs/cerfcube_defconfig
deleted file mode 100644
index 9ada868e2648..000000000000
--- a/arch/arm/configs/cerfcube_defconfig
+++ /dev/null
@@ -1,73 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_CERF=y
-CONFIG_SA1100_CERF_FLASH_16MB=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,38400 root=/dev/mtdblock3 rootfstype=jffs2 rw mem=32M init=/linuxrc"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_FPE_FASTFPE=y
-CONFIG_PM=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_IPV6 is not set
-CONFIG_PCCARD=m
-CONFIG_PCMCIA_SA1100=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=m
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V4=y
-CONFIG_SMB_FS=m
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_DEBUG_KERNEL=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/hackkit_defconfig b/arch/arm/configs/hackkit_defconfig
deleted file mode 100644
index 3c91a851fd08..000000000000
--- a/arch/arm/configs/hackkit_defconfig
+++ /dev/null
@@ -1,48 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_HACKKIT=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,115200 root=/dev/ram0 initrd=0xc0400000,8M init=/rootshell"
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=3
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/lart_defconfig b/arch/arm/configs/lart_defconfig
deleted file mode 100644
index 916177d07a39..000000000000
--- a/arch/arm/configs/lart_defconfig
+++ /dev/null
@@ -1,64 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_LART=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,9600 root=/dev/ram"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_MODULES=y
-CONFIG_NET=y
-CONFIG_PACKET=m
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=1
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_LART=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-CONFIG_NET_ETHERNET=y
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=m
-CONFIG_REISERFS_FS=m
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=m
-CONFIG_JFFS2_FS_DEBUG=1
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFSD=m
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_UTF8=m
-CONFIG_DEBUG_USER=y
-CONFIG_CRC32=m
diff --git a/arch/arm/configs/pleb_defconfig b/arch/arm/configs/pleb_defconfig
deleted file mode 100644
index fd2667873273..000000000000
--- a/arch/arm/configs/pleb_defconfig
+++ /dev/null
@@ -1,53 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_HOTPLUG is not set
-# CONFIG_SHMEM is not set
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_PLEB=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,9600 mem=16M@0xc0000000 mem=16M@0xc8000000 root=/dev/ram initrd=0xc0400000,4M"
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-# CONFIG_SWAP is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NLS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
diff --git a/arch/arm/configs/shannon_defconfig b/arch/arm/configs/shannon_defconfig
deleted file mode 100644
index dfcea70b8034..000000000000
--- a/arch/arm/configs/shannon_defconfig
+++ /dev/null
@@ -1,45 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_SHANNON=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="console=ttySA0,9600 console=tty1 root=/dev/mtdblock2 init=/linuxrc"
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_MTD=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=y
-CONFIG_PCMCIA_SMC91C92=y
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_WATCHDOG=y
-CONFIG_SA1100_WATCHDOG=y
-CONFIG_FB=y
-CONFIG_FB_SA1100=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_MINIX_FS=y
-CONFIG_NFS_FS=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/simpad_defconfig b/arch/arm/configs/simpad_defconfig
deleted file mode 100644
index 4e00a4c2c287..000000000000
--- a/arch/arm/configs/simpad_defconfig
+++ /dev/null
@@ -1,100 +0,0 @@
-CONFIG_LOCALVERSION="oe1"
-CONFIG_SYSVIPC=y
-CONFIG_PREEMPT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_ARCH_MULTI_V4=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_SA1100_SIMPAD=y
-CONFIG_UNUSED_BOARD_FILES=y
-CONFIG_CMDLINE="mtdparts=sa1100:512k(boot),1m(kernel),-(root) console=ttySA0 root=1f02 noinitrd mem=64M jffs2_orphaned_inodes=delete rootfstype=jffs2"
-CONFIG_FPE_NWFPE=y
-CONFIG_MODULES=y
-CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IPV6 is not set
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_SA1100=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_SA1100=y
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_RAM=m
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C574=m
-CONFIG_PCMCIA_3C589=m
-CONFIG_PCMCIA_PCNET=m
-CONFIG_PCMCIA_SMC91C92=m
-CONFIG_PCMCIA_XIRC2PS=m
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPPOE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=800
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=600
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_EVBUG=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIO=m
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_FB=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-CONFIG_REISERFS_FS=m
-CONFIG_REISERFS_PROC_INFO=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_SMB_FS=m
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig
index 8b6360e363d1..0fb4c24cfad5 100644
--- a/arch/arm/mach-sa1100/Kconfig
+++ b/arch/arm/mach-sa1100/Kconfig
@@ -41,35 +41,6 @@ config ASSABET_NEPONSET
Microprocessor Development Board (Assabet) with the SA-1111
Development Board (Nepon).
-config SA1100_CERF
- bool "CerfBoard"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- select LEDS_GPIO_REGISTER
- help
- The Intrinsyc CerfBoard is based on the StrongARM 1110 (Discontinued).
- More information is available at:
- <http://www.intrinsyc.com/products/cerfboard/>.
-
- Say Y if configuring for an Intrinsyc CerfBoard.
- Say N otherwise.
-
-choice
- prompt "Cerf Flash available"
- depends on SA1100_CERF
- default SA1100_CERF_FLASH_8MB
-
-config SA1100_CERF_FLASH_8MB
- bool "8MB"
-
-config SA1100_CERF_FLASH_16MB
- bool "16MB"
-
-config SA1100_CERF_FLASH_32MB
- bool "32MB"
-
-endchoice
-
config SA1100_COLLIE
bool "Sharp Zaurus SL5500"
# FIXME: select ARM_SA11x0_CPUFREQ
@@ -79,16 +50,6 @@ config SA1100_COLLIE
help
Say Y here to support the Sharp Zaurus SL5500 PDAs.
-config SA1100_H3100
- bool "Compaq iPAQ H3100"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- select HTC_EGPIO
- select MFD_IPAQ_MICRO
- help
- Say Y here if you intend to run this kernel on the Compaq iPAQ
- H3100 handheld computer.
-
config SA1100_H3600
bool "Compaq iPAQ H3600/H3700"
select ARM_SA1110_CPUFREQ
@@ -98,15 +59,6 @@ config SA1100_H3600
Say Y here if you intend to run this kernel on the Compaq iPAQ
H3600 and H3700 handheld computers.
-config SA1100_BADGE4
- bool "HP Labs BadgePAD 4"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- select SA1111
- help
- Say Y here if you want to build a kernel for the HP Laboratories
- BadgePAD 4.
-
config SA1100_JORNADA720
bool "HP Jornada 720"
# FIXME: select ARM_SA11x0_CPUFREQ
@@ -126,71 +78,8 @@ config SA1100_JORNADA720_SSP
keyboard, touchscreen, backlight and battery. This driver also activates
the generic SSP which it extends.
-config SA1100_HACKKIT
- bool "HackKit Core CPU Board"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- help
- Say Y here to support the HackKit Core CPU Board
- <http://hackkit.eletztrick.de>;
-
-config SA1100_LART
- bool "LART"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- help
- Say Y here if you are using the Linux Advanced Radio Terminal
- (also known as the LART). See <http://www.lartmaker.nl/> for
- information on the LART.
-
-config SA1100_NANOENGINE
- bool "nanoEngine"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- select FORCE_PCI
- select PCI_NANOENGINE
- help
- Say Y here if you are using the Bright Star Engineering nanoEngine.
- See <http://www.brightstareng.com/arm/nanoeng.htm> for information
- on the BSE nanoEngine.
-
-config SA1100_PLEB
- bool "PLEB"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- help
- Say Y here if you are using version 1 of the Portable Linux
- Embedded Board (also known as PLEB).
- See <http://www.disy.cse.unsw.edu.au/Hardware/PLEB/>
- for more information.
-
-config SA1100_SHANNON
- bool "Shannon"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1100_CPUFREQ
- select REGULATOR
- select REGULATOR_FIXED_VOLTAGE
- help
- The Shannon (also known as a Tuxscreen, and also as a IS2630) was a
- limited edition webphone produced by Philips. The Shannon is a SA1100
- platform with a 640x480 LCD, touchscreen, CIR keyboard, PCMCIA slots,
- and a telco interface.
-
-config SA1100_SIMPAD
- bool "Simpad"
- depends on UNUSED_BOARD_FILES
- select ARM_SA1110_CPUFREQ
- help
- The SIEMENS webpad SIMpad is based on the StrongARM 1110. There
- are two different versions CL4 and SL4. CL4 has 32MB RAM and 16MB
- FLASH. The SL4 version got 64 MB RAM and 32 MB FLASH and a
- PCMCIA-Slot. The version for the Germany Telecom (DTAG) is the same
- like CL4 in additional it has a PCMCIA-Slot. For more information
- visit <http://www.usa.siemens.com/> or <http://www.siemens.ch/>.
-
config SA1100_SSP
tristate "Generic PIO SSP"
- depends on UNUSED_BOARD_FILES
help
Say Y here to enable support for the generic PIO SSP driver.
This isn't for audio support, but for attached sensors and
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index 28c1cae0053f..b5816d675152 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -9,32 +9,11 @@ obj-y := clock.o generic.o #nmi-oopser.o
# Specific board support
obj-$(CONFIG_SA1100_ASSABET) += assabet.o
obj-$(CONFIG_ASSABET_NEPONSET) += neponset.o
-
-obj-$(CONFIG_SA1100_BADGE4) += badge4.o
-
-obj-$(CONFIG_SA1100_CERF) += cerf.o
-
obj-$(CONFIG_SA1100_COLLIE) += collie.o
-
-obj-$(CONFIG_SA1100_H3100) += h3100.o h3xxx.o
obj-$(CONFIG_SA1100_H3600) += h3600.o h3xxx.o
-
-obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o
-
obj-$(CONFIG_SA1100_JORNADA720) += jornada720.o
obj-$(CONFIG_SA1100_JORNADA720_SSP) += jornada720_ssp.o
-obj-$(CONFIG_SA1100_LART) += lart.o
-
-obj-$(CONFIG_SA1100_NANOENGINE) += nanoengine.o
-obj-$(CONFIG_PCI_NANOENGINE) += pci-nanoengine.o
-
-obj-$(CONFIG_SA1100_PLEB) += pleb.o
-
-obj-$(CONFIG_SA1100_SHANNON) += shannon.o
-
-obj-$(CONFIG_SA1100_SIMPAD) += simpad.o
-
# Miscellaneous functions
obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_SA1100_SSP) += ssp.o
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
deleted file mode 100644
index de79f3502045..000000000000
--- a/arch/arm/mach-sa1100/badge4.c
+++ /dev/null
@@ -1,338 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/badge4.c
- *
- * BadgePAD 4 specific initialization
- *
- * Tim Connors <connors@hpl.hp.com>
- * Christopher Hoover <ch@hpl.hp.com>
- *
- * Copyright (C) 2002 Hewlett-Packard Company
- */
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/delay.h>
-#include <linux/tty.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/errno.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <mach/irqs.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <asm/hardware/sa1111.h>
-
-#include <mach/badge4.h>
-
-#include "generic.h"
-
-static struct resource sa1111_resources[] = {
- [0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000),
- [1] = DEFINE_RES_IRQ(BADGE4_IRQ_GPIO_SA1111),
-};
-
-static int badge4_sa1111_enable(void *data, unsigned devid)
-{
- if (devid == SA1111_DEVID_USB)
- badge4_set_5V(BADGE4_5V_USB, 1);
- return 0;
-}
-
-static void badge4_sa1111_disable(void *data, unsigned devid)
-{
- if (devid == SA1111_DEVID_USB)
- badge4_set_5V(BADGE4_5V_USB, 0);
-}
-
-static struct sa1111_platform_data sa1111_info = {
- .disable_devs = SA1111_DEVID_PS2_MSE,
- .enable = badge4_sa1111_enable,
- .disable = badge4_sa1111_disable,
-};
-
-static u64 sa1111_dmamask = 0xffffffffUL;
-
-static struct platform_device sa1111_device = {
- .name = "sa1111",
- .id = 0,
- .dev = {
- .dma_mask = &sa1111_dmamask,
- .coherent_dma_mask = 0xffffffff,
- .platform_data = &sa1111_info,
- },
- .num_resources = ARRAY_SIZE(sa1111_resources),
- .resource = sa1111_resources,
-};
-
-/* LEDs */
-struct gpio_led badge4_gpio_leds[] = {
- {
- .name = "badge4:red",
- .default_trigger = "heartbeat",
- .gpio = 7,
- },
- {
- .name = "badge4:green",
- .default_trigger = "cpu0",
- .gpio = 9,
- },
-};
-
-static struct gpio_led_platform_data badge4_gpio_led_info = {
- .leds = badge4_gpio_leds,
- .num_leds = ARRAY_SIZE(badge4_gpio_leds),
-};
-
-static struct platform_device badge4_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &badge4_gpio_led_info,
- }
-};
-
-static struct platform_device *devices[] __initdata = {
- &sa1111_device,
- &badge4_leds,
-};
-
-static int __init badge4_sa1111_init(void)
-{
- /*
- * Ensure that the memory bus request/grant signals are setup,
- * and the grant is held in its inactive state
- */
- sa1110_mb_disable();
-
- /*
- * Probe for SA1111.
- */
- return platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-
-/*
- * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit)
- * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
- * Sixty-three 32 KiW Main Blocks (4032 Ki b)
- *
- * <or>
- *
- * 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit)
- * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
- * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
- */
-static struct mtd_partition badge4_partitions[] = {
- {
- .name = "BLOB boot loader",
- .offset = 0,
- .size = 0x0000A000
- }, {
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00006000
- }, {
- .name = "root",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL
- }
-};
-
-static struct flash_platform_data badge4_flash_data = {
- .map_name = "cfi_probe",
- .parts = badge4_partitions,
- .nr_parts = ARRAY_SIZE(badge4_partitions),
-};
-
-static struct resource badge4_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M);
-
-static int five_v_on __initdata = 0;
-
-static int __init five_v_on_setup(char *ignore)
-{
- five_v_on = 1;
- return 1;
-}
-__setup("five_v_on", five_v_on_setup);
-
-
-static int __init badge4_init(void)
-{
- int ret;
-
- if (!machine_is_badge4())
- return -ENODEV;
-
- /* LCD */
- GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
- BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
- BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
- BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
- BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
- BADGE4_GPIO_GPC_VID);
- GPDR &= ~BADGE4_GPIO_INT_VID;
- GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
- BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
- BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
- BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
- BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
- BADGE4_GPIO_GPC_VID);
-
- /* SDRAM SPD i2c */
- GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
- GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
-
- /* uart */
- GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
- GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
-
- /* CPLD muxsel0 input for mux/adc chip select */
- GPCR = BADGE4_GPIO_MUXSEL0;
- GPDR |= BADGE4_GPIO_MUXSEL0;
-
- /* test points: J5, J6 as inputs, J7 outputs */
- GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6);
- GPCR = BADGE4_GPIO_TESTPT_J7;
- GPDR |= BADGE4_GPIO_TESTPT_J7;
-
- /* 5V supply rail. */
- GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
- GPDR |= BADGE4_GPIO_PCMEN5V;
-
- /* CPLD sdram type inputs; set up by blob */
- //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
- printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
- !!(GPLR & BADGE4_GPIO_SDTYP1),
- !!(GPLR & BADGE4_GPIO_SDTYP0));
-
- /* SA1111 reset pin; set up by blob */
- //GPSR = BADGE4_GPIO_SA1111_NRST;
- //GPDR |= BADGE4_GPIO_SA1111_NRST;
-
-
- /* power management cruft */
- PGSR = 0;
- PWER = 0;
- PCFR = 0;
- PSDR = 0;
-
- PWER |= PWER_GPIO26; /* wake up on an edge from TESTPT_J5 */
- PWER |= PWER_RTC; /* wake up if rtc fires */
-
- /* drive sa1111_nrst during sleep */
- PGSR |= BADGE4_GPIO_SA1111_NRST;
- /* drive CPLD as is during sleep */
- PGSR |= (GPLR & (BADGE4_GPIO_SDTYP0|BADGE4_GPIO_SDTYP1));
-
-
- /* Now bring up the SA-1111. */
- ret = badge4_sa1111_init();
- if (ret < 0)
- printk(KERN_ERR
- "%s: SA-1111 initialization failed (%d)\n",
- __func__, ret);
-
-
- /* maybe turn on 5v0 from the start */
- badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on);
-
- sa11x0_register_mtd(&badge4_flash_data, &badge4_flash_resource, 1);
-
- return 0;
-}
-
-arch_initcall(badge4_init);
-
-
-static unsigned badge4_5V_bitmap = 0;
-
-void badge4_set_5V(unsigned subsystem, int on)
-{
- unsigned long flags;
- unsigned old_5V_bitmap;
-
- local_irq_save(flags);
-
- old_5V_bitmap = badge4_5V_bitmap;
-
- if (on) {
- badge4_5V_bitmap |= subsystem;
- } else {
- badge4_5V_bitmap &= ~subsystem;
- }
-
- /* detect on->off and off->on transitions */
- if ((!old_5V_bitmap) && (badge4_5V_bitmap)) {
- /* was off, now on */
- printk(KERN_INFO "%s: enabling 5V supply rail\n", __func__);
- GPSR = BADGE4_GPIO_PCMEN5V;
- } else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) {
- /* was on, now off */
- printk(KERN_INFO "%s: disabling 5V supply rail\n", __func__);
- GPCR = BADGE4_GPIO_PCMEN5V;
- }
-
- local_irq_restore(flags);
-}
-EXPORT_SYMBOL(badge4_set_5V);
-
-
-static struct map_desc badge4_io_desc[] __initdata = {
- { /* SRAM bank 1 */
- .virtual = 0xf1000000,
- .pfn = __phys_to_pfn(0x08000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }, { /* SRAM bank 2 */
- .virtual = 0xf2000000,
- .pfn = __phys_to_pfn(0x10000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }
-};
-
-static void
-badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- if (!state) {
- Ser1SDCR0 |= SDCR0_UART;
- }
-}
-
-static struct sa1100_port_fns badge4_port_fns __initdata = {
- .pm = badge4_uart_pm,
-};
-
-static void __init badge4_map_io(void)
-{
- sa1100_map_io();
- iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc));
-
- sa1100_register_uart_fns(&badge4_port_fns);
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-}
-
-MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
- .atag_offset = 0x100,
- .map_io = badge4_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_late = sa11x0_init_late,
- .init_time = sa1100_timer_init,
-#ifdef CONFIG_SA1111
- .dma_zone_size = SZ_1M,
-#endif
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
deleted file mode 100644
index f9243a3fd69c..000000000000
--- a/arch/arm/mach-sa1100/cerf.c
+++ /dev/null
@@ -1,181 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/cerf.c
- *
- * Apr-2003 : Removed some old PDA crud [FB]
- * Oct-2003 : Added uart2 resource [FB]
- * Jan-2004 : Removed io map for flash [FB]
- */
-
-#include <linux/init.h>
-#include <linux/gpio/machine.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-
-#include <mach/cerf.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/irqs.h>
-#include "generic.h"
-
-static struct resource cerfuart2_resources[] = {
- [0] = DEFINE_RES_MEM(0x80030000, SZ_64K),
-};
-
-static struct platform_device cerfuart2_device = {
- .name = "sa11x0-uart",
- .id = 2,
- .num_resources = ARRAY_SIZE(cerfuart2_resources),
- .resource = cerfuart2_resources,
-};
-
-/* Compact Flash */
-static struct gpiod_lookup_table cerf_cf_gpio_table = {
- .dev_id = "sa11x0-pcmcia.1",
- .table = {
- GPIO_LOOKUP("gpio", 19, "bvd2", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 20, "bvd1", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 21, "reset", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 22, "ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 23, "detect", GPIO_ACTIVE_LOW),
- { },
- },
-};
-
-/* LEDs */
-struct gpio_led cerf_gpio_leds[] = {
- {
- .name = "cerf:d0",
- .default_trigger = "heartbeat",
- .gpio = 0,
- },
- {
- .name = "cerf:d1",
- .default_trigger = "cpu0",
- .gpio = 1,
- },
- {
- .name = "cerf:d2",
- .default_trigger = "default-on",
- .gpio = 2,
- },
- {
- .name = "cerf:d3",
- .default_trigger = "default-on",
- .gpio = 3,
- },
-
-};
-
-static struct gpio_led_platform_data cerf_gpio_led_info = {
- .leds = cerf_gpio_leds,
- .num_leds = ARRAY_SIZE(cerf_gpio_leds),
-};
-
-static struct platform_device *cerf_devices[] __initdata = {
- &cerfuart2_device,
-};
-
-#ifdef CONFIG_SA1100_CERF_FLASH_32MB
-# define CERF_FLASH_SIZE 0x02000000
-#elif defined CONFIG_SA1100_CERF_FLASH_16MB
-# define CERF_FLASH_SIZE 0x01000000
-#elif defined CONFIG_SA1100_CERF_FLASH_8MB
-# define CERF_FLASH_SIZE 0x00800000
-#else
-# error "Undefined flash size for CERF"
-#endif
-
-static struct mtd_partition cerf_partitions[] = {
- {
- .name = "Bootloader",
- .size = 0x00020000,
- .offset = 0x00000000,
- }, {
- .name = "Params",
- .size = 0x00040000,
- .offset = 0x00020000,
- }, {
- .name = "Kernel",
- .size = 0x00100000,
- .offset = 0x00060000,
- }, {
- .name = "Filesystem",
- .size = CERF_FLASH_SIZE-0x00160000,
- .offset = 0x00160000,
- }
-};
-
-static struct flash_platform_data cerf_flash_data = {
- .map_name = "cfi_probe",
- .parts = cerf_partitions,
- .nr_parts = ARRAY_SIZE(cerf_partitions),
-};
-
-static struct resource cerf_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
-
-static void __init cerf_init_irq(void)
-{
- sa1100_init_irq();
- irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
-}
-
-static struct map_desc cerf_io_desc[] __initdata = {
- { /* Crystal Ethernet Chip */
- .virtual = 0xf0000000,
- .pfn = __phys_to_pfn(0x08000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }
-};
-
-static void __init cerf_map_io(void)
-{
- sa1100_map_io();
- iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 2); /* disable this and the uart2 device for sa1100_fir */
- sa1100_register_uart(2, 1);
-}
-
-static struct mcp_plat_data cerf_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
-};
-
-static void __init cerf_init(void)
-{
- sa11x0_ppc_configure_mcp();
- platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
- gpio_led_register_device(-1, &cerf_gpio_led_info);
- sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
- sa11x0_register_mcp(&cerf_mcp_data);
- sa11x0_register_pcmcia(1, &cerf_cf_gpio_table);
-}
-
-MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
- /* Maintainer: support@intrinsyc.com */
- .map_io = cerf_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = cerf_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = cerf_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c
deleted file mode 100644
index 51eaeeaf3f10..000000000000
--- a/arch/arm/mach-sa1100/h3100.c
+++ /dev/null
@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Support for Compaq iPAQ H3100 handheld computer
- *
- * Copyright (c) 2000,1 Compaq Computer Corporation. (Author: Jamey Hicks)
- * Copyright (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru>
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-
-#include <video/sa1100fb.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <linux/platform_data/irda-sa11x0.h>
-
-#include <mach/h3xxx.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-/*
- * helper for sa1100fb
- */
-static struct gpio h3100_lcd_gpio[] = {
- { H3100_GPIO_LCD_3V_ON, GPIOF_OUT_INIT_LOW, "LCD 3V" },
- { H3XXX_EGPIO_LCD_ON, GPIOF_OUT_INIT_LOW, "LCD ON" },
-};
-
-static bool h3100_lcd_request(void)
-{
- static bool h3100_lcd_ok;
- int rc;
-
- if (h3100_lcd_ok)
- return true;
-
- rc = gpio_request_array(h3100_lcd_gpio, ARRAY_SIZE(h3100_lcd_gpio));
- if (rc)
- pr_err("%s: can't request GPIOs\n", __func__);
- else
- h3100_lcd_ok = true;
-
- return h3100_lcd_ok;
-}
-
-static void h3100_lcd_power(int enable)
-{
- if (!h3100_lcd_request())
- return;
-
- gpio_set_value(H3100_GPIO_LCD_3V_ON, enable);
- gpio_set_value(H3XXX_EGPIO_LCD_ON, enable);
-}
-
-static struct sa1100fb_mach_info h3100_lcd_info = {
- .pixclock = 406977, .bpp = 4,
- .xres = 320, .yres = 240,
-
- .hsync_len = 26, .vsync_len = 41,
- .left_margin = 4, .upper_margin = 0,
- .right_margin = 4, .lower_margin = 0,
-
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
- .cmap_greyscale = 1,
- .cmap_inverse = 1,
-
- .lccr0 = LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
-
- .lcd_power = h3100_lcd_power,
-};
-
-static void __init h3100_map_io(void)
-{
- h3xxx_map_io();
-
- /* Older bootldrs put GPIO2-9 in alternate mode on the
- assumption that they are used for video */
- GAFR &= ~0x000001fb;
-}
-
-/*
- * This turns the IRDA power on or off on the Compaq H3100
- */
-static struct gpio h3100_irda_gpio[] = {
- { H3100_GPIO_IR_ON, GPIOF_OUT_INIT_LOW, "IrDA power" },
- { H3100_GPIO_IR_FSEL, GPIOF_OUT_INIT_LOW, "IrDA fsel" },
-};
-
-static int h3100_irda_set_power(struct device *dev, unsigned int state)
-{
- gpio_set_value(H3100_GPIO_IR_ON, state);
- return 0;
-}
-
-static void h3100_irda_set_speed(struct device *dev, unsigned int speed)
-{
- gpio_set_value(H3100_GPIO_IR_FSEL, !(speed < 4000000));
-}
-
-static int h3100_irda_startup(struct device *dev)
-{
- return gpio_request_array(h3100_irda_gpio, sizeof(h3100_irda_gpio));
-}
-
-static void h3100_irda_shutdown(struct device *dev)
-{
- return gpio_free_array(h3100_irda_gpio, sizeof(h3100_irda_gpio));
-}
-
-static struct irda_platform_data h3100_irda_data = {
- .set_power = h3100_irda_set_power,
- .set_speed = h3100_irda_set_speed,
- .startup = h3100_irda_startup,
- .shutdown = h3100_irda_shutdown,
-};
-
-static void __init h3100_mach_init(void)
-{
- h3xxx_mach_init();
-
- sa11x0_register_pcmcia(-1, NULL);
- sa11x0_register_lcd(&h3100_lcd_info);
- sa11x0_register_irda(&h3100_irda_data);
-}
-
-MACHINE_START(H3100, "Compaq iPAQ H3100")
- .atag_offset = 0x100,
- .map_io = h3100_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = h3100_mach_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
-
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
deleted file mode 100644
index 3085f1c2e586..000000000000
--- a/arch/arm/mach-sa1100/hackkit.c
+++ /dev/null
@@ -1,184 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/hackkit.c
- *
- * Copyright (C) 2002 Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
- *
- * This file contains all HackKit tweaks. Based on original work from
- * Nicolas Pitre's assabet fixes
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/tty.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/cpufreq.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/serial_core.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/tty.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <linux/platform_device.h>
-#include <linux/pgtable.h>
-
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-/**********************************************************************
- * prototypes
- */
-
-/* init funcs */
-static void __init hackkit_map_io(void);
-
-static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate);
-
-/**********************************************************************
- * global data
- */
-
-/**********************************************************************
- * static data
- */
-
-static struct map_desc hackkit_io_desc[] __initdata = {
- { /* Flash bank 0 */
- .virtual = 0xe8000000,
- .pfn = __phys_to_pfn(0x00000000),
- .length = 0x01000000,
- .type = MT_DEVICE
- },
-};
-
-static struct sa1100_port_fns hackkit_port_fns __initdata = {
- .pm = hackkit_uart_pm,
-};
-
-/**********************************************************************
- * Static functions
- */
-
-static void __init hackkit_map_io(void)
-{
- sa1100_map_io();
- iotable_init(hackkit_io_desc, ARRAY_SIZE(hackkit_io_desc));
-
- sa1100_register_uart_fns(&hackkit_port_fns);
- sa1100_register_uart(0, 1); /* com port */
- sa1100_register_uart(1, 2);
- sa1100_register_uart(2, 3); /* radio module */
-
- Ser1SDCR0 |= SDCR0_SUS;
-}
-
-/**
- * hackkit_uart_pm - powermgmt callback function for system 3 UART
- * @port: uart port structure
- * @state: pm state
- * @oldstate: old pm state
- *
- */
-static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- /* TODO: switch on/off uart in powersave mode */
-}
-
-static struct mtd_partition hackkit_partitions[] = {
- {
- .name = "BLOB",
- .size = 0x00040000,
- .offset = 0x00000000,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- }, {
- .name = "config",
- .size = 0x00040000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "kernel",
- .size = 0x00100000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "initrd",
- .size = 0x00180000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "rootfs",
- .size = 0x700000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "data",
- .size = MTDPART_SIZ_FULL,
- .offset = MTDPART_OFS_APPEND,
- }
-};
-
-static struct flash_platform_data hackkit_flash_data = {
- .map_name = "cfi_probe",
- .parts = hackkit_partitions,
- .nr_parts = ARRAY_SIZE(hackkit_partitions),
-};
-
-static struct resource hackkit_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
-
-/* LEDs */
-struct gpio_led hackkit_gpio_leds[] = {
- {
- .name = "hackkit:red",
- .default_trigger = "cpu0",
- .gpio = 22,
- },
- {
- .name = "hackkit:green",
- .default_trigger = "heartbeat",
- .gpio = 23,
- },
-};
-
-static struct gpio_led_platform_data hackkit_gpio_led_info = {
- .leds = hackkit_gpio_leds,
- .num_leds = ARRAY_SIZE(hackkit_gpio_leds),
-};
-
-static struct platform_device hackkit_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &hackkit_gpio_led_info,
- }
-};
-
-static void __init hackkit_init(void)
-{
- sa11x0_register_mtd(&hackkit_flash_data, &hackkit_flash_resource, 1);
- platform_device_register(&hackkit_leds);
-}
-
-/**********************************************************************
- * Exported Functions
- */
-
-MACHINE_START(HACKKIT, "HackKit Cpu Board")
- .atag_offset = 0x100,
- .map_io = hackkit_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = hackkit_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/include/mach/badge4.h b/arch/arm/mach-sa1100/include/mach/badge4.h
deleted file mode 100644
index 90e744a54ed5..000000000000
--- a/arch/arm/mach-sa1100/include/mach/badge4.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/mach-sa1100/include/mach/badge4.h
- *
- * Tim Connors <connors@hpl.hp.com>
- * Christopher Hoover <ch@hpl.hp.com>
- *
- * Copyright (C) 2002 Hewlett-Packard Company
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <mach/hardware.h> instead"
-#endif
-
-#define BADGE4_SA1111_BASE (0x48000000)
-
-/* GPIOs on the BadgePAD 4 */
-#define BADGE4_GPIO_INT_1111 GPIO_GPIO0 /* SA-1111 IRQ */
-
-#define BADGE4_GPIO_INT_VID GPIO_GPIO1 /* Video expansion */
-#define BADGE4_GPIO_LGP2 GPIO_GPIO2 /* GPIO_LDD8 */
-#define BADGE4_GPIO_LGP3 GPIO_GPIO3 /* GPIO_LDD9 */
-#define BADGE4_GPIO_LGP4 GPIO_GPIO4 /* GPIO_LDD10 */
-#define BADGE4_GPIO_LGP5 GPIO_GPIO5 /* GPIO_LDD11 */
-#define BADGE4_GPIO_LGP6 GPIO_GPIO6 /* GPIO_LDD12 */
-#define BADGE4_GPIO_LGP7 GPIO_GPIO7 /* GPIO_LDD13 */
-#define BADGE4_GPIO_LGP8 GPIO_GPIO8 /* GPIO_LDD14 */
-#define BADGE4_GPIO_LGP9 GPIO_GPIO9 /* GPIO_LDD15 */
-#define BADGE4_GPIO_GPA_VID GPIO_GPIO10 /* Video expansion */
-#define BADGE4_GPIO_GPB_VID GPIO_GPIO11 /* Video expansion */
-#define BADGE4_GPIO_GPC_VID GPIO_GPIO12 /* Video expansion */
-
-#define BADGE4_GPIO_UART_HS1 GPIO_GPIO13
-#define BADGE4_GPIO_UART_HS2 GPIO_GPIO14
-
-#define BADGE4_GPIO_MUXSEL0 GPIO_GPIO15
-#define BADGE4_GPIO_TESTPT_J7 GPIO_GPIO16
-
-#define BADGE4_GPIO_SDSDA GPIO_GPIO17 /* SDRAM SPD Data */
-#define BADGE4_GPIO_SDSCL GPIO_GPIO18 /* SDRAM SPD Clock */
-#define BADGE4_GPIO_SDTYP0 GPIO_GPIO19 /* SDRAM Type Control */
-#define BADGE4_GPIO_SDTYP1 GPIO_GPIO20 /* SDRAM Type Control */
-
-#define BADGE4_GPIO_BGNT_1111 GPIO_GPIO21 /* GPIO_MBGNT */
-#define BADGE4_GPIO_BREQ_1111 GPIO_GPIO22 /* GPIO_TREQA */
-
-#define BADGE4_GPIO_TESTPT_J6 GPIO_GPIO23
-
-#define BADGE4_GPIO_PCMEN5V GPIO_GPIO24 /* 5V power */
-
-#define BADGE4_GPIO_SA1111_NRST GPIO_GPIO25 /* SA-1111 nRESET */
-
-#define BADGE4_GPIO_TESTPT_J5 GPIO_GPIO26
-
-#define BADGE4_GPIO_CLK_1111 GPIO_GPIO27 /* GPIO_32_768kHz */
-
-/* Interrupts on the BadgePAD 4 */
-#define BADGE4_IRQ_GPIO_SA1111 IRQ_GPIO0 /* SA-1111 interrupt */
-
-
-/* PCM5ENV Usage tracking */
-
-#define BADGE4_5V_PCMCIA_SOCK0 (1<<0)
-#define BADGE4_5V_PCMCIA_SOCK1 (1<<1)
-#define BADGE4_5V_PCMCIA_SOCK(n) (1<<(n))
-#define BADGE4_5V_USB (1<<2)
-#define BADGE4_5V_INITIALLY (1<<3)
-
-#ifndef __ASSEMBLY__
-extern void badge4_set_5V(unsigned subsystem, int on);
-#endif
diff --git a/arch/arm/mach-sa1100/include/mach/cerf.h b/arch/arm/mach-sa1100/include/mach/cerf.h
deleted file mode 100644
index 59c185ebd494..000000000000
--- a/arch/arm/mach-sa1100/include/mach/cerf.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/mach-sa1100/include/mach/cerf.h
- *
- * Apr-2003 : Removed some old PDA crud [FB]
- */
-#ifndef _INCLUDE_CERF_H_
-#define _INCLUDE_CERF_H_
-
-
-#define CERF_ETH_IO 0xf0000000
-#define CERF_ETH_IRQ IRQ_GPIO26
-
-#define CERF_GPIO_CF_BVD2 19
-#define CERF_GPIO_CF_BVD1 20
-#define CERF_GPIO_CF_RESET 21
-#define CERF_GPIO_CF_IRQ 22
-#define CERF_GPIO_CF_CD 23
-
-#endif // _INCLUDE_CERF_H_
diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h
deleted file mode 100644
index 8d5ee1438956..000000000000
--- a/arch/arm/mach-sa1100/include/mach/nanoengine.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/mach-sa1100/include/mach/nanoengine.h
- *
- * This file contains the hardware specific definitions for nanoEngine.
- * Only include this file from SA1100-specific files.
- *
- * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
- */
-#ifndef __ASM_ARCH_NANOENGINE_H
-#define __ASM_ARCH_NANOENGINE_H
-
-#include <mach/irqs.h>
-
-#define GPIO_PC_READY0 11 /* ready for socket 0 (active high)*/
-#define GPIO_PC_READY1 12 /* ready for socket 1 (active high) */
-#define GPIO_PC_CD0 13 /* detect for socket 0 (active low) */
-#define GPIO_PC_CD1 14 /* detect for socket 1 (active low) */
-#define GPIO_PC_RESET0 15 /* reset socket 0 */
-#define GPIO_PC_RESET1 16 /* reset socket 1 */
-
-#define NANOENGINE_IRQ_GPIO_PCI IRQ_GPIO0
-#define NANOENGINE_IRQ_GPIO_PC_READY0 IRQ_GPIO11
-#define NANOENGINE_IRQ_GPIO_PC_READY1 IRQ_GPIO12
-#define NANOENGINE_IRQ_GPIO_PC_CD0 IRQ_GPIO13
-#define NANOENGINE_IRQ_GPIO_PC_CD1 IRQ_GPIO14
-
-/*
- * nanoEngine Memory Map:
- *
- * 0000.0000 - 003F.0000 - 4 MB Flash
- * C000.0000 - C1FF.FFFF - 32 MB SDRAM
- * 1860.0000 - 186F.FFFF - 1 MB Internal PCI Memory Read/Write
- * 18A1.0000 - 18A1.FFFF - 64 KB Internal PCI Config Space
- * 4000.0000 - 47FF.FFFF - 128 MB External Bus I/O - Multiplexed Mode
- * 4800.0000 - 4FFF.FFFF - 128 MB External Bus I/O - Non-Multiplexed Mode
- *
- */
-
-#define NANO_PCI_MEM_RW_PHYS 0x18600000
-#define NANO_PCI_MEM_RW_VIRT 0xf1000000
-#define NANO_PCI_MEM_RW_SIZE SZ_1M
-#define NANO_PCI_CONFIG_SPACE_PHYS 0x18A10000
-#define NANO_PCI_CONFIG_SPACE_VIRT 0xf2000000
-#define NANO_PCI_CONFIG_SPACE_SIZE SZ_64K
-
-#endif
-
diff --git a/arch/arm/mach-sa1100/include/mach/shannon.h b/arch/arm/mach-sa1100/include/mach/shannon.h
deleted file mode 100644
index d830375f329c..000000000000
--- a/arch/arm/mach-sa1100/include/mach/shannon.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _INCLUDE_SHANNON_H
-#define _INCLUDE_SHANNON_H
-
-/* taken from comp.os.inferno Tue, 12 Sep 2000 09:21:50 GMT,
- * written by <forsyth@vitanuova.com> */
-
-#define SHANNON_GPIO_SPI_FLASH GPIO_GPIO (0) /* Output - Driven low, enables SPI to flash */
-#define SHANNON_GPIO_SPI_DSP GPIO_GPIO (1) /* Output - Driven low, enables SPI to DSP */
-/* lcd lower = GPIO 2-9 */
-#define SHANNON_GPIO_SPI_OUTPUT GPIO_GPIO (10) /* Output - SPI output to DSP */
-#define SHANNON_GPIO_SPI_INPUT GPIO_GPIO (11) /* Input - SPI input from DSP */
-#define SHANNON_GPIO_SPI_CLOCK GPIO_GPIO (12) /* Output - Clock for SPI */
-#define SHANNON_GPIO_SPI_FRAME GPIO_GPIO (13) /* Output - Frame marker - not used */
-#define SHANNON_GPIO_SPI_RTS GPIO_GPIO (14) /* Input - SPI Ready to Send */
-#define SHANNON_IRQ_GPIO_SPI_RTS IRQ_GPIO14
-#define SHANNON_GPIO_SPI_CTS GPIO_GPIO (15) /* Output - SPI Clear to Send */
-#define SHANNON_GPIO_IRQ_CODEC GPIO_GPIO (16) /* in, irq from ucb1200 */
-#define SHANNON_IRQ_GPIO_IRQ_CODEC IRQ_GPIO16
-#define SHANNON_GPIO_DSP_RESET GPIO_GPIO (17) /* Output - Drive low to reset the DSP */
-#define SHANNON_GPIO_CODEC_RESET GPIO_GPIO (18) /* Output - Drive low to reset the UCB1x00 */
-#define SHANNON_GPIO_U3_RTS GPIO_GPIO (19) /* ?? */
-#define SHANNON_GPIO_U3_CTS GPIO_GPIO (20) /* ?? */
-#define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */
-#define SHANNON_GPIO_DISP_EN 22 /* out */
-/* XXX GPIO 23 unaccounted for */
-#define SHANNON_GPIO_EJECT_0 24 /* in */
-#define SHANNON_GPIO_EJECT_1 25 /* in */
-#define SHANNON_GPIO_RDY_0 26 /* in */
-#define SHANNON_GPIO_RDY_1 27 /* in */
-
-/* MCP UCB codec GPIO pins... */
-
-#define SHANNON_UCB_GPIO_BACKLIGHT 9
-#define SHANNON_UCB_GPIO_BRIGHT_MASK 7
-#define SHANNON_UCB_GPIO_BRIGHT 6
-#define SHANNON_UCB_GPIO_CONTRAST_MASK 0x3f
-#define SHANNON_UCB_GPIO_CONTRAST 0
-
-#endif
diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h
deleted file mode 100644
index d53d680de3d9..000000000000
--- a/arch/arm/mach-sa1100/include/mach/simpad.h
+++ /dev/null
@@ -1,159 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * arch/arm/mach-sa1100/include/mach/simpad.h
- *
- * based of assabet.h same as HUW_Webpanel
- *
- * This file contains the hardware specific definitions for SIMpad
- *
- * 2001/05/14 Juergen Messerer <juergen.messerer@freesurf.ch>
- */
-
-#ifndef __ASM_ARCH_SIMPAD_H
-#define __ASM_ARCH_SIMPAD_H
-
-
-#define GPIO_UART1_RTS GPIO_GPIO14
-#define GPIO_UART1_DTR GPIO_GPIO7
-#define GPIO_UART1_CTS GPIO_GPIO8
-#define GPIO_UART1_DCD GPIO_GPIO23
-#define GPIO_UART1_DSR GPIO_GPIO6
-
-#define GPIO_UART3_RTS GPIO_GPIO12
-#define GPIO_UART3_DTR GPIO_GPIO16
-#define GPIO_UART3_CTS GPIO_GPIO13
-#define GPIO_UART3_DCD GPIO_GPIO18
-#define GPIO_UART3_DSR GPIO_GPIO17
-
-#define GPIO_POWER_BUTTON GPIO_GPIO0
-#define GPIO_UCB1300_IRQ GPIO_GPIO22 /* UCB GPIO and touchscreen */
-
-#define IRQ_UART1_CTS IRQ_GPIO15
-#define IRQ_UART1_DCD GPIO_GPIO23
-#define IRQ_UART1_DSR GPIO_GPIO6
-#define IRQ_UART3_CTS GPIO_GPIO13
-#define IRQ_UART3_DCD GPIO_GPIO18
-#define IRQ_UART3_DSR GPIO_GPIO17
-
-#define IRQ_GPIO_UCB1300_IRQ IRQ_GPIO22
-#define IRQ_GPIO_POWER_BUTTON IRQ_GPIO0
-
-
-/*--- PCMCIA ---*/
-#define GPIO_CF_CD 24
-#define GPIO_CF_IRQ 1
-
-/*--- SmartCard ---*/
-#define GPIO_SMART_CARD GPIO_GPIO10
-#define IRQ_GPIO_SMARD_CARD IRQ_GPIO10
-
-/*--- ucb1x00 GPIO ---*/
-#define SIMPAD_UCB1X00_GPIO_BASE (GPIO_MAX + 1)
-#define SIMPAD_UCB1X00_GPIO_PROG1 (SIMPAD_UCB1X00_GPIO_BASE)
-#define SIMPAD_UCB1X00_GPIO_PROG2 (SIMPAD_UCB1X00_GPIO_BASE + 1)
-#define SIMPAD_UCB1X00_GPIO_UP (SIMPAD_UCB1X00_GPIO_BASE + 2)
-#define SIMPAD_UCB1X00_GPIO_DOWN (SIMPAD_UCB1X00_GPIO_BASE + 3)
-#define SIMPAD_UCB1X00_GPIO_LEFT (SIMPAD_UCB1X00_GPIO_BASE + 4)
-#define SIMPAD_UCB1X00_GPIO_RIGHT (SIMPAD_UCB1X00_GPIO_BASE + 5)
-#define SIMPAD_UCB1X00_GPIO_6 (SIMPAD_UCB1X00_GPIO_BASE + 6)
-#define SIMPAD_UCB1X00_GPIO_7 (SIMPAD_UCB1X00_GPIO_BASE + 7)
-#define SIMPAD_UCB1X00_GPIO_HEADSET (SIMPAD_UCB1X00_GPIO_BASE + 8)
-#define SIMPAD_UCB1X00_GPIO_SPEAKER (SIMPAD_UCB1X00_GPIO_BASE + 9)
-
-/*--- CS3 Latch ---*/
-#define SIMPAD_CS3_GPIO_BASE (GPIO_MAX + 11)
-#define SIMPAD_CS3_VCC_5V_EN (SIMPAD_CS3_GPIO_BASE)
-#define SIMPAD_CS3_VCC_3V_EN (SIMPAD_CS3_GPIO_BASE + 1)
-#define SIMPAD_CS3_EN1 (SIMPAD_CS3_GPIO_BASE + 2)
-#define SIMPAD_CS3_EN0 (SIMPAD_CS3_GPIO_BASE + 3)
-#define SIMPAD_CS3_DISPLAY_ON (SIMPAD_CS3_GPIO_BASE + 4)
-#define SIMPAD_CS3_PCMCIA_BUFF_DIS (SIMPAD_CS3_GPIO_BASE + 5)
-#define SIMPAD_CS3_MQ_RESET (SIMPAD_CS3_GPIO_BASE + 6)
-#define SIMPAD_CS3_PCMCIA_RESET (SIMPAD_CS3_GPIO_BASE + 7)
-#define SIMPAD_CS3_DECT_POWER_ON (SIMPAD_CS3_GPIO_BASE + 8)
-#define SIMPAD_CS3_IRDA_SD (SIMPAD_CS3_GPIO_BASE + 9)
-#define SIMPAD_CS3_RS232_ON (SIMPAD_CS3_GPIO_BASE + 10)
-#define SIMPAD_CS3_SD_MEDIAQ (SIMPAD_CS3_GPIO_BASE + 11)
-#define SIMPAD_CS3_LED2_ON (SIMPAD_CS3_GPIO_BASE + 12)
-#define SIMPAD_CS3_IRDA_MODE (SIMPAD_CS3_GPIO_BASE + 13)
-#define SIMPAD_CS3_ENABLE_5V (SIMPAD_CS3_GPIO_BASE + 14)
-#define SIMPAD_CS3_RESET_SIMCARD (SIMPAD_CS3_GPIO_BASE + 15)
-
-#define SIMPAD_CS3_PCMCIA_BVD1 (SIMPAD_CS3_GPIO_BASE + 16)
-#define SIMPAD_CS3_PCMCIA_BVD2 (SIMPAD_CS3_GPIO_BASE + 17)
-#define SIMPAD_CS3_PCMCIA_VS1 (SIMPAD_CS3_GPIO_BASE + 18)
-#define SIMPAD_CS3_PCMCIA_VS2 (SIMPAD_CS3_GPIO_BASE + 19)
-#define SIMPAD_CS3_LOCK_IND (SIMPAD_CS3_GPIO_BASE + 20)
-#define SIMPAD_CS3_CHARGING_STATE (SIMPAD_CS3_GPIO_BASE + 21)
-#define SIMPAD_CS3_PCMCIA_SHORT (SIMPAD_CS3_GPIO_BASE + 22)
-#define SIMPAD_CS3_GPIO_23 (SIMPAD_CS3_GPIO_BASE + 23)
-
-#define CS3_BASE IOMEM(0xf1000000)
-
-long simpad_get_cs3_ro(void);
-long simpad_get_cs3_shadow(void);
-void simpad_set_cs3_bit(int value);
-void simpad_clear_cs3_bit(int value);
-
-#define VCC_5V_EN 0x0001 /* For 5V PCMCIA */
-#define VCC_3V_EN 0x0002 /* FOR 3.3V PCMCIA */
-#define EN1 0x0004 /* This is only for EPROM's */
-#define EN0 0x0008 /* Both should be enable for 3.3V or 5V */
-#define DISPLAY_ON 0x0010
-#define PCMCIA_BUFF_DIS 0x0020
-#define MQ_RESET 0x0040
-#define PCMCIA_RESET 0x0080
-#define DECT_POWER_ON 0x0100
-#define IRDA_SD 0x0200 /* Shutdown for powersave */
-#define RS232_ON 0x0400
-#define SD_MEDIAQ 0x0800 /* Shutdown for powersave */
-#define LED2_ON 0x1000
-#define IRDA_MODE 0x2000 /* Fast/Slow IrDA mode */
-#define ENABLE_5V 0x4000 /* Enable 5V circuit */
-#define RESET_SIMCARD 0x8000
-
-#define PCMCIA_BVD1 0x01
-#define PCMCIA_BVD2 0x02
-#define PCMCIA_VS1 0x04
-#define PCMCIA_VS2 0x08
-#define LOCK_IND 0x10
-#define CHARGING_STATE 0x20
-#define PCMCIA_SHORT 0x40
-
-/*--- Battery ---*/
-struct simpad_battery {
- unsigned char ac_status; /* line connected yes/no */
- unsigned char status; /* battery loading yes/no */
- unsigned char percentage; /* percentage loaded */
- unsigned short life; /* life till empty */
-};
-
-/* These should match the apm_bios.h definitions */
-#define SIMPAD_AC_STATUS_AC_OFFLINE 0x00
-#define SIMPAD_AC_STATUS_AC_ONLINE 0x01
-#define SIMPAD_AC_STATUS_AC_BACKUP 0x02 /* What does this mean? */
-#define SIMPAD_AC_STATUS_AC_UNKNOWN 0xff
-
-/* These bitfields are rarely "or'd" together */
-#define SIMPAD_BATT_STATUS_HIGH 0x01
-#define SIMPAD_BATT_STATUS_LOW 0x02
-#define SIMPAD_BATT_STATUS_CRITICAL 0x04
-#define SIMPAD_BATT_STATUS_CHARGING 0x08
-#define SIMPAD_BATT_STATUS_CHARGE_MAIN 0x10
-#define SIMPAD_BATT_STATUS_DEAD 0x20 /* Battery will not charge */
-#define SIMPAD_BATT_NOT_INSTALLED 0x20 /* For expansion pack batteries */
-#define SIMPAD_BATT_STATUS_FULL 0x40 /* Battery fully charged (and connected to AC) */
-#define SIMPAD_BATT_STATUS_NOBATT 0x80
-#define SIMPAD_BATT_STATUS_UNKNOWN 0xff
-
-extern int simpad_get_battery(struct simpad_battery* );
-
-#endif // __ASM_ARCH_SIMPAD_H
-
-
-
-
-
-
-
-
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
deleted file mode 100644
index e3a0279750e3..000000000000
--- a/arch/arm/mach-sa1100/lart.c
+++ /dev/null
@@ -1,177 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/lart.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/tty.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <linux/platform_device.h>
-
-#include <video/sa1100fb.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-static struct mcp_plat_data lart_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
-};
-
-#ifdef LART_GREY_LCD
-static struct sa1100fb_mach_info lart_grey_info = {
- .pixclock = 150000, .bpp = 4,
- .xres = 320, .yres = 240,
-
- .hsync_len = 1, .vsync_len = 1,
- .left_margin = 4, .upper_margin = 0,
- .right_margin = 2, .lower_margin = 0,
-
- .cmap_greyscale = 1,
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-
- .lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
-};
-#endif
-#ifdef LART_COLOR_LCD
-static struct sa1100fb_mach_info lart_color_info = {
- .pixclock = 150000, .bpp = 16,
- .xres = 320, .yres = 240,
-
- .hsync_len = 2, .vsync_len = 3,
- .left_margin = 69, .upper_margin = 14,
- .right_margin = 8, .lower_margin = 4,
-
- .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
-};
-#endif
-#ifdef LART_VIDEO_OUT
-static struct sa1100fb_mach_info lart_video_info = {
- .pixclock = 39721, .bpp = 16,
- .xres = 640, .yres = 480,
-
- .hsync_len = 95, .vsync_len = 2,
- .left_margin = 40, .upper_margin = 32,
- .right_margin = 24, .lower_margin = 11,
-
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-
- .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
- .lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
-};
-#endif
-
-#ifdef LART_KIT01_LCD
-static struct sa1100fb_mach_info lart_kit01_info = {
- .pixclock = 63291, .bpp = 16,
- .xres = 640, .yres = 480,
-
- .hsync_len = 64, .vsync_len = 3,
- .left_margin = 122, .upper_margin = 45,
- .right_margin = 10, .lower_margin = 10,
-
- .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
- .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg
-};
-#endif
-
-static void __init lart_init(void)
-{
- struct sa1100fb_mach_info *inf = NULL;
-
-#ifdef LART_GREY_LCD
- inf = &lart_grey_info;
-#endif
-#ifdef LART_COLOR_LCD
- inf = &lart_color_info;
-#endif
-#ifdef LART_VIDEO_OUT
- inf = &lart_video_info;
-#endif
-#ifdef LART_KIT01_LCD
- inf = &lart_kit01_info;
-#endif
-
- if (inf)
- sa11x0_register_lcd(inf);
-
- sa11x0_ppc_configure_mcp();
- sa11x0_register_mcp(&lart_mcp_data);
-}
-
-static struct map_desc lart_io_desc[] __initdata = {
- { /* main flash memory */
- .virtual = 0xe8000000,
- .pfn = __phys_to_pfn(0x00000000),
- .length = 0x00400000,
- .type = MT_DEVICE
- }, { /* main flash, alternative location */
- .virtual = 0xec000000,
- .pfn = __phys_to_pfn(0x08000000),
- .length = 0x00400000,
- .type = MT_DEVICE
- }
-};
-
-/* LEDs */
-struct gpio_led lart_gpio_leds[] = {
- {
- .name = "lart:red",
- .default_trigger = "cpu0",
- .gpio = 23,
- },
-};
-
-static struct gpio_led_platform_data lart_gpio_led_info = {
- .leds = lart_gpio_leds,
- .num_leds = ARRAY_SIZE(lart_gpio_leds),
-};
-
-static struct platform_device lart_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &lart_gpio_led_info,
- }
-};
-static void __init lart_map_io(void)
-{
- sa1100_map_io();
- iotable_init(lart_io_desc, ARRAY_SIZE(lart_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
- sa1100_register_uart(2, 2);
-
- GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
- GPDR |= GPIO_UART_TXD;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- platform_device_register(&lart_leds);
-}
-
-MACHINE_START(LART, "LART")
- .atag_offset = 0x100,
- .map_io = lart_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_machine = lart_init,
- .init_late = sa11x0_init_late,
- .init_time = sa1100_timer_init,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c
deleted file mode 100644
index f6c9c19c39fb..000000000000
--- a/arch/arm/mach-sa1100/nanoengine.c
+++ /dev/null
@@ -1,136 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-sa1100/nanoengine.c
- *
- * Bright Star Engineering's nanoEngine board init code.
- *
- * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
- */
-
-#include <linux/init.h>
-#include <linux/gpio/machine.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/root_dev.h>
-
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-
-#include <mach/hardware.h>
-#include <mach/nanoengine.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-/* Flash bank 0 */
-static struct mtd_partition nanoengine_partitions[] = {
- {
- .name = "nanoEngine boot firmware and parameter table",
- .size = 0x00010000, /* 32K */
- .offset = 0,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "kernel/initrd reserved",
- .size = 0x002f0000,
- .offset = 0x00010000,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "experimental filesystem allocation",
- .size = 0x00100000,
- .offset = 0x00300000,
- .mask_flags = MTD_WRITEABLE,
- }
-};
-
-static struct flash_platform_data nanoengine_flash_data = {
- .map_name = "jedec_probe",
- .parts = nanoengine_partitions,
- .nr_parts = ARRAY_SIZE(nanoengine_partitions),
-};
-
-static struct resource nanoengine_flash_resources[] = {
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
- DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
-};
-
-static struct map_desc nanoengine_io_desc[] __initdata = {
- {
- /* System Registers */
- .virtual = 0xf0000000,
- .pfn = __phys_to_pfn(0x10000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }, {
- /* Internal PCI Memory Read/Write */
- .virtual = NANO_PCI_MEM_RW_VIRT,
- .pfn = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS),
- .length = NANO_PCI_MEM_RW_SIZE,
- .type = MT_DEVICE
- }, {
- /* Internal PCI Config Space */
- .virtual = NANO_PCI_CONFIG_SPACE_VIRT,
- .pfn = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS),
- .length = NANO_PCI_CONFIG_SPACE_SIZE,
- .type = MT_DEVICE
- }
-};
-
-static void __init nanoengine_map_io(void)
-{
- sa1100_map_io();
- iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
-
- sa1100_register_uart(0, 1);
- sa1100_register_uart(1, 2);
- sa1100_register_uart(2, 3);
- Ser1SDCR0 |= SDCR0_UART;
- /* disable IRDA -- UART2 is used as a normal serial port */
- Ser2UTCR4 = 0;
- Ser2HSCR0 = 0;
-}
-
-static struct gpiod_lookup_table nanoengine_pcmcia0_gpio_table = {
- .dev_id = "sa11x0-pcmcia.0",
- .table = {
- GPIO_LOOKUP("gpio", 11, "ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 13, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 15, "reset", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct gpiod_lookup_table nanoengine_pcmcia1_gpio_table = {
- .dev_id = "sa11x0-pcmcia.1",
- .table = {
- GPIO_LOOKUP("gpio", 12, "ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", 14, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 16, "reset", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static void __init nanoengine_init(void)
-{
- sa11x0_register_pcmcia(0, &nanoengine_pcmcia0_gpio_table);
- sa11x0_register_pcmcia(1, &nanoengine_pcmcia1_gpio_table);
- sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources,
- ARRAY_SIZE(nanoengine_flash_resources));
-}
-
-MACHINE_START(NANOENGINE, "BSE nanoEngine")
- .atag_offset = 0x100,
- .map_io = nanoengine_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = nanoengine_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
deleted file mode 100644
index 0791d11ff4d4..000000000000
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ /dev/null
@@ -1,191 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * linux/arch/arm/mach-sa1100/pci-nanoengine.c
- *
- * PCI functions for BSE nanoEngine PCI
- *
- * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
- */
-#include <linux/kernel.h>
-#include <linux/irq.h>
-#include <linux/pci.h>
-
-#include <asm/mach/pci.h>
-#include <asm/mach-types.h>
-
-#include <mach/nanoengine.h>
-#include <mach/hardware.h>
-
-static void __iomem *nanoengine_pci_map_bus(struct pci_bus *bus,
- unsigned int devfn, int where)
-{
- if (bus->number != 0 || (devfn >> 3) != 0)
- return NULL;
-
- return (void __iomem *)NANO_PCI_CONFIG_SPACE_VIRT +
- ((bus->number << 16) | (devfn << 8) | (where & ~3));
-}
-
-static struct pci_ops pci_nano_ops = {
- .map_bus = nanoengine_pci_map_bus,
- .read = pci_generic_config_read32,
- .write = pci_generic_config_write32,
-};
-
-static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,
- u8 pin)
-{
- return NANOENGINE_IRQ_GPIO_PCI;
-}
-
-static struct resource pci_io_ports =
- DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO");
-
-static struct resource pci_non_prefetchable_memory = {
- .name = "PCI non-prefetchable",
- .start = NANO_PCI_MEM_RW_PHYS,
- /* nanoEngine documentation says there is a 1 Megabyte window here,
- * but PCI reports just 128 + 8 kbytes. */
- .end = NANO_PCI_MEM_RW_PHYS + NANO_PCI_MEM_RW_SIZE - 1,
-/* .end = NANO_PCI_MEM_RW_PHYS + SZ_128K + SZ_8K - 1,*/
- .flags = IORESOURCE_MEM,
-};
-
-/*
- * nanoEngine PCI reports 1 Megabyte of prefetchable memory, but it
- * overlaps with previously defined memory.
- *
- * Here is what happens:
- *
-# dmesg
-...
-pci 0000:00:00.0: [8086:1209] type 0 class 0x000200
-pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff]
-pci 0000:00:00.0: reg 14: [io 0x0000-0x003f]
-pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff]
-pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref]
-pci 0000:00:00.0: supports D1 D2
-pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot
-pci 0000:00:00.0: PME# disabled
-PCI: bus0: Fast back to back transfers enabled
-pci 0000:00:00.0: BAR 6: can't assign mem pref (size 0x100000)
-pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff]
-pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff])
-pci 0000:00:00.0: BAR 0: assigned [mem 0x18620000-0x18620fff]
-pci 0000:00:00.0: BAR 0: set to [mem 0x18620000-0x18620fff] (PCI address [0x20000-0x20fff])
-pci 0000:00:00.0: BAR 1: assigned [io 0x0400-0x043f]
-pci 0000:00:00.0: BAR 1: set to [io 0x0400-0x043f] (PCI address [0x0-0x3f])
- *
- * On the other hand, if we do not request the prefetchable memory resource,
- * linux will alloc it first and the two non-prefetchable memory areas that
- * are our real interest will not be mapped. So we choose to map it to an
- * unused area. It gets recognized as expansion ROM, but becomes disabled.
- *
- * Here is what happens then:
- *
-# dmesg
-...
-pci 0000:00:00.0: [8086:1209] type 0 class 0x000200
-pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff]
-pci 0000:00:00.0: reg 14: [io 0x0000-0x003f]
-pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff]
-pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref]
-pci 0000:00:00.0: supports D1 D2
-pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot
-pci 0000:00:00.0: PME# disabled
-PCI: bus0: Fast back to back transfers enabled
-pci 0000:00:00.0: BAR 6: assigned [mem 0x78000000-0x780fffff pref]
-pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff]
-pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff])
-pci 0000:00:00.0: BAR 0: assigned [mem 0x18620000-0x18620fff]
-pci 0000:00:00.0: BAR 0: set to [mem 0x18620000-0x18620fff] (PCI address [0x20000-0x20fff])
-pci 0000:00:00.0: BAR 1: assigned [io 0x0400-0x043f]
-pci 0000:00:00.0: BAR 1: set to [io 0x0400-0x043f] (PCI address [0x0-0x3f])
-
-# lspci -vv -s 0000:00:00.0
-00:00.0 Class 0200: Device 8086:1209 (rev 09)
- Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR+ <PERR+ INTx-
- Latency: 0 (2000ns min, 14000ns max), Cache Line Size: 32 bytes
- Interrupt: pin A routed to IRQ 0
- Region 0: Memory at 18620000 (32-bit, non-prefetchable) [size=4K]
- Region 1: I/O ports at 0400 [size=64]
- Region 2: [virtual] Memory at 18600000 (32-bit, non-prefetchable) [size=128K]
- [virtual] Expansion ROM at 78000000 [disabled] [size=1M]
- Capabilities: [dc] Power Management version 2
- Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
- Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME-
- Kernel driver in use: e100
- Kernel modules: e100
- *
- */
-static struct resource pci_prefetchable_memory = {
- .name = "PCI prefetchable",
- .start = 0x78000000,
- .end = 0x78000000 + NANO_PCI_MEM_RW_SIZE - 1,
- .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
-};
-
-static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys)
-{
- if (request_resource(&ioport_resource, &pci_io_ports)) {
- printk(KERN_ERR "PCI: unable to allocate io port region\n");
- return -EBUSY;
- }
- if (request_resource(&iomem_resource, &pci_non_prefetchable_memory)) {
- release_resource(&pci_io_ports);
- printk(KERN_ERR "PCI: unable to allocate non prefetchable\n");
- return -EBUSY;
- }
- if (request_resource(&iomem_resource, &pci_prefetchable_memory)) {
- release_resource(&pci_io_ports);
- release_resource(&pci_non_prefetchable_memory);
- printk(KERN_ERR "PCI: unable to allocate prefetchable\n");
- return -EBUSY;
- }
- pci_add_resource_offset(&sys->resources, &pci_io_ports, sys->io_offset);
- pci_add_resource_offset(&sys->resources,
- &pci_non_prefetchable_memory, sys->mem_offset);
- pci_add_resource_offset(&sys->resources,
- &pci_prefetchable_memory, sys->mem_offset);
-
- return 1;
-}
-
-int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)
-{
- int ret = 0;
-
- pcibios_min_io = 0;
- pcibios_min_mem = 0;
-
- if (nr == 0) {
- sys->mem_offset = NANO_PCI_MEM_RW_PHYS;
- sys->io_offset = 0x400;
- ret = pci_nanoengine_setup_resources(sys);
- /* Enable alternate memory bus master mode, see
- * "Intel StrongARM SA1110 Developer's Manual",
- * section 10.8, "Alternate Memory Bus Master Mode". */
- GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
- GAFR |= GPIO_MBGNT | GPIO_MBREQ;
- TUCR |= TUCR_MBGPIO;
- }
-
- return ret;
-}
-
-static struct hw_pci nanoengine_pci __initdata = {
- .map_irq = pci_nanoengine_map_irq,
- .nr_controllers = 1,
- .ops = &pci_nano_ops,
- .setup = pci_nanoengine_setup,
-};
-
-static int __init nanoengine_pci_init(void)
-{
- if (machine_is_nanoengine())
- pci_common_init(&nanoengine_pci);
- return 0;
-}
-
-subsys_initcall(nanoengine_pci_init);
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
deleted file mode 100644
index b2b0c9fc18f7..000000000000
--- a/arch/arm/mach-sa1100/pleb.c
+++ /dev/null
@@ -1,148 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/pleb.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/ioport.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/mtd/partitions.h>
-#include <linux/smc91x.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/flash.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-
-/*
- * Ethernet IRQ mappings
- */
-
-#define PLEB_ETH0_P (0x20000300) /* Ethernet 0 in PCMCIA0 IO */
-#define PLEB_ETH0_V (0xf6000300)
-
-#define GPIO_ETH0_IRQ GPIO_GPIO(21)
-#define GPIO_ETH0_EN GPIO_GPIO(26)
-
-#define IRQ_GPIO_ETH0_IRQ IRQ_GPIO21
-
-static struct resource smc91x_resources[] = {
- [0] = DEFINE_RES_MEM(PLEB_ETH0_P, 0x04000000),
-#if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */
- [1] = DEFINE_RES_IRQ(IRQ_GPIO_ETH0_IRQ),
-#endif
-};
-
-static struct smc91x_platdata smc91x_platdata = {
- .flags = SMC91X_USE_16BIT | SMC91X_USE_8BIT | SMC91X_NOWAIT,
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
- .dev = {
- .platform_data = &smc91x_platdata,
- },
-};
-
-static struct platform_device *devices[] __initdata = {
- &smc91x_device,
-};
-
-
-/*
- * Pleb's memory map
- * has flash memory (typically 4 or 8 meg) selected by
- * the two SA1100 lowest chip select outputs.
- */
-static struct resource pleb_flash_resources[] = {
- [0] = DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_8M),
- [1] = DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_8M),
-};
-
-
-static struct mtd_partition pleb_partitions[] = {
- {
- .name = "blob",
- .offset = 0,
- .size = 0x00020000,
- }, {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x000e0000,
- }, {
- .name = "rootfs",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00300000,
- }
-};
-
-
-static struct flash_platform_data pleb_flash_data = {
- .map_name = "cfi_probe",
- .parts = pleb_partitions,
- .nr_parts = ARRAY_SIZE(pleb_partitions),
-};
-
-
-static void __init pleb_init(void)
-{
- sa11x0_register_mtd(&pleb_flash_data, pleb_flash_resources,
- ARRAY_SIZE(pleb_flash_resources));
-
-
- platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-
-static void __init pleb_map_io(void)
-{
- sa1100_map_io();
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-
- GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
- GPDR |= GPIO_UART_TXD;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- /*
- * Fix expansion memory timing for network card
- */
- MECR = ((2<<10) | (2<<5) | (2<<0));
-
- /*
- * Enable the SMC ethernet controller
- */
- GPDR |= GPIO_ETH0_EN; /* set to output */
- GPCR = GPIO_ETH0_EN; /* clear MCLK (enable smc) */
-
- GPDR &= ~GPIO_ETH0_IRQ;
-
- irq_set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING);
-}
-
-MACHINE_START(PLEB, "PLEB")
- .map_io = pleb_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = pleb_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
deleted file mode 100644
index 351f891b4842..000000000000
--- a/arch/arm/mach-sa1100/shannon.c
+++ /dev/null
@@ -1,157 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/shannon.c
- */
-
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/gpio/machine.h>
-#include <linux/kernel.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/tty.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
-
-#include <video/sa1100fb.h>
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/shannon.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-
-static struct mtd_partition shannon_partitions[] = {
- {
- .name = "BLOB boot loader",
- .offset = 0,
- .size = 0x20000
- },
- {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = 0xe0000
- },
- {
- .name = "initrd",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL
- }
-};
-
-static struct flash_platform_data shannon_flash_data = {
- .map_name = "cfi_probe",
- .parts = shannon_partitions,
- .nr_parts = ARRAY_SIZE(shannon_partitions),
-};
-
-static struct resource shannon_flash_resource =
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M);
-
-static struct mcp_plat_data shannon_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
-};
-
-static struct sa1100fb_mach_info shannon_lcd_info = {
- .pixclock = 152500, .bpp = 8,
- .xres = 640, .yres = 480,
-
- .hsync_len = 4, .vsync_len = 3,
- .left_margin = 2, .upper_margin = 0,
- .right_margin = 1, .lower_margin = 0,
-
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-
- .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
- .lccr3 = LCCR3_ACBsDiv(512),
-};
-
-static struct gpiod_lookup_table shannon_pcmcia0_gpio_table = {
- .dev_id = "sa11x0-pcmcia.0",
- .table = {
- GPIO_LOOKUP("gpio", 24, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 26, "ready", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct gpiod_lookup_table shannon_pcmcia1_gpio_table = {
- .dev_id = "sa11x0-pcmcia.1",
- .table = {
- GPIO_LOOKUP("gpio", 25, "detect", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio", 27, "ready", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct regulator_consumer_supply shannon_cf_vcc_consumers[] = {
- REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.0"),
- REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"),
-};
-
-static struct fixed_voltage_config shannon_cf_vcc_pdata __initdata = {
- .supply_name = "cf-power",
- .microvolts = 3300000,
- .enabled_at_boot = 1,
-};
-
-static struct gpiod_lookup_table shannon_display_gpio_table = {
- .dev_id = "sa11x0-fb",
- .table = {
- GPIO_LOOKUP("gpio", 22, "shannon-lcden", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static void __init shannon_init(void)
-{
- sa11x0_register_fixed_regulator(0, &shannon_cf_vcc_pdata,
- shannon_cf_vcc_consumers,
- ARRAY_SIZE(shannon_cf_vcc_consumers),
- false);
- sa11x0_register_pcmcia(0, &shannon_pcmcia0_gpio_table);
- sa11x0_register_pcmcia(1, &shannon_pcmcia1_gpio_table);
- sa11x0_ppc_configure_mcp();
- gpiod_add_lookup_table(&shannon_display_gpio_table);
- sa11x0_register_lcd(&shannon_lcd_info);
- sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
- sa11x0_register_mcp(&shannon_mcp_data);
-}
-
-static void __init shannon_map_io(void)
-{
- sa1100_map_io();
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-
- Ser1SDCR0 |= SDCR0_SUS;
- GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
- GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- /* reset the codec */
- GPCR = SHANNON_GPIO_CODEC_RESET;
- GPSR = SHANNON_GPIO_CODEC_RESET;
-}
-
-MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
- .atag_offset = 0x100,
- .map_io = shannon_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_time = sa1100_timer_init,
- .init_machine = shannon_init,
- .init_late = sa11x0_init_late,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
deleted file mode 100644
index c7fb9a73e4c5..000000000000
--- a/arch/arm/mach-sa1100/simpad.c
+++ /dev/null
@@ -1,423 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/arm/mach-sa1100/simpad.c
- */
-
-#include <linux/module.h>
-#include <linux/gpio/machine.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/proc_fs.h>
-#include <linux/string.h>
-#include <linux/pm.h>
-#include <linux/platform_data/sa11x0-serial.h>
-#include <linux/platform_device.h>
-#include <linux/mfd/ucb1x00.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/io.h>
-#include <linux/gpio/driver.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/map.h>
-#include <linux/platform_data/mfd-mcp-sa11x0.h>
-#include <mach/simpad.h>
-#include <mach/irqs.h>
-
-#include <linux/serial_core.h>
-#include <linux/ioport.h>
-#include <linux/input.h>
-#include <linux/gpio_keys.h>
-#include <linux/leds.h>
-#include <linux/platform_data/i2c-gpio.h>
-
-#include "generic.h"
-
-/*
- * CS3 support
- */
-
-static long cs3_shadow;
-static spinlock_t cs3_lock;
-static struct gpio_chip cs3_gpio;
-
-long simpad_get_cs3_ro(void)
-{
- return readl(CS3_BASE);
-}
-EXPORT_SYMBOL(simpad_get_cs3_ro);
-
-long simpad_get_cs3_shadow(void)
-{
- return cs3_shadow;
-}
-EXPORT_SYMBOL(simpad_get_cs3_shadow);
-
-static void __simpad_write_cs3(void)
-{
- writel(cs3_shadow, CS3_BASE);
-}
-
-void simpad_set_cs3_bit(int value)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&cs3_lock, flags);
- cs3_shadow |= value;
- __simpad_write_cs3();
- spin_unlock_irqrestore(&cs3_lock, flags);
-}
-EXPORT_SYMBOL(simpad_set_cs3_bit);
-
-void simpad_clear_cs3_bit(int value)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&cs3_lock, flags);
- cs3_shadow &= ~value;
- __simpad_write_cs3();
- spin_unlock_irqrestore(&cs3_lock, flags);
-}
-EXPORT_SYMBOL(simpad_clear_cs3_bit);
-
-static void cs3_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
- if (offset > 15)
- return;
- if (value)
- simpad_set_cs3_bit(1 << offset);
- else
- simpad_clear_cs3_bit(1 << offset);
-};
-
-static int cs3_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
- if (offset > 15)
- return !!(simpad_get_cs3_ro() & (1 << (offset - 16)));
- return !!(simpad_get_cs3_shadow() & (1 << offset));
-};
-
-static int cs3_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-{
- if (offset > 15)
- return 0;
- return -EINVAL;
-};
-
-static int cs3_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
- int value)
-{
- if (offset > 15)
- return -EINVAL;
- cs3_gpio_set(chip, offset, value);
- return 0;
-};
-
-static struct map_desc simpad_io_desc[] __initdata = {
- { /* MQ200 */
- .virtual = 0xf2800000,
- .pfn = __phys_to_pfn(0x4b800000),
- .length = 0x00800000,
- .type = MT_DEVICE
- }, { /* Simpad CS3 */
- .virtual = (unsigned long)CS3_BASE,
- .pfn = __phys_to_pfn(SA1100_CS3_PHYS),
- .length = 0x00100000,
- .type = MT_DEVICE
- },
-};
-
-
-static void simpad_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- if (port->mapbase == (u_int)&Ser1UTCR0) {
- if (state)
- {
- simpad_clear_cs3_bit(RS232_ON);
- simpad_clear_cs3_bit(DECT_POWER_ON);
- }else
- {
- simpad_set_cs3_bit(RS232_ON);
- simpad_set_cs3_bit(DECT_POWER_ON);
- }
- }
-}
-
-static struct sa1100_port_fns simpad_port_fns __initdata = {
- .pm = simpad_uart_pm,
-};
-
-
-static struct mtd_partition simpad_partitions[] = {
- {
- .name = "SIMpad boot firmware",
- .size = 0x00080000,
- .offset = 0,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "SIMpad kernel",
- .size = 0x0010000,
- .offset = MTDPART_OFS_APPEND,
- }, {
- .name = "SIMpad root jffs2",
- .size = MTDPART_SIZ_FULL,
- .offset = MTDPART_OFS_APPEND,
- }
-};
-
-static struct flash_platform_data simpad_flash_data = {
- .map_name = "cfi_probe",
- .parts = simpad_partitions,
- .nr_parts = ARRAY_SIZE(simpad_partitions),
-};
-
-
-static struct resource simpad_flash_resources [] = {
- DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_16M),
- DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_16M),
-};
-
-static struct ucb1x00_plat_data simpad_ucb1x00_data = {
- .gpio_base = SIMPAD_UCB1X00_GPIO_BASE,
-};
-
-static struct mcp_plat_data simpad_mcp_data = {
- .mccr0 = MCCR0_ADM,
- .sclk_rate = 11981000,
- .codec_pdata = &simpad_ucb1x00_data,
-};
-
-
-
-static void __init simpad_map_io(void)
-{
- sa1100_map_io();
-
- iotable_init(simpad_io_desc, ARRAY_SIZE(simpad_io_desc));
-
- /* Initialize CS3 */
- cs3_shadow = (EN1 | EN0 | LED2_ON | DISPLAY_ON |
- RS232_ON | ENABLE_5V | RESET_SIMCARD | DECT_POWER_ON);
- __simpad_write_cs3(); /* Spinlocks not yet initialized */
-
- sa1100_register_uart_fns(&simpad_port_fns);
- sa1100_register_uart(0, 3); /* serial interface */
- sa1100_register_uart(1, 1); /* DECT */
-
- // Reassign UART 1 pins
- GAFR |= GPIO_UART_TXD | GPIO_UART_RXD;
- GPDR |= GPIO_UART_TXD | GPIO_LDD13 | GPIO_LDD15;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-
- /*
- * Set up registers for sleep mode.
- */
-
-
- PWER = PWER_GPIO0| PWER_RTC;
- PGSR = 0x818;
- PCFR = 0;
- PSDR = 0;
-
-}
-
-static void simpad_power_off(void)
-{
- local_irq_disable();
- cs3_shadow = SD_MEDIAQ;
- __simpad_write_cs3(); /* Bypass spinlock here */
-
- /* disable internal oscillator, float CS lines */
- PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
- /* enable wake-up on GPIO0 */
- PWER = GFER = GRER = PWER_GPIO0;
- /*
- * set scratchpad to zero, just in case it is used as a
- * restart address by the bootloader.
- */
- PSPR = 0;
- PGSR = 0;
- /* enter sleep mode */
- PMCR = PMCR_SF;
- while(1);
-
- local_irq_enable(); /* we won't ever call it */
-
-
-}
-
-/*
- * gpio_keys
-*/
-
-static struct gpio_keys_button simpad_button_table[] = {
- { KEY_POWER, IRQ_GPIO_POWER_BUTTON, 1, "power button" },
-};
-
-static struct gpio_keys_platform_data simpad_keys_data = {
- .buttons = simpad_button_table,
- .nbuttons = ARRAY_SIZE(simpad_button_table),
-};
-
-static struct platform_device simpad_keys = {
- .name = "gpio-keys",
- .dev = {
- .platform_data = &simpad_keys_data,
- },
-};
-
-static struct gpio_keys_button simpad_polled_button_table[] = {
- { KEY_PROG1, SIMPAD_UCB1X00_GPIO_PROG1, 1, "prog1 button" },
- { KEY_PROG2, SIMPAD_UCB1X00_GPIO_PROG2, 1, "prog2 button" },
- { KEY_UP, SIMPAD_UCB1X00_GPIO_UP, 1, "up button" },
- { KEY_DOWN, SIMPAD_UCB1X00_GPIO_DOWN, 1, "down button" },
- { KEY_LEFT, SIMPAD_UCB1X00_GPIO_LEFT, 1, "left button" },
- { KEY_RIGHT, SIMPAD_UCB1X00_GPIO_RIGHT, 1, "right button" },
-};
-
-static struct gpio_keys_platform_data simpad_polled_keys_data = {
- .buttons = simpad_polled_button_table,
- .nbuttons = ARRAY_SIZE(simpad_polled_button_table),
- .poll_interval = 50,
-};
-
-static struct platform_device simpad_polled_keys = {
- .name = "gpio-keys-polled",
- .dev = {
- .platform_data = &simpad_polled_keys_data,
- },
-};
-
-/*
- * GPIO LEDs
- */
-
-static struct gpio_led simpad_leds[] = {
- {
- .name = "simpad:power",
- .gpio = SIMPAD_CS3_LED2_ON,
- .active_low = 0,
- .default_trigger = "default-on",
- },
-};
-
-static struct gpio_led_platform_data simpad_led_data = {
- .num_leds = ARRAY_SIZE(simpad_leds),
- .leds = simpad_leds,
-};
-
-static struct platform_device simpad_gpio_leds = {
- .name = "leds-gpio",
- .id = 0,
- .dev = {
- .platform_data = &simpad_led_data,
- },
-};
-
-/*
- * i2c
- */
-static struct gpiod_lookup_table simpad_i2c_gpiod_table = {
- .dev_id = "i2c-gpio.0",
- .table = {
- GPIO_LOOKUP_IDX("gpio", 21, NULL, 0,
- GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- GPIO_LOOKUP_IDX("gpio", 25, NULL, 1,
- GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- },
-};
-
-static struct i2c_gpio_platform_data simpad_i2c_data = {
- .udelay = 10,
- .timeout = HZ,
-};
-
-static struct platform_device simpad_i2c = {
- .name = "i2c-gpio",
- .id = 0,
- .dev = {
- .platform_data = &simpad_i2c_data,
- },
-};
-
-/*
- * MediaQ Video Device
- */
-static struct platform_device simpad_mq200fb = {
- .name = "simpad-mq200",
- .id = 0,
-};
-
-static struct platform_device *devices[] __initdata = {
- &simpad_keys,
- &simpad_polled_keys,
- &simpad_mq200fb,
- &simpad_gpio_leds,
- &simpad_i2c,
-};
-
-/* Compact Flash */
-static struct gpiod_lookup_table simpad_cf_gpio_table = {
- .dev_id = "sa11x0-pcmcia",
- .table = {
- GPIO_LOOKUP("gpio", GPIO_CF_IRQ, "cf-ready", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio", GPIO_CF_CD, "cf-detect", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-
-static int __init simpad_init(void)
-{
- int ret;
-
- spin_lock_init(&cs3_lock);
-
- cs3_gpio.label = "simpad_cs3";
- cs3_gpio.base = SIMPAD_CS3_GPIO_BASE;
- cs3_gpio.ngpio = 24;
- cs3_gpio.set = cs3_gpio_set;
- cs3_gpio.get = cs3_gpio_get;
- cs3_gpio.direction_input = cs3_gpio_direction_input;
- cs3_gpio.direction_output = cs3_gpio_direction_output;
- ret = gpiochip_add_data(&cs3_gpio, NULL);
- if (ret)
- printk(KERN_WARNING "simpad: Unable to register cs3 GPIO device");
-
- pm_power_off = simpad_power_off;
-
- sa11x0_register_pcmcia(-1, &simpad_cf_gpio_table);
- sa11x0_ppc_configure_mcp();
- sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources,
- ARRAY_SIZE(simpad_flash_resources));
- sa11x0_register_mcp(&simpad_mcp_data);
-
- gpiod_add_lookup_table(&simpad_i2c_gpiod_table);
- ret = platform_add_devices(devices, ARRAY_SIZE(devices));
- if(ret)
- printk(KERN_WARNING "simpad: Unable to register mq200 framebuffer device");
-
- return 0;
-}
-
-arch_initcall(simpad_init);
-
-
-MACHINE_START(SIMPAD, "Simpad")
- /* Maintainer: Holger Freyther */
- .atag_offset = 0x100,
- .map_io = simpad_map_io,
- .nr_irqs = SA1100_NR_IRQS,
- .init_irq = sa1100_init_irq,
- .init_late = sa11x0_init_late,
- .init_time = sa1100_timer_init,
- .restart = sa11x0_restart,
-MACHINE_END
diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c
index 1a83c8678a63..bb7f591a8b05 100644
--- a/drivers/cpufreq/sa1110-cpufreq.c
+++ b/drivers/cpufreq/sa1110-cpufreq.c
@@ -344,14 +344,8 @@ static int __init sa1110_clk_init(void)
if (!name[0]) {
if (machine_is_assabet())
name = "TC59SM716-CL3";
- if (machine_is_pt_system3())
- name = "K4S641632D";
- if (machine_is_h3100())
- name = "KM416S4030CT";
if (machine_is_jornada720() || machine_is_h3600())
name = "K4S281632B-1H";
- if (machine_is_nanoengine())
- name = "MT48LC8M16A2TG-75";
}
sdram = sa1110_find_sdram(name);
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index d655a135a886..ad469b8985bd 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -672,7 +672,7 @@ config MFD_INTEL_PMC_BXT
config MFD_IPAQ_MICRO
bool "Atmel Micro ASIC (iPAQ h3100/h3600/h3700) Support"
- depends on SA1100_H3100 || SA1100_H3600
+ depends on SA1100_H3600
select MFD_CORE
help
Select this to get support for the Microcontroller found in
diff --git a/drivers/pcmcia/sa1100_generic.c b/drivers/pcmcia/sa1100_generic.c
index c2b6e828c2c6..89d4ba58c891 100644
--- a/drivers/pcmcia/sa1100_generic.c
+++ b/drivers/pcmcia/sa1100_generic.c
@@ -98,12 +98,9 @@ static struct pcmcia_low_level sa11x0_cf_ops = {
int __init pcmcia_collie_init(struct device *dev);
static int (*sa11x0_pcmcia_legacy_hw_init[])(struct device *dev) = {
-#if defined(CONFIG_SA1100_H3100) || defined(CONFIG_SA1100_H3600)
+#ifdef CONFIG_SA1100_H3600
pcmcia_h3600_init,
#endif
-#ifdef CONFIG_SA1100_SIMPAD
- pcmcia_simpad_init,
-#endif
#ifdef CONFIG_SA1100_COLLIE
pcmcia_collie_init,
#endif
diff --git a/drivers/pcmcia/sa1100_h3600.c b/drivers/pcmcia/sa1100_h3600.c
index a91222bc3824..10cb99c20a7f 100644
--- a/drivers/pcmcia/sa1100_h3600.c
+++ b/drivers/pcmcia/sa1100_h3600.c
@@ -156,7 +156,7 @@ int pcmcia_h3600_init(struct device *dev)
{
int ret = -ENODEV;
- if (machine_is_h3600() || machine_is_h3100())
+ if (machine_is_h3600())
ret = sa11xx_drv_pcmcia_probe(dev, &h3600_pcmcia_ops, 0, 2);
return ret;
diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index 71bf1b279a5a..2a67e33fb5f0 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -212,10 +212,6 @@ static int pcmcia_probe(struct sa1111_dev *dev)
writel_relaxed(PCCR_S0_FLT | PCCR_S1_FLT, base + PCCR);
ret = -ENODEV;
-#ifdef CONFIG_SA1100_BADGE4
- if (machine_is_badge4())
- ret = pcmcia_badge4_init(dev);
-#endif
#ifdef CONFIG_SA1100_JORNADA720
if (machine_is_jornada720())
ret = pcmcia_jornada720_init(dev);
diff --git a/drivers/usb/host/ohci-sa1111.c b/drivers/usb/host/ohci-sa1111.c
index 75c2b28b3379..aca0338a2983 100644
--- a/drivers/usb/host/ohci-sa1111.c
+++ b/drivers/usb/host/ohci-sa1111.c
@@ -125,10 +125,7 @@ static int sa1111_start_hc(struct sa1111_dev *dev)
dev_dbg(&dev->dev, "starting SA-1111 OHCI USB Controller\n");
- if (machine_is_xp860() ||
- machine_is_assabet() ||
- machine_is_pfs168() ||
- machine_is_badge4())
+ if (machine_is_assabet())
usb_rst = USB_RESET_PWRSENSELOW | USB_RESET_PWRCTRLLOW;
/*
diff --git a/drivers/video/fbdev/sa1100fb.c b/drivers/video/fbdev/sa1100fb.c
index 017c8efe8267..b1b8ccdbac4a 100644
--- a/drivers/video/fbdev/sa1100fb.c
+++ b/drivers/video/fbdev/sa1100fb.c
@@ -184,7 +184,6 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
-#include <mach/shannon.h>
/*
* Complain if VAR is out of range.
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
2022-10-21 15:49 ` Arnd Bergmann
(?)
@ 2022-10-22 10:31 ` Greg Kroah-Hartman
-1 siblings, 0 replies; 55+ messages in thread
From: Greg Kroah-Hartman @ 2022-10-22 10:31 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Stefan Eletzhofer, linux-fbdev, linux-usb, Arnd Bergmann,
Rafael J. Wysocki, Viresh Kumar, Lee Jones, Russell King,
Dominik Brodowski, linux-kernel, Lubomir Rintel, Peter Chubb,
Alan Stern, dri-devel, linux-pm, Helge Deller, linux-arm-kernel
On Fri, Oct 21, 2022 at 05:49:32PM +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
> Simpad machines were all marked as unused as there are no known users
> left. Remove all of these, along with references to them in defconfig
> files and drivers.
>
> Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
> and Jornada 720, each of which had one person still using them, with
> Collie also being supported in Qemu.
>
> Cc: Peter Chubb <peter.chubb@unsw.edu.au>
> Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
@ 2022-10-22 10:31 ` Greg Kroah-Hartman
0 siblings, 0 replies; 55+ messages in thread
From: Greg Kroah-Hartman @ 2022-10-22 10:31 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
linux-kernel, Arnd Bergmann, Peter Chubb, Stefan Eletzhofer,
Rafael J. Wysocki, Viresh Kumar, Lee Jones, Dominik Brodowski,
Alan Stern, Helge Deller, linux-pm, linux-usb, linux-fbdev,
dri-devel
On Fri, Oct 21, 2022 at 05:49:32PM +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
> Simpad machines were all marked as unused as there are no known users
> left. Remove all of these, along with references to them in defconfig
> files and drivers.
>
> Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
> and Jornada 720, each of which had one person still using them, with
> Collie also being supported in Qemu.
>
> Cc: Peter Chubb <peter.chubb@unsw.edu.au>
> Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
@ 2022-10-22 10:31 ` Greg Kroah-Hartman
0 siblings, 0 replies; 55+ messages in thread
From: Greg Kroah-Hartman @ 2022-10-22 10:31 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
linux-kernel, Arnd Bergmann, Peter Chubb, Stefan Eletzhofer,
Rafael J. Wysocki, Viresh Kumar, Lee Jones, Dominik Brodowski,
Alan Stern, Helge Deller, linux-pm, linux-usb, linux-fbdev,
dri-devel
On Fri, Oct 21, 2022 at 05:49:32PM +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
> Simpad machines were all marked as unused as there are no known users
> left. Remove all of these, along with references to them in defconfig
> files and drivers.
>
> Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
> and Jornada 720, each of which had one person still using them, with
> Collie also being supported in Qemu.
>
> Cc: Peter Chubb <peter.chubb@unsw.edu.au>
> Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
2022-10-21 15:49 ` Arnd Bergmann
(?)
@ 2022-10-25 5:10 ` Viresh Kumar
-1 siblings, 0 replies; 55+ messages in thread
From: Viresh Kumar @ 2022-10-25 5:10 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
linux-kernel, Arnd Bergmann, Peter Chubb, Stefan Eletzhofer,
Rafael J. Wysocki, Lee Jones, Dominik Brodowski, Alan Stern,
Greg Kroah-Hartman, Helge Deller, linux-pm, linux-usb,
linux-fbdev, dri-devel
On 21-10-22, 17:49, Arnd Bergmann wrote:
> diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c
> index 1a83c8678a63..bb7f591a8b05 100644
> --- a/drivers/cpufreq/sa1110-cpufreq.c
> +++ b/drivers/cpufreq/sa1110-cpufreq.c
> @@ -344,14 +344,8 @@ static int __init sa1110_clk_init(void)
> if (!name[0]) {
> if (machine_is_assabet())
> name = "TC59SM716-CL3";
> - if (machine_is_pt_system3())
> - name = "K4S641632D";
> - if (machine_is_h3100())
> - name = "KM416S4030CT";
> if (machine_is_jornada720() || machine_is_h3600())
> name = "K4S281632B-1H";
> - if (machine_is_nanoengine())
> - name = "MT48LC8M16A2TG-75";
> }
>
> sdram = sa1110_find_sdram(name);
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
@ 2022-10-25 5:10 ` Viresh Kumar
0 siblings, 0 replies; 55+ messages in thread
From: Viresh Kumar @ 2022-10-25 5:10 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
linux-kernel, Arnd Bergmann, Peter Chubb, Stefan Eletzhofer,
Rafael J. Wysocki, Lee Jones, Dominik Brodowski, Alan Stern,
Greg Kroah-Hartman, Helge Deller, linux-pm, linux-usb,
linux-fbdev, dri-devel
On 21-10-22, 17:49, Arnd Bergmann wrote:
> diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c
> index 1a83c8678a63..bb7f591a8b05 100644
> --- a/drivers/cpufreq/sa1110-cpufreq.c
> +++ b/drivers/cpufreq/sa1110-cpufreq.c
> @@ -344,14 +344,8 @@ static int __init sa1110_clk_init(void)
> if (!name[0]) {
> if (machine_is_assabet())
> name = "TC59SM716-CL3";
> - if (machine_is_pt_system3())
> - name = "K4S641632D";
> - if (machine_is_h3100())
> - name = "KM416S4030CT";
> if (machine_is_jornada720() || machine_is_h3600())
> name = "K4S281632B-1H";
> - if (machine_is_nanoengine())
> - name = "MT48LC8M16A2TG-75";
> }
>
> sdram = sa1110_find_sdram(name);
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
@ 2022-10-25 5:10 ` Viresh Kumar
0 siblings, 0 replies; 55+ messages in thread
From: Viresh Kumar @ 2022-10-25 5:10 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Stefan Eletzhofer, linux-fbdev, linux-usb, Arnd Bergmann,
Rafael J. Wysocki, Greg Kroah-Hartman, Lee Jones, Russell King,
Dominik Brodowski, linux-kernel, Lubomir Rintel, Peter Chubb,
Alan Stern, dri-devel, linux-pm, Helge Deller, linux-arm-kernel
On 21-10-22, 17:49, Arnd Bergmann wrote:
> diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c
> index 1a83c8678a63..bb7f591a8b05 100644
> --- a/drivers/cpufreq/sa1110-cpufreq.c
> +++ b/drivers/cpufreq/sa1110-cpufreq.c
> @@ -344,14 +344,8 @@ static int __init sa1110_clk_init(void)
> if (!name[0]) {
> if (machine_is_assabet())
> name = "TC59SM716-CL3";
> - if (machine_is_pt_system3())
> - name = "K4S641632D";
> - if (machine_is_h3100())
> - name = "KM416S4030CT";
> if (machine_is_jornada720() || machine_is_h3600())
> name = "K4S281632B-1H";
> - if (machine_is_nanoengine())
> - name = "MT48LC8M16A2TG-75";
> }
>
> sdram = sa1110_find_sdram(name);
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
2022-10-21 15:49 ` Arnd Bergmann
(?)
@ 2022-10-31 15:18 ` Lee Jones
-1 siblings, 0 replies; 55+ messages in thread
From: Lee Jones @ 2022-10-31 15:18 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
linux-kernel, Arnd Bergmann, Peter Chubb, Stefan Eletzhofer,
Rafael J. Wysocki, Viresh Kumar, Dominik Brodowski, Alan Stern,
Greg Kroah-Hartman, Helge Deller, linux-pm, linux-usb,
linux-fbdev, dri-devel
On Fri, 21 Oct 2022, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
> Simpad machines were all marked as unused as there are no known users
> left. Remove all of these, along with references to them in defconfig
> files and drivers.
>
> Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
> and Jornada 720, each of which had one person still using them, with
> Collie also being supported in Qemu.
>
> Cc: Peter Chubb <peter.chubb@unsw.edu.au>
> Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> MAINTAINERS | 11 -
> arch/arm/Kconfig | 6 -
> arch/arm/boot/compressed/head-sa1100.S | 4 -
> arch/arm/configs/badge4_defconfig | 105 -----
> arch/arm/configs/cerfcube_defconfig | 73 ---
> arch/arm/configs/hackkit_defconfig | 48 --
> arch/arm/configs/lart_defconfig | 64 ---
> arch/arm/configs/pleb_defconfig | 53 ---
> arch/arm/configs/shannon_defconfig | 45 --
> arch/arm/configs/simpad_defconfig | 100 -----
> arch/arm/mach-sa1100/Kconfig | 111 -----
> arch/arm/mach-sa1100/Makefile | 21 -
> arch/arm/mach-sa1100/badge4.c | 338 --------------
> arch/arm/mach-sa1100/cerf.c | 181 --------
> arch/arm/mach-sa1100/h3100.c | 140 ------
> arch/arm/mach-sa1100/hackkit.c | 184 --------
> arch/arm/mach-sa1100/include/mach/badge4.h | 71 ---
> arch/arm/mach-sa1100/include/mach/cerf.h | 20 -
> .../arm/mach-sa1100/include/mach/nanoengine.h | 48 --
> arch/arm/mach-sa1100/include/mach/shannon.h | 40 --
> arch/arm/mach-sa1100/include/mach/simpad.h | 159 -------
> arch/arm/mach-sa1100/lart.c | 177 --------
> arch/arm/mach-sa1100/nanoengine.c | 136 ------
> arch/arm/mach-sa1100/pci-nanoengine.c | 191 --------
> arch/arm/mach-sa1100/pleb.c | 148 ------
> arch/arm/mach-sa1100/shannon.c | 157 -------
> arch/arm/mach-sa1100/simpad.c | 423 ------------------
> drivers/cpufreq/sa1110-cpufreq.c | 6 -
> drivers/mfd/Kconfig | 2 +-
Acked-by: Lee Jones <lee@kernel.org>
> drivers/pcmcia/sa1100_generic.c | 5 +-
> drivers/pcmcia/sa1100_h3600.c | 2 +-
> drivers/pcmcia/sa1111_generic.c | 4 -
> drivers/usb/host/ohci-sa1111.c | 5 +-
> drivers/video/fbdev/sa1100fb.c | 1 -
> 34 files changed, 4 insertions(+), 3075 deletions(-)
> delete mode 100644 arch/arm/configs/badge4_defconfig
> delete mode 100644 arch/arm/configs/cerfcube_defconfig
> delete mode 100644 arch/arm/configs/hackkit_defconfig
> delete mode 100644 arch/arm/configs/lart_defconfig
> delete mode 100644 arch/arm/configs/pleb_defconfig
> delete mode 100644 arch/arm/configs/shannon_defconfig
> delete mode 100644 arch/arm/configs/simpad_defconfig
> delete mode 100644 arch/arm/mach-sa1100/badge4.c
> delete mode 100644 arch/arm/mach-sa1100/cerf.c
> delete mode 100644 arch/arm/mach-sa1100/h3100.c
> delete mode 100644 arch/arm/mach-sa1100/hackkit.c
> delete mode 100644 arch/arm/mach-sa1100/include/mach/badge4.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/cerf.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/nanoengine.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/shannon.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/simpad.h
> delete mode 100644 arch/arm/mach-sa1100/lart.c
> delete mode 100644 arch/arm/mach-sa1100/nanoengine.c
> delete mode 100644 arch/arm/mach-sa1100/pci-nanoengine.c
> delete mode 100644 arch/arm/mach-sa1100/pleb.c
> delete mode 100644 arch/arm/mach-sa1100/shannon.c
> delete mode 100644 arch/arm/mach-sa1100/simpad.c
--
Lee Jones [李琼斯]
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
@ 2022-10-31 15:18 ` Lee Jones
0 siblings, 0 replies; 55+ messages in thread
From: Lee Jones @ 2022-10-31 15:18 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
linux-kernel, Arnd Bergmann, Peter Chubb, Stefan Eletzhofer,
Rafael J. Wysocki, Viresh Kumar, Dominik Brodowski, Alan Stern,
Greg Kroah-Hartman, Helge Deller, linux-pm, linux-usb,
linux-fbdev, dri-devel
On Fri, 21 Oct 2022, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
> Simpad machines were all marked as unused as there are no known users
> left. Remove all of these, along with references to them in defconfig
> files and drivers.
>
> Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
> and Jornada 720, each of which had one person still using them, with
> Collie also being supported in Qemu.
>
> Cc: Peter Chubb <peter.chubb@unsw.edu.au>
> Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> MAINTAINERS | 11 -
> arch/arm/Kconfig | 6 -
> arch/arm/boot/compressed/head-sa1100.S | 4 -
> arch/arm/configs/badge4_defconfig | 105 -----
> arch/arm/configs/cerfcube_defconfig | 73 ---
> arch/arm/configs/hackkit_defconfig | 48 --
> arch/arm/configs/lart_defconfig | 64 ---
> arch/arm/configs/pleb_defconfig | 53 ---
> arch/arm/configs/shannon_defconfig | 45 --
> arch/arm/configs/simpad_defconfig | 100 -----
> arch/arm/mach-sa1100/Kconfig | 111 -----
> arch/arm/mach-sa1100/Makefile | 21 -
> arch/arm/mach-sa1100/badge4.c | 338 --------------
> arch/arm/mach-sa1100/cerf.c | 181 --------
> arch/arm/mach-sa1100/h3100.c | 140 ------
> arch/arm/mach-sa1100/hackkit.c | 184 --------
> arch/arm/mach-sa1100/include/mach/badge4.h | 71 ---
> arch/arm/mach-sa1100/include/mach/cerf.h | 20 -
> .../arm/mach-sa1100/include/mach/nanoengine.h | 48 --
> arch/arm/mach-sa1100/include/mach/shannon.h | 40 --
> arch/arm/mach-sa1100/include/mach/simpad.h | 159 -------
> arch/arm/mach-sa1100/lart.c | 177 --------
> arch/arm/mach-sa1100/nanoengine.c | 136 ------
> arch/arm/mach-sa1100/pci-nanoengine.c | 191 --------
> arch/arm/mach-sa1100/pleb.c | 148 ------
> arch/arm/mach-sa1100/shannon.c | 157 -------
> arch/arm/mach-sa1100/simpad.c | 423 ------------------
> drivers/cpufreq/sa1110-cpufreq.c | 6 -
> drivers/mfd/Kconfig | 2 +-
Acked-by: Lee Jones <lee@kernel.org>
> drivers/pcmcia/sa1100_generic.c | 5 +-
> drivers/pcmcia/sa1100_h3600.c | 2 +-
> drivers/pcmcia/sa1111_generic.c | 4 -
> drivers/usb/host/ohci-sa1111.c | 5 +-
> drivers/video/fbdev/sa1100fb.c | 1 -
> 34 files changed, 4 insertions(+), 3075 deletions(-)
> delete mode 100644 arch/arm/configs/badge4_defconfig
> delete mode 100644 arch/arm/configs/cerfcube_defconfig
> delete mode 100644 arch/arm/configs/hackkit_defconfig
> delete mode 100644 arch/arm/configs/lart_defconfig
> delete mode 100644 arch/arm/configs/pleb_defconfig
> delete mode 100644 arch/arm/configs/shannon_defconfig
> delete mode 100644 arch/arm/configs/simpad_defconfig
> delete mode 100644 arch/arm/mach-sa1100/badge4.c
> delete mode 100644 arch/arm/mach-sa1100/cerf.c
> delete mode 100644 arch/arm/mach-sa1100/h3100.c
> delete mode 100644 arch/arm/mach-sa1100/hackkit.c
> delete mode 100644 arch/arm/mach-sa1100/include/mach/badge4.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/cerf.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/nanoengine.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/shannon.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/simpad.h
> delete mode 100644 arch/arm/mach-sa1100/lart.c
> delete mode 100644 arch/arm/mach-sa1100/nanoengine.c
> delete mode 100644 arch/arm/mach-sa1100/pci-nanoengine.c
> delete mode 100644 arch/arm/mach-sa1100/pleb.c
> delete mode 100644 arch/arm/mach-sa1100/shannon.c
> delete mode 100644 arch/arm/mach-sa1100/simpad.c
--
Lee Jones [李琼斯]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
@ 2022-10-31 15:18 ` Lee Jones
0 siblings, 0 replies; 55+ messages in thread
From: Lee Jones @ 2022-10-31 15:18 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Stefan Eletzhofer, linux-fbdev, linux-usb, Arnd Bergmann,
Rafael J. Wysocki, Viresh Kumar, linux-pm, Russell King,
Dominik Brodowski, linux-kernel, Lubomir Rintel, Peter Chubb,
Alan Stern, dri-devel, Greg Kroah-Hartman, Helge Deller,
linux-arm-kernel
On Fri, 21 Oct 2022, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
> Simpad machines were all marked as unused as there are no known users
> left. Remove all of these, along with references to them in defconfig
> files and drivers.
>
> Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
> and Jornada 720, each of which had one person still using them, with
> Collie also being supported in Qemu.
>
> Cc: Peter Chubb <peter.chubb@unsw.edu.au>
> Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> MAINTAINERS | 11 -
> arch/arm/Kconfig | 6 -
> arch/arm/boot/compressed/head-sa1100.S | 4 -
> arch/arm/configs/badge4_defconfig | 105 -----
> arch/arm/configs/cerfcube_defconfig | 73 ---
> arch/arm/configs/hackkit_defconfig | 48 --
> arch/arm/configs/lart_defconfig | 64 ---
> arch/arm/configs/pleb_defconfig | 53 ---
> arch/arm/configs/shannon_defconfig | 45 --
> arch/arm/configs/simpad_defconfig | 100 -----
> arch/arm/mach-sa1100/Kconfig | 111 -----
> arch/arm/mach-sa1100/Makefile | 21 -
> arch/arm/mach-sa1100/badge4.c | 338 --------------
> arch/arm/mach-sa1100/cerf.c | 181 --------
> arch/arm/mach-sa1100/h3100.c | 140 ------
> arch/arm/mach-sa1100/hackkit.c | 184 --------
> arch/arm/mach-sa1100/include/mach/badge4.h | 71 ---
> arch/arm/mach-sa1100/include/mach/cerf.h | 20 -
> .../arm/mach-sa1100/include/mach/nanoengine.h | 48 --
> arch/arm/mach-sa1100/include/mach/shannon.h | 40 --
> arch/arm/mach-sa1100/include/mach/simpad.h | 159 -------
> arch/arm/mach-sa1100/lart.c | 177 --------
> arch/arm/mach-sa1100/nanoengine.c | 136 ------
> arch/arm/mach-sa1100/pci-nanoengine.c | 191 --------
> arch/arm/mach-sa1100/pleb.c | 148 ------
> arch/arm/mach-sa1100/shannon.c | 157 -------
> arch/arm/mach-sa1100/simpad.c | 423 ------------------
> drivers/cpufreq/sa1110-cpufreq.c | 6 -
> drivers/mfd/Kconfig | 2 +-
Acked-by: Lee Jones <lee@kernel.org>
> drivers/pcmcia/sa1100_generic.c | 5 +-
> drivers/pcmcia/sa1100_h3600.c | 2 +-
> drivers/pcmcia/sa1111_generic.c | 4 -
> drivers/usb/host/ohci-sa1111.c | 5 +-
> drivers/video/fbdev/sa1100fb.c | 1 -
> 34 files changed, 4 insertions(+), 3075 deletions(-)
> delete mode 100644 arch/arm/configs/badge4_defconfig
> delete mode 100644 arch/arm/configs/cerfcube_defconfig
> delete mode 100644 arch/arm/configs/hackkit_defconfig
> delete mode 100644 arch/arm/configs/lart_defconfig
> delete mode 100644 arch/arm/configs/pleb_defconfig
> delete mode 100644 arch/arm/configs/shannon_defconfig
> delete mode 100644 arch/arm/configs/simpad_defconfig
> delete mode 100644 arch/arm/mach-sa1100/badge4.c
> delete mode 100644 arch/arm/mach-sa1100/cerf.c
> delete mode 100644 arch/arm/mach-sa1100/h3100.c
> delete mode 100644 arch/arm/mach-sa1100/hackkit.c
> delete mode 100644 arch/arm/mach-sa1100/include/mach/badge4.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/cerf.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/nanoengine.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/shannon.h
> delete mode 100644 arch/arm/mach-sa1100/include/mach/simpad.h
> delete mode 100644 arch/arm/mach-sa1100/lart.c
> delete mode 100644 arch/arm/mach-sa1100/nanoengine.c
> delete mode 100644 arch/arm/mach-sa1100/pci-nanoengine.c
> delete mode 100644 arch/arm/mach-sa1100/pleb.c
> delete mode 100644 arch/arm/mach-sa1100/shannon.c
> delete mode 100644 arch/arm/mach-sa1100/simpad.c
--
Lee Jones [李琼斯]
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
2022-10-21 15:49 ` Arnd Bergmann
(?)
@ 2022-10-31 19:55 ` Linus Walleij
-1 siblings, 0 replies; 55+ messages in thread
From: Linus Walleij @ 2022-10-31 19:55 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Lubomir Rintel, linux-kernel,
Arnd Bergmann, Peter Chubb, Stefan Eletzhofer, Rafael J. Wysocki,
Viresh Kumar, Lee Jones, Dominik Brodowski, Alan Stern,
Greg Kroah-Hartman, Helge Deller, linux-pm, linux-usb,
linux-fbdev, dri-devel
On Fri, Oct 21, 2022 at 5:55 PM Arnd Bergmann <arnd@kernel.org> wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
> Simpad machines were all marked as unused as there are no known users
> left. Remove all of these, along with references to them in defconfig
> files and drivers.
>
> Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
> and Jornada 720, each of which had one person still using them, with
> Collie also being supported in Qemu.
>
> Cc: Peter Chubb <peter.chubb@unsw.edu.au>
> Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
@ 2022-10-31 19:55 ` Linus Walleij
0 siblings, 0 replies; 55+ messages in thread
From: Linus Walleij @ 2022-10-31 19:55 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Lubomir Rintel, linux-kernel,
Arnd Bergmann, Peter Chubb, Stefan Eletzhofer, Rafael J. Wysocki,
Viresh Kumar, Lee Jones, Dominik Brodowski, Alan Stern,
Greg Kroah-Hartman, Helge Deller, linux-pm, linux-usb,
linux-fbdev, dri-devel
On Fri, Oct 21, 2022 at 5:55 PM Arnd Bergmann <arnd@kernel.org> wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
> Simpad machines were all marked as unused as there are no known users
> left. Remove all of these, along with references to them in defconfig
> files and drivers.
>
> Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
> and Jornada 720, each of which had one person still using them, with
> Collie also being supported in Qemu.
>
> Cc: Peter Chubb <peter.chubb@unsw.edu.au>
> Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 02/11] ARM: sa1100: remove unused board files
@ 2022-10-31 19:55 ` Linus Walleij
0 siblings, 0 replies; 55+ messages in thread
From: Linus Walleij @ 2022-10-31 19:55 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Stefan Eletzhofer, linux-fbdev, linux-usb, Arnd Bergmann,
Rafael J. Wysocki, Viresh Kumar, Helge Deller, Lee Jones,
Russell King, Dominik Brodowski, linux-kernel, Lubomir Rintel,
Peter Chubb, Alan Stern, dri-devel, Greg Kroah-Hartman, linux-pm,
linux-arm-kernel
On Fri, Oct 21, 2022 at 5:55 PM Arnd Bergmann <arnd@kernel.org> wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
> Simpad machines were all marked as unused as there are no known users
> left. Remove all of these, along with references to them in defconfig
> files and drivers.
>
> Four machines remain now: Assabet, Collie (Zaurus SL5500), iPAQ H3600
> and Jornada 720, each of which had one person still using them, with
> Collie also being supported in Qemu.
>
> Cc: Peter Chubb <peter.chubb@unsw.edu.au>
> Cc: Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH 03/11] ARM: sa1100: remove irda references
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann
From: Arnd Bergmann <arnd@arndb.de>
IRDA support is long gone, so there is no need to declare the
platform device structure.
See-also: d64c2a76123f ("staging: irda: remove the irda network stack and drivers")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-sa1100/assabet.c | 1 -
arch/arm/mach-sa1100/collie.c | 1 -
arch/arm/mach-sa1100/h3600.c | 1 -
include/linux/platform_data/irda-sa11x0.h | 17 -----------------
4 files changed, 20 deletions(-)
delete mode 100644 include/linux/platform_data/irda-sa11x0.h
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 9919e0f32c4b..a71bdc634876 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -38,7 +38,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
-#include <linux/platform_data/irda-sa11x0.h>
#include <asm/mach/map.h>
#include <mach/assabet.h>
#include <linux/platform_data/mfd-mcp-sa11x0.h>
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 14c33ed05318..92c9ea7d7d25 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -44,7 +44,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
-#include <linux/platform_data/irda-sa11x0.h>
#include <asm/hardware/scoop.h>
#include <asm/mach/sharpsl_param.h>
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index baf529117b26..05aa707e239e 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -14,7 +14,6 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <linux/platform_data/irda-sa11x0.h>
#include <mach/h3xxx.h>
#include <mach/irqs.h>
diff --git a/include/linux/platform_data/irda-sa11x0.h b/include/linux/platform_data/irda-sa11x0.h
deleted file mode 100644
index 7db59c917575..000000000000
--- a/include/linux/platform_data/irda-sa11x0.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/include/asm/mach/irda.h
- *
- * Copyright (C) 2004 Russell King.
- */
-#ifndef __ASM_ARM_MACH_IRDA_H
-#define __ASM_ARM_MACH_IRDA_H
-
-struct irda_platform_data {
- int (*startup)(struct device *);
- void (*shutdown)(struct device *);
- int (*set_power)(struct device *, unsigned int state);
- void (*set_speed)(struct device *, unsigned int speed);
-};
-
-#endif
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 03/11] ARM: sa1100: remove irda references
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann
From: Arnd Bergmann <arnd@arndb.de>
IRDA support is long gone, so there is no need to declare the
platform device structure.
See-also: d64c2a76123f ("staging: irda: remove the irda network stack and drivers")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-sa1100/assabet.c | 1 -
arch/arm/mach-sa1100/collie.c | 1 -
arch/arm/mach-sa1100/h3600.c | 1 -
include/linux/platform_data/irda-sa11x0.h | 17 -----------------
4 files changed, 20 deletions(-)
delete mode 100644 include/linux/platform_data/irda-sa11x0.h
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 9919e0f32c4b..a71bdc634876 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -38,7 +38,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
-#include <linux/platform_data/irda-sa11x0.h>
#include <asm/mach/map.h>
#include <mach/assabet.h>
#include <linux/platform_data/mfd-mcp-sa11x0.h>
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 14c33ed05318..92c9ea7d7d25 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -44,7 +44,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
-#include <linux/platform_data/irda-sa11x0.h>
#include <asm/hardware/scoop.h>
#include <asm/mach/sharpsl_param.h>
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index baf529117b26..05aa707e239e 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -14,7 +14,6 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <linux/platform_data/irda-sa11x0.h>
#include <mach/h3xxx.h>
#include <mach/irqs.h>
diff --git a/include/linux/platform_data/irda-sa11x0.h b/include/linux/platform_data/irda-sa11x0.h
deleted file mode 100644
index 7db59c917575..000000000000
--- a/include/linux/platform_data/irda-sa11x0.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * arch/arm/include/asm/mach/irda.h
- *
- * Copyright (C) 2004 Russell King.
- */
-#ifndef __ASM_ARM_MACH_IRDA_H
-#define __ASM_ARM_MACH_IRDA_H
-
-struct irda_platform_data {
- int (*startup)(struct device *);
- void (*shutdown)(struct device *);
- int (*set_power)(struct device *, unsigned int state);
- void (*set_speed)(struct device *, unsigned int speed);
-};
-
-#endif
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 55+ messages in thread
* [PATCH 04/11] ARM: sa1100: make cpufreq driver build standalone
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Rafael J. Wysocki, Viresh Kumar
Cc: linux-kernel, Arnd Bergmann, linux-pm
From: Arnd Bergmann <arnd@arndb.de>
Commit 59a2e613d07f ("cpufreq: sa11x0: move cpufreq driver
to drivers/cpufreq") added an unnecessary reference to
mach/generic.h. Just remove it again after moving the code
into the corresponding driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-sa1100/generic.c | 32 ---------------------
arch/arm/mach-sa1100/generic.h | 4 ---
arch/arm/mach-sa1100/include/mach/generic.h | 1 -
drivers/cpufreq/sa1110-cpufreq.c | 32 +++++++++++++++++++++
4 files changed, 32 insertions(+), 37 deletions(-)
delete mode 100644 arch/arm/mach-sa1100/include/mach/generic.h
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 6c21f214cd60..424f08eece20 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -39,38 +39,6 @@
#include "generic.h"
#include <clocksource/pxa.h>
-#define NR_FREQS 16
-
-/*
- * This table is setup for a 3.6864MHz Crystal.
- */
-struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
- { .frequency = 59000, /* 59.0 MHz */},
- { .frequency = 73700, /* 73.7 MHz */},
- { .frequency = 88500, /* 88.5 MHz */},
- { .frequency = 103200, /* 103.2 MHz */},
- { .frequency = 118000, /* 118.0 MHz */},
- { .frequency = 132700, /* 132.7 MHz */},
- { .frequency = 147500, /* 147.5 MHz */},
- { .frequency = 162200, /* 162.2 MHz */},
- { .frequency = 176900, /* 176.9 MHz */},
- { .frequency = 191700, /* 191.7 MHz */},
- { .frequency = 206400, /* 206.4 MHz */},
- { .frequency = 221200, /* 221.2 MHz */},
- { .frequency = 235900, /* 235.9 MHz */},
- { .frequency = 250700, /* 250.7 MHz */},
- { .frequency = 265400, /* 265.4 MHz */},
- { .frequency = 280200, /* 280.2 MHz */},
- { .frequency = CPUFREQ_TABLE_END, },
-};
-
-unsigned int sa11x0_getspeed(unsigned int cpu)
-{
- if (cpu)
- return 0;
- return sa11x0_freq_table[PPCR & 0xf].frequency;
-}
-
/*
* Default power-off for SA1100
*/
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h
index 158a4fd5ca24..cc891c57d306 100644
--- a/arch/arm/mach-sa1100/generic.h
+++ b/arch/arm/mach-sa1100/generic.h
@@ -4,7 +4,6 @@
*
* Author: Nicolas Pitre
*/
-#include <linux/cpufreq.h>
#include <linux/reboot.h>
extern void sa1100_timer_init(void);
@@ -21,9 +20,6 @@ extern void sa11x0_init_late(void);
extern void sa1110_mb_enable(void);
extern void sa1110_mb_disable(void);
-extern struct cpufreq_frequency_table sa11x0_freq_table[];
-extern unsigned int sa11x0_getspeed(unsigned int cpu);
-
struct flash_platform_data;
struct resource;
diff --git a/arch/arm/mach-sa1100/include/mach/generic.h b/arch/arm/mach-sa1100/include/mach/generic.h
deleted file mode 100644
index 665542e0c9e2..000000000000
--- a/arch/arm/mach-sa1100/include/mach/generic.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../generic.h"
diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c
index bb7f591a8b05..ce636c1147a6 100644
--- a/drivers/cpufreq/sa1110-cpufreq.c
+++ b/drivers/cpufreq/sa1110-cpufreq.c
@@ -29,6 +29,38 @@
#undef DEBUG
+#define NR_FREQS 16
+
+/*
+ * This table is setup for a 3.6864MHz Crystal.
+ */
+static struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
+ { .frequency = 59000, /* 59.0 MHz */},
+ { .frequency = 73700, /* 73.7 MHz */},
+ { .frequency = 88500, /* 88.5 MHz */},
+ { .frequency = 103200, /* 103.2 MHz */},
+ { .frequency = 118000, /* 118.0 MHz */},
+ { .frequency = 132700, /* 132.7 MHz */},
+ { .frequency = 147500, /* 147.5 MHz */},
+ { .frequency = 162200, /* 162.2 MHz */},
+ { .frequency = 176900, /* 176.9 MHz */},
+ { .frequency = 191700, /* 191.7 MHz */},
+ { .frequency = 206400, /* 206.4 MHz */},
+ { .frequency = 221200, /* 221.2 MHz */},
+ { .frequency = 235900, /* 235.9 MHz */},
+ { .frequency = 250700, /* 250.7 MHz */},
+ { .frequency = 265400, /* 265.4 MHz */},
+ { .frequency = 280200, /* 280.2 MHz */},
+ { .frequency = CPUFREQ_TABLE_END, },
+};
+
+static unsigned int sa11x0_getspeed(unsigned int cpu)
+{
+ if (cpu)
+ return 0;
+ return sa11x0_freq_table[PPCR & 0xf].frequency;
+}
+
struct sdram_params {
const char name[20];
u_char rows; /* bits */
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 04/11] ARM: sa1100: make cpufreq driver build standalone
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Rafael J. Wysocki, Viresh Kumar
Cc: linux-kernel, Arnd Bergmann, linux-pm
From: Arnd Bergmann <arnd@arndb.de>
Commit 59a2e613d07f ("cpufreq: sa11x0: move cpufreq driver
to drivers/cpufreq") added an unnecessary reference to
mach/generic.h. Just remove it again after moving the code
into the corresponding driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-sa1100/generic.c | 32 ---------------------
arch/arm/mach-sa1100/generic.h | 4 ---
arch/arm/mach-sa1100/include/mach/generic.h | 1 -
drivers/cpufreq/sa1110-cpufreq.c | 32 +++++++++++++++++++++
4 files changed, 32 insertions(+), 37 deletions(-)
delete mode 100644 arch/arm/mach-sa1100/include/mach/generic.h
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 6c21f214cd60..424f08eece20 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -39,38 +39,6 @@
#include "generic.h"
#include <clocksource/pxa.h>
-#define NR_FREQS 16
-
-/*
- * This table is setup for a 3.6864MHz Crystal.
- */
-struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
- { .frequency = 59000, /* 59.0 MHz */},
- { .frequency = 73700, /* 73.7 MHz */},
- { .frequency = 88500, /* 88.5 MHz */},
- { .frequency = 103200, /* 103.2 MHz */},
- { .frequency = 118000, /* 118.0 MHz */},
- { .frequency = 132700, /* 132.7 MHz */},
- { .frequency = 147500, /* 147.5 MHz */},
- { .frequency = 162200, /* 162.2 MHz */},
- { .frequency = 176900, /* 176.9 MHz */},
- { .frequency = 191700, /* 191.7 MHz */},
- { .frequency = 206400, /* 206.4 MHz */},
- { .frequency = 221200, /* 221.2 MHz */},
- { .frequency = 235900, /* 235.9 MHz */},
- { .frequency = 250700, /* 250.7 MHz */},
- { .frequency = 265400, /* 265.4 MHz */},
- { .frequency = 280200, /* 280.2 MHz */},
- { .frequency = CPUFREQ_TABLE_END, },
-};
-
-unsigned int sa11x0_getspeed(unsigned int cpu)
-{
- if (cpu)
- return 0;
- return sa11x0_freq_table[PPCR & 0xf].frequency;
-}
-
/*
* Default power-off for SA1100
*/
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h
index 158a4fd5ca24..cc891c57d306 100644
--- a/arch/arm/mach-sa1100/generic.h
+++ b/arch/arm/mach-sa1100/generic.h
@@ -4,7 +4,6 @@
*
* Author: Nicolas Pitre
*/
-#include <linux/cpufreq.h>
#include <linux/reboot.h>
extern void sa1100_timer_init(void);
@@ -21,9 +20,6 @@ extern void sa11x0_init_late(void);
extern void sa1110_mb_enable(void);
extern void sa1110_mb_disable(void);
-extern struct cpufreq_frequency_table sa11x0_freq_table[];
-extern unsigned int sa11x0_getspeed(unsigned int cpu);
-
struct flash_platform_data;
struct resource;
diff --git a/arch/arm/mach-sa1100/include/mach/generic.h b/arch/arm/mach-sa1100/include/mach/generic.h
deleted file mode 100644
index 665542e0c9e2..000000000000
--- a/arch/arm/mach-sa1100/include/mach/generic.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../generic.h"
diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c
index bb7f591a8b05..ce636c1147a6 100644
--- a/drivers/cpufreq/sa1110-cpufreq.c
+++ b/drivers/cpufreq/sa1110-cpufreq.c
@@ -29,6 +29,38 @@
#undef DEBUG
+#define NR_FREQS 16
+
+/*
+ * This table is setup for a 3.6864MHz Crystal.
+ */
+static struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
+ { .frequency = 59000, /* 59.0 MHz */},
+ { .frequency = 73700, /* 73.7 MHz */},
+ { .frequency = 88500, /* 88.5 MHz */},
+ { .frequency = 103200, /* 103.2 MHz */},
+ { .frequency = 118000, /* 118.0 MHz */},
+ { .frequency = 132700, /* 132.7 MHz */},
+ { .frequency = 147500, /* 147.5 MHz */},
+ { .frequency = 162200, /* 162.2 MHz */},
+ { .frequency = 176900, /* 176.9 MHz */},
+ { .frequency = 191700, /* 191.7 MHz */},
+ { .frequency = 206400, /* 206.4 MHz */},
+ { .frequency = 221200, /* 221.2 MHz */},
+ { .frequency = 235900, /* 235.9 MHz */},
+ { .frequency = 250700, /* 250.7 MHz */},
+ { .frequency = 265400, /* 265.4 MHz */},
+ { .frequency = 280200, /* 280.2 MHz */},
+ { .frequency = CPUFREQ_TABLE_END, },
+};
+
+static unsigned int sa11x0_getspeed(unsigned int cpu)
+{
+ if (cpu)
+ return 0;
+ return sa11x0_freq_table[PPCR & 0xf].frequency;
+}
+
struct sdram_params {
const char name[20];
u_char rows; /* bits */
--
2.29.2
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^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH 04/11] ARM: sa1100: make cpufreq driver build standalone
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-25 5:07 ` Viresh Kumar
-1 siblings, 0 replies; 55+ messages in thread
From: Viresh Kumar @ 2022-10-25 5:07 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Rafael J. Wysocki, linux-kernel, Arnd Bergmann, linux-pm
On 21-10-22, 17:49, Arnd Bergmann wrote:
> --- a/drivers/cpufreq/sa1110-cpufreq.c
> +++ b/drivers/cpufreq/sa1110-cpufreq.c
> @@ -29,6 +29,38 @@
>
> #undef DEBUG
>
> +#define NR_FREQS 16
> +
> +/*
> + * This table is setup for a 3.6864MHz Crystal.
> + */
> +static struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
> + { .frequency = 59000, /* 59.0 MHz */},
> + { .frequency = 73700, /* 73.7 MHz */},
> + { .frequency = 88500, /* 88.5 MHz */},
> + { .frequency = 103200, /* 103.2 MHz */},
> + { .frequency = 118000, /* 118.0 MHz */},
> + { .frequency = 132700, /* 132.7 MHz */},
> + { .frequency = 147500, /* 147.5 MHz */},
> + { .frequency = 162200, /* 162.2 MHz */},
> + { .frequency = 176900, /* 176.9 MHz */},
> + { .frequency = 191700, /* 191.7 MHz */},
> + { .frequency = 206400, /* 206.4 MHz */},
> + { .frequency = 221200, /* 221.2 MHz */},
> + { .frequency = 235900, /* 235.9 MHz */},
> + { .frequency = 250700, /* 250.7 MHz */},
> + { .frequency = 265400, /* 265.4 MHz */},
> + { .frequency = 280200, /* 280.2 MHz */},
> + { .frequency = CPUFREQ_TABLE_END, },
> +};
> +
> +static unsigned int sa11x0_getspeed(unsigned int cpu)
> +{
> + if (cpu)
> + return 0;
> + return sa11x0_freq_table[PPCR & 0xf].frequency;
> +}
> +
> struct sdram_params {
> const char name[20];
> u_char rows; /* bits */
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [PATCH 04/11] ARM: sa1100: make cpufreq driver build standalone
@ 2022-10-25 5:07 ` Viresh Kumar
0 siblings, 0 replies; 55+ messages in thread
From: Viresh Kumar @ 2022-10-25 5:07 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Rafael J. Wysocki, linux-kernel, Arnd Bergmann, linux-pm
On 21-10-22, 17:49, Arnd Bergmann wrote:
> --- a/drivers/cpufreq/sa1110-cpufreq.c
> +++ b/drivers/cpufreq/sa1110-cpufreq.c
> @@ -29,6 +29,38 @@
>
> #undef DEBUG
>
> +#define NR_FREQS 16
> +
> +/*
> + * This table is setup for a 3.6864MHz Crystal.
> + */
> +static struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
> + { .frequency = 59000, /* 59.0 MHz */},
> + { .frequency = 73700, /* 73.7 MHz */},
> + { .frequency = 88500, /* 88.5 MHz */},
> + { .frequency = 103200, /* 103.2 MHz */},
> + { .frequency = 118000, /* 118.0 MHz */},
> + { .frequency = 132700, /* 132.7 MHz */},
> + { .frequency = 147500, /* 147.5 MHz */},
> + { .frequency = 162200, /* 162.2 MHz */},
> + { .frequency = 176900, /* 176.9 MHz */},
> + { .frequency = 191700, /* 191.7 MHz */},
> + { .frequency = 206400, /* 206.4 MHz */},
> + { .frequency = 221200, /* 221.2 MHz */},
> + { .frequency = 235900, /* 235.9 MHz */},
> + { .frequency = 250700, /* 250.7 MHz */},
> + { .frequency = 265400, /* 265.4 MHz */},
> + { .frequency = 280200, /* 280.2 MHz */},
> + { .frequency = CPUFREQ_TABLE_END, },
> +};
> +
> +static unsigned int sa11x0_getspeed(unsigned int cpu)
> +{
> + if (cpu)
> + return 0;
> + return sa11x0_freq_table[PPCR & 0xf].frequency;
> +}
> +
> struct sdram_params {
> const char name[20];
> u_char rows; /* bits */
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 04/11] ARM: sa1100: make cpufreq driver build standalone
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-25 8:28 ` Russell King (Oracle)
-1 siblings, 0 replies; 55+ messages in thread
From: Russell King (Oracle) @ 2022-10-25 8:28 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Linus Walleij, Lubomir Rintel,
Rafael J. Wysocki, Viresh Kumar, linux-kernel, Arnd Bergmann,
linux-pm
On Fri, Oct 21, 2022 at 05:49:34PM +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> Commit 59a2e613d07f ("cpufreq: sa11x0: move cpufreq driver
> to drivers/cpufreq") added an unnecessary reference to
> mach/generic.h. Just remove it again after moving the code
> into the corresponding driver.
So how does arch/arm/mach-sa1100/clock.c get the MPLL rate with this
change?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [PATCH 04/11] ARM: sa1100: make cpufreq driver build standalone
@ 2022-10-25 8:28 ` Russell King (Oracle)
0 siblings, 0 replies; 55+ messages in thread
From: Russell King (Oracle) @ 2022-10-25 8:28 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Linus Walleij, Lubomir Rintel,
Rafael J. Wysocki, Viresh Kumar, linux-kernel, Arnd Bergmann,
linux-pm
On Fri, Oct 21, 2022 at 05:49:34PM +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> Commit 59a2e613d07f ("cpufreq: sa11x0: move cpufreq driver
> to drivers/cpufreq") added an unnecessary reference to
> mach/generic.h. Just remove it again after moving the code
> into the corresponding driver.
So how does arch/arm/mach-sa1100/clock.c get the MPLL rate with this
change?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [PATCH 04/11] ARM: sa1100: make cpufreq driver build standalone
2022-10-25 8:28 ` Russell King (Oracle)
@ 2022-10-25 10:14 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-25 10:14 UTC (permalink / raw)
To: Russell King, Arnd Bergmann
Cc: linux-arm-kernel, Linus Walleij, Lubomir Rintel,
Rafael J . Wysocki, Viresh Kumar, linux-kernel, linux-pm
On Tue, Oct 25, 2022, at 10:28, Russell King (Oracle) wrote:
> On Fri, Oct 21, 2022 at 05:49:34PM +0200, Arnd Bergmann wrote:
>> From: Arnd Bergmann <arnd@arndb.de>
>>
>> Commit 59a2e613d07f ("cpufreq: sa11x0: move cpufreq driver
>> to drivers/cpufreq") added an unnecessary reference to
>> mach/generic.h. Just remove it again after moving the code
>> into the corresponding driver.
>
> So how does arch/arm/mach-sa1100/clock.c get the MPLL rate with this
> change?
You are right, that's broken. It works for the defconfigs that
enable the cpufreq driver, but it seems I need to improve my
randconfig build testing to make sure I find problems like this
sooner.
I don't think anything depends on this patch, so I've dropped
it from my series now.
Thanks,
Arnd
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [PATCH 04/11] ARM: sa1100: make cpufreq driver build standalone
@ 2022-10-25 10:14 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-25 10:14 UTC (permalink / raw)
To: Russell King, Arnd Bergmann
Cc: linux-arm-kernel, Linus Walleij, Lubomir Rintel,
Rafael J . Wysocki, Viresh Kumar, linux-kernel, linux-pm
On Tue, Oct 25, 2022, at 10:28, Russell King (Oracle) wrote:
> On Fri, Oct 21, 2022 at 05:49:34PM +0200, Arnd Bergmann wrote:
>> From: Arnd Bergmann <arnd@arndb.de>
>>
>> Commit 59a2e613d07f ("cpufreq: sa11x0: move cpufreq driver
>> to drivers/cpufreq") added an unnecessary reference to
>> mach/generic.h. Just remove it again after moving the code
>> into the corresponding driver.
>
> So how does arch/arm/mach-sa1100/clock.c get the MPLL rate with this
> change?
You are right, that's broken. It works for the defconfigs that
enable the cpufreq driver, but it seems I need to improve my
randconfig build testing to make sure I find problems like this
sooner.
I don't think anything depends on this patch, so I've dropped
it from my series now.
Thanks,
Arnd
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [PATCH 04/11] ARM: sa1100: make cpufreq driver build standalone
2022-10-25 10:14 ` Arnd Bergmann
@ 2022-10-25 12:12 ` Russell King (Oracle)
-1 siblings, 0 replies; 55+ messages in thread
From: Russell King (Oracle) @ 2022-10-25 12:12 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Arnd Bergmann, linux-arm-kernel, Linus Walleij, Lubomir Rintel,
Rafael J . Wysocki, Viresh Kumar, linux-kernel, linux-pm
On Tue, Oct 25, 2022 at 12:14:19PM +0200, Arnd Bergmann wrote:
> On Tue, Oct 25, 2022, at 10:28, Russell King (Oracle) wrote:
> > On Fri, Oct 21, 2022 at 05:49:34PM +0200, Arnd Bergmann wrote:
> >> From: Arnd Bergmann <arnd@arndb.de>
> >>
> >> Commit 59a2e613d07f ("cpufreq: sa11x0: move cpufreq driver
> >> to drivers/cpufreq") added an unnecessary reference to
> >> mach/generic.h. Just remove it again after moving the code
> >> into the corresponding driver.
> >
> > So how does arch/arm/mach-sa1100/clock.c get the MPLL rate with this
> > change?
>
> You are right, that's broken. It works for the defconfigs that
> enable the cpufreq driver,
Umm. How? I think your testing must be seriously flawed!
You add sa11x0_getspeed() to the sa1110 cpufreq driver as a static
function, which means it won't be visible to clock.c - and clock.c
is always built, and always references sa11x0_getspeed()... so you
should be getting an unconditional build failure at link time and
a compiler warning that sa11x0_getspeed() is not declared.
Are you not seeing that?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [PATCH 04/11] ARM: sa1100: make cpufreq driver build standalone
@ 2022-10-25 12:12 ` Russell King (Oracle)
0 siblings, 0 replies; 55+ messages in thread
From: Russell King (Oracle) @ 2022-10-25 12:12 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Arnd Bergmann, linux-arm-kernel, Linus Walleij, Lubomir Rintel,
Rafael J . Wysocki, Viresh Kumar, linux-kernel, linux-pm
On Tue, Oct 25, 2022 at 12:14:19PM +0200, Arnd Bergmann wrote:
> On Tue, Oct 25, 2022, at 10:28, Russell King (Oracle) wrote:
> > On Fri, Oct 21, 2022 at 05:49:34PM +0200, Arnd Bergmann wrote:
> >> From: Arnd Bergmann <arnd@arndb.de>
> >>
> >> Commit 59a2e613d07f ("cpufreq: sa11x0: move cpufreq driver
> >> to drivers/cpufreq") added an unnecessary reference to
> >> mach/generic.h. Just remove it again after moving the code
> >> into the corresponding driver.
> >
> > So how does arch/arm/mach-sa1100/clock.c get the MPLL rate with this
> > change?
>
> You are right, that's broken. It works for the defconfigs that
> enable the cpufreq driver,
Umm. How? I think your testing must be seriously flawed!
You add sa11x0_getspeed() to the sa1110 cpufreq driver as a static
function, which means it won't be visible to clock.c - and clock.c
is always built, and always references sa11x0_getspeed()... so you
should be getting an unconditional build failure at link time and
a compiler warning that sa11x0_getspeed() is not declared.
Are you not seeing that?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH 05/11] cpufreq: remove sa1100 driver
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Rafael J. Wysocki, Viresh Kumar
Cc: linux-kernel, Arnd Bergmann, Randy Dunlap, linux-pm
From: Arnd Bergmann <arnd@arndb.de>
The sa11xx platform has two cpufreq drivers, one for the older
StrongARM1100 SoC, and a second one for StrongARM1110. After
the removal of most SA1100 based machines, this driver is unused,
and only the sa1110-cpufreq driver remains.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/cpufreq/Kconfig | 2 +-
drivers/cpufreq/Kconfig.arm | 3 -
drivers/cpufreq/Makefile | 1 -
drivers/cpufreq/sa1100-cpufreq.c | 206 -------------------------------
4 files changed, 1 insertion(+), 211 deletions(-)
delete mode 100644 drivers/cpufreq/sa1100-cpufreq.c
diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
index 2a84fc63371e..8466f78651fc 100644
--- a/drivers/cpufreq/Kconfig
+++ b/drivers/cpufreq/Kconfig
@@ -37,7 +37,7 @@ config CPU_FREQ_STAT
choice
prompt "Default CPUFreq governor"
- default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1100_CPUFREQ || ARM_SA1110_CPUFREQ
+ default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1110_CPUFREQ
default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if ARM64 || ARM
default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if X86_INTEL_PSTATE && SMP
default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 82e5de1f6f8c..8f7a1065f344 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -277,9 +277,6 @@ config ARM_S5PV210_CPUFREQ
If in doubt, say N.
-config ARM_SA1100_CPUFREQ
- bool
-
config ARM_SA1110_CPUFREQ
bool
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 49b98c62c5af..8de99b213146 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -78,7 +78,6 @@ obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o
obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += s3c24xx-cpufreq.o
obj-$(CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS) += s3c24xx-cpufreq-debugfs.o
obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o
-obj-$(CONFIG_ARM_SA1100_CPUFREQ) += sa1100-cpufreq.o
obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o
obj-$(CONFIG_ARM_SCMI_CPUFREQ) += scmi-cpufreq.o
obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o
diff --git a/drivers/cpufreq/sa1100-cpufreq.c b/drivers/cpufreq/sa1100-cpufreq.c
deleted file mode 100644
index 252b9fc26124..000000000000
--- a/drivers/cpufreq/sa1100-cpufreq.c
+++ /dev/null
@@ -1,206 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * cpu-sa1100.c: clock scaling for the SA1100
- *
- * Copyright (C) 2000 2001, The Delft University of Technology
- *
- * Authors:
- * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
- * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
- * - major rewrite for linux-2.3.99
- * - rewritten for the more generic power management scheme in
- * linux-2.4.5-rmk1
- *
- * This software has been developed while working on the LART
- * computing board (http://www.lartmaker.nl/), which is
- * sponsored by the Mobile Multi-media Communications
- * (http://www.mobimedia.org/) and Ubiquitous Communications
- * (http://www.ubicom.tudelft.nl/) projects.
- *
- * The authors can be reached at:
- *
- * Erik Mouw
- * Information and Communication Theory Group
- * Faculty of Information Technology and Systems
- * Delft University of Technology
- * P.O. Box 5031
- * 2600 GA Delft
- * The Netherlands
- *
- * Theory of operations
- * ====================
- *
- * Clock scaling can be used to lower the power consumption of the CPU
- * core. This will give you a somewhat longer running time.
- *
- * The SA-1100 has a single register to change the core clock speed:
- *
- * PPCR 0x90020014 PLL config
- *
- * However, the DRAM timings are closely related to the core clock
- * speed, so we need to change these, too. The used registers are:
- *
- * MDCNFG 0xA0000000 DRAM config
- * MDCAS0 0xA0000004 Access waveform
- * MDCAS1 0xA0000008 Access waveform
- * MDCAS2 0xA000000C Access waveform
- *
- * Care must be taken to change the DRAM parameters the correct way,
- * because otherwise the DRAM becomes unusable and the kernel will
- * crash.
- *
- * The simple solution to avoid a kernel crash is to put the actual
- * clock change in ROM and jump to that code from the kernel. The main
- * disadvantage is that the ROM has to be modified, which is not
- * possible on all SA-1100 platforms. Another disadvantage is that
- * jumping to ROM makes clock switching unnecessary complicated.
- *
- * The idea behind this driver is that the memory configuration can be
- * changed while running from DRAM (even with interrupts turned on!)
- * as long as all re-configuration steps yield a valid DRAM
- * configuration. The advantages are clear: it will run on all SA-1100
- * platforms, and the code is very simple.
- *
- * If you really want to understand what is going on in
- * sa1100_update_dram_timings(), you'll have to read sections 8.2,
- * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
- * Developers Manual" (available for free from Intel).
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/io.h>
-
-#include <asm/cputype.h>
-
-#include <mach/generic.h>
-#include <mach/hardware.h>
-
-struct sa1100_dram_regs {
- int speed;
- u32 mdcnfg;
- u32 mdcas0;
- u32 mdcas1;
- u32 mdcas2;
-};
-
-
-static struct cpufreq_driver sa1100_driver;
-
-static struct sa1100_dram_regs sa1100_dram_settings[] = {
- /*speed, mdcnfg, mdcas0, mdcas1, mdcas2, clock freq */
- { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 59.0 MHz */
- { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 73.7 MHz */
- { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 88.5 MHz */
- {103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 103.2 MHz */
- {118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff},/* 118.0 MHz */
- {132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff},/* 132.7 MHz */
- {147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff},/* 147.5 MHz */
- {162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff},/* 162.2 MHz */
- {176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff},/* 176.9 MHz */
- {191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff},/* 191.7 MHz */
- {206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 206.4 MHz */
- {221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 221.2 MHz */
- {235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1},/* 235.9 MHz */
- {250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 250.7 MHz */
- {265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 265.4 MHz */
- {280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87},/* 280.2 MHz */
- { 0, 0, 0, 0, 0 } /* last entry */
-};
-
-static void sa1100_update_dram_timings(int current_speed, int new_speed)
-{
- struct sa1100_dram_regs *settings = sa1100_dram_settings;
-
- /* find speed */
- while (settings->speed != 0) {
- if (new_speed == settings->speed)
- break;
-
- settings++;
- }
-
- if (settings->speed == 0) {
- panic("%s: couldn't find dram setting for speed %d\n",
- __func__, new_speed);
- }
-
- /* No risk, no fun: run with interrupts on! */
- if (new_speed > current_speed) {
- /* We're going FASTER, so first relax the memory
- * timings before changing the core frequency
- */
-
- /* Half the memory access clock */
- MDCNFG |= MDCNFG_CDB2;
-
- /* The order of these statements IS important, keep 8
- * pulses!!
- */
- MDCAS2 = settings->mdcas2;
- MDCAS1 = settings->mdcas1;
- MDCAS0 = settings->mdcas0;
- MDCNFG = settings->mdcnfg;
- } else {
- /* We're going SLOWER: first decrease the core
- * frequency and then tighten the memory settings.
- */
-
- /* Half the memory access clock */
- MDCNFG |= MDCNFG_CDB2;
-
- /* The order of these statements IS important, keep 8
- * pulses!!
- */
- MDCAS0 = settings->mdcas0;
- MDCAS1 = settings->mdcas1;
- MDCAS2 = settings->mdcas2;
- MDCNFG = settings->mdcnfg;
- }
-}
-
-static int sa1100_target(struct cpufreq_policy *policy, unsigned int ppcr)
-{
- unsigned int cur = sa11x0_getspeed(0);
- unsigned int new_freq;
-
- new_freq = sa11x0_freq_table[ppcr].frequency;
-
- if (new_freq > cur)
- sa1100_update_dram_timings(cur, new_freq);
-
- PPCR = ppcr;
-
- if (new_freq < cur)
- sa1100_update_dram_timings(cur, new_freq);
-
- return 0;
-}
-
-static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
-{
- cpufreq_generic_init(policy, sa11x0_freq_table, 0);
- return 0;
-}
-
-static struct cpufreq_driver sa1100_driver __refdata = {
- .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
- CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
- .verify = cpufreq_generic_frequency_table_verify,
- .target_index = sa1100_target,
- .get = sa11x0_getspeed,
- .init = sa1100_cpu_init,
- .name = "sa1100",
-};
-
-static int __init sa1100_dram_init(void)
-{
- if (cpu_is_sa1100())
- return cpufreq_register_driver(&sa1100_driver);
- else
- return -ENODEV;
-}
-
-arch_initcall(sa1100_dram_init);
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 05/11] cpufreq: remove sa1100 driver
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Rafael J. Wysocki, Viresh Kumar
Cc: linux-kernel, Arnd Bergmann, Randy Dunlap, linux-pm
From: Arnd Bergmann <arnd@arndb.de>
The sa11xx platform has two cpufreq drivers, one for the older
StrongARM1100 SoC, and a second one for StrongARM1110. After
the removal of most SA1100 based machines, this driver is unused,
and only the sa1110-cpufreq driver remains.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/cpufreq/Kconfig | 2 +-
drivers/cpufreq/Kconfig.arm | 3 -
drivers/cpufreq/Makefile | 1 -
drivers/cpufreq/sa1100-cpufreq.c | 206 -------------------------------
4 files changed, 1 insertion(+), 211 deletions(-)
delete mode 100644 drivers/cpufreq/sa1100-cpufreq.c
diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
index 2a84fc63371e..8466f78651fc 100644
--- a/drivers/cpufreq/Kconfig
+++ b/drivers/cpufreq/Kconfig
@@ -37,7 +37,7 @@ config CPU_FREQ_STAT
choice
prompt "Default CPUFreq governor"
- default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1100_CPUFREQ || ARM_SA1110_CPUFREQ
+ default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1110_CPUFREQ
default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if ARM64 || ARM
default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if X86_INTEL_PSTATE && SMP
default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 82e5de1f6f8c..8f7a1065f344 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -277,9 +277,6 @@ config ARM_S5PV210_CPUFREQ
If in doubt, say N.
-config ARM_SA1100_CPUFREQ
- bool
-
config ARM_SA1110_CPUFREQ
bool
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 49b98c62c5af..8de99b213146 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -78,7 +78,6 @@ obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o
obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += s3c24xx-cpufreq.o
obj-$(CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS) += s3c24xx-cpufreq-debugfs.o
obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o
-obj-$(CONFIG_ARM_SA1100_CPUFREQ) += sa1100-cpufreq.o
obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o
obj-$(CONFIG_ARM_SCMI_CPUFREQ) += scmi-cpufreq.o
obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o
diff --git a/drivers/cpufreq/sa1100-cpufreq.c b/drivers/cpufreq/sa1100-cpufreq.c
deleted file mode 100644
index 252b9fc26124..000000000000
--- a/drivers/cpufreq/sa1100-cpufreq.c
+++ /dev/null
@@ -1,206 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * cpu-sa1100.c: clock scaling for the SA1100
- *
- * Copyright (C) 2000 2001, The Delft University of Technology
- *
- * Authors:
- * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
- * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
- * - major rewrite for linux-2.3.99
- * - rewritten for the more generic power management scheme in
- * linux-2.4.5-rmk1
- *
- * This software has been developed while working on the LART
- * computing board (http://www.lartmaker.nl/), which is
- * sponsored by the Mobile Multi-media Communications
- * (http://www.mobimedia.org/) and Ubiquitous Communications
- * (http://www.ubicom.tudelft.nl/) projects.
- *
- * The authors can be reached at:
- *
- * Erik Mouw
- * Information and Communication Theory Group
- * Faculty of Information Technology and Systems
- * Delft University of Technology
- * P.O. Box 5031
- * 2600 GA Delft
- * The Netherlands
- *
- * Theory of operations
- * ====================
- *
- * Clock scaling can be used to lower the power consumption of the CPU
- * core. This will give you a somewhat longer running time.
- *
- * The SA-1100 has a single register to change the core clock speed:
- *
- * PPCR 0x90020014 PLL config
- *
- * However, the DRAM timings are closely related to the core clock
- * speed, so we need to change these, too. The used registers are:
- *
- * MDCNFG 0xA0000000 DRAM config
- * MDCAS0 0xA0000004 Access waveform
- * MDCAS1 0xA0000008 Access waveform
- * MDCAS2 0xA000000C Access waveform
- *
- * Care must be taken to change the DRAM parameters the correct way,
- * because otherwise the DRAM becomes unusable and the kernel will
- * crash.
- *
- * The simple solution to avoid a kernel crash is to put the actual
- * clock change in ROM and jump to that code from the kernel. The main
- * disadvantage is that the ROM has to be modified, which is not
- * possible on all SA-1100 platforms. Another disadvantage is that
- * jumping to ROM makes clock switching unnecessary complicated.
- *
- * The idea behind this driver is that the memory configuration can be
- * changed while running from DRAM (even with interrupts turned on!)
- * as long as all re-configuration steps yield a valid DRAM
- * configuration. The advantages are clear: it will run on all SA-1100
- * platforms, and the code is very simple.
- *
- * If you really want to understand what is going on in
- * sa1100_update_dram_timings(), you'll have to read sections 8.2,
- * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
- * Developers Manual" (available for free from Intel).
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/io.h>
-
-#include <asm/cputype.h>
-
-#include <mach/generic.h>
-#include <mach/hardware.h>
-
-struct sa1100_dram_regs {
- int speed;
- u32 mdcnfg;
- u32 mdcas0;
- u32 mdcas1;
- u32 mdcas2;
-};
-
-
-static struct cpufreq_driver sa1100_driver;
-
-static struct sa1100_dram_regs sa1100_dram_settings[] = {
- /*speed, mdcnfg, mdcas0, mdcas1, mdcas2, clock freq */
- { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 59.0 MHz */
- { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 73.7 MHz */
- { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 88.5 MHz */
- {103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 103.2 MHz */
- {118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff},/* 118.0 MHz */
- {132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff},/* 132.7 MHz */
- {147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff},/* 147.5 MHz */
- {162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff},/* 162.2 MHz */
- {176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff},/* 176.9 MHz */
- {191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff},/* 191.7 MHz */
- {206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 206.4 MHz */
- {221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 221.2 MHz */
- {235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1},/* 235.9 MHz */
- {250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 250.7 MHz */
- {265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 265.4 MHz */
- {280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87},/* 280.2 MHz */
- { 0, 0, 0, 0, 0 } /* last entry */
-};
-
-static void sa1100_update_dram_timings(int current_speed, int new_speed)
-{
- struct sa1100_dram_regs *settings = sa1100_dram_settings;
-
- /* find speed */
- while (settings->speed != 0) {
- if (new_speed == settings->speed)
- break;
-
- settings++;
- }
-
- if (settings->speed == 0) {
- panic("%s: couldn't find dram setting for speed %d\n",
- __func__, new_speed);
- }
-
- /* No risk, no fun: run with interrupts on! */
- if (new_speed > current_speed) {
- /* We're going FASTER, so first relax the memory
- * timings before changing the core frequency
- */
-
- /* Half the memory access clock */
- MDCNFG |= MDCNFG_CDB2;
-
- /* The order of these statements IS important, keep 8
- * pulses!!
- */
- MDCAS2 = settings->mdcas2;
- MDCAS1 = settings->mdcas1;
- MDCAS0 = settings->mdcas0;
- MDCNFG = settings->mdcnfg;
- } else {
- /* We're going SLOWER: first decrease the core
- * frequency and then tighten the memory settings.
- */
-
- /* Half the memory access clock */
- MDCNFG |= MDCNFG_CDB2;
-
- /* The order of these statements IS important, keep 8
- * pulses!!
- */
- MDCAS0 = settings->mdcas0;
- MDCAS1 = settings->mdcas1;
- MDCAS2 = settings->mdcas2;
- MDCNFG = settings->mdcnfg;
- }
-}
-
-static int sa1100_target(struct cpufreq_policy *policy, unsigned int ppcr)
-{
- unsigned int cur = sa11x0_getspeed(0);
- unsigned int new_freq;
-
- new_freq = sa11x0_freq_table[ppcr].frequency;
-
- if (new_freq > cur)
- sa1100_update_dram_timings(cur, new_freq);
-
- PPCR = ppcr;
-
- if (new_freq < cur)
- sa1100_update_dram_timings(cur, new_freq);
-
- return 0;
-}
-
-static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
-{
- cpufreq_generic_init(policy, sa11x0_freq_table, 0);
- return 0;
-}
-
-static struct cpufreq_driver sa1100_driver __refdata = {
- .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
- CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
- .verify = cpufreq_generic_frequency_table_verify,
- .target_index = sa1100_target,
- .get = sa11x0_getspeed,
- .init = sa1100_cpu_init,
- .name = "sa1100",
-};
-
-static int __init sa1100_dram_init(void)
-{
- if (cpu_is_sa1100())
- return cpufreq_register_driver(&sa1100_driver);
- else
- return -ENODEV;
-}
-
-arch_initcall(sa1100_dram_init);
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH 05/11] cpufreq: remove sa1100 driver
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-25 5:07 ` Viresh Kumar
-1 siblings, 0 replies; 55+ messages in thread
From: Viresh Kumar @ 2022-10-25 5:07 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Rafael J. Wysocki, linux-kernel, Arnd Bergmann, Randy Dunlap,
linux-pm
On 21-10-22, 17:49, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The sa11xx platform has two cpufreq drivers, one for the older
> StrongARM1100 SoC, and a second one for StrongARM1110. After
> the removal of most SA1100 based machines, this driver is unused,
> and only the sa1110-cpufreq driver remains.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> drivers/cpufreq/Kconfig | 2 +-
> drivers/cpufreq/Kconfig.arm | 3 -
> drivers/cpufreq/Makefile | 1 -
> drivers/cpufreq/sa1100-cpufreq.c | 206 -------------------------------
> 4 files changed, 1 insertion(+), 211 deletions(-)
> delete mode 100644 drivers/cpufreq/sa1100-cpufreq.c
>
> diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
> index 2a84fc63371e..8466f78651fc 100644
> --- a/drivers/cpufreq/Kconfig
> +++ b/drivers/cpufreq/Kconfig
> @@ -37,7 +37,7 @@ config CPU_FREQ_STAT
>
> choice
> prompt "Default CPUFreq governor"
> - default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1100_CPUFREQ || ARM_SA1110_CPUFREQ
> + default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1110_CPUFREQ
> default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if ARM64 || ARM
> default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if X86_INTEL_PSTATE && SMP
> default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 82e5de1f6f8c..8f7a1065f344 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -277,9 +277,6 @@ config ARM_S5PV210_CPUFREQ
>
> If in doubt, say N.
>
> -config ARM_SA1100_CPUFREQ
> - bool
> -
> config ARM_SA1110_CPUFREQ
> bool
>
> diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
> index 49b98c62c5af..8de99b213146 100644
> --- a/drivers/cpufreq/Makefile
> +++ b/drivers/cpufreq/Makefile
> @@ -78,7 +78,6 @@ obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o
> obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += s3c24xx-cpufreq.o
> obj-$(CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS) += s3c24xx-cpufreq-debugfs.o
> obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o
> -obj-$(CONFIG_ARM_SA1100_CPUFREQ) += sa1100-cpufreq.o
> obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o
> obj-$(CONFIG_ARM_SCMI_CPUFREQ) += scmi-cpufreq.o
> obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o
> diff --git a/drivers/cpufreq/sa1100-cpufreq.c b/drivers/cpufreq/sa1100-cpufreq.c
> deleted file mode 100644
> index 252b9fc26124..000000000000
> --- a/drivers/cpufreq/sa1100-cpufreq.c
> +++ /dev/null
> @@ -1,206 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-or-later
> -/*
> - * cpu-sa1100.c: clock scaling for the SA1100
> - *
> - * Copyright (C) 2000 2001, The Delft University of Technology
> - *
> - * Authors:
> - * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
> - * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
> - * - major rewrite for linux-2.3.99
> - * - rewritten for the more generic power management scheme in
> - * linux-2.4.5-rmk1
> - *
> - * This software has been developed while working on the LART
> - * computing board (http://www.lartmaker.nl/), which is
> - * sponsored by the Mobile Multi-media Communications
> - * (http://www.mobimedia.org/) and Ubiquitous Communications
> - * (http://www.ubicom.tudelft.nl/) projects.
> - *
> - * The authors can be reached at:
> - *
> - * Erik Mouw
> - * Information and Communication Theory Group
> - * Faculty of Information Technology and Systems
> - * Delft University of Technology
> - * P.O. Box 5031
> - * 2600 GA Delft
> - * The Netherlands
> - *
> - * Theory of operations
> - * ====================
> - *
> - * Clock scaling can be used to lower the power consumption of the CPU
> - * core. This will give you a somewhat longer running time.
> - *
> - * The SA-1100 has a single register to change the core clock speed:
> - *
> - * PPCR 0x90020014 PLL config
> - *
> - * However, the DRAM timings are closely related to the core clock
> - * speed, so we need to change these, too. The used registers are:
> - *
> - * MDCNFG 0xA0000000 DRAM config
> - * MDCAS0 0xA0000004 Access waveform
> - * MDCAS1 0xA0000008 Access waveform
> - * MDCAS2 0xA000000C Access waveform
> - *
> - * Care must be taken to change the DRAM parameters the correct way,
> - * because otherwise the DRAM becomes unusable and the kernel will
> - * crash.
> - *
> - * The simple solution to avoid a kernel crash is to put the actual
> - * clock change in ROM and jump to that code from the kernel. The main
> - * disadvantage is that the ROM has to be modified, which is not
> - * possible on all SA-1100 platforms. Another disadvantage is that
> - * jumping to ROM makes clock switching unnecessary complicated.
> - *
> - * The idea behind this driver is that the memory configuration can be
> - * changed while running from DRAM (even with interrupts turned on!)
> - * as long as all re-configuration steps yield a valid DRAM
> - * configuration. The advantages are clear: it will run on all SA-1100
> - * platforms, and the code is very simple.
> - *
> - * If you really want to understand what is going on in
> - * sa1100_update_dram_timings(), you'll have to read sections 8.2,
> - * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
> - * Developers Manual" (available for free from Intel).
> - */
> -
> -#include <linux/kernel.h>
> -#include <linux/types.h>
> -#include <linux/init.h>
> -#include <linux/cpufreq.h>
> -#include <linux/io.h>
> -
> -#include <asm/cputype.h>
> -
> -#include <mach/generic.h>
> -#include <mach/hardware.h>
> -
> -struct sa1100_dram_regs {
> - int speed;
> - u32 mdcnfg;
> - u32 mdcas0;
> - u32 mdcas1;
> - u32 mdcas2;
> -};
> -
> -
> -static struct cpufreq_driver sa1100_driver;
> -
> -static struct sa1100_dram_regs sa1100_dram_settings[] = {
> - /*speed, mdcnfg, mdcas0, mdcas1, mdcas2, clock freq */
> - { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 59.0 MHz */
> - { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 73.7 MHz */
> - { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 88.5 MHz */
> - {103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 103.2 MHz */
> - {118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff},/* 118.0 MHz */
> - {132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff},/* 132.7 MHz */
> - {147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff},/* 147.5 MHz */
> - {162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff},/* 162.2 MHz */
> - {176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff},/* 176.9 MHz */
> - {191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff},/* 191.7 MHz */
> - {206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 206.4 MHz */
> - {221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 221.2 MHz */
> - {235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1},/* 235.9 MHz */
> - {250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 250.7 MHz */
> - {265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 265.4 MHz */
> - {280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87},/* 280.2 MHz */
> - { 0, 0, 0, 0, 0 } /* last entry */
> -};
> -
> -static void sa1100_update_dram_timings(int current_speed, int new_speed)
> -{
> - struct sa1100_dram_regs *settings = sa1100_dram_settings;
> -
> - /* find speed */
> - while (settings->speed != 0) {
> - if (new_speed == settings->speed)
> - break;
> -
> - settings++;
> - }
> -
> - if (settings->speed == 0) {
> - panic("%s: couldn't find dram setting for speed %d\n",
> - __func__, new_speed);
> - }
> -
> - /* No risk, no fun: run with interrupts on! */
> - if (new_speed > current_speed) {
> - /* We're going FASTER, so first relax the memory
> - * timings before changing the core frequency
> - */
> -
> - /* Half the memory access clock */
> - MDCNFG |= MDCNFG_CDB2;
> -
> - /* The order of these statements IS important, keep 8
> - * pulses!!
> - */
> - MDCAS2 = settings->mdcas2;
> - MDCAS1 = settings->mdcas1;
> - MDCAS0 = settings->mdcas0;
> - MDCNFG = settings->mdcnfg;
> - } else {
> - /* We're going SLOWER: first decrease the core
> - * frequency and then tighten the memory settings.
> - */
> -
> - /* Half the memory access clock */
> - MDCNFG |= MDCNFG_CDB2;
> -
> - /* The order of these statements IS important, keep 8
> - * pulses!!
> - */
> - MDCAS0 = settings->mdcas0;
> - MDCAS1 = settings->mdcas1;
> - MDCAS2 = settings->mdcas2;
> - MDCNFG = settings->mdcnfg;
> - }
> -}
> -
> -static int sa1100_target(struct cpufreq_policy *policy, unsigned int ppcr)
> -{
> - unsigned int cur = sa11x0_getspeed(0);
> - unsigned int new_freq;
> -
> - new_freq = sa11x0_freq_table[ppcr].frequency;
> -
> - if (new_freq > cur)
> - sa1100_update_dram_timings(cur, new_freq);
> -
> - PPCR = ppcr;
> -
> - if (new_freq < cur)
> - sa1100_update_dram_timings(cur, new_freq);
> -
> - return 0;
> -}
> -
> -static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
> -{
> - cpufreq_generic_init(policy, sa11x0_freq_table, 0);
> - return 0;
> -}
> -
> -static struct cpufreq_driver sa1100_driver __refdata = {
> - .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
> - CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
> - .verify = cpufreq_generic_frequency_table_verify,
> - .target_index = sa1100_target,
> - .get = sa11x0_getspeed,
> - .init = sa1100_cpu_init,
> - .name = "sa1100",
> -};
> -
> -static int __init sa1100_dram_init(void)
> -{
> - if (cpu_is_sa1100())
> - return cpufreq_register_driver(&sa1100_driver);
> - else
> - return -ENODEV;
> -}
> -
> -arch_initcall(sa1100_dram_init);
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [PATCH 05/11] cpufreq: remove sa1100 driver
@ 2022-10-25 5:07 ` Viresh Kumar
0 siblings, 0 replies; 55+ messages in thread
From: Viresh Kumar @ 2022-10-25 5:07 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Rafael J. Wysocki, linux-kernel, Arnd Bergmann, Randy Dunlap,
linux-pm
On 21-10-22, 17:49, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The sa11xx platform has two cpufreq drivers, one for the older
> StrongARM1100 SoC, and a second one for StrongARM1110. After
> the removal of most SA1100 based machines, this driver is unused,
> and only the sa1110-cpufreq driver remains.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> drivers/cpufreq/Kconfig | 2 +-
> drivers/cpufreq/Kconfig.arm | 3 -
> drivers/cpufreq/Makefile | 1 -
> drivers/cpufreq/sa1100-cpufreq.c | 206 -------------------------------
> 4 files changed, 1 insertion(+), 211 deletions(-)
> delete mode 100644 drivers/cpufreq/sa1100-cpufreq.c
>
> diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
> index 2a84fc63371e..8466f78651fc 100644
> --- a/drivers/cpufreq/Kconfig
> +++ b/drivers/cpufreq/Kconfig
> @@ -37,7 +37,7 @@ config CPU_FREQ_STAT
>
> choice
> prompt "Default CPUFreq governor"
> - default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1100_CPUFREQ || ARM_SA1110_CPUFREQ
> + default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1110_CPUFREQ
> default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if ARM64 || ARM
> default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if X86_INTEL_PSTATE && SMP
> default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 82e5de1f6f8c..8f7a1065f344 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -277,9 +277,6 @@ config ARM_S5PV210_CPUFREQ
>
> If in doubt, say N.
>
> -config ARM_SA1100_CPUFREQ
> - bool
> -
> config ARM_SA1110_CPUFREQ
> bool
>
> diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
> index 49b98c62c5af..8de99b213146 100644
> --- a/drivers/cpufreq/Makefile
> +++ b/drivers/cpufreq/Makefile
> @@ -78,7 +78,6 @@ obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o
> obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += s3c24xx-cpufreq.o
> obj-$(CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS) += s3c24xx-cpufreq-debugfs.o
> obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o
> -obj-$(CONFIG_ARM_SA1100_CPUFREQ) += sa1100-cpufreq.o
> obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o
> obj-$(CONFIG_ARM_SCMI_CPUFREQ) += scmi-cpufreq.o
> obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o
> diff --git a/drivers/cpufreq/sa1100-cpufreq.c b/drivers/cpufreq/sa1100-cpufreq.c
> deleted file mode 100644
> index 252b9fc26124..000000000000
> --- a/drivers/cpufreq/sa1100-cpufreq.c
> +++ /dev/null
> @@ -1,206 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-or-later
> -/*
> - * cpu-sa1100.c: clock scaling for the SA1100
> - *
> - * Copyright (C) 2000 2001, The Delft University of Technology
> - *
> - * Authors:
> - * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
> - * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
> - * - major rewrite for linux-2.3.99
> - * - rewritten for the more generic power management scheme in
> - * linux-2.4.5-rmk1
> - *
> - * This software has been developed while working on the LART
> - * computing board (http://www.lartmaker.nl/), which is
> - * sponsored by the Mobile Multi-media Communications
> - * (http://www.mobimedia.org/) and Ubiquitous Communications
> - * (http://www.ubicom.tudelft.nl/) projects.
> - *
> - * The authors can be reached at:
> - *
> - * Erik Mouw
> - * Information and Communication Theory Group
> - * Faculty of Information Technology and Systems
> - * Delft University of Technology
> - * P.O. Box 5031
> - * 2600 GA Delft
> - * The Netherlands
> - *
> - * Theory of operations
> - * ====================
> - *
> - * Clock scaling can be used to lower the power consumption of the CPU
> - * core. This will give you a somewhat longer running time.
> - *
> - * The SA-1100 has a single register to change the core clock speed:
> - *
> - * PPCR 0x90020014 PLL config
> - *
> - * However, the DRAM timings are closely related to the core clock
> - * speed, so we need to change these, too. The used registers are:
> - *
> - * MDCNFG 0xA0000000 DRAM config
> - * MDCAS0 0xA0000004 Access waveform
> - * MDCAS1 0xA0000008 Access waveform
> - * MDCAS2 0xA000000C Access waveform
> - *
> - * Care must be taken to change the DRAM parameters the correct way,
> - * because otherwise the DRAM becomes unusable and the kernel will
> - * crash.
> - *
> - * The simple solution to avoid a kernel crash is to put the actual
> - * clock change in ROM and jump to that code from the kernel. The main
> - * disadvantage is that the ROM has to be modified, which is not
> - * possible on all SA-1100 platforms. Another disadvantage is that
> - * jumping to ROM makes clock switching unnecessary complicated.
> - *
> - * The idea behind this driver is that the memory configuration can be
> - * changed while running from DRAM (even with interrupts turned on!)
> - * as long as all re-configuration steps yield a valid DRAM
> - * configuration. The advantages are clear: it will run on all SA-1100
> - * platforms, and the code is very simple.
> - *
> - * If you really want to understand what is going on in
> - * sa1100_update_dram_timings(), you'll have to read sections 8.2,
> - * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
> - * Developers Manual" (available for free from Intel).
> - */
> -
> -#include <linux/kernel.h>
> -#include <linux/types.h>
> -#include <linux/init.h>
> -#include <linux/cpufreq.h>
> -#include <linux/io.h>
> -
> -#include <asm/cputype.h>
> -
> -#include <mach/generic.h>
> -#include <mach/hardware.h>
> -
> -struct sa1100_dram_regs {
> - int speed;
> - u32 mdcnfg;
> - u32 mdcas0;
> - u32 mdcas1;
> - u32 mdcas2;
> -};
> -
> -
> -static struct cpufreq_driver sa1100_driver;
> -
> -static struct sa1100_dram_regs sa1100_dram_settings[] = {
> - /*speed, mdcnfg, mdcas0, mdcas1, mdcas2, clock freq */
> - { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 59.0 MHz */
> - { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 73.7 MHz */
> - { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 88.5 MHz */
> - {103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 103.2 MHz */
> - {118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff},/* 118.0 MHz */
> - {132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff},/* 132.7 MHz */
> - {147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff},/* 147.5 MHz */
> - {162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff},/* 162.2 MHz */
> - {176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff},/* 176.9 MHz */
> - {191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff},/* 191.7 MHz */
> - {206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 206.4 MHz */
> - {221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 221.2 MHz */
> - {235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1},/* 235.9 MHz */
> - {250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 250.7 MHz */
> - {265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 265.4 MHz */
> - {280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87},/* 280.2 MHz */
> - { 0, 0, 0, 0, 0 } /* last entry */
> -};
> -
> -static void sa1100_update_dram_timings(int current_speed, int new_speed)
> -{
> - struct sa1100_dram_regs *settings = sa1100_dram_settings;
> -
> - /* find speed */
> - while (settings->speed != 0) {
> - if (new_speed == settings->speed)
> - break;
> -
> - settings++;
> - }
> -
> - if (settings->speed == 0) {
> - panic("%s: couldn't find dram setting for speed %d\n",
> - __func__, new_speed);
> - }
> -
> - /* No risk, no fun: run with interrupts on! */
> - if (new_speed > current_speed) {
> - /* We're going FASTER, so first relax the memory
> - * timings before changing the core frequency
> - */
> -
> - /* Half the memory access clock */
> - MDCNFG |= MDCNFG_CDB2;
> -
> - /* The order of these statements IS important, keep 8
> - * pulses!!
> - */
> - MDCAS2 = settings->mdcas2;
> - MDCAS1 = settings->mdcas1;
> - MDCAS0 = settings->mdcas0;
> - MDCNFG = settings->mdcnfg;
> - } else {
> - /* We're going SLOWER: first decrease the core
> - * frequency and then tighten the memory settings.
> - */
> -
> - /* Half the memory access clock */
> - MDCNFG |= MDCNFG_CDB2;
> -
> - /* The order of these statements IS important, keep 8
> - * pulses!!
> - */
> - MDCAS0 = settings->mdcas0;
> - MDCAS1 = settings->mdcas1;
> - MDCAS2 = settings->mdcas2;
> - MDCNFG = settings->mdcnfg;
> - }
> -}
> -
> -static int sa1100_target(struct cpufreq_policy *policy, unsigned int ppcr)
> -{
> - unsigned int cur = sa11x0_getspeed(0);
> - unsigned int new_freq;
> -
> - new_freq = sa11x0_freq_table[ppcr].frequency;
> -
> - if (new_freq > cur)
> - sa1100_update_dram_timings(cur, new_freq);
> -
> - PPCR = ppcr;
> -
> - if (new_freq < cur)
> - sa1100_update_dram_timings(cur, new_freq);
> -
> - return 0;
> -}
> -
> -static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
> -{
> - cpufreq_generic_init(policy, sa11x0_freq_table, 0);
> - return 0;
> -}
> -
> -static struct cpufreq_driver sa1100_driver __refdata = {
> - .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
> - CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
> - .verify = cpufreq_generic_frequency_table_verify,
> - .target_index = sa1100_target,
> - .get = sa11x0_getspeed,
> - .init = sa1100_cpu_init,
> - .name = "sa1100",
> -};
> -
> -static int __init sa1100_dram_init(void)
> -{
> - if (cpu_is_sa1100())
> - return cpufreq_register_driver(&sa1100_driver);
> - else
> - return -ENODEV;
> -}
> -
> -arch_initcall(sa1100_dram_init);
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH 06/11] mtd: remove lart flash driver
2022-10-21 15:49 ` Arnd Bergmann
(?)
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra
Cc: linux-kernel, Arnd Bergmann, linux-mtd
From: Arnd Bergmann <arnd@arndb.de>
The sa1100 lart platform was removed, so its flash driver is
no longer useful.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/mtd/devices/Kconfig | 8 -
drivers/mtd/devices/Makefile | 1 -
drivers/mtd/devices/lart.c | 682 -----------------------------------
3 files changed, 691 deletions(-)
delete mode 100644 drivers/mtd/devices/lart.c
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
index 79cb981ececc..ff2f9e55ef28 100644
--- a/drivers/mtd/devices/Kconfig
+++ b/drivers/mtd/devices/Kconfig
@@ -136,14 +136,6 @@ config MTD_PHRAM
doesn't have access to, memory beyond the mem=xxx limit, nvram,
memory on the video card, etc...
-config MTD_LART
- tristate "28F160xx flash driver for LART"
- depends on SA1100_LART
- help
- This enables the flash driver for LART. Please note that you do
- not need any mapping/chip driver for LART. This one does it all
- for you, so go disable all of those if you enabled some of them (:
-
config MTD_MTDRAM
tristate "Test driver using RAM"
help
diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
index 0362cf6bdc67..d11eb2b8b6f8 100644
--- a/drivers/mtd/devices/Makefile
+++ b/drivers/mtd/devices/Makefile
@@ -9,7 +9,6 @@ obj-$(CONFIG_MTD_PHRAM) += phram.o
obj-$(CONFIG_MTD_PMC551) += pmc551.o
obj-$(CONFIG_MTD_MS02NV) += ms02-nv.o
obj-$(CONFIG_MTD_MTDRAM) += mtdram.o
-obj-$(CONFIG_MTD_LART) += lart.o
obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
obj-$(CONFIG_MTD_MCHP23K256) += mchp23k256.o
diff --git a/drivers/mtd/devices/lart.c b/drivers/mtd/devices/lart.c
deleted file mode 100644
index aecd441e4183..000000000000
--- a/drivers/mtd/devices/lart.c
+++ /dev/null
@@ -1,682 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/*
- * MTD driver for the 28F160F3 Flash Memory (non-CFI) on LART.
- *
- * Author: Abraham vd Merwe <abraham@2d3d.co.za>
- *
- * Copyright (c) 2001, 2d3D, Inc.
- *
- * References:
- *
- * [1] 3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- * - Order Number: 290644-005
- * - January 2000
- *
- * [2] MTD internal API documentation
- * - http://www.linux-mtd.infradead.org/
- *
- * Limitations:
- *
- * Even though this driver is written for 3 Volt Fast Boot
- * Block Flash Memory, it is rather specific to LART. With
- * Minor modifications, notably the without data/address line
- * mangling and different bus settings, etc. it should be
- * trivial to adapt to other platforms.
- *
- * If somebody would sponsor me a different board, I'll
- * adapt the driver (:
- */
-
-/* debugging */
-//#define LART_DEBUG
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-
-#ifndef CONFIG_SA1100_LART
-#error This is for LART architecture only
-#endif
-
-static char module_name[] = "lart";
-
-/*
- * These values is specific to 28Fxxxx3 flash memory.
- * See section 2.3.1 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define FLASH_BLOCKSIZE_PARAM (4096 * BUSWIDTH)
-#define FLASH_NUMBLOCKS_16m_PARAM 8
-#define FLASH_NUMBLOCKS_8m_PARAM 8
-
-/*
- * These values is specific to 28Fxxxx3 flash memory.
- * See section 2.3.2 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define FLASH_BLOCKSIZE_MAIN (32768 * BUSWIDTH)
-#define FLASH_NUMBLOCKS_16m_MAIN 31
-#define FLASH_NUMBLOCKS_8m_MAIN 15
-
-/*
- * These values are specific to LART
- */
-
-/* general */
-#define BUSWIDTH 4 /* don't change this - a lot of the code _will_ break if you change this */
-#define FLASH_OFFSET 0xe8000000 /* see linux/arch/arm/mach-sa1100/lart.c */
-
-/* blob */
-#define NUM_BLOB_BLOCKS FLASH_NUMBLOCKS_16m_PARAM
-#define PART_BLOB_START 0x00000000
-#define PART_BLOB_LEN (NUM_BLOB_BLOCKS * FLASH_BLOCKSIZE_PARAM)
-
-/* kernel */
-#define NUM_KERNEL_BLOCKS 7
-#define PART_KERNEL_START (PART_BLOB_START + PART_BLOB_LEN)
-#define PART_KERNEL_LEN (NUM_KERNEL_BLOCKS * FLASH_BLOCKSIZE_MAIN)
-
-/* initial ramdisk */
-#define NUM_INITRD_BLOCKS 24
-#define PART_INITRD_START (PART_KERNEL_START + PART_KERNEL_LEN)
-#define PART_INITRD_LEN (NUM_INITRD_BLOCKS * FLASH_BLOCKSIZE_MAIN)
-
-/*
- * See section 4.0 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define READ_ARRAY 0x00FF00FF /* Read Array/Reset */
-#define READ_ID_CODES 0x00900090 /* Read Identifier Codes */
-#define ERASE_SETUP 0x00200020 /* Block Erase */
-#define ERASE_CONFIRM 0x00D000D0 /* Block Erase and Program Resume */
-#define PGM_SETUP 0x00400040 /* Program */
-#define STATUS_READ 0x00700070 /* Read Status Register */
-#define STATUS_CLEAR 0x00500050 /* Clear Status Register */
-#define STATUS_BUSY 0x00800080 /* Write State Machine Status (WSMS) */
-#define STATUS_ERASE_ERR 0x00200020 /* Erase Status (ES) */
-#define STATUS_PGM_ERR 0x00100010 /* Program Status (PS) */
-
-/*
- * See section 4.2 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define FLASH_MANUFACTURER 0x00890089
-#define FLASH_DEVICE_8mbit_TOP 0x88f188f1
-#define FLASH_DEVICE_8mbit_BOTTOM 0x88f288f2
-#define FLASH_DEVICE_16mbit_TOP 0x88f388f3
-#define FLASH_DEVICE_16mbit_BOTTOM 0x88f488f4
-
-/***************************************************************************************************/
-
-/*
- * The data line mapping on LART is as follows:
- *
- * U2 CPU | U3 CPU
- * -------------------
- * 0 20 | 0 12
- * 1 22 | 1 14
- * 2 19 | 2 11
- * 3 17 | 3 9
- * 4 24 | 4 0
- * 5 26 | 5 2
- * 6 31 | 6 7
- * 7 29 | 7 5
- * 8 21 | 8 13
- * 9 23 | 9 15
- * 10 18 | 10 10
- * 11 16 | 11 8
- * 12 25 | 12 1
- * 13 27 | 13 3
- * 14 30 | 14 6
- * 15 28 | 15 4
- */
-
-/* Mangle data (x) */
-#define DATA_TO_FLASH(x) \
- ( \
- (((x) & 0x08009000) >> 11) + \
- (((x) & 0x00002000) >> 10) + \
- (((x) & 0x04004000) >> 8) + \
- (((x) & 0x00000010) >> 4) + \
- (((x) & 0x91000820) >> 3) + \
- (((x) & 0x22080080) >> 2) + \
- ((x) & 0x40000400) + \
- (((x) & 0x00040040) << 1) + \
- (((x) & 0x00110000) << 4) + \
- (((x) & 0x00220100) << 5) + \
- (((x) & 0x00800208) << 6) + \
- (((x) & 0x00400004) << 9) + \
- (((x) & 0x00000001) << 12) + \
- (((x) & 0x00000002) << 13) \
- )
-
-/* Unmangle data (x) */
-#define FLASH_TO_DATA(x) \
- ( \
- (((x) & 0x00010012) << 11) + \
- (((x) & 0x00000008) << 10) + \
- (((x) & 0x00040040) << 8) + \
- (((x) & 0x00000001) << 4) + \
- (((x) & 0x12200104) << 3) + \
- (((x) & 0x08820020) << 2) + \
- ((x) & 0x40000400) + \
- (((x) & 0x00080080) >> 1) + \
- (((x) & 0x01100000) >> 4) + \
- (((x) & 0x04402000) >> 5) + \
- (((x) & 0x20008200) >> 6) + \
- (((x) & 0x80000800) >> 9) + \
- (((x) & 0x00001000) >> 12) + \
- (((x) & 0x00004000) >> 13) \
- )
-
-/*
- * The address line mapping on LART is as follows:
- *
- * U3 CPU | U2 CPU
- * -------------------
- * 0 2 | 0 2
- * 1 3 | 1 3
- * 2 9 | 2 9
- * 3 13 | 3 8
- * 4 8 | 4 7
- * 5 12 | 5 6
- * 6 11 | 6 5
- * 7 10 | 7 4
- * 8 4 | 8 10
- * 9 5 | 9 11
- * 10 6 | 10 12
- * 11 7 | 11 13
- *
- * BOOT BLOCK BOUNDARY
- *
- * 12 15 | 12 15
- * 13 14 | 13 14
- * 14 16 | 14 16
- *
- * MAIN BLOCK BOUNDARY
- *
- * 15 17 | 15 18
- * 16 18 | 16 17
- * 17 20 | 17 20
- * 18 19 | 18 19
- * 19 21 | 19 21
- *
- * As we can see from above, the addresses aren't mangled across
- * block boundaries, so we don't need to worry about address
- * translations except for sending/reading commands during
- * initialization
- */
-
-/* Mangle address (x) on chip U2 */
-#define ADDR_TO_FLASH_U2(x) \
- ( \
- (((x) & 0x00000f00) >> 4) + \
- (((x) & 0x00042000) << 1) + \
- (((x) & 0x0009c003) << 2) + \
- (((x) & 0x00021080) << 3) + \
- (((x) & 0x00000010) << 4) + \
- (((x) & 0x00000040) << 5) + \
- (((x) & 0x00000024) << 7) + \
- (((x) & 0x00000008) << 10) \
- )
-
-/* Unmangle address (x) on chip U2 */
-#define FLASH_U2_TO_ADDR(x) \
- ( \
- (((x) << 4) & 0x00000f00) + \
- (((x) >> 1) & 0x00042000) + \
- (((x) >> 2) & 0x0009c003) + \
- (((x) >> 3) & 0x00021080) + \
- (((x) >> 4) & 0x00000010) + \
- (((x) >> 5) & 0x00000040) + \
- (((x) >> 7) & 0x00000024) + \
- (((x) >> 10) & 0x00000008) \
- )
-
-/* Mangle address (x) on chip U3 */
-#define ADDR_TO_FLASH_U3(x) \
- ( \
- (((x) & 0x00000080) >> 3) + \
- (((x) & 0x00000040) >> 1) + \
- (((x) & 0x00052020) << 1) + \
- (((x) & 0x00084f03) << 2) + \
- (((x) & 0x00029010) << 3) + \
- (((x) & 0x00000008) << 5) + \
- (((x) & 0x00000004) << 7) \
- )
-
-/* Unmangle address (x) on chip U3 */
-#define FLASH_U3_TO_ADDR(x) \
- ( \
- (((x) << 3) & 0x00000080) + \
- (((x) << 1) & 0x00000040) + \
- (((x) >> 1) & 0x00052020) + \
- (((x) >> 2) & 0x00084f03) + \
- (((x) >> 3) & 0x00029010) + \
- (((x) >> 5) & 0x00000008) + \
- (((x) >> 7) & 0x00000004) \
- )
-
-/***************************************************************************************************/
-
-static __u8 read8 (__u32 offset)
-{
- volatile __u8 *data = (__u8 *) (FLASH_OFFSET + offset);
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x -> 0x%.2x\n", __func__, offset, *data);
-#endif
- return (*data);
-}
-
-static __u32 read32 (__u32 offset)
-{
- volatile __u32 *data = (__u32 *) (FLASH_OFFSET + offset);
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x -> 0x%.8x\n", __func__, offset, *data);
-#endif
- return (*data);
-}
-
-static void write32 (__u32 x,__u32 offset)
-{
- volatile __u32 *data = (__u32 *) (FLASH_OFFSET + offset);
- *data = x;
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x <- 0x%.8x\n", __func__, offset, *data);
-#endif
-}
-
-/***************************************************************************************************/
-
-/*
- * Probe for 16mbit flash memory on a LART board without doing
- * too much damage. Since we need to write 1 dword to memory,
- * we're f**cked if this happens to be DRAM since we can't
- * restore the memory (otherwise we might exit Read Array mode).
- *
- * Returns 1 if we found 16mbit flash memory on LART, 0 otherwise.
- */
-static int flash_probe (void)
-{
- __u32 manufacturer,devtype;
-
- /* setup "Read Identifier Codes" mode */
- write32 (DATA_TO_FLASH (READ_ID_CODES),0x00000000);
-
- /* probe U2. U2/U3 returns the same data since the first 3
- * address lines is mangled in the same way */
- manufacturer = FLASH_TO_DATA (read32 (ADDR_TO_FLASH_U2 (0x00000000)));
- devtype = FLASH_TO_DATA (read32 (ADDR_TO_FLASH_U2 (0x00000001)));
-
- /* put the flash back into command mode */
- write32 (DATA_TO_FLASH (READ_ARRAY),0x00000000);
-
- return (manufacturer == FLASH_MANUFACTURER && (devtype == FLASH_DEVICE_16mbit_TOP || devtype == FLASH_DEVICE_16mbit_BOTTOM));
-}
-
-/*
- * Erase one block of flash memory at offset ``offset'' which is any
- * address within the block which should be erased.
- *
- * Returns 1 if successful, 0 otherwise.
- */
-static inline int erase_block (__u32 offset)
-{
- __u32 status;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x\n", __func__, offset);
-#endif
-
- /* erase and confirm */
- write32 (DATA_TO_FLASH (ERASE_SETUP),offset);
- write32 (DATA_TO_FLASH (ERASE_CONFIRM),offset);
-
- /* wait for block erase to finish */
- do
- {
- write32 (DATA_TO_FLASH (STATUS_READ),offset);
- status = FLASH_TO_DATA (read32 (offset));
- }
- while ((~status & STATUS_BUSY) != 0);
-
- /* put the flash back into command mode */
- write32 (DATA_TO_FLASH (READ_ARRAY),offset);
-
- /* was the erase successful? */
- if ((status & STATUS_ERASE_ERR))
- {
- printk (KERN_WARNING "%s: erase error at address 0x%.8x.\n",module_name,offset);
- return (0);
- }
-
- return (1);
-}
-
-static int flash_erase (struct mtd_info *mtd,struct erase_info *instr)
-{
- __u32 addr,len;
- int i,first;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(addr = 0x%.8x, len = %d)\n", __func__, instr->addr, instr->len);
-#endif
-
- /*
- * check that both start and end of the requested erase are
- * aligned with the erasesize at the appropriate addresses.
- *
- * skip all erase regions which are ended before the start of
- * the requested erase. Actually, to save on the calculations,
- * we skip to the first erase region which starts after the
- * start of the requested erase, and then go back one.
- */
- for (i = 0; i < mtd->numeraseregions && instr->addr >= mtd->eraseregions[i].offset; i++) ;
- i--;
-
- /*
- * ok, now i is pointing at the erase region in which this
- * erase request starts. Check the start of the requested
- * erase range is aligned with the erase size which is in
- * effect here.
- */
- if (i < 0 || (instr->addr & (mtd->eraseregions[i].erasesize - 1)))
- return -EINVAL;
-
- /* Remember the erase region we start on */
- first = i;
-
- /*
- * next, check that the end of the requested erase is aligned
- * with the erase region at that address.
- *
- * as before, drop back one to point at the region in which
- * the address actually falls
- */
- for (; i < mtd->numeraseregions && instr->addr + instr->len >= mtd->eraseregions[i].offset; i++) ;
- i--;
-
- /* is the end aligned on a block boundary? */
- if (i < 0 || ((instr->addr + instr->len) & (mtd->eraseregions[i].erasesize - 1)))
- return -EINVAL;
-
- addr = instr->addr;
- len = instr->len;
-
- i = first;
-
- /* now erase those blocks */
- while (len)
- {
- if (!erase_block (addr))
- return (-EIO);
-
- addr += mtd->eraseregions[i].erasesize;
- len -= mtd->eraseregions[i].erasesize;
-
- if (addr == mtd->eraseregions[i].offset + (mtd->eraseregions[i].erasesize * mtd->eraseregions[i].numblocks)) i++;
- }
-
- return (0);
-}
-
-static int flash_read (struct mtd_info *mtd,loff_t from,size_t len,size_t *retlen,u_char *buf)
-{
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(from = 0x%.8x, len = %d)\n", __func__, (__u32)from, len);
-#endif
-
- /* we always read len bytes */
- *retlen = len;
-
- /* first, we read bytes until we reach a dword boundary */
- if (from & (BUSWIDTH - 1))
- {
- int gap = BUSWIDTH - (from & (BUSWIDTH - 1));
-
- while (len && gap--) {
- *buf++ = read8 (from++);
- len--;
- }
- }
-
- /* now we read dwords until we reach a non-dword boundary */
- while (len >= BUSWIDTH)
- {
- *((__u32 *) buf) = read32 (from);
-
- buf += BUSWIDTH;
- from += BUSWIDTH;
- len -= BUSWIDTH;
- }
-
- /* top up the last unaligned bytes */
- if (len & (BUSWIDTH - 1))
- while (len--) *buf++ = read8 (from++);
-
- return (0);
-}
-
-/*
- * Write one dword ``x'' to flash memory at offset ``offset''. ``offset''
- * must be 32 bits, i.e. it must be on a dword boundary.
- *
- * Returns 1 if successful, 0 otherwise.
- */
-static inline int write_dword (__u32 offset,__u32 x)
-{
- __u32 status;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x <- 0x%.8x\n", __func__, offset, x);
-#endif
-
- /* setup writing */
- write32 (DATA_TO_FLASH (PGM_SETUP),offset);
-
- /* write the data */
- write32 (x,offset);
-
- /* wait for the write to finish */
- do
- {
- write32 (DATA_TO_FLASH (STATUS_READ),offset);
- status = FLASH_TO_DATA (read32 (offset));
- }
- while ((~status & STATUS_BUSY) != 0);
-
- /* put the flash back into command mode */
- write32 (DATA_TO_FLASH (READ_ARRAY),offset);
-
- /* was the write successful? */
- if ((status & STATUS_PGM_ERR) || read32 (offset) != x)
- {
- printk (KERN_WARNING "%s: write error at address 0x%.8x.\n",module_name,offset);
- return (0);
- }
-
- return (1);
-}
-
-static int flash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen,const u_char *buf)
-{
- __u8 tmp[4];
- int i,n;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(to = 0x%.8x, len = %d)\n", __func__, (__u32)to, len);
-#endif
-
- /* sanity checks */
- if (!len) return (0);
-
- /* first, we write a 0xFF.... padded byte until we reach a dword boundary */
- if (to & (BUSWIDTH - 1))
- {
- __u32 aligned = to & ~(BUSWIDTH - 1);
- int gap = to - aligned;
-
- i = n = 0;
-
- while (gap--) tmp[i++] = 0xFF;
- while (len && i < BUSWIDTH) {
- tmp[i++] = buf[n++];
- len--;
- }
- while (i < BUSWIDTH) tmp[i++] = 0xFF;
-
- if (!write_dword (aligned,*((__u32 *) tmp))) return (-EIO);
-
- to += n;
- buf += n;
- *retlen += n;
- }
-
- /* now we write dwords until we reach a non-dword boundary */
- while (len >= BUSWIDTH)
- {
- if (!write_dword (to,*((__u32 *) buf))) return (-EIO);
-
- to += BUSWIDTH;
- buf += BUSWIDTH;
- *retlen += BUSWIDTH;
- len -= BUSWIDTH;
- }
-
- /* top up the last unaligned bytes, padded with 0xFF.... */
- if (len & (BUSWIDTH - 1))
- {
- i = n = 0;
-
- while (len--) tmp[i++] = buf[n++];
- while (i < BUSWIDTH) tmp[i++] = 0xFF;
-
- if (!write_dword (to,*((__u32 *) tmp))) return (-EIO);
-
- *retlen += n;
- }
-
- return (0);
-}
-
-/***************************************************************************************************/
-
-static struct mtd_info mtd;
-
-static struct mtd_erase_region_info erase_regions[] = {
- /* parameter blocks */
- {
- .offset = 0x00000000,
- .erasesize = FLASH_BLOCKSIZE_PARAM,
- .numblocks = FLASH_NUMBLOCKS_16m_PARAM,
- },
- /* main blocks */
- {
- .offset = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM,
- .erasesize = FLASH_BLOCKSIZE_MAIN,
- .numblocks = FLASH_NUMBLOCKS_16m_MAIN,
- }
-};
-
-static const struct mtd_partition lart_partitions[] = {
- /* blob */
- {
- .name = "blob",
- .offset = PART_BLOB_START,
- .size = PART_BLOB_LEN,
- },
- /* kernel */
- {
- .name = "kernel",
- .offset = PART_KERNEL_START, /* MTDPART_OFS_APPEND */
- .size = PART_KERNEL_LEN,
- },
- /* initial ramdisk / file system */
- {
- .name = "file system",
- .offset = PART_INITRD_START, /* MTDPART_OFS_APPEND */
- .size = PART_INITRD_LEN, /* MTDPART_SIZ_FULL */
- }
-};
-#define NUM_PARTITIONS ARRAY_SIZE(lart_partitions)
-
-static int __init lart_flash_init (void)
-{
- int result;
- memset (&mtd,0,sizeof (mtd));
- printk ("MTD driver for LART. Written by Abraham vd Merwe <abraham@2d3d.co.za>\n");
- printk ("%s: Probing for 28F160x3 flash on LART...\n",module_name);
- if (!flash_probe ())
- {
- printk (KERN_WARNING "%s: Found no LART compatible flash device\n",module_name);
- return (-ENXIO);
- }
- printk ("%s: This looks like a LART board to me.\n",module_name);
- mtd.name = module_name;
- mtd.type = MTD_NORFLASH;
- mtd.writesize = 1;
- mtd.writebufsize = 4;
- mtd.flags = MTD_CAP_NORFLASH;
- mtd.size = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM + FLASH_BLOCKSIZE_MAIN * FLASH_NUMBLOCKS_16m_MAIN;
- mtd.erasesize = FLASH_BLOCKSIZE_MAIN;
- mtd.numeraseregions = ARRAY_SIZE(erase_regions);
- mtd.eraseregions = erase_regions;
- mtd._erase = flash_erase;
- mtd._read = flash_read;
- mtd._write = flash_write;
- mtd.owner = THIS_MODULE;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG
- "mtd.name = %s\n"
- "mtd.size = 0x%.8x (%uM)\n"
- "mtd.erasesize = 0x%.8x (%uK)\n"
- "mtd.numeraseregions = %d\n",
- mtd.name,
- mtd.size,mtd.size / (1024*1024),
- mtd.erasesize,mtd.erasesize / 1024,
- mtd.numeraseregions);
-
- if (mtd.numeraseregions)
- for (result = 0; result < mtd.numeraseregions; result++)
- printk (KERN_DEBUG
- "\n\n"
- "mtd.eraseregions[%d].offset = 0x%.8x\n"
- "mtd.eraseregions[%d].erasesize = 0x%.8x (%uK)\n"
- "mtd.eraseregions[%d].numblocks = %d\n",
- result,mtd.eraseregions[result].offset,
- result,mtd.eraseregions[result].erasesize,mtd.eraseregions[result].erasesize / 1024,
- result,mtd.eraseregions[result].numblocks);
-
- printk ("\npartitions = %d\n", ARRAY_SIZE(lart_partitions));
-
- for (result = 0; result < ARRAY_SIZE(lart_partitions); result++)
- printk (KERN_DEBUG
- "\n\n"
- "lart_partitions[%d].name = %s\n"
- "lart_partitions[%d].offset = 0x%.8x\n"
- "lart_partitions[%d].size = 0x%.8x (%uK)\n",
- result,lart_partitions[result].name,
- result,lart_partitions[result].offset,
- result,lart_partitions[result].size,lart_partitions[result].size / 1024);
-#endif
-
- result = mtd_device_register(&mtd, lart_partitions,
- ARRAY_SIZE(lart_partitions));
-
- return (result);
-}
-
-static void __exit lart_flash_exit (void)
-{
- mtd_device_unregister(&mtd);
-}
-
-module_init (lart_flash_init);
-module_exit (lart_flash_exit);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Abraham vd Merwe <abraham@2d3d.co.za>");
-MODULE_DESCRIPTION("MTD driver for Intel 28F160F3 on LART board");
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 06/11] mtd: remove lart flash driver
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra
Cc: linux-kernel, Arnd Bergmann, linux-mtd
From: Arnd Bergmann <arnd@arndb.de>
The sa1100 lart platform was removed, so its flash driver is
no longer useful.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/mtd/devices/Kconfig | 8 -
drivers/mtd/devices/Makefile | 1 -
drivers/mtd/devices/lart.c | 682 -----------------------------------
3 files changed, 691 deletions(-)
delete mode 100644 drivers/mtd/devices/lart.c
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
index 79cb981ececc..ff2f9e55ef28 100644
--- a/drivers/mtd/devices/Kconfig
+++ b/drivers/mtd/devices/Kconfig
@@ -136,14 +136,6 @@ config MTD_PHRAM
doesn't have access to, memory beyond the mem=xxx limit, nvram,
memory on the video card, etc...
-config MTD_LART
- tristate "28F160xx flash driver for LART"
- depends on SA1100_LART
- help
- This enables the flash driver for LART. Please note that you do
- not need any mapping/chip driver for LART. This one does it all
- for you, so go disable all of those if you enabled some of them (:
-
config MTD_MTDRAM
tristate "Test driver using RAM"
help
diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
index 0362cf6bdc67..d11eb2b8b6f8 100644
--- a/drivers/mtd/devices/Makefile
+++ b/drivers/mtd/devices/Makefile
@@ -9,7 +9,6 @@ obj-$(CONFIG_MTD_PHRAM) += phram.o
obj-$(CONFIG_MTD_PMC551) += pmc551.o
obj-$(CONFIG_MTD_MS02NV) += ms02-nv.o
obj-$(CONFIG_MTD_MTDRAM) += mtdram.o
-obj-$(CONFIG_MTD_LART) += lart.o
obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
obj-$(CONFIG_MTD_MCHP23K256) += mchp23k256.o
diff --git a/drivers/mtd/devices/lart.c b/drivers/mtd/devices/lart.c
deleted file mode 100644
index aecd441e4183..000000000000
--- a/drivers/mtd/devices/lart.c
+++ /dev/null
@@ -1,682 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/*
- * MTD driver for the 28F160F3 Flash Memory (non-CFI) on LART.
- *
- * Author: Abraham vd Merwe <abraham@2d3d.co.za>
- *
- * Copyright (c) 2001, 2d3D, Inc.
- *
- * References:
- *
- * [1] 3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- * - Order Number: 290644-005
- * - January 2000
- *
- * [2] MTD internal API documentation
- * - http://www.linux-mtd.infradead.org/
- *
- * Limitations:
- *
- * Even though this driver is written for 3 Volt Fast Boot
- * Block Flash Memory, it is rather specific to LART. With
- * Minor modifications, notably the without data/address line
- * mangling and different bus settings, etc. it should be
- * trivial to adapt to other platforms.
- *
- * If somebody would sponsor me a different board, I'll
- * adapt the driver (:
- */
-
-/* debugging */
-//#define LART_DEBUG
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-
-#ifndef CONFIG_SA1100_LART
-#error This is for LART architecture only
-#endif
-
-static char module_name[] = "lart";
-
-/*
- * These values is specific to 28Fxxxx3 flash memory.
- * See section 2.3.1 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define FLASH_BLOCKSIZE_PARAM (4096 * BUSWIDTH)
-#define FLASH_NUMBLOCKS_16m_PARAM 8
-#define FLASH_NUMBLOCKS_8m_PARAM 8
-
-/*
- * These values is specific to 28Fxxxx3 flash memory.
- * See section 2.3.2 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define FLASH_BLOCKSIZE_MAIN (32768 * BUSWIDTH)
-#define FLASH_NUMBLOCKS_16m_MAIN 31
-#define FLASH_NUMBLOCKS_8m_MAIN 15
-
-/*
- * These values are specific to LART
- */
-
-/* general */
-#define BUSWIDTH 4 /* don't change this - a lot of the code _will_ break if you change this */
-#define FLASH_OFFSET 0xe8000000 /* see linux/arch/arm/mach-sa1100/lart.c */
-
-/* blob */
-#define NUM_BLOB_BLOCKS FLASH_NUMBLOCKS_16m_PARAM
-#define PART_BLOB_START 0x00000000
-#define PART_BLOB_LEN (NUM_BLOB_BLOCKS * FLASH_BLOCKSIZE_PARAM)
-
-/* kernel */
-#define NUM_KERNEL_BLOCKS 7
-#define PART_KERNEL_START (PART_BLOB_START + PART_BLOB_LEN)
-#define PART_KERNEL_LEN (NUM_KERNEL_BLOCKS * FLASH_BLOCKSIZE_MAIN)
-
-/* initial ramdisk */
-#define NUM_INITRD_BLOCKS 24
-#define PART_INITRD_START (PART_KERNEL_START + PART_KERNEL_LEN)
-#define PART_INITRD_LEN (NUM_INITRD_BLOCKS * FLASH_BLOCKSIZE_MAIN)
-
-/*
- * See section 4.0 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define READ_ARRAY 0x00FF00FF /* Read Array/Reset */
-#define READ_ID_CODES 0x00900090 /* Read Identifier Codes */
-#define ERASE_SETUP 0x00200020 /* Block Erase */
-#define ERASE_CONFIRM 0x00D000D0 /* Block Erase and Program Resume */
-#define PGM_SETUP 0x00400040 /* Program */
-#define STATUS_READ 0x00700070 /* Read Status Register */
-#define STATUS_CLEAR 0x00500050 /* Clear Status Register */
-#define STATUS_BUSY 0x00800080 /* Write State Machine Status (WSMS) */
-#define STATUS_ERASE_ERR 0x00200020 /* Erase Status (ES) */
-#define STATUS_PGM_ERR 0x00100010 /* Program Status (PS) */
-
-/*
- * See section 4.2 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define FLASH_MANUFACTURER 0x00890089
-#define FLASH_DEVICE_8mbit_TOP 0x88f188f1
-#define FLASH_DEVICE_8mbit_BOTTOM 0x88f288f2
-#define FLASH_DEVICE_16mbit_TOP 0x88f388f3
-#define FLASH_DEVICE_16mbit_BOTTOM 0x88f488f4
-
-/***************************************************************************************************/
-
-/*
- * The data line mapping on LART is as follows:
- *
- * U2 CPU | U3 CPU
- * -------------------
- * 0 20 | 0 12
- * 1 22 | 1 14
- * 2 19 | 2 11
- * 3 17 | 3 9
- * 4 24 | 4 0
- * 5 26 | 5 2
- * 6 31 | 6 7
- * 7 29 | 7 5
- * 8 21 | 8 13
- * 9 23 | 9 15
- * 10 18 | 10 10
- * 11 16 | 11 8
- * 12 25 | 12 1
- * 13 27 | 13 3
- * 14 30 | 14 6
- * 15 28 | 15 4
- */
-
-/* Mangle data (x) */
-#define DATA_TO_FLASH(x) \
- ( \
- (((x) & 0x08009000) >> 11) + \
- (((x) & 0x00002000) >> 10) + \
- (((x) & 0x04004000) >> 8) + \
- (((x) & 0x00000010) >> 4) + \
- (((x) & 0x91000820) >> 3) + \
- (((x) & 0x22080080) >> 2) + \
- ((x) & 0x40000400) + \
- (((x) & 0x00040040) << 1) + \
- (((x) & 0x00110000) << 4) + \
- (((x) & 0x00220100) << 5) + \
- (((x) & 0x00800208) << 6) + \
- (((x) & 0x00400004) << 9) + \
- (((x) & 0x00000001) << 12) + \
- (((x) & 0x00000002) << 13) \
- )
-
-/* Unmangle data (x) */
-#define FLASH_TO_DATA(x) \
- ( \
- (((x) & 0x00010012) << 11) + \
- (((x) & 0x00000008) << 10) + \
- (((x) & 0x00040040) << 8) + \
- (((x) & 0x00000001) << 4) + \
- (((x) & 0x12200104) << 3) + \
- (((x) & 0x08820020) << 2) + \
- ((x) & 0x40000400) + \
- (((x) & 0x00080080) >> 1) + \
- (((x) & 0x01100000) >> 4) + \
- (((x) & 0x04402000) >> 5) + \
- (((x) & 0x20008200) >> 6) + \
- (((x) & 0x80000800) >> 9) + \
- (((x) & 0x00001000) >> 12) + \
- (((x) & 0x00004000) >> 13) \
- )
-
-/*
- * The address line mapping on LART is as follows:
- *
- * U3 CPU | U2 CPU
- * -------------------
- * 0 2 | 0 2
- * 1 3 | 1 3
- * 2 9 | 2 9
- * 3 13 | 3 8
- * 4 8 | 4 7
- * 5 12 | 5 6
- * 6 11 | 6 5
- * 7 10 | 7 4
- * 8 4 | 8 10
- * 9 5 | 9 11
- * 10 6 | 10 12
- * 11 7 | 11 13
- *
- * BOOT BLOCK BOUNDARY
- *
- * 12 15 | 12 15
- * 13 14 | 13 14
- * 14 16 | 14 16
- *
- * MAIN BLOCK BOUNDARY
- *
- * 15 17 | 15 18
- * 16 18 | 16 17
- * 17 20 | 17 20
- * 18 19 | 18 19
- * 19 21 | 19 21
- *
- * As we can see from above, the addresses aren't mangled across
- * block boundaries, so we don't need to worry about address
- * translations except for sending/reading commands during
- * initialization
- */
-
-/* Mangle address (x) on chip U2 */
-#define ADDR_TO_FLASH_U2(x) \
- ( \
- (((x) & 0x00000f00) >> 4) + \
- (((x) & 0x00042000) << 1) + \
- (((x) & 0x0009c003) << 2) + \
- (((x) & 0x00021080) << 3) + \
- (((x) & 0x00000010) << 4) + \
- (((x) & 0x00000040) << 5) + \
- (((x) & 0x00000024) << 7) + \
- (((x) & 0x00000008) << 10) \
- )
-
-/* Unmangle address (x) on chip U2 */
-#define FLASH_U2_TO_ADDR(x) \
- ( \
- (((x) << 4) & 0x00000f00) + \
- (((x) >> 1) & 0x00042000) + \
- (((x) >> 2) & 0x0009c003) + \
- (((x) >> 3) & 0x00021080) + \
- (((x) >> 4) & 0x00000010) + \
- (((x) >> 5) & 0x00000040) + \
- (((x) >> 7) & 0x00000024) + \
- (((x) >> 10) & 0x00000008) \
- )
-
-/* Mangle address (x) on chip U3 */
-#define ADDR_TO_FLASH_U3(x) \
- ( \
- (((x) & 0x00000080) >> 3) + \
- (((x) & 0x00000040) >> 1) + \
- (((x) & 0x00052020) << 1) + \
- (((x) & 0x00084f03) << 2) + \
- (((x) & 0x00029010) << 3) + \
- (((x) & 0x00000008) << 5) + \
- (((x) & 0x00000004) << 7) \
- )
-
-/* Unmangle address (x) on chip U3 */
-#define FLASH_U3_TO_ADDR(x) \
- ( \
- (((x) << 3) & 0x00000080) + \
- (((x) << 1) & 0x00000040) + \
- (((x) >> 1) & 0x00052020) + \
- (((x) >> 2) & 0x00084f03) + \
- (((x) >> 3) & 0x00029010) + \
- (((x) >> 5) & 0x00000008) + \
- (((x) >> 7) & 0x00000004) \
- )
-
-/***************************************************************************************************/
-
-static __u8 read8 (__u32 offset)
-{
- volatile __u8 *data = (__u8 *) (FLASH_OFFSET + offset);
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x -> 0x%.2x\n", __func__, offset, *data);
-#endif
- return (*data);
-}
-
-static __u32 read32 (__u32 offset)
-{
- volatile __u32 *data = (__u32 *) (FLASH_OFFSET + offset);
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x -> 0x%.8x\n", __func__, offset, *data);
-#endif
- return (*data);
-}
-
-static void write32 (__u32 x,__u32 offset)
-{
- volatile __u32 *data = (__u32 *) (FLASH_OFFSET + offset);
- *data = x;
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x <- 0x%.8x\n", __func__, offset, *data);
-#endif
-}
-
-/***************************************************************************************************/
-
-/*
- * Probe for 16mbit flash memory on a LART board without doing
- * too much damage. Since we need to write 1 dword to memory,
- * we're f**cked if this happens to be DRAM since we can't
- * restore the memory (otherwise we might exit Read Array mode).
- *
- * Returns 1 if we found 16mbit flash memory on LART, 0 otherwise.
- */
-static int flash_probe (void)
-{
- __u32 manufacturer,devtype;
-
- /* setup "Read Identifier Codes" mode */
- write32 (DATA_TO_FLASH (READ_ID_CODES),0x00000000);
-
- /* probe U2. U2/U3 returns the same data since the first 3
- * address lines is mangled in the same way */
- manufacturer = FLASH_TO_DATA (read32 (ADDR_TO_FLASH_U2 (0x00000000)));
- devtype = FLASH_TO_DATA (read32 (ADDR_TO_FLASH_U2 (0x00000001)));
-
- /* put the flash back into command mode */
- write32 (DATA_TO_FLASH (READ_ARRAY),0x00000000);
-
- return (manufacturer == FLASH_MANUFACTURER && (devtype == FLASH_DEVICE_16mbit_TOP || devtype == FLASH_DEVICE_16mbit_BOTTOM));
-}
-
-/*
- * Erase one block of flash memory at offset ``offset'' which is any
- * address within the block which should be erased.
- *
- * Returns 1 if successful, 0 otherwise.
- */
-static inline int erase_block (__u32 offset)
-{
- __u32 status;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x\n", __func__, offset);
-#endif
-
- /* erase and confirm */
- write32 (DATA_TO_FLASH (ERASE_SETUP),offset);
- write32 (DATA_TO_FLASH (ERASE_CONFIRM),offset);
-
- /* wait for block erase to finish */
- do
- {
- write32 (DATA_TO_FLASH (STATUS_READ),offset);
- status = FLASH_TO_DATA (read32 (offset));
- }
- while ((~status & STATUS_BUSY) != 0);
-
- /* put the flash back into command mode */
- write32 (DATA_TO_FLASH (READ_ARRAY),offset);
-
- /* was the erase successful? */
- if ((status & STATUS_ERASE_ERR))
- {
- printk (KERN_WARNING "%s: erase error at address 0x%.8x.\n",module_name,offset);
- return (0);
- }
-
- return (1);
-}
-
-static int flash_erase (struct mtd_info *mtd,struct erase_info *instr)
-{
- __u32 addr,len;
- int i,first;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(addr = 0x%.8x, len = %d)\n", __func__, instr->addr, instr->len);
-#endif
-
- /*
- * check that both start and end of the requested erase are
- * aligned with the erasesize at the appropriate addresses.
- *
- * skip all erase regions which are ended before the start of
- * the requested erase. Actually, to save on the calculations,
- * we skip to the first erase region which starts after the
- * start of the requested erase, and then go back one.
- */
- for (i = 0; i < mtd->numeraseregions && instr->addr >= mtd->eraseregions[i].offset; i++) ;
- i--;
-
- /*
- * ok, now i is pointing at the erase region in which this
- * erase request starts. Check the start of the requested
- * erase range is aligned with the erase size which is in
- * effect here.
- */
- if (i < 0 || (instr->addr & (mtd->eraseregions[i].erasesize - 1)))
- return -EINVAL;
-
- /* Remember the erase region we start on */
- first = i;
-
- /*
- * next, check that the end of the requested erase is aligned
- * with the erase region at that address.
- *
- * as before, drop back one to point at the region in which
- * the address actually falls
- */
- for (; i < mtd->numeraseregions && instr->addr + instr->len >= mtd->eraseregions[i].offset; i++) ;
- i--;
-
- /* is the end aligned on a block boundary? */
- if (i < 0 || ((instr->addr + instr->len) & (mtd->eraseregions[i].erasesize - 1)))
- return -EINVAL;
-
- addr = instr->addr;
- len = instr->len;
-
- i = first;
-
- /* now erase those blocks */
- while (len)
- {
- if (!erase_block (addr))
- return (-EIO);
-
- addr += mtd->eraseregions[i].erasesize;
- len -= mtd->eraseregions[i].erasesize;
-
- if (addr == mtd->eraseregions[i].offset + (mtd->eraseregions[i].erasesize * mtd->eraseregions[i].numblocks)) i++;
- }
-
- return (0);
-}
-
-static int flash_read (struct mtd_info *mtd,loff_t from,size_t len,size_t *retlen,u_char *buf)
-{
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(from = 0x%.8x, len = %d)\n", __func__, (__u32)from, len);
-#endif
-
- /* we always read len bytes */
- *retlen = len;
-
- /* first, we read bytes until we reach a dword boundary */
- if (from & (BUSWIDTH - 1))
- {
- int gap = BUSWIDTH - (from & (BUSWIDTH - 1));
-
- while (len && gap--) {
- *buf++ = read8 (from++);
- len--;
- }
- }
-
- /* now we read dwords until we reach a non-dword boundary */
- while (len >= BUSWIDTH)
- {
- *((__u32 *) buf) = read32 (from);
-
- buf += BUSWIDTH;
- from += BUSWIDTH;
- len -= BUSWIDTH;
- }
-
- /* top up the last unaligned bytes */
- if (len & (BUSWIDTH - 1))
- while (len--) *buf++ = read8 (from++);
-
- return (0);
-}
-
-/*
- * Write one dword ``x'' to flash memory at offset ``offset''. ``offset''
- * must be 32 bits, i.e. it must be on a dword boundary.
- *
- * Returns 1 if successful, 0 otherwise.
- */
-static inline int write_dword (__u32 offset,__u32 x)
-{
- __u32 status;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x <- 0x%.8x\n", __func__, offset, x);
-#endif
-
- /* setup writing */
- write32 (DATA_TO_FLASH (PGM_SETUP),offset);
-
- /* write the data */
- write32 (x,offset);
-
- /* wait for the write to finish */
- do
- {
- write32 (DATA_TO_FLASH (STATUS_READ),offset);
- status = FLASH_TO_DATA (read32 (offset));
- }
- while ((~status & STATUS_BUSY) != 0);
-
- /* put the flash back into command mode */
- write32 (DATA_TO_FLASH (READ_ARRAY),offset);
-
- /* was the write successful? */
- if ((status & STATUS_PGM_ERR) || read32 (offset) != x)
- {
- printk (KERN_WARNING "%s: write error at address 0x%.8x.\n",module_name,offset);
- return (0);
- }
-
- return (1);
-}
-
-static int flash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen,const u_char *buf)
-{
- __u8 tmp[4];
- int i,n;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(to = 0x%.8x, len = %d)\n", __func__, (__u32)to, len);
-#endif
-
- /* sanity checks */
- if (!len) return (0);
-
- /* first, we write a 0xFF.... padded byte until we reach a dword boundary */
- if (to & (BUSWIDTH - 1))
- {
- __u32 aligned = to & ~(BUSWIDTH - 1);
- int gap = to - aligned;
-
- i = n = 0;
-
- while (gap--) tmp[i++] = 0xFF;
- while (len && i < BUSWIDTH) {
- tmp[i++] = buf[n++];
- len--;
- }
- while (i < BUSWIDTH) tmp[i++] = 0xFF;
-
- if (!write_dword (aligned,*((__u32 *) tmp))) return (-EIO);
-
- to += n;
- buf += n;
- *retlen += n;
- }
-
- /* now we write dwords until we reach a non-dword boundary */
- while (len >= BUSWIDTH)
- {
- if (!write_dword (to,*((__u32 *) buf))) return (-EIO);
-
- to += BUSWIDTH;
- buf += BUSWIDTH;
- *retlen += BUSWIDTH;
- len -= BUSWIDTH;
- }
-
- /* top up the last unaligned bytes, padded with 0xFF.... */
- if (len & (BUSWIDTH - 1))
- {
- i = n = 0;
-
- while (len--) tmp[i++] = buf[n++];
- while (i < BUSWIDTH) tmp[i++] = 0xFF;
-
- if (!write_dword (to,*((__u32 *) tmp))) return (-EIO);
-
- *retlen += n;
- }
-
- return (0);
-}
-
-/***************************************************************************************************/
-
-static struct mtd_info mtd;
-
-static struct mtd_erase_region_info erase_regions[] = {
- /* parameter blocks */
- {
- .offset = 0x00000000,
- .erasesize = FLASH_BLOCKSIZE_PARAM,
- .numblocks = FLASH_NUMBLOCKS_16m_PARAM,
- },
- /* main blocks */
- {
- .offset = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM,
- .erasesize = FLASH_BLOCKSIZE_MAIN,
- .numblocks = FLASH_NUMBLOCKS_16m_MAIN,
- }
-};
-
-static const struct mtd_partition lart_partitions[] = {
- /* blob */
- {
- .name = "blob",
- .offset = PART_BLOB_START,
- .size = PART_BLOB_LEN,
- },
- /* kernel */
- {
- .name = "kernel",
- .offset = PART_KERNEL_START, /* MTDPART_OFS_APPEND */
- .size = PART_KERNEL_LEN,
- },
- /* initial ramdisk / file system */
- {
- .name = "file system",
- .offset = PART_INITRD_START, /* MTDPART_OFS_APPEND */
- .size = PART_INITRD_LEN, /* MTDPART_SIZ_FULL */
- }
-};
-#define NUM_PARTITIONS ARRAY_SIZE(lart_partitions)
-
-static int __init lart_flash_init (void)
-{
- int result;
- memset (&mtd,0,sizeof (mtd));
- printk ("MTD driver for LART. Written by Abraham vd Merwe <abraham@2d3d.co.za>\n");
- printk ("%s: Probing for 28F160x3 flash on LART...\n",module_name);
- if (!flash_probe ())
- {
- printk (KERN_WARNING "%s: Found no LART compatible flash device\n",module_name);
- return (-ENXIO);
- }
- printk ("%s: This looks like a LART board to me.\n",module_name);
- mtd.name = module_name;
- mtd.type = MTD_NORFLASH;
- mtd.writesize = 1;
- mtd.writebufsize = 4;
- mtd.flags = MTD_CAP_NORFLASH;
- mtd.size = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM + FLASH_BLOCKSIZE_MAIN * FLASH_NUMBLOCKS_16m_MAIN;
- mtd.erasesize = FLASH_BLOCKSIZE_MAIN;
- mtd.numeraseregions = ARRAY_SIZE(erase_regions);
- mtd.eraseregions = erase_regions;
- mtd._erase = flash_erase;
- mtd._read = flash_read;
- mtd._write = flash_write;
- mtd.owner = THIS_MODULE;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG
- "mtd.name = %s\n"
- "mtd.size = 0x%.8x (%uM)\n"
- "mtd.erasesize = 0x%.8x (%uK)\n"
- "mtd.numeraseregions = %d\n",
- mtd.name,
- mtd.size,mtd.size / (1024*1024),
- mtd.erasesize,mtd.erasesize / 1024,
- mtd.numeraseregions);
-
- if (mtd.numeraseregions)
- for (result = 0; result < mtd.numeraseregions; result++)
- printk (KERN_DEBUG
- "\n\n"
- "mtd.eraseregions[%d].offset = 0x%.8x\n"
- "mtd.eraseregions[%d].erasesize = 0x%.8x (%uK)\n"
- "mtd.eraseregions[%d].numblocks = %d\n",
- result,mtd.eraseregions[result].offset,
- result,mtd.eraseregions[result].erasesize,mtd.eraseregions[result].erasesize / 1024,
- result,mtd.eraseregions[result].numblocks);
-
- printk ("\npartitions = %d\n", ARRAY_SIZE(lart_partitions));
-
- for (result = 0; result < ARRAY_SIZE(lart_partitions); result++)
- printk (KERN_DEBUG
- "\n\n"
- "lart_partitions[%d].name = %s\n"
- "lart_partitions[%d].offset = 0x%.8x\n"
- "lart_partitions[%d].size = 0x%.8x (%uK)\n",
- result,lart_partitions[result].name,
- result,lart_partitions[result].offset,
- result,lart_partitions[result].size,lart_partitions[result].size / 1024);
-#endif
-
- result = mtd_device_register(&mtd, lart_partitions,
- ARRAY_SIZE(lart_partitions));
-
- return (result);
-}
-
-static void __exit lart_flash_exit (void)
-{
- mtd_device_unregister(&mtd);
-}
-
-module_init (lart_flash_init);
-module_exit (lart_flash_exit);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Abraham vd Merwe <abraham@2d3d.co.za>");
-MODULE_DESCRIPTION("MTD driver for Intel 28F160F3 on LART board");
--
2.29.2
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^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 06/11] mtd: remove lart flash driver
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra
Cc: linux-kernel, Arnd Bergmann, linux-mtd
From: Arnd Bergmann <arnd@arndb.de>
The sa1100 lart platform was removed, so its flash driver is
no longer useful.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/mtd/devices/Kconfig | 8 -
drivers/mtd/devices/Makefile | 1 -
drivers/mtd/devices/lart.c | 682 -----------------------------------
3 files changed, 691 deletions(-)
delete mode 100644 drivers/mtd/devices/lart.c
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
index 79cb981ececc..ff2f9e55ef28 100644
--- a/drivers/mtd/devices/Kconfig
+++ b/drivers/mtd/devices/Kconfig
@@ -136,14 +136,6 @@ config MTD_PHRAM
doesn't have access to, memory beyond the mem=xxx limit, nvram,
memory on the video card, etc...
-config MTD_LART
- tristate "28F160xx flash driver for LART"
- depends on SA1100_LART
- help
- This enables the flash driver for LART. Please note that you do
- not need any mapping/chip driver for LART. This one does it all
- for you, so go disable all of those if you enabled some of them (:
-
config MTD_MTDRAM
tristate "Test driver using RAM"
help
diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
index 0362cf6bdc67..d11eb2b8b6f8 100644
--- a/drivers/mtd/devices/Makefile
+++ b/drivers/mtd/devices/Makefile
@@ -9,7 +9,6 @@ obj-$(CONFIG_MTD_PHRAM) += phram.o
obj-$(CONFIG_MTD_PMC551) += pmc551.o
obj-$(CONFIG_MTD_MS02NV) += ms02-nv.o
obj-$(CONFIG_MTD_MTDRAM) += mtdram.o
-obj-$(CONFIG_MTD_LART) += lart.o
obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
obj-$(CONFIG_MTD_MCHP23K256) += mchp23k256.o
diff --git a/drivers/mtd/devices/lart.c b/drivers/mtd/devices/lart.c
deleted file mode 100644
index aecd441e4183..000000000000
--- a/drivers/mtd/devices/lart.c
+++ /dev/null
@@ -1,682 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/*
- * MTD driver for the 28F160F3 Flash Memory (non-CFI) on LART.
- *
- * Author: Abraham vd Merwe <abraham@2d3d.co.za>
- *
- * Copyright (c) 2001, 2d3D, Inc.
- *
- * References:
- *
- * [1] 3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- * - Order Number: 290644-005
- * - January 2000
- *
- * [2] MTD internal API documentation
- * - http://www.linux-mtd.infradead.org/
- *
- * Limitations:
- *
- * Even though this driver is written for 3 Volt Fast Boot
- * Block Flash Memory, it is rather specific to LART. With
- * Minor modifications, notably the without data/address line
- * mangling and different bus settings, etc. it should be
- * trivial to adapt to other platforms.
- *
- * If somebody would sponsor me a different board, I'll
- * adapt the driver (:
- */
-
-/* debugging */
-//#define LART_DEBUG
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-
-#ifndef CONFIG_SA1100_LART
-#error This is for LART architecture only
-#endif
-
-static char module_name[] = "lart";
-
-/*
- * These values is specific to 28Fxxxx3 flash memory.
- * See section 2.3.1 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define FLASH_BLOCKSIZE_PARAM (4096 * BUSWIDTH)
-#define FLASH_NUMBLOCKS_16m_PARAM 8
-#define FLASH_NUMBLOCKS_8m_PARAM 8
-
-/*
- * These values is specific to 28Fxxxx3 flash memory.
- * See section 2.3.2 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define FLASH_BLOCKSIZE_MAIN (32768 * BUSWIDTH)
-#define FLASH_NUMBLOCKS_16m_MAIN 31
-#define FLASH_NUMBLOCKS_8m_MAIN 15
-
-/*
- * These values are specific to LART
- */
-
-/* general */
-#define BUSWIDTH 4 /* don't change this - a lot of the code _will_ break if you change this */
-#define FLASH_OFFSET 0xe8000000 /* see linux/arch/arm/mach-sa1100/lart.c */
-
-/* blob */
-#define NUM_BLOB_BLOCKS FLASH_NUMBLOCKS_16m_PARAM
-#define PART_BLOB_START 0x00000000
-#define PART_BLOB_LEN (NUM_BLOB_BLOCKS * FLASH_BLOCKSIZE_PARAM)
-
-/* kernel */
-#define NUM_KERNEL_BLOCKS 7
-#define PART_KERNEL_START (PART_BLOB_START + PART_BLOB_LEN)
-#define PART_KERNEL_LEN (NUM_KERNEL_BLOCKS * FLASH_BLOCKSIZE_MAIN)
-
-/* initial ramdisk */
-#define NUM_INITRD_BLOCKS 24
-#define PART_INITRD_START (PART_KERNEL_START + PART_KERNEL_LEN)
-#define PART_INITRD_LEN (NUM_INITRD_BLOCKS * FLASH_BLOCKSIZE_MAIN)
-
-/*
- * See section 4.0 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define READ_ARRAY 0x00FF00FF /* Read Array/Reset */
-#define READ_ID_CODES 0x00900090 /* Read Identifier Codes */
-#define ERASE_SETUP 0x00200020 /* Block Erase */
-#define ERASE_CONFIRM 0x00D000D0 /* Block Erase and Program Resume */
-#define PGM_SETUP 0x00400040 /* Program */
-#define STATUS_READ 0x00700070 /* Read Status Register */
-#define STATUS_CLEAR 0x00500050 /* Clear Status Register */
-#define STATUS_BUSY 0x00800080 /* Write State Machine Status (WSMS) */
-#define STATUS_ERASE_ERR 0x00200020 /* Erase Status (ES) */
-#define STATUS_PGM_ERR 0x00100010 /* Program Status (PS) */
-
-/*
- * See section 4.2 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
- */
-#define FLASH_MANUFACTURER 0x00890089
-#define FLASH_DEVICE_8mbit_TOP 0x88f188f1
-#define FLASH_DEVICE_8mbit_BOTTOM 0x88f288f2
-#define FLASH_DEVICE_16mbit_TOP 0x88f388f3
-#define FLASH_DEVICE_16mbit_BOTTOM 0x88f488f4
-
-/***************************************************************************************************/
-
-/*
- * The data line mapping on LART is as follows:
- *
- * U2 CPU | U3 CPU
- * -------------------
- * 0 20 | 0 12
- * 1 22 | 1 14
- * 2 19 | 2 11
- * 3 17 | 3 9
- * 4 24 | 4 0
- * 5 26 | 5 2
- * 6 31 | 6 7
- * 7 29 | 7 5
- * 8 21 | 8 13
- * 9 23 | 9 15
- * 10 18 | 10 10
- * 11 16 | 11 8
- * 12 25 | 12 1
- * 13 27 | 13 3
- * 14 30 | 14 6
- * 15 28 | 15 4
- */
-
-/* Mangle data (x) */
-#define DATA_TO_FLASH(x) \
- ( \
- (((x) & 0x08009000) >> 11) + \
- (((x) & 0x00002000) >> 10) + \
- (((x) & 0x04004000) >> 8) + \
- (((x) & 0x00000010) >> 4) + \
- (((x) & 0x91000820) >> 3) + \
- (((x) & 0x22080080) >> 2) + \
- ((x) & 0x40000400) + \
- (((x) & 0x00040040) << 1) + \
- (((x) & 0x00110000) << 4) + \
- (((x) & 0x00220100) << 5) + \
- (((x) & 0x00800208) << 6) + \
- (((x) & 0x00400004) << 9) + \
- (((x) & 0x00000001) << 12) + \
- (((x) & 0x00000002) << 13) \
- )
-
-/* Unmangle data (x) */
-#define FLASH_TO_DATA(x) \
- ( \
- (((x) & 0x00010012) << 11) + \
- (((x) & 0x00000008) << 10) + \
- (((x) & 0x00040040) << 8) + \
- (((x) & 0x00000001) << 4) + \
- (((x) & 0x12200104) << 3) + \
- (((x) & 0x08820020) << 2) + \
- ((x) & 0x40000400) + \
- (((x) & 0x00080080) >> 1) + \
- (((x) & 0x01100000) >> 4) + \
- (((x) & 0x04402000) >> 5) + \
- (((x) & 0x20008200) >> 6) + \
- (((x) & 0x80000800) >> 9) + \
- (((x) & 0x00001000) >> 12) + \
- (((x) & 0x00004000) >> 13) \
- )
-
-/*
- * The address line mapping on LART is as follows:
- *
- * U3 CPU | U2 CPU
- * -------------------
- * 0 2 | 0 2
- * 1 3 | 1 3
- * 2 9 | 2 9
- * 3 13 | 3 8
- * 4 8 | 4 7
- * 5 12 | 5 6
- * 6 11 | 6 5
- * 7 10 | 7 4
- * 8 4 | 8 10
- * 9 5 | 9 11
- * 10 6 | 10 12
- * 11 7 | 11 13
- *
- * BOOT BLOCK BOUNDARY
- *
- * 12 15 | 12 15
- * 13 14 | 13 14
- * 14 16 | 14 16
- *
- * MAIN BLOCK BOUNDARY
- *
- * 15 17 | 15 18
- * 16 18 | 16 17
- * 17 20 | 17 20
- * 18 19 | 18 19
- * 19 21 | 19 21
- *
- * As we can see from above, the addresses aren't mangled across
- * block boundaries, so we don't need to worry about address
- * translations except for sending/reading commands during
- * initialization
- */
-
-/* Mangle address (x) on chip U2 */
-#define ADDR_TO_FLASH_U2(x) \
- ( \
- (((x) & 0x00000f00) >> 4) + \
- (((x) & 0x00042000) << 1) + \
- (((x) & 0x0009c003) << 2) + \
- (((x) & 0x00021080) << 3) + \
- (((x) & 0x00000010) << 4) + \
- (((x) & 0x00000040) << 5) + \
- (((x) & 0x00000024) << 7) + \
- (((x) & 0x00000008) << 10) \
- )
-
-/* Unmangle address (x) on chip U2 */
-#define FLASH_U2_TO_ADDR(x) \
- ( \
- (((x) << 4) & 0x00000f00) + \
- (((x) >> 1) & 0x00042000) + \
- (((x) >> 2) & 0x0009c003) + \
- (((x) >> 3) & 0x00021080) + \
- (((x) >> 4) & 0x00000010) + \
- (((x) >> 5) & 0x00000040) + \
- (((x) >> 7) & 0x00000024) + \
- (((x) >> 10) & 0x00000008) \
- )
-
-/* Mangle address (x) on chip U3 */
-#define ADDR_TO_FLASH_U3(x) \
- ( \
- (((x) & 0x00000080) >> 3) + \
- (((x) & 0x00000040) >> 1) + \
- (((x) & 0x00052020) << 1) + \
- (((x) & 0x00084f03) << 2) + \
- (((x) & 0x00029010) << 3) + \
- (((x) & 0x00000008) << 5) + \
- (((x) & 0x00000004) << 7) \
- )
-
-/* Unmangle address (x) on chip U3 */
-#define FLASH_U3_TO_ADDR(x) \
- ( \
- (((x) << 3) & 0x00000080) + \
- (((x) << 1) & 0x00000040) + \
- (((x) >> 1) & 0x00052020) + \
- (((x) >> 2) & 0x00084f03) + \
- (((x) >> 3) & 0x00029010) + \
- (((x) >> 5) & 0x00000008) + \
- (((x) >> 7) & 0x00000004) \
- )
-
-/***************************************************************************************************/
-
-static __u8 read8 (__u32 offset)
-{
- volatile __u8 *data = (__u8 *) (FLASH_OFFSET + offset);
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x -> 0x%.2x\n", __func__, offset, *data);
-#endif
- return (*data);
-}
-
-static __u32 read32 (__u32 offset)
-{
- volatile __u32 *data = (__u32 *) (FLASH_OFFSET + offset);
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x -> 0x%.8x\n", __func__, offset, *data);
-#endif
- return (*data);
-}
-
-static void write32 (__u32 x,__u32 offset)
-{
- volatile __u32 *data = (__u32 *) (FLASH_OFFSET + offset);
- *data = x;
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x <- 0x%.8x\n", __func__, offset, *data);
-#endif
-}
-
-/***************************************************************************************************/
-
-/*
- * Probe for 16mbit flash memory on a LART board without doing
- * too much damage. Since we need to write 1 dword to memory,
- * we're f**cked if this happens to be DRAM since we can't
- * restore the memory (otherwise we might exit Read Array mode).
- *
- * Returns 1 if we found 16mbit flash memory on LART, 0 otherwise.
- */
-static int flash_probe (void)
-{
- __u32 manufacturer,devtype;
-
- /* setup "Read Identifier Codes" mode */
- write32 (DATA_TO_FLASH (READ_ID_CODES),0x00000000);
-
- /* probe U2. U2/U3 returns the same data since the first 3
- * address lines is mangled in the same way */
- manufacturer = FLASH_TO_DATA (read32 (ADDR_TO_FLASH_U2 (0x00000000)));
- devtype = FLASH_TO_DATA (read32 (ADDR_TO_FLASH_U2 (0x00000001)));
-
- /* put the flash back into command mode */
- write32 (DATA_TO_FLASH (READ_ARRAY),0x00000000);
-
- return (manufacturer == FLASH_MANUFACTURER && (devtype == FLASH_DEVICE_16mbit_TOP || devtype == FLASH_DEVICE_16mbit_BOTTOM));
-}
-
-/*
- * Erase one block of flash memory at offset ``offset'' which is any
- * address within the block which should be erased.
- *
- * Returns 1 if successful, 0 otherwise.
- */
-static inline int erase_block (__u32 offset)
-{
- __u32 status;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x\n", __func__, offset);
-#endif
-
- /* erase and confirm */
- write32 (DATA_TO_FLASH (ERASE_SETUP),offset);
- write32 (DATA_TO_FLASH (ERASE_CONFIRM),offset);
-
- /* wait for block erase to finish */
- do
- {
- write32 (DATA_TO_FLASH (STATUS_READ),offset);
- status = FLASH_TO_DATA (read32 (offset));
- }
- while ((~status & STATUS_BUSY) != 0);
-
- /* put the flash back into command mode */
- write32 (DATA_TO_FLASH (READ_ARRAY),offset);
-
- /* was the erase successful? */
- if ((status & STATUS_ERASE_ERR))
- {
- printk (KERN_WARNING "%s: erase error at address 0x%.8x.\n",module_name,offset);
- return (0);
- }
-
- return (1);
-}
-
-static int flash_erase (struct mtd_info *mtd,struct erase_info *instr)
-{
- __u32 addr,len;
- int i,first;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(addr = 0x%.8x, len = %d)\n", __func__, instr->addr, instr->len);
-#endif
-
- /*
- * check that both start and end of the requested erase are
- * aligned with the erasesize at the appropriate addresses.
- *
- * skip all erase regions which are ended before the start of
- * the requested erase. Actually, to save on the calculations,
- * we skip to the first erase region which starts after the
- * start of the requested erase, and then go back one.
- */
- for (i = 0; i < mtd->numeraseregions && instr->addr >= mtd->eraseregions[i].offset; i++) ;
- i--;
-
- /*
- * ok, now i is pointing at the erase region in which this
- * erase request starts. Check the start of the requested
- * erase range is aligned with the erase size which is in
- * effect here.
- */
- if (i < 0 || (instr->addr & (mtd->eraseregions[i].erasesize - 1)))
- return -EINVAL;
-
- /* Remember the erase region we start on */
- first = i;
-
- /*
- * next, check that the end of the requested erase is aligned
- * with the erase region at that address.
- *
- * as before, drop back one to point at the region in which
- * the address actually falls
- */
- for (; i < mtd->numeraseregions && instr->addr + instr->len >= mtd->eraseregions[i].offset; i++) ;
- i--;
-
- /* is the end aligned on a block boundary? */
- if (i < 0 || ((instr->addr + instr->len) & (mtd->eraseregions[i].erasesize - 1)))
- return -EINVAL;
-
- addr = instr->addr;
- len = instr->len;
-
- i = first;
-
- /* now erase those blocks */
- while (len)
- {
- if (!erase_block (addr))
- return (-EIO);
-
- addr += mtd->eraseregions[i].erasesize;
- len -= mtd->eraseregions[i].erasesize;
-
- if (addr == mtd->eraseregions[i].offset + (mtd->eraseregions[i].erasesize * mtd->eraseregions[i].numblocks)) i++;
- }
-
- return (0);
-}
-
-static int flash_read (struct mtd_info *mtd,loff_t from,size_t len,size_t *retlen,u_char *buf)
-{
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(from = 0x%.8x, len = %d)\n", __func__, (__u32)from, len);
-#endif
-
- /* we always read len bytes */
- *retlen = len;
-
- /* first, we read bytes until we reach a dword boundary */
- if (from & (BUSWIDTH - 1))
- {
- int gap = BUSWIDTH - (from & (BUSWIDTH - 1));
-
- while (len && gap--) {
- *buf++ = read8 (from++);
- len--;
- }
- }
-
- /* now we read dwords until we reach a non-dword boundary */
- while (len >= BUSWIDTH)
- {
- *((__u32 *) buf) = read32 (from);
-
- buf += BUSWIDTH;
- from += BUSWIDTH;
- len -= BUSWIDTH;
- }
-
- /* top up the last unaligned bytes */
- if (len & (BUSWIDTH - 1))
- while (len--) *buf++ = read8 (from++);
-
- return (0);
-}
-
-/*
- * Write one dword ``x'' to flash memory at offset ``offset''. ``offset''
- * must be 32 bits, i.e. it must be on a dword boundary.
- *
- * Returns 1 if successful, 0 otherwise.
- */
-static inline int write_dword (__u32 offset,__u32 x)
-{
- __u32 status;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(): 0x%.8x <- 0x%.8x\n", __func__, offset, x);
-#endif
-
- /* setup writing */
- write32 (DATA_TO_FLASH (PGM_SETUP),offset);
-
- /* write the data */
- write32 (x,offset);
-
- /* wait for the write to finish */
- do
- {
- write32 (DATA_TO_FLASH (STATUS_READ),offset);
- status = FLASH_TO_DATA (read32 (offset));
- }
- while ((~status & STATUS_BUSY) != 0);
-
- /* put the flash back into command mode */
- write32 (DATA_TO_FLASH (READ_ARRAY),offset);
-
- /* was the write successful? */
- if ((status & STATUS_PGM_ERR) || read32 (offset) != x)
- {
- printk (KERN_WARNING "%s: write error at address 0x%.8x.\n",module_name,offset);
- return (0);
- }
-
- return (1);
-}
-
-static int flash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen,const u_char *buf)
-{
- __u8 tmp[4];
- int i,n;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG "%s(to = 0x%.8x, len = %d)\n", __func__, (__u32)to, len);
-#endif
-
- /* sanity checks */
- if (!len) return (0);
-
- /* first, we write a 0xFF.... padded byte until we reach a dword boundary */
- if (to & (BUSWIDTH - 1))
- {
- __u32 aligned = to & ~(BUSWIDTH - 1);
- int gap = to - aligned;
-
- i = n = 0;
-
- while (gap--) tmp[i++] = 0xFF;
- while (len && i < BUSWIDTH) {
- tmp[i++] = buf[n++];
- len--;
- }
- while (i < BUSWIDTH) tmp[i++] = 0xFF;
-
- if (!write_dword (aligned,*((__u32 *) tmp))) return (-EIO);
-
- to += n;
- buf += n;
- *retlen += n;
- }
-
- /* now we write dwords until we reach a non-dword boundary */
- while (len >= BUSWIDTH)
- {
- if (!write_dword (to,*((__u32 *) buf))) return (-EIO);
-
- to += BUSWIDTH;
- buf += BUSWIDTH;
- *retlen += BUSWIDTH;
- len -= BUSWIDTH;
- }
-
- /* top up the last unaligned bytes, padded with 0xFF.... */
- if (len & (BUSWIDTH - 1))
- {
- i = n = 0;
-
- while (len--) tmp[i++] = buf[n++];
- while (i < BUSWIDTH) tmp[i++] = 0xFF;
-
- if (!write_dword (to,*((__u32 *) tmp))) return (-EIO);
-
- *retlen += n;
- }
-
- return (0);
-}
-
-/***************************************************************************************************/
-
-static struct mtd_info mtd;
-
-static struct mtd_erase_region_info erase_regions[] = {
- /* parameter blocks */
- {
- .offset = 0x00000000,
- .erasesize = FLASH_BLOCKSIZE_PARAM,
- .numblocks = FLASH_NUMBLOCKS_16m_PARAM,
- },
- /* main blocks */
- {
- .offset = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM,
- .erasesize = FLASH_BLOCKSIZE_MAIN,
- .numblocks = FLASH_NUMBLOCKS_16m_MAIN,
- }
-};
-
-static const struct mtd_partition lart_partitions[] = {
- /* blob */
- {
- .name = "blob",
- .offset = PART_BLOB_START,
- .size = PART_BLOB_LEN,
- },
- /* kernel */
- {
- .name = "kernel",
- .offset = PART_KERNEL_START, /* MTDPART_OFS_APPEND */
- .size = PART_KERNEL_LEN,
- },
- /* initial ramdisk / file system */
- {
- .name = "file system",
- .offset = PART_INITRD_START, /* MTDPART_OFS_APPEND */
- .size = PART_INITRD_LEN, /* MTDPART_SIZ_FULL */
- }
-};
-#define NUM_PARTITIONS ARRAY_SIZE(lart_partitions)
-
-static int __init lart_flash_init (void)
-{
- int result;
- memset (&mtd,0,sizeof (mtd));
- printk ("MTD driver for LART. Written by Abraham vd Merwe <abraham@2d3d.co.za>\n");
- printk ("%s: Probing for 28F160x3 flash on LART...\n",module_name);
- if (!flash_probe ())
- {
- printk (KERN_WARNING "%s: Found no LART compatible flash device\n",module_name);
- return (-ENXIO);
- }
- printk ("%s: This looks like a LART board to me.\n",module_name);
- mtd.name = module_name;
- mtd.type = MTD_NORFLASH;
- mtd.writesize = 1;
- mtd.writebufsize = 4;
- mtd.flags = MTD_CAP_NORFLASH;
- mtd.size = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM + FLASH_BLOCKSIZE_MAIN * FLASH_NUMBLOCKS_16m_MAIN;
- mtd.erasesize = FLASH_BLOCKSIZE_MAIN;
- mtd.numeraseregions = ARRAY_SIZE(erase_regions);
- mtd.eraseregions = erase_regions;
- mtd._erase = flash_erase;
- mtd._read = flash_read;
- mtd._write = flash_write;
- mtd.owner = THIS_MODULE;
-
-#ifdef LART_DEBUG
- printk (KERN_DEBUG
- "mtd.name = %s\n"
- "mtd.size = 0x%.8x (%uM)\n"
- "mtd.erasesize = 0x%.8x (%uK)\n"
- "mtd.numeraseregions = %d\n",
- mtd.name,
- mtd.size,mtd.size / (1024*1024),
- mtd.erasesize,mtd.erasesize / 1024,
- mtd.numeraseregions);
-
- if (mtd.numeraseregions)
- for (result = 0; result < mtd.numeraseregions; result++)
- printk (KERN_DEBUG
- "\n\n"
- "mtd.eraseregions[%d].offset = 0x%.8x\n"
- "mtd.eraseregions[%d].erasesize = 0x%.8x (%uK)\n"
- "mtd.eraseregions[%d].numblocks = %d\n",
- result,mtd.eraseregions[result].offset,
- result,mtd.eraseregions[result].erasesize,mtd.eraseregions[result].erasesize / 1024,
- result,mtd.eraseregions[result].numblocks);
-
- printk ("\npartitions = %d\n", ARRAY_SIZE(lart_partitions));
-
- for (result = 0; result < ARRAY_SIZE(lart_partitions); result++)
- printk (KERN_DEBUG
- "\n\n"
- "lart_partitions[%d].name = %s\n"
- "lart_partitions[%d].offset = 0x%.8x\n"
- "lart_partitions[%d].size = 0x%.8x (%uK)\n",
- result,lart_partitions[result].name,
- result,lart_partitions[result].offset,
- result,lart_partitions[result].size,lart_partitions[result].size / 1024);
-#endif
-
- result = mtd_device_register(&mtd, lart_partitions,
- ARRAY_SIZE(lart_partitions));
-
- return (result);
-}
-
-static void __exit lart_flash_exit (void)
-{
- mtd_device_unregister(&mtd);
-}
-
-module_init (lart_flash_init);
-module_exit (lart_flash_exit);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Abraham vd Merwe <abraham@2d3d.co.za>");
-MODULE_DESCRIPTION("MTD driver for Intel 28F160F3 on LART board");
--
2.29.2
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH 06/11] mtd: remove lart flash driver
2022-10-21 15:49 ` Arnd Bergmann
(?)
@ 2022-11-07 16:22 ` Miquel Raynal
-1 siblings, 0 replies; 55+ messages in thread
From: Miquel Raynal @ 2022-11-07 16:22 UTC (permalink / raw)
To: Arnd Bergmann, linux-arm-kernel, Russell King, Linus Walleij,
Lubomir Rintel, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra
Cc: linux-kernel, Arnd Bergmann, linux-mtd
On Fri, 2022-10-21 at 15:49:36 UTC, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The sa1100 lart platform was removed, so its flash driver is
> no longer useful.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/next, thanks.
Miquel
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 06/11] mtd: remove lart flash driver
@ 2022-11-07 16:22 ` Miquel Raynal
0 siblings, 0 replies; 55+ messages in thread
From: Miquel Raynal @ 2022-11-07 16:22 UTC (permalink / raw)
To: Arnd Bergmann, linux-arm-kernel, Russell King, Linus Walleij,
Lubomir Rintel, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra
Cc: linux-kernel, Arnd Bergmann, linux-mtd
On Fri, 2022-10-21 at 15:49:36 UTC, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The sa1100 lart platform was removed, so its flash driver is
> no longer useful.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/next, thanks.
Miquel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 06/11] mtd: remove lart flash driver
@ 2022-11-07 16:22 ` Miquel Raynal
0 siblings, 0 replies; 55+ messages in thread
From: Miquel Raynal @ 2022-11-07 16:22 UTC (permalink / raw)
To: Arnd Bergmann, linux-arm-kernel, Russell King, Linus Walleij,
Lubomir Rintel, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra
Cc: linux-kernel, Arnd Bergmann, linux-mtd
On Fri, 2022-10-21 at 15:49:36 UTC, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The sa1100 lart platform was removed, so its flash driver is
> no longer useful.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/next, thanks.
Miquel
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH 07/11] ARM: mmp: select specific CPU implementation
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann
From: Arnd Bergmann <arnd@arndb.de>
The behavior of the MMP platform code depends on whether the
CPU_PXA168/CPU_PXA910/CPU_MMP2 symbols are enabled or not.
I believe the intention here was that these can be left disabled for
a pure DT-only build, but it's not clear if that actually works. At
the minimum, the cpu_is_pxa168() and cpu_is_pxa910() checks behave
differently, which causes changes in the power management code.
For the moment, make the behavior depend on whether CONFIG_ATAGS is set
or not, to make it easier to bisect the removal of the old code later.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-mmp/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index d71417d57961..da38106149c4 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -113,6 +113,8 @@ config MACH_MMP_DT
select PINCTRL_SINGLE
select ARCH_HAS_RESET_CONTROLLER
select CPU_MOHAWK
+ select CPU_PXA168 if ATAGS
+ select CPU_PXA910 if ATAGS
help
Include support for Marvell MMP2 based platforms using
the device tree. Needn't select any other machine while
@@ -125,6 +127,7 @@ config MACH_MMP2_DT
select PINCTRL_SINGLE
select ARCH_HAS_RESET_CONTROLLER
select CPU_PJ4
+ select CPU_MMP2 if ATAGS
select PM_GENERIC_DOMAINS if PM
select PM_GENERIC_DOMAINS_OF if PM && OF
help
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread
* [PATCH 07/11] ARM: mmp: select specific CPU implementation
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann
From: Arnd Bergmann <arnd@arndb.de>
The behavior of the MMP platform code depends on whether the
CPU_PXA168/CPU_PXA910/CPU_MMP2 symbols are enabled or not.
I believe the intention here was that these can be left disabled for
a pure DT-only build, but it's not clear if that actually works. At
the minimum, the cpu_is_pxa168() and cpu_is_pxa910() checks behave
differently, which causes changes in the power management code.
For the moment, make the behavior depend on whether CONFIG_ATAGS is set
or not, to make it easier to bisect the removal of the old code later.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-mmp/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index d71417d57961..da38106149c4 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -113,6 +113,8 @@ config MACH_MMP_DT
select PINCTRL_SINGLE
select ARCH_HAS_RESET_CONTROLLER
select CPU_MOHAWK
+ select CPU_PXA168 if ATAGS
+ select CPU_PXA910 if ATAGS
help
Include support for Marvell MMP2 based platforms using
the device tree. Needn't select any other machine while
@@ -125,6 +127,7 @@ config MACH_MMP2_DT
select PINCTRL_SINGLE
select ARCH_HAS_RESET_CONTROLLER
select CPU_PJ4
+ select CPU_MMP2 if ATAGS
select PM_GENERIC_DOMAINS if PM
select PM_GENERIC_DOMAINS_OF if PM && OF
help
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 55+ messages in thread
* [PATCH 08/11] ARM: mmp: remove all board files
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann
From: Arnd Bergmann <arnd@arndb.de>
The old-style board files were marked as 'unused' a while ago
and can now be removed for good, leaving only devicetree based
boot support.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/configs/pxa168_defconfig | 3 -
arch/arm/configs/pxa910_defconfig | 2 -
arch/arm/mach-mmp/Kconfig | 96 --------
arch/arm/mach-mmp/Makefile | 9 -
arch/arm/mach-mmp/aspenite.c | 284 ---------------------
arch/arm/mach-mmp/avengers_lite.c | 55 -----
arch/arm/mach-mmp/brownstone.c | 237 ------------------
arch/arm/mach-mmp/flint.c | 131 ----------
arch/arm/mach-mmp/gplugd.c | 206 ----------------
arch/arm/mach-mmp/jasper.c | 185 --------------
arch/arm/mach-mmp/mfp-mmp2.h | 396 ------------------------------
arch/arm/mach-mmp/mfp-pxa168.h | 355 --------------------------
arch/arm/mach-mmp/mfp-pxa910.h | 170 -------------
arch/arm/mach-mmp/teton_bga.c | 100 --------
arch/arm/mach-mmp/teton_bga.h | 22 --
arch/arm/mach-mmp/ttc_dkb.c | 315 ------------------------
16 files changed, 2566 deletions(-)
delete mode 100644 arch/arm/mach-mmp/aspenite.c
delete mode 100644 arch/arm/mach-mmp/avengers_lite.c
delete mode 100644 arch/arm/mach-mmp/brownstone.c
delete mode 100644 arch/arm/mach-mmp/flint.c
delete mode 100644 arch/arm/mach-mmp/gplugd.c
delete mode 100644 arch/arm/mach-mmp/jasper.c
delete mode 100644 arch/arm/mach-mmp/mfp-mmp2.h
delete mode 100644 arch/arm/mach-mmp/mfp-pxa168.h
delete mode 100644 arch/arm/mach-mmp/mfp-pxa910.h
delete mode 100644 arch/arm/mach-mmp/teton_bga.c
delete mode 100644 arch/arm/mach-mmp/teton_bga.h
delete mode 100644 arch/arm/mach-mmp/ttc_dkb.c
diff --git a/arch/arm/configs/pxa168_defconfig b/arch/arm/configs/pxa168_defconfig
index 826ebbef2e3c..8422ddc9bab2 100644
--- a/arch/arm/configs/pxa168_defconfig
+++ b/arch/arm/configs/pxa168_defconfig
@@ -1,9 +1,6 @@
CONFIG_SYSVIPC=y
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_BLK_DEV_BSG is not set
-CONFIG_MACH_ASPENITE=y
-CONFIG_MACH_ZYLONITE2=y
-CONFIG_MACH_AVENGERS_LITE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
diff --git a/arch/arm/configs/pxa910_defconfig b/arch/arm/configs/pxa910_defconfig
index 353008de5678..48e41ca582af 100644
--- a/arch/arm/configs/pxa910_defconfig
+++ b/arch/arm/configs/pxa910_defconfig
@@ -11,8 +11,6 @@ CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
-CONFIG_MACH_TAVOREVB=y
-CONFIG_MACH_TTC_DKB=y
CONFIG_AEABI=y
CONFIG_FPE_NWFPE=y
CONFIG_SLAB=y
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index da38106149c4..a1396c495b85 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -13,99 +13,6 @@ if ARCH_MMP
menu "Marvell PXA168/910/MMP2 Implementations"
-if ATAGS
-
-config MACH_ASPENITE
- bool "Marvell's PXA168 Aspenite Development Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA168
- help
- Say 'Y' here if you want to support the Marvell PXA168-based
- Aspenite Development Board.
-
-config MACH_ZYLONITE2
- bool "Marvell's PXA168 Zylonite2 Development Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA168
- help
- Say 'Y' here if you want to support the Marvell PXA168-based
- Zylonite2 Development Board.
-
-config MACH_AVENGERS_LITE
- bool "Marvell's PXA168 Avengers Lite Development Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA168
- help
- Say 'Y' here if you want to support the Marvell PXA168-based
- Avengers Lite Development Board.
-
-config MACH_TTC_DKB
- bool "Marvell's PXA910 TavorEVB/TTC_DKB Development Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA910
- help
- Say 'Y' here if you want to support the Marvell PXA910-based
- TTC_DKB Development Board.
-
-config MACH_BROWNSTONE
- bool "Marvell's Brownstone Development Platform"
- depends on ARCH_MULTI_V7
- depends on UNUSED_BOARD_FILES
- select CPU_MMP2
- help
- Say 'Y' here if you want to support the Marvell MMP2-based
- Brown Development Platform.
- MMP2-based board can't be co-existed with PXA168-based &
- PXA910-based development board. Since MMP2 is compatible to
- ARMv7 architecture.
-
-config MACH_FLINT
- bool "Marvell's Flint Development Platform"
- depends on ARCH_MULTI_V7
- depends on UNUSED_BOARD_FILES
- select CPU_MMP2
- help
- Say 'Y' here if you want to support the Marvell MMP2-based
- Flint Development Platform.
- MMP2-based board can't be co-existed with PXA168-based &
- PXA910-based development board. Since MMP2 is compatible to
- ARMv7 architecture.
-
-config MACH_MARVELL_JASPER
- bool "Marvell's Jasper Development Platform"
- depends on ARCH_MULTI_V7
- depends on UNUSED_BOARD_FILES
- select CPU_MMP2
- help
- Say 'Y' here if you want to support the Marvell MMP2-base
- Jasper Development Platform.
- MMP2-based board can't be co-existed with PXA168-based &
- PXA910-based development board. Since MMP2 is compatible to
- ARMv7 architecture.
-
-config MACH_TETON_BGA
- bool "Marvell's PXA168 Teton BGA Development Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA168
- help
- Say 'Y' here if you want to support the Marvell PXA168-based
- Teton BGA Development Board.
-
-config MACH_GPLUGD
- bool "Marvell's PXA168 GuruPlug Display (gplugD) Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA168
- help
- Say 'Y' here if you want to support the Marvell PXA168-based
- GuruPlug Display (gplugD) Board
-endif
-
config MACH_MMP_DT
bool "Support MMP (ARMv5) platforms from device tree"
depends on ARCH_MULTI_V5
@@ -178,7 +85,4 @@ config USB_EHCI_MV_U2O
help
Enables support for OTG controller which can be switched to host mode.
-config MMP_SRAM
- bool
-
endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 539d750aaf10..65cc9b691983 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -19,15 +19,6 @@ obj-$(CONFIG_MACH_MMP3_DT) += platsmp.o
endif
# board support
-obj-$(CONFIG_MACH_ASPENITE) += aspenite.o
-obj-$(CONFIG_MACH_ZYLONITE2) += aspenite.o
-obj-$(CONFIG_MACH_AVENGERS_LITE)+= avengers_lite.o
-obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o
-obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o
-obj-$(CONFIG_MACH_FLINT) += flint.o
-obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
obj-$(CONFIG_MACH_MMP_DT) += mmp-dt.o
obj-$(CONFIG_MACH_MMP2_DT) += mmp2-dt.o
obj-$(CONFIG_MACH_MMP3_DT) += mmp3.o
-obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o
-obj-$(CONFIG_MACH_GPLUGD) += gplugd.o
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
deleted file mode 100644
index 6314824b62fc..000000000000
--- a/arch/arm/mach-mmp/aspenite.c
+++ /dev/null
@@ -1,284 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/aspenite.c
- *
- * Support for the Marvell PXA168-based Aspenite and Zylonite2
- * Development Platform.
- */
-#include <linux/gpio.h>
-#include <linux/gpio-pxa.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/smc91x.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/rawnand.h>
-#include <linux/interrupt.h>
-#include <linux/platform_data/mv_usb.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <video/pxa168fb.h>
-#include <linux/input.h>
-#include <linux/platform_data/keypad-pxa27x.h>
-
-#include "addr-map.h"
-#include "mfp-pxa168.h"
-#include "pxa168.h"
-#include "pxa910.h"
-#include "irqs.h"
-#include "common.h"
-
-static unsigned long common_pin_config[] __initdata = {
- /* Data Flash Interface */
- GPIO0_DFI_D15,
- GPIO1_DFI_D14,
- GPIO2_DFI_D13,
- GPIO3_DFI_D12,
- GPIO4_DFI_D11,
- GPIO5_DFI_D10,
- GPIO6_DFI_D9,
- GPIO7_DFI_D8,
- GPIO8_DFI_D7,
- GPIO9_DFI_D6,
- GPIO10_DFI_D5,
- GPIO11_DFI_D4,
- GPIO12_DFI_D3,
- GPIO13_DFI_D2,
- GPIO14_DFI_D1,
- GPIO15_DFI_D0,
-
- /* Static Memory Controller */
- GPIO18_SMC_nCS0,
- GPIO34_SMC_nCS1,
- GPIO23_SMC_nLUA,
- GPIO25_SMC_nLLA,
- GPIO28_SMC_RDY,
- GPIO29_SMC_SCLK,
- GPIO35_SMC_BE1,
- GPIO36_SMC_BE2,
- GPIO27_GPIO, /* Ethernet IRQ */
-
- /* UART1 */
- GPIO107_UART1_RXD,
- GPIO108_UART1_TXD,
-
- /* SSP1 */
- GPIO113_I2S_MCLK,
- GPIO114_I2S_FRM,
- GPIO115_I2S_BCLK,
- GPIO116_I2S_RXD,
- GPIO117_I2S_TXD,
-
- /* LCD */
- GPIO56_LCD_FCLK_RD,
- GPIO57_LCD_LCLK_A0,
- GPIO58_LCD_PCLK_WR,
- GPIO59_LCD_DENA_BIAS,
- GPIO60_LCD_DD0,
- GPIO61_LCD_DD1,
- GPIO62_LCD_DD2,
- GPIO63_LCD_DD3,
- GPIO64_LCD_DD4,
- GPIO65_LCD_DD5,
- GPIO66_LCD_DD6,
- GPIO67_LCD_DD7,
- GPIO68_LCD_DD8,
- GPIO69_LCD_DD9,
- GPIO70_LCD_DD10,
- GPIO71_LCD_DD11,
- GPIO72_LCD_DD12,
- GPIO73_LCD_DD13,
- GPIO74_LCD_DD14,
- GPIO75_LCD_DD15,
- GPIO76_LCD_DD16,
- GPIO77_LCD_DD17,
- GPIO78_LCD_DD18,
- GPIO79_LCD_DD19,
- GPIO80_LCD_DD20,
- GPIO81_LCD_DD21,
- GPIO82_LCD_DD22,
- GPIO83_LCD_DD23,
-
- /* Keypad */
- GPIO109_KP_MKIN1,
- GPIO110_KP_MKIN0,
- GPIO111_KP_MKOUT7,
- GPIO112_KP_MKOUT6,
- GPIO121_KP_MKIN4,
-};
-
-static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct smc91x_platdata smc91x_info = {
- .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
-};
-
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = SMC_CS1_PHYS_BASE + 0x300,
- .end = SMC_CS1_PHYS_BASE + 0xfffff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = MMP_GPIO_TO_IRQ(27),
- .end = MMP_GPIO_TO_IRQ(27),
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
- }
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .dev = {
- .platform_data = &smc91x_info,
- },
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static struct mtd_partition aspenite_nand_partitions[] = {
- {
- .name = "bootloader",
- .offset = 0,
- .size = SZ_1M,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "reserved",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_128K,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "reserved",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_8M,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = (SZ_2M + SZ_1M),
- .mask_flags = 0,
- }, {
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_32M + SZ_16M,
- .mask_flags = 0,
- }
-};
-
-static struct pxa3xx_nand_platform_data aspenite_nand_info = {
- .parts = aspenite_nand_partitions,
- .nr_parts = ARRAY_SIZE(aspenite_nand_partitions),
-};
-
-static struct i2c_board_info aspenite_i2c_info[] __initdata = {
- { I2C_BOARD_INFO("wm8753", 0x1b), },
-};
-
-static struct fb_videomode video_modes[] = {
- [0] = {
- .pixclock = 30120,
- .refresh = 60,
- .xres = 800,
- .yres = 480,
- .hsync_len = 1,
- .left_margin = 215,
- .right_margin = 40,
- .vsync_len = 1,
- .upper_margin = 34,
- .lower_margin = 10,
- .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
- },
-};
-
-struct pxa168fb_mach_info aspenite_lcd_info = {
- .id = "Graphic Frame",
- .modes = video_modes,
- .num_modes = ARRAY_SIZE(video_modes),
- .pix_fmt = PIX_FMT_RGB565,
- .io_pin_allocation_mode = PIN_MODE_DUMB_24,
- .dumb_mode = DUMB_MODE_RGB888,
- .active = 1,
- .panel_rbswap = 0,
- .invert_pixclock = 0,
-};
-
-static const unsigned int aspenite_matrix_key_map[] = {
- KEY(0, 6, KEY_UP), /* SW 4 */
- KEY(0, 7, KEY_DOWN), /* SW 5 */
- KEY(1, 6, KEY_LEFT), /* SW 6 */
- KEY(1, 7, KEY_RIGHT), /* SW 7 */
- KEY(4, 6, KEY_ENTER), /* SW 8 */
- KEY(4, 7, KEY_ESC), /* SW 9 */
-};
-
-static struct matrix_keymap_data aspenite_matrix_keymap_data = {
- .keymap = aspenite_matrix_key_map,
- .keymap_size = ARRAY_SIZE(aspenite_matrix_key_map),
-};
-
-static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = {
- .matrix_key_rows = 5,
- .matrix_key_cols = 8,
- .matrix_keymap_data = &aspenite_matrix_keymap_data,
- .debounce_interval = 30,
-};
-
-#if IS_ENABLED(CONFIG_USB_EHCI_MV)
-static struct mv_usb_platform_data pxa168_sph_pdata = {
- .mode = MV_USB_MODE_HOST,
- .phy_init = pxa_usb_phy_init,
- .phy_deinit = pxa_usb_phy_deinit,
- .set_vbus = NULL,
-};
-#endif
-
-static void __init common_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(common_pin_config));
-
- /* on-chip devices */
- pxa168_add_uart(1);
- pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
- pxa168_add_ssp(1);
- pxa168_add_nand(&aspenite_nand_info);
- pxa168_add_fb(&aspenite_lcd_info);
- pxa168_add_keypad(&aspenite_keypad_info);
- platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&pxa168_device_gpio);
-
- /* off-chip devices */
- platform_device_register(&smc91x_device);
-
-#if IS_ENABLED(CONFIG_USB_SUPPORT)
-#if IS_ENABLED(CONFIG_PHY_PXA_USB)
- platform_device_register(&pxa168_device_usb_phy);
-#endif
-
-#if IS_ENABLED(CONFIG_USB_EHCI_MV)
- pxa168_add_usb_host(&pxa168_sph_pdata);
-#endif
-#endif
-}
-
-MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = MMP_NR_IRQS,
- .init_irq = pxa168_init_irq,
- .init_time = pxa168_timer_init,
- .init_machine = common_init,
- .restart = pxa168_restart,
-MACHINE_END
-
-MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = MMP_NR_IRQS,
- .init_irq = pxa168_init_irq,
- .init_time = pxa168_timer_init,
- .init_machine = common_init,
- .restart = pxa168_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
deleted file mode 100644
index 12e5a9441df9..000000000000
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ /dev/null
@@ -1,55 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/avengers_lite.c
- *
- * Support for the Marvell PXA168-based Avengers lite Development Platform.
- *
- * Copyright (C) 2009-2010 Marvell International Ltd.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/gpio-pxa.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "addr-map.h"
-#include "mfp-pxa168.h"
-#include "pxa168.h"
-#include "irqs.h"
-
-
-#include "common.h"
-#include <linux/delay.h>
-
-/* Avengers lite MFP configurations */
-static unsigned long avengers_lite_pin_config_V16F[] __initdata = {
- /* DEBUG_UART */
- GPIO88_UART2_TXD,
- GPIO89_UART2_RXD,
-};
-
-static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static void __init avengers_lite_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(avengers_lite_pin_config_V16F));
-
- /* on-chip devices */
- pxa168_add_uart(2);
- platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&pxa168_device_gpio);
-}
-
-MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = MMP_NR_IRQS,
- .init_irq = pxa168_init_irq,
- .init_time = pxa168_timer_init,
- .init_machine = avengers_lite_init,
- .restart = pxa168_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
deleted file mode 100644
index ce93bc395546..000000000000
--- a/arch/arm/mach-mmp/brownstone.c
+++ /dev/null
@@ -1,237 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/brownstone.c
- *
- * Support for the Marvell Brownstone Development Platform.
- *
- * Copyright (C) 2009-2010 Marvell International Ltd.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/gpio-pxa.h>
-#include <linux/gpio/machine.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/max8649.h>
-#include <linux/regulator/fixed.h>
-#include <linux/mfd/max8925.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "addr-map.h"
-#include "mfp-mmp2.h"
-#include "mmp2.h"
-#include "irqs.h"
-
-#include "common.h"
-
-#define BROWNSTONE_NR_IRQS (MMP_NR_IRQS + 40)
-
-#define GPIO_5V_ENABLE (89)
-
-static unsigned long brownstone_pin_config[] __initdata = {
- /* UART1 */
- GPIO29_UART1_RXD,
- GPIO30_UART1_TXD,
-
- /* UART3 */
- GPIO51_UART3_RXD,
- GPIO52_UART3_TXD,
-
- /* DFI */
- GPIO168_DFI_D0,
- GPIO167_DFI_D1,
- GPIO166_DFI_D2,
- GPIO165_DFI_D3,
- GPIO107_DFI_D4,
- GPIO106_DFI_D5,
- GPIO105_DFI_D6,
- GPIO104_DFI_D7,
- GPIO111_DFI_D8,
- GPIO164_DFI_D9,
- GPIO163_DFI_D10,
- GPIO162_DFI_D11,
- GPIO161_DFI_D12,
- GPIO110_DFI_D13,
- GPIO109_DFI_D14,
- GPIO108_DFI_D15,
- GPIO143_ND_nCS0,
- GPIO144_ND_nCS1,
- GPIO147_ND_nWE,
- GPIO148_ND_nRE,
- GPIO150_ND_ALE,
- GPIO149_ND_CLE,
- GPIO112_ND_RDY0,
- GPIO160_ND_RDY1,
-
- /* PMIC */
- PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
-
- /* MMC0 */
- GPIO131_MMC1_DAT3 | MFP_PULL_HIGH,
- GPIO132_MMC1_DAT2 | MFP_PULL_HIGH,
- GPIO133_MMC1_DAT1 | MFP_PULL_HIGH,
- GPIO134_MMC1_DAT0 | MFP_PULL_HIGH,
- GPIO136_MMC1_CMD | MFP_PULL_HIGH,
- GPIO139_MMC1_CLK,
- GPIO140_MMC1_CD | MFP_PULL_LOW,
- GPIO141_MMC1_WP | MFP_PULL_LOW,
-
- /* MMC1 */
- GPIO37_MMC2_DAT3 | MFP_PULL_HIGH,
- GPIO38_MMC2_DAT2 | MFP_PULL_HIGH,
- GPIO39_MMC2_DAT1 | MFP_PULL_HIGH,
- GPIO40_MMC2_DAT0 | MFP_PULL_HIGH,
- GPIO41_MMC2_CMD | MFP_PULL_HIGH,
- GPIO42_MMC2_CLK,
-
- /* MMC2 */
- GPIO165_MMC3_DAT7 | MFP_PULL_HIGH,
- GPIO162_MMC3_DAT6 | MFP_PULL_HIGH,
- GPIO166_MMC3_DAT5 | MFP_PULL_HIGH,
- GPIO163_MMC3_DAT4 | MFP_PULL_HIGH,
- GPIO167_MMC3_DAT3 | MFP_PULL_HIGH,
- GPIO164_MMC3_DAT2 | MFP_PULL_HIGH,
- GPIO168_MMC3_DAT1 | MFP_PULL_HIGH,
- GPIO111_MMC3_DAT0 | MFP_PULL_HIGH,
- GPIO112_MMC3_CMD | MFP_PULL_HIGH,
- GPIO151_MMC3_CLK,
-
- /* 5V regulator */
- GPIO89_GPIO,
-};
-
-static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct regulator_consumer_supply max8649_supply[] = {
- REGULATOR_SUPPLY("vcc_core", NULL),
-};
-
-static struct regulator_init_data max8649_init_data = {
- .constraints = {
- .name = "vcc_core range",
- .min_uV = 1150000,
- .max_uV = 1280000,
- .always_on = 1,
- .boot_on = 1,
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
- },
- .num_consumer_supplies = 1,
- .consumer_supplies = &max8649_supply[0],
-};
-
-static struct max8649_platform_data brownstone_max8649_info = {
- .mode = 2, /* VID1 = 1, VID0 = 0 */
- .extclk = 0,
- .ramp_timing = MAX8649_RAMP_32MV,
- .regulator = &max8649_init_data,
-};
-
-static struct regulator_consumer_supply brownstone_v_5vp_supplies[] = {
- REGULATOR_SUPPLY("v_5vp", NULL),
-};
-
-static struct regulator_init_data brownstone_v_5vp_data = {
- .constraints = {
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .num_consumer_supplies = ARRAY_SIZE(brownstone_v_5vp_supplies),
- .consumer_supplies = brownstone_v_5vp_supplies,
-};
-
-static struct fixed_voltage_config brownstone_v_5vp = {
- .supply_name = "v_5vp",
- .microvolts = 5000000,
- .enabled_at_boot = 1,
- .init_data = &brownstone_v_5vp_data,
-};
-
-static struct platform_device brownstone_v_5vp_device = {
- .name = "reg-fixed-voltage",
- .id = 1,
- .dev = {
- .platform_data = &brownstone_v_5vp,
- },
-};
-
-static struct gpiod_lookup_table brownstone_v_5vp_gpiod_table = {
- .dev_id = "reg-fixed-voltage.1", /* .id set to 1 above */
- .table = {
- GPIO_LOOKUP("gpio-pxa", GPIO_5V_ENABLE,
- NULL, GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct max8925_platform_data brownstone_max8925_info = {
- .irq_base = MMP_NR_IRQS,
-};
-
-static struct i2c_board_info brownstone_twsi1_info[] = {
- [0] = {
- .type = "max8649",
- .addr = 0x60,
- .platform_data = &brownstone_max8649_info,
- },
- [1] = {
- .type = "max8925",
- .addr = 0x3c,
- .irq = IRQ_MMP2_PMIC,
- .platform_data = &brownstone_max8925_info,
- },
-};
-
-static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
- .clk_delay_cycles = 0x1f,
-};
-
-static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc2 = {
- .clk_delay_cycles = 0x1f,
- .flags = PXA_FLAG_CARD_PERMANENT
- | PXA_FLAG_SD_8_BIT_CAPABLE_SLOT,
-};
-
-static struct sram_platdata mmp2_asram_platdata = {
- .pool_name = "asram",
- .granularity = SRAM_GRANULARITY,
-};
-
-static struct sram_platdata mmp2_isram_platdata = {
- .pool_name = "isram",
- .granularity = SRAM_GRANULARITY,
-};
-
-static void __init brownstone_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(brownstone_pin_config));
-
- /* on-chip devices */
- mmp2_add_uart(1);
- mmp2_add_uart(3);
- platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&mmp2_device_gpio);
- mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
- mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
- mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */
- mmp2_add_asram(&mmp2_asram_platdata);
- mmp2_add_isram(&mmp2_isram_platdata);
-
- /* enable 5v regulator */
- gpiod_add_lookup_table(&brownstone_v_5vp_gpiod_table);
- platform_device_register(&brownstone_v_5vp_device);
-}
-
-MACHINE_START(BROWNSTONE, "Brownstone Development Platform")
- /* Maintainer: Haojian Zhuang <haojian.zhuang@marvell.com> */
- .map_io = mmp_map_io,
- .nr_irqs = BROWNSTONE_NR_IRQS,
- .init_irq = mmp2_init_irq,
- .init_time = mmp2_timer_init,
- .init_machine = brownstone_init,
- .restart = mmp_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
deleted file mode 100644
index 9a7054368e55..000000000000
--- a/arch/arm/mach-mmp/flint.c
+++ /dev/null
@@ -1,131 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/flint.c
- *
- * Support for the Marvell Flint Development Platform.
- *
- * Copyright (C) 2009 Marvell International Ltd.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/smc91x.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-#include <linux/gpio-pxa.h>
-#include <linux/interrupt.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "addr-map.h"
-#include "mfp-mmp2.h"
-#include "mmp2.h"
-#include "irqs.h"
-
-#include "common.h"
-
-#define FLINT_NR_IRQS (MMP_NR_IRQS + 48)
-
-static unsigned long flint_pin_config[] __initdata = {
- /* UART1 */
- GPIO45_UART1_RXD,
- GPIO46_UART1_TXD,
-
- /* UART2 */
- GPIO47_UART2_RXD,
- GPIO48_UART2_TXD,
-
- /* SMC */
- GPIO151_SMC_SCLK,
- GPIO145_SMC_nCS0,
- GPIO146_SMC_nCS1,
- GPIO152_SMC_BE0,
- GPIO153_SMC_BE1,
- GPIO154_SMC_IRQ,
- GPIO113_SMC_RDY,
-
- /*Ethernet*/
- GPIO155_GPIO,
-
- /* DFI */
- GPIO168_DFI_D0,
- GPIO167_DFI_D1,
- GPIO166_DFI_D2,
- GPIO165_DFI_D3,
- GPIO107_DFI_D4,
- GPIO106_DFI_D5,
- GPIO105_DFI_D6,
- GPIO104_DFI_D7,
- GPIO111_DFI_D8,
- GPIO164_DFI_D9,
- GPIO163_DFI_D10,
- GPIO162_DFI_D11,
- GPIO161_DFI_D12,
- GPIO110_DFI_D13,
- GPIO109_DFI_D14,
- GPIO108_DFI_D15,
- GPIO143_ND_nCS0,
- GPIO144_ND_nCS1,
- GPIO147_ND_nWE,
- GPIO148_ND_nRE,
- GPIO150_ND_ALE,
- GPIO149_ND_CLE,
- GPIO112_ND_RDY0,
- GPIO160_ND_RDY1,
-};
-
-static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct smc91x_platdata flint_smc91x_info = {
- .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
-};
-
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = SMC_CS1_PHYS_BASE + 0x300,
- .end = SMC_CS1_PHYS_BASE + 0xfffff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = MMP_GPIO_TO_IRQ(155),
- .end = MMP_GPIO_TO_IRQ(155),
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
- }
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .dev = {
- .platform_data = &flint_smc91x_info,
- },
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static void __init flint_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(flint_pin_config));
-
- /* on-chip devices */
- mmp2_add_uart(1);
- mmp2_add_uart(2);
- platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&mmp2_device_gpio);
-
- /* off-chip devices */
- platform_device_register(&smc91x_device);
-}
-
-MACHINE_START(FLINT, "Flint Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = FLINT_NR_IRQS,
- .init_irq = mmp2_init_irq,
- .init_time = mmp2_timer_init,
- .init_machine = flint_init,
- .restart = mmp_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
deleted file mode 100644
index 5888b71944b8..000000000000
--- a/arch/arm/mach-mmp/gplugd.c
+++ /dev/null
@@ -1,206 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/gplugd.c
- *
- * Support for the Marvell PXA168-based GuruPlug Display (gplugD) Platform.
- */
-
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/gpio-pxa.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include "irqs.h"
-#include "pxa168.h"
-#include "mfp-pxa168.h"
-
-#include "common.h"
-
-static unsigned long gplugd_pin_config[] __initdata = {
- /* UART3 */
- GPIO8_UART3_TXD,
- GPIO9_UART3_RXD,
- GPIO1O_UART3_CTS,
- GPIO11_UART3_RTS,
-
- /* USB OTG PEN */
- GPIO18_GPIO,
-
- /* MMC2 */
- GPIO28_MMC2_CMD,
- GPIO29_MMC2_CLK,
- GPIO30_MMC2_DAT0,
- GPIO31_MMC2_DAT1,
- GPIO32_MMC2_DAT2,
- GPIO33_MMC2_DAT3,
-
- /* LCD & HDMI clock selection GPIO: 0: 74.176MHz, 1: 74.25 MHz */
- GPIO35_GPIO,
- GPIO36_GPIO, /* CEC Interrupt */
-
- /* MMC1 */
- GPIO43_MMC1_CLK,
- GPIO49_MMC1_CMD,
- GPIO41_MMC1_DAT0,
- GPIO40_MMC1_DAT1,
- GPIO52_MMC1_DAT2,
- GPIO51_MMC1_DAT3,
- GPIO53_MMC1_CD,
-
- /* LCD */
- GPIO56_LCD_FCLK_RD,
- GPIO57_LCD_LCLK_A0,
- GPIO58_LCD_PCLK_WR,
- GPIO59_LCD_DENA_BIAS,
- GPIO60_LCD_DD0,
- GPIO61_LCD_DD1,
- GPIO62_LCD_DD2,
- GPIO63_LCD_DD3,
- GPIO64_LCD_DD4,
- GPIO65_LCD_DD5,
- GPIO66_LCD_DD6,
- GPIO67_LCD_DD7,
- GPIO68_LCD_DD8,
- GPIO69_LCD_DD9,
- GPIO70_LCD_DD10,
- GPIO71_LCD_DD11,
- GPIO72_LCD_DD12,
- GPIO73_LCD_DD13,
- GPIO74_LCD_DD14,
- GPIO75_LCD_DD15,
- GPIO76_LCD_DD16,
- GPIO77_LCD_DD17,
- GPIO78_LCD_DD18,
- GPIO79_LCD_DD19,
- GPIO80_LCD_DD20,
- GPIO81_LCD_DD21,
- GPIO82_LCD_DD22,
- GPIO83_LCD_DD23,
-
- /* GPIO */
- GPIO84_GPIO,
- GPIO85_GPIO,
-
- /* Fast-Ethernet*/
- GPIO86_TX_CLK,
- GPIO87_TX_EN,
- GPIO88_TX_DQ3,
- GPIO89_TX_DQ2,
- GPIO90_TX_DQ1,
- GPIO91_TX_DQ0,
- GPIO92_MII_CRS,
- GPIO93_MII_COL,
- GPIO94_RX_CLK,
- GPIO95_RX_ER,
- GPIO96_RX_DQ3,
- GPIO97_RX_DQ2,
- GPIO98_RX_DQ1,
- GPIO99_RX_DQ0,
- GPIO100_MII_MDC,
- GPIO101_MII_MDIO,
- GPIO103_RX_DV,
- GPIO104_GPIO, /* Reset PHY */
-
- /* RTC interrupt */
- GPIO102_GPIO,
-
- /* I2C */
- GPIO105_CI2C_SDA,
- GPIO106_CI2C_SCL,
-
- /* SPI NOR Flash on SSP2 */
- GPIO107_SSP2_RXD,
- GPIO108_SSP2_TXD,
- GPIO110_GPIO, /* SPI_CSn */
- GPIO111_SSP2_CLK,
-
- /* Select JTAG */
- GPIO109_GPIO,
-
- /* I2S */
- GPIO114_I2S_FRM,
- GPIO115_I2S_BCLK,
- GPIO116_I2S_TXD
-};
-
-static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct i2c_board_info gplugd_i2c_board_info[] = {
- {
- .type = "isl1208",
- .addr = 0x6F,
- }
-};
-
-/* Bring PHY out of reset by setting GPIO 104 */
-static int gplugd_eth_init(void)
-{
- if (unlikely(gpio_request(104, "ETH_RESET_N"))) {
- printk(KERN_ERR "Can't get hold of GPIO 104 to bring Ethernet "
- "PHY out of reset\n");
- return -EIO;
- }
-
- gpio_direction_output(104, 1);
- gpio_free(104);
- return 0;
-}
-
-struct pxa168_eth_platform_data gplugd_eth_platform_data = {
- .port_number = 0,
- .phy_addr = 0,
- .speed = 0, /* Autonagotiation */
- .intf = PHY_INTERFACE_MODE_RMII,
- .init = gplugd_eth_init,
-};
-
-static void __init select_disp_freq(void)
-{
- /* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */
- if (unlikely(gpio_request(35, "DISP_FREQ_SEL"))) {
- printk(KERN_ERR "Can't get hold of GPIO 35 to select display "
- "frequency\n");
- } else {
- gpio_direction_output(35, 1);
- gpio_free(35);
- }
-
- if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) {
- printk(KERN_ERR "Can't get hold of GPIO 85 to select display "
- "frequency\n");
- } else {
- gpio_direction_output(85, 0);
- gpio_free(85);
- }
-}
-
-static void __init gplugd_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
-
- select_disp_freq();
-
- /* on-chip devices */
- pxa168_add_uart(3);
- pxa168_add_ssp(1);
- pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
- platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&pxa168_device_gpio);
-
- pxa168_add_eth(&gplugd_eth_platform_data);
-}
-
-MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
- .map_io = mmp_map_io,
- .nr_irqs = MMP_NR_IRQS,
- .init_irq = pxa168_init_irq,
- .init_time = pxa168_timer_init,
- .init_machine = gplugd_init,
- .restart = pxa168_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
deleted file mode 100644
index 2578e176fd48..000000000000
--- a/arch/arm/mach-mmp/jasper.c
+++ /dev/null
@@ -1,185 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/jasper.c
- *
- * Support for the Marvell Jasper Development Platform.
- *
- * Copyright (C) 2009-2010 Marvell International Ltd.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/gpio-pxa.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/max8649.h>
-#include <linux/mfd/max8925.h>
-#include <linux/interrupt.h>
-
-#include "irqs.h"
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "addr-map.h"
-#include "mfp-mmp2.h"
-#include "mmp2.h"
-
-#include "common.h"
-
-#define JASPER_NR_IRQS (MMP_NR_IRQS + 48)
-
-static unsigned long jasper_pin_config[] __initdata = {
- /* UART1 */
- GPIO29_UART1_RXD,
- GPIO30_UART1_TXD,
-
- /* UART3 */
- GPIO51_UART3_RXD,
- GPIO52_UART3_TXD,
-
- /* DFI */
- GPIO168_DFI_D0,
- GPIO167_DFI_D1,
- GPIO166_DFI_D2,
- GPIO165_DFI_D3,
- GPIO107_DFI_D4,
- GPIO106_DFI_D5,
- GPIO105_DFI_D6,
- GPIO104_DFI_D7,
- GPIO111_DFI_D8,
- GPIO164_DFI_D9,
- GPIO163_DFI_D10,
- GPIO162_DFI_D11,
- GPIO161_DFI_D12,
- GPIO110_DFI_D13,
- GPIO109_DFI_D14,
- GPIO108_DFI_D15,
- GPIO143_ND_nCS0,
- GPIO144_ND_nCS1,
- GPIO147_ND_nWE,
- GPIO148_ND_nRE,
- GPIO150_ND_ALE,
- GPIO149_ND_CLE,
- GPIO112_ND_RDY0,
- GPIO160_ND_RDY1,
-
- /* PMIC */
- PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
-
- /* MMC1 */
- GPIO131_MMC1_DAT3,
- GPIO132_MMC1_DAT2,
- GPIO133_MMC1_DAT1,
- GPIO134_MMC1_DAT0,
- GPIO136_MMC1_CMD,
- GPIO139_MMC1_CLK,
- GPIO140_MMC1_CD,
- GPIO141_MMC1_WP,
-
- /* MMC2 */
- GPIO37_MMC2_DAT3,
- GPIO38_MMC2_DAT2,
- GPIO39_MMC2_DAT1,
- GPIO40_MMC2_DAT0,
- GPIO41_MMC2_CMD,
- GPIO42_MMC2_CLK,
-
- /* MMC3 */
- GPIO165_MMC3_DAT7,
- GPIO162_MMC3_DAT6,
- GPIO166_MMC3_DAT5,
- GPIO163_MMC3_DAT4,
- GPIO167_MMC3_DAT3,
- GPIO164_MMC3_DAT2,
- GPIO168_MMC3_DAT1,
- GPIO111_MMC3_DAT0,
- GPIO112_MMC3_CMD,
- GPIO151_MMC3_CLK,
-};
-
-static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct regulator_consumer_supply max8649_supply[] = {
- REGULATOR_SUPPLY("vcc_core", NULL),
-};
-
-static struct regulator_init_data max8649_init_data = {
- .constraints = {
- .name = "vcc_core range",
- .min_uV = 1150000,
- .max_uV = 1280000,
- .always_on = 1,
- .boot_on = 1,
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
- },
- .num_consumer_supplies = 1,
- .consumer_supplies = &max8649_supply[0],
-};
-
-static struct max8649_platform_data jasper_max8649_info = {
- .mode = 2, /* VID1 = 1, VID0 = 0 */
- .extclk = 0,
- .ramp_timing = MAX8649_RAMP_32MV,
- .regulator = &max8649_init_data,
-};
-
-static struct max8925_backlight_pdata jasper_backlight_data = {
- .dual_string = 0,
-};
-
-static struct max8925_power_pdata jasper_power_data = {
- .batt_detect = 0, /* can't detect battery by ID pin */
- .topoff_threshold = MAX8925_TOPOFF_THR_10PER,
- .fast_charge = MAX8925_FCHG_1000MA,
-};
-
-static struct max8925_platform_data jasper_max8925_info = {
- .backlight = &jasper_backlight_data,
- .power = &jasper_power_data,
- .irq_base = MMP_NR_IRQS,
-};
-
-static struct i2c_board_info jasper_twsi1_info[] = {
- [0] = {
- .type = "max8649",
- .addr = 0x60,
- .platform_data = &jasper_max8649_info,
- },
- [1] = {
- .type = "max8925",
- .addr = 0x3c,
- .irq = IRQ_MMP2_PMIC,
- .platform_data = &jasper_max8925_info,
- },
-};
-
-static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
- .clk_delay_cycles = 0x1f,
-};
-
-static void __init jasper_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(jasper_pin_config));
-
- /* on-chip devices */
- mmp2_add_uart(1);
- mmp2_add_uart(3);
- mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info));
- platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&mmp2_device_gpio);
- mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
-
- regulator_has_full_constraints();
-}
-
-MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = JASPER_NR_IRQS,
- .init_irq = mmp2_init_irq,
- .init_time = mmp2_timer_init,
- .init_machine = jasper_init,
- .restart = mmp_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/mfp-mmp2.h b/arch/arm/mach-mmp/mfp-mmp2.h
deleted file mode 100644
index 1620222981e3..000000000000
--- a/arch/arm/mach-mmp/mfp-mmp2.h
+++ /dev/null
@@ -1,396 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_MFP_MMP2_H
-#define __ASM_MACH_MFP_MMP2_H
-
-#include "mfp.h"
-
-#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
-#define MFP_DRIVE_SLOW (0x2 << 13)
-#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x6 << 13)
-
-/* GPIO */
-#define GPIO0_GPIO MFP_CFG(GPIO0, AF0)
-#define GPIO1_GPIO MFP_CFG(GPIO1, AF0)
-#define GPIO2_GPIO MFP_CFG(GPIO2, AF0)
-#define GPIO3_GPIO MFP_CFG(GPIO3, AF0)
-#define GPIO4_GPIO MFP_CFG(GPIO4, AF0)
-#define GPIO5_GPIO MFP_CFG(GPIO5, AF0)
-#define GPIO6_GPIO MFP_CFG(GPIO6, AF0)
-#define GPIO7_GPIO MFP_CFG(GPIO7, AF0)
-#define GPIO8_GPIO MFP_CFG(GPIO8, AF0)
-#define GPIO9_GPIO MFP_CFG(GPIO9, AF0)
-#define GPIO10_GPIO MFP_CFG(GPIO10, AF0)
-#define GPIO11_GPIO MFP_CFG(GPIO11, AF0)
-#define GPIO12_GPIO MFP_CFG(GPIO12, AF0)
-#define GPIO13_GPIO MFP_CFG(GPIO13, AF0)
-#define GPIO14_GPIO MFP_CFG(GPIO14, AF0)
-#define GPIO15_GPIO MFP_CFG(GPIO15, AF0)
-#define GPIO16_GPIO MFP_CFG(GPIO16, AF0)
-#define GPIO17_GPIO MFP_CFG(GPIO17, AF0)
-#define GPIO18_GPIO MFP_CFG(GPIO18, AF0)
-#define GPIO19_GPIO MFP_CFG(GPIO19, AF0)
-#define GPIO20_GPIO MFP_CFG(GPIO20, AF0)
-#define GPIO21_GPIO MFP_CFG(GPIO21, AF0)
-#define GPIO22_GPIO MFP_CFG(GPIO22, AF0)
-#define GPIO23_GPIO MFP_CFG(GPIO23, AF0)
-#define GPIO24_GPIO MFP_CFG(GPIO24, AF0)
-#define GPIO25_GPIO MFP_CFG(GPIO25, AF0)
-#define GPIO26_GPIO MFP_CFG(GPIO26, AF0)
-#define GPIO27_GPIO MFP_CFG(GPIO27, AF0)
-#define GPIO28_GPIO MFP_CFG(GPIO28, AF0)
-#define GPIO29_GPIO MFP_CFG(GPIO29, AF0)
-#define GPIO30_GPIO MFP_CFG(GPIO30, AF0)
-#define GPIO31_GPIO MFP_CFG(GPIO31, AF0)
-#define GPIO32_GPIO MFP_CFG(GPIO32, AF0)
-#define GPIO33_GPIO MFP_CFG(GPIO33, AF0)
-#define GPIO34_GPIO MFP_CFG(GPIO34, AF0)
-#define GPIO35_GPIO MFP_CFG(GPIO35, AF0)
-#define GPIO36_GPIO MFP_CFG(GPIO36, AF0)
-#define GPIO37_GPIO MFP_CFG(GPIO37, AF0)
-#define GPIO38_GPIO MFP_CFG(GPIO38, AF0)
-#define GPIO39_GPIO MFP_CFG(GPIO39, AF0)
-#define GPIO40_GPIO MFP_CFG(GPIO40, AF0)
-#define GPIO41_GPIO MFP_CFG(GPIO41, AF0)
-#define GPIO42_GPIO MFP_CFG(GPIO42, AF0)
-#define GPIO43_GPIO MFP_CFG(GPIO43, AF0)
-#define GPIO44_GPIO MFP_CFG(GPIO44, AF0)
-#define GPIO45_GPIO MFP_CFG(GPIO45, AF0)
-#define GPIO46_GPIO MFP_CFG(GPIO46, AF0)
-#define GPIO47_GPIO MFP_CFG(GPIO47, AF0)
-#define GPIO48_GPIO MFP_CFG(GPIO48, AF0)
-#define GPIO49_GPIO MFP_CFG(GPIO49, AF0)
-#define GPIO50_GPIO MFP_CFG(GPIO50, AF0)
-#define GPIO51_GPIO MFP_CFG(GPIO51, AF0)
-#define GPIO52_GPIO MFP_CFG(GPIO52, AF0)
-#define GPIO53_GPIO MFP_CFG(GPIO53, AF0)
-#define GPIO54_GPIO MFP_CFG(GPIO54, AF0)
-#define GPIO55_GPIO MFP_CFG(GPIO55, AF0)
-#define GPIO56_GPIO MFP_CFG(GPIO56, AF0)
-#define GPIO57_GPIO MFP_CFG(GPIO57, AF0)
-#define GPIO58_GPIO MFP_CFG(GPIO58, AF0)
-#define GPIO59_GPIO MFP_CFG(GPIO59, AF0)
-#define GPIO60_GPIO MFP_CFG(GPIO60, AF0)
-#define GPIO61_GPIO MFP_CFG(GPIO61, AF0)
-#define GPIO62_GPIO MFP_CFG(GPIO62, AF0)
-#define GPIO63_GPIO MFP_CFG(GPIO63, AF0)
-#define GPIO64_GPIO MFP_CFG(GPIO64, AF0)
-#define GPIO65_GPIO MFP_CFG(GPIO65, AF0)
-#define GPIO66_GPIO MFP_CFG(GPIO66, AF0)
-#define GPIO67_GPIO MFP_CFG(GPIO67, AF0)
-#define GPIO68_GPIO MFP_CFG(GPIO68, AF0)
-#define GPIO69_GPIO MFP_CFG(GPIO69, AF0)
-#define GPIO70_GPIO MFP_CFG(GPIO70, AF0)
-#define GPIO71_GPIO MFP_CFG(GPIO71, AF0)
-#define GPIO72_GPIO MFP_CFG(GPIO72, AF0)
-#define GPIO73_GPIO MFP_CFG(GPIO73, AF0)
-#define GPIO74_GPIO MFP_CFG(GPIO74, AF0)
-#define GPIO75_GPIO MFP_CFG(GPIO75, AF0)
-#define GPIO76_GPIO MFP_CFG(GPIO76, AF0)
-#define GPIO77_GPIO MFP_CFG(GPIO77, AF0)
-#define GPIO78_GPIO MFP_CFG(GPIO78, AF0)
-#define GPIO79_GPIO MFP_CFG(GPIO79, AF0)
-#define GPIO80_GPIO MFP_CFG(GPIO80, AF0)
-#define GPIO81_GPIO MFP_CFG(GPIO81, AF0)
-#define GPIO82_GPIO MFP_CFG(GPIO82, AF0)
-#define GPIO83_GPIO MFP_CFG(GPIO83, AF0)
-#define GPIO84_GPIO MFP_CFG(GPIO84, AF0)
-#define GPIO85_GPIO MFP_CFG(GPIO85, AF0)
-#define GPIO86_GPIO MFP_CFG(GPIO86, AF0)
-#define GPIO87_GPIO MFP_CFG(GPIO87, AF0)
-#define GPIO88_GPIO MFP_CFG(GPIO88, AF0)
-#define GPIO89_GPIO MFP_CFG(GPIO89, AF0)
-#define GPIO90_GPIO MFP_CFG(GPIO90, AF0)
-#define GPIO91_GPIO MFP_CFG(GPIO91, AF0)
-#define GPIO92_GPIO MFP_CFG(GPIO92, AF0)
-#define GPIO93_GPIO MFP_CFG(GPIO93, AF0)
-#define GPIO94_GPIO MFP_CFG(GPIO94, AF0)
-#define GPIO95_GPIO MFP_CFG(GPIO95, AF0)
-#define GPIO96_GPIO MFP_CFG(GPIO96, AF0)
-#define GPIO97_GPIO MFP_CFG(GPIO97, AF0)
-#define GPIO98_GPIO MFP_CFG(GPIO98, AF0)
-#define GPIO99_GPIO MFP_CFG(GPIO99, AF0)
-#define GPIO100_GPIO MFP_CFG(GPIO100, AF0)
-#define GPIO101_GPIO MFP_CFG(GPIO101, AF0)
-#define GPIO102_GPIO MFP_CFG(GPIO102, AF1)
-#define GPIO103_GPIO MFP_CFG(GPIO103, AF1)
-#define GPIO104_GPIO MFP_CFG(GPIO104, AF1)
-#define GPIO105_GPIO MFP_CFG(GPIO105, AF1)
-#define GPIO106_GPIO MFP_CFG(GPIO106, AF1)
-#define GPIO107_GPIO MFP_CFG(GPIO107, AF1)
-#define GPIO108_GPIO MFP_CFG(GPIO108, AF1)
-#define GPIO109_GPIO MFP_CFG(GPIO109, AF1)
-#define GPIO110_GPIO MFP_CFG(GPIO110, AF1)
-#define GPIO111_GPIO MFP_CFG(GPIO111, AF1)
-#define GPIO112_GPIO MFP_CFG(GPIO112, AF1)
-#define GPIO113_GPIO MFP_CFG(GPIO113, AF1)
-#define GPIO114_GPIO MFP_CFG(GPIO114, AF0)
-#define GPIO115_GPIO MFP_CFG(GPIO115, AF0)
-#define GPIO116_GPIO MFP_CFG(GPIO116, AF0)
-#define GPIO117_GPIO MFP_CFG(GPIO117, AF0)
-#define GPIO118_GPIO MFP_CFG(GPIO118, AF0)
-#define GPIO119_GPIO MFP_CFG(GPIO119, AF0)
-#define GPIO120_GPIO MFP_CFG(GPIO120, AF0)
-#define GPIO121_GPIO MFP_CFG(GPIO121, AF0)
-#define GPIO122_GPIO MFP_CFG(GPIO122, AF0)
-#define GPIO123_GPIO MFP_CFG(GPIO123, AF0)
-#define GPIO124_GPIO MFP_CFG(GPIO124, AF0)
-#define GPIO125_GPIO MFP_CFG(GPIO125, AF0)
-#define GPIO126_GPIO MFP_CFG(GPIO126, AF0)
-#define GPIO127_GPIO MFP_CFG(GPIO127, AF0)
-#define GPIO128_GPIO MFP_CFG(GPIO128, AF0)
-#define GPIO129_GPIO MFP_CFG(GPIO129, AF0)
-#define GPIO130_GPIO MFP_CFG(GPIO130, AF0)
-#define GPIO131_GPIO MFP_CFG(GPIO131, AF0)
-#define GPIO132_GPIO MFP_CFG(GPIO132, AF0)
-#define GPIO133_GPIO MFP_CFG(GPIO133, AF0)
-#define GPIO134_GPIO MFP_CFG(GPIO134, AF0)
-#define GPIO135_GPIO MFP_CFG(GPIO135, AF0)
-#define GPIO136_GPIO MFP_CFG(GPIO136, AF0)
-#define GPIO137_GPIO MFP_CFG(GPIO137, AF0)
-#define GPIO138_GPIO MFP_CFG(GPIO138, AF0)
-#define GPIO139_GPIO MFP_CFG(GPIO139, AF0)
-#define GPIO140_GPIO MFP_CFG(GPIO140, AF0)
-#define GPIO141_GPIO MFP_CFG(GPIO141, AF0)
-#define GPIO142_GPIO MFP_CFG(GPIO142, AF1)
-#define GPIO143_GPIO MFP_CFG(GPIO143, AF1)
-#define GPIO144_GPIO MFP_CFG(GPIO144, AF1)
-#define GPIO145_GPIO MFP_CFG(GPIO145, AF1)
-#define GPIO146_GPIO MFP_CFG(GPIO146, AF1)
-#define GPIO147_GPIO MFP_CFG(GPIO147, AF1)
-#define GPIO148_GPIO MFP_CFG(GPIO148, AF1)
-#define GPIO149_GPIO MFP_CFG(GPIO149, AF1)
-#define GPIO150_GPIO MFP_CFG(GPIO150, AF1)
-#define GPIO151_GPIO MFP_CFG(GPIO151, AF1)
-#define GPIO152_GPIO MFP_CFG(GPIO152, AF1)
-#define GPIO153_GPIO MFP_CFG(GPIO153, AF1)
-#define GPIO154_GPIO MFP_CFG(GPIO154, AF1)
-#define GPIO155_GPIO MFP_CFG(GPIO155, AF1)
-#define GPIO156_GPIO MFP_CFG(GPIO156, AF1)
-#define GPIO157_GPIO MFP_CFG(GPIO157, AF1)
-#define GPIO158_GPIO MFP_CFG(GPIO158, AF1)
-#define GPIO159_GPIO MFP_CFG(GPIO159, AF1)
-#define GPIO160_GPIO MFP_CFG(GPIO160, AF1)
-#define GPIO161_GPIO MFP_CFG(GPIO161, AF1)
-#define GPIO162_GPIO MFP_CFG(GPIO162, AF1)
-#define GPIO163_GPIO MFP_CFG(GPIO163, AF1)
-#define GPIO164_GPIO MFP_CFG(GPIO164, AF1)
-#define GPIO165_GPIO MFP_CFG(GPIO165, AF1)
-#define GPIO166_GPIO MFP_CFG(GPIO166, AF1)
-#define GPIO167_GPIO MFP_CFG(GPIO167, AF1)
-#define GPIO168_GPIO MFP_CFG(GPIO168, AF1)
-
-/* DFI */
-#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0)
-#define GPIO109_DFI_D14 MFP_CFG(GPIO109, AF0)
-#define GPIO110_DFI_D13 MFP_CFG(GPIO110, AF0)
-#define GPIO161_DFI_D12 MFP_CFG(GPIO161, AF0)
-#define GPIO162_DFI_D11 MFP_CFG(GPIO162, AF0)
-#define GPIO163_DFI_D10 MFP_CFG(GPIO163, AF0)
-#define GPIO164_DFI_D9 MFP_CFG(GPIO164, AF0)
-#define GPIO111_DFI_D8 MFP_CFG(GPIO111, AF0)
-#define GPIO104_DFI_D7 MFP_CFG(GPIO104, AF0)
-#define GPIO105_DFI_D6 MFP_CFG(GPIO105, AF0)
-#define GPIO106_DFI_D5 MFP_CFG(GPIO106, AF0)
-#define GPIO107_DFI_D4 MFP_CFG(GPIO107, AF0)
-#define GPIO165_DFI_D3 MFP_CFG(GPIO165, AF0)
-#define GPIO166_DFI_D2 MFP_CFG(GPIO166, AF0)
-#define GPIO167_DFI_D1 MFP_CFG(GPIO167, AF0)
-#define GPIO168_DFI_D0 MFP_CFG(GPIO168, AF0)
-#define GPIO143_ND_nCS0 MFP_CFG(GPIO143, AF0)
-#define GPIO144_ND_nCS1 MFP_CFG(GPIO144, AF0)
-#define GPIO147_ND_nWE MFP_CFG(GPIO147, AF0)
-#define GPIO148_ND_nRE MFP_CFG(GPIO148, AF0)
-#define GPIO150_ND_ALE MFP_CFG(GPIO150, AF0)
-#define GPIO149_ND_CLE MFP_CFG(GPIO149, AF0)
-#define GPIO112_ND_RDY0 MFP_CFG(GPIO112, AF0)
-#define GPIO160_ND_RDY1 MFP_CFG(GPIO160, AF0)
-
-/* Static Memory Controller */
-#define GPIO145_SMC_nCS0 MFP_CFG(GPIO145, AF0)
-#define GPIO146_SMC_nCS1 MFP_CFG(GPIO146, AF0)
-#define GPIO152_SMC_BE0 MFP_CFG(GPIO152, AF0)
-#define GPIO153_SMC_BE1 MFP_CFG(GPIO153, AF0)
-#define GPIO154_SMC_IRQ MFP_CFG(GPIO154, AF0)
-#define GPIO113_SMC_RDY MFP_CFG(GPIO113, AF0)
-#define GPIO151_SMC_SCLK MFP_CFG(GPIO151, AF0)
-
-/* Ethernet */
-#define GPIO155_SM_ADVMUX MFP_CFG(GPIO155, AF2)
-
-/* UART1 */
-#define GPIO45_UART1_RXD MFP_CFG(GPIO45, AF1)
-#define GPIO46_UART1_TXD MFP_CFG(GPIO46, AF1)
-#define GPIO29_UART1_RXD MFP_CFG(GPIO29, AF1)
-#define GPIO30_UART1_TXD MFP_CFG(GPIO30, AF1)
-#define GPIO31_UART1_CTS MFP_CFG(GPIO31, AF1)
-#define GPIO32_UART1_RTS MFP_CFG(GPIO32, AF1)
-
-/* UART2 */
-#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF1)
-#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF1)
-#define GPIO49_UART2_CTS MFP_CFG(GPIO49, AF1)
-#define GPIO50_UART2_RTS MFP_CFG(GPIO50, AF1)
-
-/* UART3 */
-#define GPIO51_UART3_RXD MFP_CFG(GPIO51, AF1)
-#define GPIO52_UART3_TXD MFP_CFG(GPIO52, AF1)
-#define GPIO53_UART3_CTS MFP_CFG(GPIO53, AF1)
-#define GPIO54_UART3_RTS MFP_CFG(GPIO54, AF1)
-
-/* MMC1 */
-#define GPIO124_MMC1_DAT7 MFP_CFG_DRV(GPIO124, AF1, FAST)
-#define GPIO125_MMC1_DAT6 MFP_CFG_DRV(GPIO125, AF1, FAST)
-#define GPIO129_MMC1_DAT5 MFP_CFG_DRV(GPIO129, AF1, FAST)
-#define GPIO130_MMC1_DAT4 MFP_CFG_DRV(GPIO130, AF1, FAST)
-#define GPIO131_MMC1_DAT3 MFP_CFG_DRV(GPIO131, AF1, FAST)
-#define GPIO132_MMC1_DAT2 MFP_CFG_DRV(GPIO132, AF1, FAST)
-#define GPIO133_MMC1_DAT1 MFP_CFG_DRV(GPIO133, AF1, FAST)
-#define GPIO134_MMC1_DAT0 MFP_CFG_DRV(GPIO134, AF1, FAST)
-#define GPIO136_MMC1_CMD MFP_CFG_DRV(GPIO136, AF1, FAST)
-#define GPIO139_MMC1_CLK MFP_CFG_DRV(GPIO139, AF1, FAST)
-#define GPIO140_MMC1_CD MFP_CFG_DRV(GPIO140, AF1, FAST)
-#define GPIO141_MMC1_WP MFP_CFG_DRV(GPIO141, AF1, FAST)
-
-/*MMC2*/
-#define GPIO37_MMC2_DAT3 MFP_CFG_DRV(GPIO37, AF1, FAST)
-#define GPIO38_MMC2_DAT2 MFP_CFG_DRV(GPIO38, AF1, FAST)
-#define GPIO39_MMC2_DAT1 MFP_CFG_DRV(GPIO39, AF1, FAST)
-#define GPIO40_MMC2_DAT0 MFP_CFG_DRV(GPIO40, AF1, FAST)
-#define GPIO41_MMC2_CMD MFP_CFG_DRV(GPIO41, AF1, FAST)
-#define GPIO42_MMC2_CLK MFP_CFG_DRV(GPIO42, AF1, FAST)
-
-/*MMC3*/
-#define GPIO165_MMC3_DAT7 MFP_CFG_DRV(GPIO165, AF2, FAST)
-#define GPIO162_MMC3_DAT6 MFP_CFG_DRV(GPIO162, AF2, FAST)
-#define GPIO166_MMC3_DAT5 MFP_CFG_DRV(GPIO166, AF2, FAST)
-#define GPIO163_MMC3_DAT4 MFP_CFG_DRV(GPIO163, AF2, FAST)
-#define GPIO167_MMC3_DAT3 MFP_CFG_DRV(GPIO167, AF2, FAST)
-#define GPIO164_MMC3_DAT2 MFP_CFG_DRV(GPIO164, AF2, FAST)
-#define GPIO168_MMC3_DAT1 MFP_CFG_DRV(GPIO168, AF2, FAST)
-#define GPIO111_MMC3_DAT0 MFP_CFG_DRV(GPIO111, AF2, FAST)
-#define GPIO112_MMC3_CMD MFP_CFG_DRV(GPIO112, AF2, FAST)
-#define GPIO151_MMC3_CLK MFP_CFG_DRV(GPIO151, AF2, FAST)
-
-/* LCD */
-#define GPIO74_LCD_FCLK MFP_CFG_DRV(GPIO74, AF1, FAST)
-#define GPIO75_LCD_LCLK MFP_CFG_DRV(GPIO75, AF1, FAST)
-#define GPIO76_LCD_PCLK MFP_CFG_DRV(GPIO76, AF1, FAST)
-#define GPIO77_LCD_DENA MFP_CFG_DRV(GPIO77, AF1, FAST)
-#define GPIO78_LCD_DD0 MFP_CFG_DRV(GPIO78, AF1, FAST)
-#define GPIO79_LCD_DD1 MFP_CFG_DRV(GPIO79, AF1, FAST)
-#define GPIO80_LCD_DD2 MFP_CFG_DRV(GPIO80, AF1, FAST)
-#define GPIO81_LCD_DD3 MFP_CFG_DRV(GPIO81, AF1, FAST)
-#define GPIO82_LCD_DD4 MFP_CFG_DRV(GPIO82, AF1, FAST)
-#define GPIO83_LCD_DD5 MFP_CFG_DRV(GPIO83, AF1, FAST)
-#define GPIO84_LCD_DD6 MFP_CFG_DRV(GPIO84, AF1, FAST)
-#define GPIO85_LCD_DD7 MFP_CFG_DRV(GPIO85, AF1, FAST)
-#define GPIO86_LCD_DD8 MFP_CFG_DRV(GPIO86, AF1, FAST)
-#define GPIO87_LCD_DD9 MFP_CFG_DRV(GPIO87, AF1, FAST)
-#define GPIO88_LCD_DD10 MFP_CFG_DRV(GPIO88, AF1, FAST)
-#define GPIO89_LCD_DD11 MFP_CFG_DRV(GPIO89, AF1, FAST)
-#define GPIO90_LCD_DD12 MFP_CFG_DRV(GPIO90, AF1, FAST)
-#define GPIO91_LCD_DD13 MFP_CFG_DRV(GPIO91, AF1, FAST)
-#define GPIO92_LCD_DD14 MFP_CFG_DRV(GPIO92, AF1, FAST)
-#define GPIO93_LCD_DD15 MFP_CFG_DRV(GPIO93, AF1, FAST)
-#define GPIO94_LCD_DD16 MFP_CFG_DRV(GPIO94, AF1, FAST)
-#define GPIO95_LCD_DD17 MFP_CFG_DRV(GPIO95, AF1, FAST)
-#define GPIO96_LCD_DD18 MFP_CFG_DRV(GPIO96, AF1, FAST)
-#define GPIO97_LCD_DD19 MFP_CFG_DRV(GPIO97, AF1, FAST)
-#define GPIO98_LCD_DD20 MFP_CFG_DRV(GPIO98, AF1, FAST)
-#define GPIO99_LCD_DD21 MFP_CFG_DRV(GPIO99, AF1, FAST)
-#define GPIO100_LCD_DD22 MFP_CFG_DRV(GPIO100, AF1, FAST)
-#define GPIO101_LCD_DD23 MFP_CFG_DRV(GPIO101, AF1, FAST)
-#define GPIO94_SPI_DCLK MFP_CFG_DRV(GPIO94, AF3, FAST)
-#define GPIO95_SPI_CS0 MFP_CFG_DRV(GPIO95, AF3, FAST)
-#define GPIO96_SPI_DIN MFP_CFG_DRV(GPIO96, AF3, FAST)
-#define GPIO97_SPI_DOUT MFP_CFG_DRV(GPIO97, AF3, FAST)
-#define GPIO98_LCD_RST MFP_CFG_DRV(GPIO98, AF0, FAST)
-
-#define GPIO114_MN_CLK_OUT MFP_CFG_DRV(GPIO114, AF1, FAST)
-
-/*LCD TV path*/
-#define GPIO124_LCD_DD24 MFP_CFG_DRV(GPIO124, AF2, FAST)
-#define GPIO125_LCD_DD25 MFP_CFG_DRV(GPIO125, AF2, FAST)
-#define GPIO126_LCD_DD33 MFP_CFG_DRV(GPIO126, AF2, FAST)
-#define GPIO127_LCD_DD26 MFP_CFG_DRV(GPIO127, AF2, FAST)
-#define GPIO128_LCD_DD27 MFP_CFG_DRV(GPIO128, AF2, FAST)
-#define GPIO129_LCD_DD28 MFP_CFG_DRV(GPIO129, AF2, FAST)
-#define GPIO130_LCD_DD29 MFP_CFG_DRV(GPIO130, AF2, FAST)
-#define GPIO135_LCD_DD30 MFP_CFG_DRV(GPIO135, AF2, FAST)
-#define GPIO137_LCD_DD31 MFP_CFG_DRV(GPIO137, AF2, FAST)
-#define GPIO138_LCD_DD32 MFP_CFG_DRV(GPIO138, AF2, FAST)
-#define GPIO140_LCD_DD34 MFP_CFG_DRV(GPIO140, AF2, FAST)
-#define GPIO141_LCD_DD35 MFP_CFG_DRV(GPIO141, AF2, FAST)
-
-/* I2C */
-#define GPIO43_TWSI2_SCL MFP_CFG_DRV(GPIO43, AF1, SLOW)
-#define GPIO44_TWSI2_SDA MFP_CFG_DRV(GPIO44, AF1, SLOW)
-#define GPIO71_TWSI3_SCL MFP_CFG_DRV(GPIO71, AF1, SLOW)
-#define GPIO72_TWSI3_SDA MFP_CFG_DRV(GPIO72, AF1, SLOW)
-#define TWSI4_SCL MFP_CFG_DRV(TWSI4_SCL, AF0, SLOW)
-#define TWSI4_SDA MFP_CFG_DRV(TWSI4_SDA, AF0, SLOW)
-#define GPIO99_TWSI5_SCL MFP_CFG_DRV(GPIO99, AF4, SLOW)
-#define GPIO100_TWSI5_SDA MFP_CFG_DRV(GPIO100, AF4, SLOW)
-#define GPIO97_TWSI6_SCL MFP_CFG_DRV(GPIO97, AF2, SLOW)
-#define GPIO98_TWSI6_SDA MFP_CFG_DRV(GPIO98, AF2, SLOW)
-
-/* SSPA1 */
-#define GPIO24_I2S_SYSCLK MFP_CFG(GPIO24, AF1)
-#define GPIO25_I2S_BITCLK MFP_CFG(GPIO25, AF1)
-#define GPIO26_I2S_SYNC MFP_CFG(GPIO26, AF1)
-#define GPIO27_I2S_DATA_OUT MFP_CFG(GPIO27, AF1)
-#define GPIO28_I2S_SDATA_IN MFP_CFG(GPIO28, AF1)
-#define GPIO114_I2S_MCLK MFP_CFG(GPIO114, AF1)
-
-/* SSPA2 */
-#define GPIO33_SSPA2_CLK MFP_CFG(GPIO33, AF1)
-#define GPIO34_SSPA2_FRM MFP_CFG(GPIO34, AF1)
-#define GPIO35_SSPA2_TXD MFP_CFG(GPIO35, AF1)
-#define GPIO36_SSPA2_RXD MFP_CFG(GPIO36, AF1)
-
-/* Keypad */
-#define GPIO00_KP_MKIN0 MFP_CFG(GPIO0, AF1)
-#define GPIO01_KP_MKOUT0 MFP_CFG(GPIO1, AF1)
-#define GPIO02_KP_MKIN1 MFP_CFG(GPIO2, AF1)
-#define GPIO03_KP_MKOUT1 MFP_CFG(GPIO3, AF1)
-#define GPIO04_KP_MKIN2 MFP_CFG(GPIO4, AF1)
-#define GPIO05_KP_MKOUT2 MFP_CFG(GPIO5, AF1)
-#define GPIO06_KP_MKIN3 MFP_CFG(GPIO6, AF1)
-#define GPIO07_KP_MKOUT3 MFP_CFG(GPIO7, AF1)
-#define GPIO08_KP_MKIN4 MFP_CFG(GPIO8, AF1)
-#define GPIO09_KP_MKOUT4 MFP_CFG(GPIO9, AF1)
-#define GPIO10_KP_MKIN5 MFP_CFG(GPIO10, AF1)
-#define GPIO11_KP_MKOUT5 MFP_CFG(GPIO11, AF1)
-#define GPIO12_KP_MKIN6 MFP_CFG(GPIO12, AF1)
-#define GPIO13_KP_MKOUT6 MFP_CFG(GPIO13, AF1)
-#define GPIO14_KP_MKIN7 MFP_CFG(GPIO14, AF1)
-#define GPIO15_KP_MKOUT7 MFP_CFG(GPIO15, AF1)
-#define GPIO16_KP_DKIN0 MFP_CFG(GPIO16, AF1)
-#define GPIO17_KP_DKIN1 MFP_CFG(GPIO17, AF1)
-#define GPIO18_KP_DKIN2 MFP_CFG(GPIO18, AF1)
-#define GPIO19_KP_DKIN3 MFP_CFG(GPIO19, AF1)
-#define GPIO20_KP_DKIN4 MFP_CFG(GPIO20, AF1)
-#define GPIO21_KP_DKIN5 MFP_CFG(GPIO21, AF1)
-#define GPIO22_KP_DKIN6 MFP_CFG(GPIO22, AF1)
-#define GPIO23_KP_DKIN7 MFP_CFG(GPIO23, AF1)
-
-/* CAMERA */
-#define GPIO59_CCIC_IN7 MFP_CFG_DRV(GPIO59, AF1, FAST)
-#define GPIO60_CCIC_IN6 MFP_CFG_DRV(GPIO60, AF1, FAST)
-#define GPIO61_CCIC_IN5 MFP_CFG_DRV(GPIO61, AF1, FAST)
-#define GPIO62_CCIC_IN4 MFP_CFG_DRV(GPIO62, AF1, FAST)
-#define GPIO63_CCIC_IN3 MFP_CFG_DRV(GPIO63, AF1, FAST)
-#define GPIO64_CCIC_IN2 MFP_CFG_DRV(GPIO64, AF1, FAST)
-#define GPIO65_CCIC_IN1 MFP_CFG_DRV(GPIO65, AF1, FAST)
-#define GPIO66_CCIC_IN0 MFP_CFG_DRV(GPIO66, AF1, FAST)
-#define GPIO67_CAM_HSYNC MFP_CFG_DRV(GPIO67, AF1, FAST)
-#define GPIO68_CAM_VSYNC MFP_CFG_DRV(GPIO68, AF1, FAST)
-#define GPIO69_CAM_MCLK MFP_CFG_DRV(GPIO69, AF1, FAST)
-#define GPIO70_CAM_PCLK MFP_CFG_DRV(GPIO70, AF1, FAST)
-
-/* PMIC */
-#define PMIC_PMIC_INT MFP_CFG(PMIC_INT, AF0)
-
-#endif /* __ASM_MACH_MFP_MMP2_H */
-
diff --git a/arch/arm/mach-mmp/mfp-pxa168.h b/arch/arm/mach-mmp/mfp-pxa168.h
deleted file mode 100644
index 90d16d3419a4..000000000000
--- a/arch/arm/mach-mmp/mfp-pxa168.h
+++ /dev/null
@@ -1,355 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_MFP_PXA168_H
-#define __ASM_MACH_MFP_PXA168_H
-
-#include "mfp.h"
-
-#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
-#define MFP_DRIVE_SLOW (0x1 << 13)
-#define MFP_DRIVE_MEDIUM (0x2 << 13)
-#define MFP_DRIVE_FAST (0x3 << 13)
-
-#undef MFP_CFG
-#undef MFP_CFG_DRV
-
-#define MFP_CFG(pin, af) \
- (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM)
-
-#define MFP_CFG_DRV(pin, af, drv) \
- (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv)
-
-/* GPIO */
-#define GPIO0_GPIO MFP_CFG(GPIO0, AF5)
-#define GPIO1_GPIO MFP_CFG(GPIO1, AF5)
-#define GPIO2_GPIO MFP_CFG(GPIO2, AF5)
-#define GPIO3_GPIO MFP_CFG(GPIO3, AF5)
-#define GPIO4_GPIO MFP_CFG(GPIO4, AF5)
-#define GPIO5_GPIO MFP_CFG(GPIO5, AF5)
-#define GPIO6_GPIO MFP_CFG(GPIO6, AF5)
-#define GPIO7_GPIO MFP_CFG(GPIO7, AF5)
-#define GPIO8_GPIO MFP_CFG(GPIO8, AF5)
-#define GPIO9_GPIO MFP_CFG(GPIO9, AF5)
-#define GPIO10_GPIO MFP_CFG(GPIO10, AF5)
-#define GPIO11_GPIO MFP_CFG(GPIO11, AF5)
-#define GPIO12_GPIO MFP_CFG(GPIO12, AF5)
-#define GPIO13_GPIO MFP_CFG(GPIO13, AF5)
-#define GPIO14_GPIO MFP_CFG(GPIO14, AF5)
-#define GPIO15_GPIO MFP_CFG(GPIO15, AF5)
-#define GPIO16_GPIO MFP_CFG(GPIO16, AF0)
-#define GPIO17_GPIO MFP_CFG(GPIO17, AF5)
-#define GPIO18_GPIO MFP_CFG(GPIO18, AF0)
-#define GPIO19_GPIO MFP_CFG(GPIO19, AF5)
-#define GPIO20_GPIO MFP_CFG(GPIO20, AF0)
-#define GPIO21_GPIO MFP_CFG(GPIO21, AF5)
-#define GPIO22_GPIO MFP_CFG(GPIO22, AF5)
-#define GPIO23_GPIO MFP_CFG(GPIO23, AF5)
-#define GPIO24_GPIO MFP_CFG(GPIO24, AF5)
-#define GPIO25_GPIO MFP_CFG(GPIO25, AF5)
-#define GPIO26_GPIO MFP_CFG(GPIO26, AF0)
-#define GPIO27_GPIO MFP_CFG(GPIO27, AF5)
-#define GPIO28_GPIO MFP_CFG(GPIO28, AF5)
-#define GPIO29_GPIO MFP_CFG(GPIO29, AF5)
-#define GPIO30_GPIO MFP_CFG(GPIO30, AF5)
-#define GPIO31_GPIO MFP_CFG(GPIO31, AF5)
-#define GPIO32_GPIO MFP_CFG(GPIO32, AF5)
-#define GPIO33_GPIO MFP_CFG(GPIO33, AF5)
-#define GPIO34_GPIO MFP_CFG(GPIO34, AF0)
-#define GPIO35_GPIO MFP_CFG(GPIO35, AF0)
-#define GPIO36_GPIO MFP_CFG(GPIO36, AF0)
-#define GPIO37_GPIO MFP_CFG(GPIO37, AF0)
-#define GPIO38_GPIO MFP_CFG(GPIO38, AF0)
-#define GPIO39_GPIO MFP_CFG(GPIO39, AF0)
-#define GPIO40_GPIO MFP_CFG(GPIO40, AF0)
-#define GPIO41_GPIO MFP_CFG(GPIO41, AF0)
-#define GPIO42_GPIO MFP_CFG(GPIO42, AF0)
-#define GPIO43_GPIO MFP_CFG(GPIO43, AF0)
-#define GPIO44_GPIO MFP_CFG(GPIO44, AF0)
-#define GPIO45_GPIO MFP_CFG(GPIO45, AF0)
-#define GPIO46_GPIO MFP_CFG(GPIO46, AF0)
-#define GPIO47_GPIO MFP_CFG(GPIO47, AF0)
-#define GPIO48_GPIO MFP_CFG(GPIO48, AF0)
-#define GPIO49_GPIO MFP_CFG(GPIO49, AF0)
-#define GPIO50_GPIO MFP_CFG(GPIO50, AF0)
-#define GPIO51_GPIO MFP_CFG(GPIO51, AF0)
-#define GPIO52_GPIO MFP_CFG(GPIO52, AF0)
-#define GPIO53_GPIO MFP_CFG(GPIO53, AF0)
-#define GPIO54_GPIO MFP_CFG(GPIO54, AF0)
-#define GPIO55_GPIO MFP_CFG(GPIO55, AF0)
-#define GPIO56_GPIO MFP_CFG(GPIO56, AF0)
-#define GPIO57_GPIO MFP_CFG(GPIO57, AF0)
-#define GPIO58_GPIO MFP_CFG(GPIO58, AF0)
-#define GPIO59_GPIO MFP_CFG(GPIO59, AF0)
-#define GPIO60_GPIO MFP_CFG(GPIO60, AF0)
-#define GPIO61_GPIO MFP_CFG(GPIO61, AF0)
-#define GPIO62_GPIO MFP_CFG(GPIO62, AF0)
-#define GPIO63_GPIO MFP_CFG(GPIO63, AF0)
-#define GPIO64_GPIO MFP_CFG(GPIO64, AF0)
-#define GPIO65_GPIO MFP_CFG(GPIO65, AF0)
-#define GPIO66_GPIO MFP_CFG(GPIO66, AF0)
-#define GPIO67_GPIO MFP_CFG(GPIO67, AF0)
-#define GPIO68_GPIO MFP_CFG(GPIO68, AF0)
-#define GPIO69_GPIO MFP_CFG(GPIO69, AF0)
-#define GPIO70_GPIO MFP_CFG(GPIO70, AF0)
-#define GPIO71_GPIO MFP_CFG(GPIO71, AF0)
-#define GPIO72_GPIO MFP_CFG(GPIO72, AF0)
-#define GPIO73_GPIO MFP_CFG(GPIO73, AF0)
-#define GPIO74_GPIO MFP_CFG(GPIO74, AF0)
-#define GPIO75_GPIO MFP_CFG(GPIO75, AF0)
-#define GPIO76_GPIO MFP_CFG(GPIO76, AF0)
-#define GPIO77_GPIO MFP_CFG(GPIO77, AF0)
-#define GPIO78_GPIO MFP_CFG(GPIO78, AF0)
-#define GPIO79_GPIO MFP_CFG(GPIO79, AF0)
-#define GPIO80_GPIO MFP_CFG(GPIO80, AF0)
-#define GPIO81_GPIO MFP_CFG(GPIO81, AF0)
-#define GPIO82_GPIO MFP_CFG(GPIO82, AF0)
-#define GPIO83_GPIO MFP_CFG(GPIO83, AF0)
-#define GPIO84_GPIO MFP_CFG(GPIO84, AF0)
-#define GPIO85_GPIO MFP_CFG(GPIO85, AF0)
-#define GPIO86_GPIO MFP_CFG(GPIO86, AF0)
-#define GPIO87_GPIO MFP_CFG(GPIO87, AF0)
-#define GPIO88_GPIO MFP_CFG(GPIO88, AF0)
-#define GPIO89_GPIO MFP_CFG(GPIO89, AF0)
-#define GPIO90_GPIO MFP_CFG(GPIO90, AF0)
-#define GPIO91_GPIO MFP_CFG(GPIO91, AF0)
-#define GPIO92_GPIO MFP_CFG(GPIO92, AF0)
-#define GPIO93_GPIO MFP_CFG(GPIO93, AF0)
-#define GPIO94_GPIO MFP_CFG(GPIO94, AF0)
-#define GPIO95_GPIO MFP_CFG(GPIO95, AF0)
-#define GPIO96_GPIO MFP_CFG(GPIO96, AF0)
-#define GPIO97_GPIO MFP_CFG(GPIO97, AF0)
-#define GPIO98_GPIO MFP_CFG(GPIO98, AF0)
-#define GPIO99_GPIO MFP_CFG(GPIO99, AF0)
-#define GPIO100_GPIO MFP_CFG(GPIO100, AF0)
-#define GPIO101_GPIO MFP_CFG(GPIO101, AF0)
-#define GPIO102_GPIO MFP_CFG(GPIO102, AF0)
-#define GPIO103_GPIO MFP_CFG(GPIO103, AF0)
-#define GPIO104_GPIO MFP_CFG(GPIO104, AF0)
-#define GPIO105_GPIO MFP_CFG(GPIO105, AF0)
-#define GPIO106_GPIO MFP_CFG(GPIO106, AF0)
-#define GPIO107_GPIO MFP_CFG(GPIO107, AF0)
-#define GPIO108_GPIO MFP_CFG(GPIO108, AF0)
-#define GPIO109_GPIO MFP_CFG(GPIO109, AF0)
-#define GPIO110_GPIO MFP_CFG(GPIO110, AF0)
-#define GPIO111_GPIO MFP_CFG(GPIO111, AF0)
-#define GPIO112_GPIO MFP_CFG(GPIO112, AF0)
-#define GPIO113_GPIO MFP_CFG(GPIO113, AF0)
-#define GPIO114_GPIO MFP_CFG(GPIO114, AF0)
-#define GPIO115_GPIO MFP_CFG(GPIO115, AF0)
-#define GPIO116_GPIO MFP_CFG(GPIO116, AF0)
-#define GPIO117_GPIO MFP_CFG(GPIO117, AF0)
-#define GPIO118_GPIO MFP_CFG(GPIO118, AF0)
-#define GPIO119_GPIO MFP_CFG(GPIO119, AF0)
-#define GPIO120_GPIO MFP_CFG(GPIO120, AF0)
-#define GPIO121_GPIO MFP_CFG(GPIO121, AF0)
-#define GPIO122_GPIO MFP_CFG(GPIO122, AF0)
-
-/* DFI */
-#define GPIO0_DFI_D15 MFP_CFG(GPIO0, AF0)
-#define GPIO1_DFI_D14 MFP_CFG(GPIO1, AF0)
-#define GPIO2_DFI_D13 MFP_CFG(GPIO2, AF0)
-#define GPIO3_DFI_D12 MFP_CFG(GPIO3, AF0)
-#define GPIO4_DFI_D11 MFP_CFG(GPIO4, AF0)
-#define GPIO5_DFI_D10 MFP_CFG(GPIO5, AF0)
-#define GPIO6_DFI_D9 MFP_CFG(GPIO6, AF0)
-#define GPIO7_DFI_D8 MFP_CFG(GPIO7, AF0)
-#define GPIO8_DFI_D7 MFP_CFG(GPIO8, AF0)
-#define GPIO9_DFI_D6 MFP_CFG(GPIO9, AF0)
-#define GPIO10_DFI_D5 MFP_CFG(GPIO10, AF0)
-#define GPIO11_DFI_D4 MFP_CFG(GPIO11, AF0)
-#define GPIO12_DFI_D3 MFP_CFG(GPIO12, AF0)
-#define GPIO13_DFI_D2 MFP_CFG(GPIO13, AF0)
-#define GPIO14_DFI_D1 MFP_CFG(GPIO14, AF0)
-#define GPIO15_DFI_D0 MFP_CFG(GPIO15, AF0)
-
-#define GPIO30_DFI_ADDR0 MFP_CFG(GPIO30, AF0)
-#define GPIO31_DFI_ADDR1 MFP_CFG(GPIO31, AF0)
-#define GPIO32_DFI_ADDR2 MFP_CFG(GPIO32, AF0)
-#define GPIO33_DFI_ADDR3 MFP_CFG(GPIO33, AF0)
-
-/* NAND */
-#define GPIO16_ND_nCS0 MFP_CFG(GPIO16, AF1)
-#define GPIO17_ND_nWE MFP_CFG(GPIO17, AF0)
-#define GPIO21_ND_ALE MFP_CFG(GPIO21, AF0)
-#define GPIO22_ND_CLE MFP_CFG(GPIO22, AF0)
-#define GPIO24_ND_nRE MFP_CFG(GPIO24, AF0)
-#define GPIO26_ND_RnB1 MFP_CFG(GPIO26, AF1)
-#define GPIO27_ND_RnB2 MFP_CFG(GPIO27, AF1)
-
-/* Static Memory Controller */
-#define GPIO18_SMC_nCS0 MFP_CFG(GPIO18, AF3)
-#define GPIO18_SMC_nCS1 MFP_CFG(GPIO18, AF2)
-#define GPIO16_SMC_nCS0 MFP_CFG(GPIO16, AF2)
-#define GPIO16_SMC_nCS1 MFP_CFG(GPIO16, AF3)
-#define GPIO19_SMC_nCS0 MFP_CFG(GPIO19, AF0)
-#define GPIO20_SMC_nCS1 MFP_CFG(GPIO20, AF2)
-#define GPIO23_SMC_nLUA MFP_CFG(GPIO23, AF0)
-#define GPIO25_SMC_nLLA MFP_CFG(GPIO25, AF0)
-#define GPIO27_SMC_IRQ MFP_CFG(GPIO27, AF0)
-#define GPIO28_SMC_RDY MFP_CFG(GPIO28, AF0)
-#define GPIO29_SMC_SCLK MFP_CFG(GPIO29, AF0)
-#define GPIO34_SMC_nCS1 MFP_CFG(GPIO34, AF2)
-#define GPIO35_SMC_BE1 MFP_CFG(GPIO35, AF2)
-#define GPIO36_SMC_BE2 MFP_CFG(GPIO36, AF2)
-
-/* Compact Flash */
-#define GPIO19_CF_nCE1 MFP_CFG(GPIO19, AF3)
-#define GPIO20_CF_nCE2 MFP_CFG(GPIO20, AF3)
-#define GPIO23_CF_nALE MFP_CFG(GPIO23, AF3)
-#define GPIO25_CF_nRESET MFP_CFG(GPIO25, AF3)
-#define GPIO28_CF_RDY MFP_CFG(GPIO28, AF3)
-#define GPIO29_CF_STSCH MFP_CFG(GPIO29, AF3)
-#define GPIO30_CF_nREG MFP_CFG(GPIO30, AF3)
-#define GPIO31_CF_nIOIS16 MFP_CFG(GPIO31, AF3)
-#define GPIO32_CF_nCD1 MFP_CFG(GPIO32, AF3)
-#define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3)
-
-/* UART */
-#define GPIO8_UART3_TXD MFP_CFG(GPIO8, AF2)
-#define GPIO9_UART3_RXD MFP_CFG(GPIO9, AF2)
-#define GPIO1O_UART3_CTS MFP_CFG(GPIO10, AF2)
-#define GPIO11_UART3_RTS MFP_CFG(GPIO11, AF2)
-#define GPIO88_UART2_TXD MFP_CFG(GPIO88, AF2)
-#define GPIO89_UART2_RXD MFP_CFG(GPIO89, AF2)
-#define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST)
-#define GPIO107_UART1_RXD MFP_CFG_DRV(GPIO107, AF2, FAST)
-#define GPIO108_UART1_RXD MFP_CFG_DRV(GPIO108, AF1, FAST)
-#define GPIO108_UART1_TXD MFP_CFG_DRV(GPIO108, AF2, FAST)
-#define GPIO109_UART1_CTS MFP_CFG(GPIO109, AF1)
-#define GPIO109_UART1_RTS MFP_CFG(GPIO109, AF2)
-#define GPIO110_UART1_RTS MFP_CFG(GPIO110, AF1)
-#define GPIO110_UART1_CTS MFP_CFG(GPIO110, AF2)
-#define GPIO111_UART1_RI MFP_CFG(GPIO111, AF1)
-#define GPIO111_UART1_DSR MFP_CFG(GPIO111, AF2)
-#define GPIO112_UART1_DTR MFP_CFG(GPIO111, AF1)
-#define GPIO112_UART1_DCD MFP_CFG(GPIO112, AF2)
-
-/* MMC1 */
-#define GPIO37_MMC1_DAT7 MFP_CFG(GPIO37, AF1)
-#define GPIO38_MMC1_DAT6 MFP_CFG(GPIO38, AF1)
-#define GPIO54_MMC1_DAT5 MFP_CFG(GPIO54, AF1)
-#define GPIO48_MMC1_DAT4 MFP_CFG(GPIO48, AF1)
-#define GPIO51_MMC1_DAT3 MFP_CFG(GPIO51, AF1)
-#define GPIO52_MMC1_DAT2 MFP_CFG(GPIO52, AF1)
-#define GPIO40_MMC1_DAT1 MFP_CFG(GPIO40, AF1)
-#define GPIO41_MMC1_DAT0 MFP_CFG(GPIO41, AF1)
-#define GPIO49_MMC1_CMD MFP_CFG(GPIO49, AF1)
-#define GPIO43_MMC1_CLK MFP_CFG(GPIO43, AF1)
-#define GPIO53_MMC1_CD MFP_CFG(GPIO53, AF1)
-#define GPIO46_MMC1_WP MFP_CFG(GPIO46, AF1)
-
-/* MMC2 */
-#define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST)
-#define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST)
-#define GPIO30_MMC2_DAT0 MFP_CFG_DRV(GPIO30, AF6, FAST)
-#define GPIO31_MMC2_DAT1 MFP_CFG_DRV(GPIO31, AF6, FAST)
-#define GPIO32_MMC2_DAT2 MFP_CFG_DRV(GPIO32, AF6, FAST)
-#define GPIO33_MMC2_DAT3 MFP_CFG_DRV(GPIO33, AF6, FAST)
-
-/* MMC4 */
-#define GPIO125_MMC4_DAT3 MFP_CFG_DRV(GPIO125, AF7, FAST)
-#define GPIO126_MMC4_DAT2 MFP_CFG_DRV(GPIO126, AF7, FAST)
-#define GPIO127_MMC4_DAT1 MFP_CFG_DRV(GPIO127, AF7, FAST)
-#define GPIO0_2_MMC4_DAT0 MFP_CFG_DRV(GPIO0_2, AF7, FAST)
-#define GPIO1_2_MMC4_CMD MFP_CFG_DRV(GPIO1_2, AF7, FAST)
-#define GPIO2_2_MMC4_CLK MFP_CFG_DRV(GPIO2_2, AF7, FAST)
-
-/* LCD */
-#define GPIO84_LCD_CS MFP_CFG(GPIO84, AF1)
-#define GPIO60_LCD_DD0 MFP_CFG(GPIO60, AF1)
-#define GPIO61_LCD_DD1 MFP_CFG(GPIO61, AF1)
-#define GPIO70_LCD_DD10 MFP_CFG(GPIO70, AF1)
-#define GPIO71_LCD_DD11 MFP_CFG(GPIO71, AF1)
-#define GPIO72_LCD_DD12 MFP_CFG(GPIO72, AF1)
-#define GPIO73_LCD_DD13 MFP_CFG(GPIO73, AF1)
-#define GPIO74_LCD_DD14 MFP_CFG(GPIO74, AF1)
-#define GPIO75_LCD_DD15 MFP_CFG(GPIO75, AF1)
-#define GPIO76_LCD_DD16 MFP_CFG(GPIO76, AF1)
-#define GPIO77_LCD_DD17 MFP_CFG(GPIO77, AF1)
-#define GPIO78_LCD_DD18 MFP_CFG(GPIO78, AF1)
-#define GPIO79_LCD_DD19 MFP_CFG(GPIO79, AF1)
-#define GPIO62_LCD_DD2 MFP_CFG(GPIO62, AF1)
-#define GPIO80_LCD_DD20 MFP_CFG(GPIO80, AF1)
-#define GPIO81_LCD_DD21 MFP_CFG(GPIO81, AF1)
-#define GPIO82_LCD_DD22 MFP_CFG(GPIO82, AF1)
-#define GPIO83_LCD_DD23 MFP_CFG(GPIO83, AF1)
-#define GPIO63_LCD_DD3 MFP_CFG(GPIO63, AF1)
-#define GPIO64_LCD_DD4 MFP_CFG(GPIO64, AF1)
-#define GPIO65_LCD_DD5 MFP_CFG(GPIO65, AF1)
-#define GPIO66_LCD_DD6 MFP_CFG(GPIO66, AF1)
-#define GPIO67_LCD_DD7 MFP_CFG(GPIO67, AF1)
-#define GPIO68_LCD_DD8 MFP_CFG(GPIO68, AF1)
-#define GPIO69_LCD_DD9 MFP_CFG(GPIO69, AF1)
-#define GPIO59_LCD_DENA_BIAS MFP_CFG(GPIO59, AF1)
-#define GPIO56_LCD_FCLK_RD MFP_CFG(GPIO56, AF1)
-#define GPIO57_LCD_LCLK_A0 MFP_CFG(GPIO57, AF1)
-#define GPIO58_LCD_PCLK_WR MFP_CFG(GPIO58, AF1)
-#define GPIO85_LCD_VSYNC MFP_CFG(GPIO85, AF1)
-
-/* I2C */
-#define GPIO105_CI2C_SDA MFP_CFG(GPIO105, AF1)
-#define GPIO106_CI2C_SCL MFP_CFG(GPIO106, AF1)
-
-/* I2S */
-#define GPIO113_I2S_MCLK MFP_CFG(GPIO113, AF6)
-#define GPIO114_I2S_FRM MFP_CFG(GPIO114, AF1)
-#define GPIO115_I2S_BCLK MFP_CFG(GPIO115, AF1)
-#define GPIO116_I2S_RXD MFP_CFG(GPIO116, AF2)
-#define GPIO116_I2S_TXD MFP_CFG(GPIO116, AF1)
-#define GPIO117_I2S_TXD MFP_CFG(GPIO117, AF2)
-
-/* PWM */
-#define GPIO96_PWM3_OUT MFP_CFG(GPIO96, AF1)
-#define GPIO97_PWM2_OUT MFP_CFG(GPIO97, AF1)
-#define GPIO98_PWM1_OUT MFP_CFG(GPIO98, AF1)
-#define GPIO104_PWM4_OUT MFP_CFG(GPIO104, AF1)
-#define GPIO106_PWM2_OUT MFP_CFG(GPIO106, AF2)
-#define GPIO74_PWM4_OUT MFP_CFG(GPIO74, AF2)
-#define GPIO75_PWM3_OUT MFP_CFG(GPIO75, AF2)
-#define GPIO76_PWM2_OUT MFP_CFG(GPIO76, AF2)
-#define GPIO77_PWM1_OUT MFP_CFG(GPIO77, AF2)
-#define GPIO82_PWM4_OUT MFP_CFG(GPIO82, AF2)
-#define GPIO83_PWM3_OUT MFP_CFG(GPIO83, AF2)
-#define GPIO84_PWM2_OUT MFP_CFG(GPIO84, AF2)
-#define GPIO85_PWM1_OUT MFP_CFG(GPIO85, AF2)
-#define GPIO84_PWM1_OUT MFP_CFG(GPIO84, AF4)
-#define GPIO122_PWM3_OUT MFP_CFG(GPIO122, AF3)
-#define GPIO123_PWM1_OUT MFP_CFG(GPIO123, AF1)
-#define GPIO124_PWM2_OUT MFP_CFG(GPIO124, AF1)
-#define GPIO125_PWM3_OUT MFP_CFG(GPIO125, AF1)
-#define GPIO126_PWM4_OUT MFP_CFG(GPIO126, AF1)
-#define GPIO86_PWM1_OUT MFP_CFG(GPIO86, AF2)
-#define GPIO86_PWM2_OUT MFP_CFG(GPIO86, AF3)
-
-/* Keypad */
-#define GPIO109_KP_MKIN1 MFP_CFG(GPIO109, AF7)
-#define GPIO110_KP_MKIN0 MFP_CFG(GPIO110, AF7)
-#define GPIO111_KP_MKOUT7 MFP_CFG(GPIO111, AF7)
-#define GPIO112_KP_MKOUT6 MFP_CFG(GPIO112, AF7)
-#define GPIO121_KP_MKIN4 MFP_CFG(GPIO121, AF7)
-
-/* Fast Ethernet */
-#define GPIO86_TX_CLK MFP_CFG(GPIO86, AF5)
-#define GPIO87_TX_EN MFP_CFG(GPIO87, AF5)
-#define GPIO88_TX_DQ3 MFP_CFG(GPIO88, AF5)
-#define GPIO89_TX_DQ2 MFP_CFG(GPIO89, AF5)
-#define GPIO90_TX_DQ1 MFP_CFG(GPIO90, AF5)
-#define GPIO91_TX_DQ0 MFP_CFG(GPIO91, AF5)
-#define GPIO92_MII_CRS MFP_CFG(GPIO92, AF5)
-#define GPIO93_MII_COL MFP_CFG(GPIO93, AF5)
-#define GPIO94_RX_CLK MFP_CFG(GPIO94, AF5)
-#define GPIO95_RX_ER MFP_CFG(GPIO95, AF5)
-#define GPIO96_RX_DQ3 MFP_CFG(GPIO96, AF5)
-#define GPIO97_RX_DQ2 MFP_CFG(GPIO97, AF5)
-#define GPIO98_RX_DQ1 MFP_CFG(GPIO98, AF5)
-#define GPIO99_RX_DQ0 MFP_CFG(GPIO99, AF5)
-#define GPIO100_MII_MDC MFP_CFG(GPIO100, AF5)
-#define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5)
-#define GPIO103_RX_DV MFP_CFG(GPIO103, AF5)
-
-/* SSP2 */
-#define GPIO107_SSP2_RXD MFP_CFG(GPIO107, AF4)
-#define GPIO108_SSP2_TXD MFP_CFG(GPIO108, AF4)
-#define GPIO111_SSP2_CLK MFP_CFG(GPIO111, AF4)
-#define GPIO112_SSP2_FRM MFP_CFG(GPIO112, AF4)
-
-#endif /* __ASM_MACH_MFP_PXA168_H */
diff --git a/arch/arm/mach-mmp/mfp-pxa910.h b/arch/arm/mach-mmp/mfp-pxa910.h
deleted file mode 100644
index 6f900cade631..000000000000
--- a/arch/arm/mach-mmp/mfp-pxa910.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_MFP_PXA910_H
-#define __ASM_MACH_MFP_PXA910_H
-
-#include "mfp.h"
-
-#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
-#define MFP_DRIVE_SLOW (0x2 << 13)
-#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x6 << 13)
-
-/* UART2 */
-#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6)
-#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF6)
-
-/* UART3 */
-#define GPIO31_UART3_RXD MFP_CFG(GPIO31, AF4)
-#define GPIO32_UART3_TXD MFP_CFG(GPIO32, AF4)
-
-/*IRDA*/
-#define GPIO51_IRDA_SHDN MFP_CFG(GPIO51, AF0)
-
-/* SMC */
-#define SM_nCS0_nCS0 MFP_CFG(SM_nCS0, AF0)
-#define SM_ADV_SM_ADV MFP_CFG(SM_ADV, AF0)
-#define SM_SCLK_SM_SCLK MFP_CFG(SM_SCLK, AF0)
-#define SM_BE0_SM_BE0 MFP_CFG(SM_BE0, AF1)
-#define SM_BE1_SM_BE1 MFP_CFG(SM_BE1, AF1)
-
-/* I2C */
-#define GPIO53_CI2C_SCL MFP_CFG(GPIO53, AF2)
-#define GPIO54_CI2C_SDA MFP_CFG(GPIO54, AF2)
-
-/* SSP1 (I2S) */
-#define GPIO24_SSP1_SDATA_IN MFP_CFG_DRV(GPIO24, AF1, MEDIUM)
-#define GPIO21_SSP1_BITCLK MFP_CFG_DRV(GPIO21, AF1, MEDIUM)
-#define GPIO20_SSP1_SYSCLK MFP_CFG_DRV(GPIO20, AF1, MEDIUM)
-#define GPIO22_SSP1_SYNC MFP_CFG_DRV(GPIO22, AF1, MEDIUM)
-#define GPIO23_SSP1_DATA_OUT MFP_CFG_DRV(GPIO23, AF1, MEDIUM)
-#define GPIO124_MN_CLK_OUT MFP_CFG_DRV(GPIO124, AF1, MEDIUM)
-#define GPIO123_CLK_REQ MFP_CFG_DRV(GPIO123, AF0, MEDIUM)
-
-/* DFI */
-#define DF_IO0_ND_IO0 MFP_CFG(DF_IO0, AF0)
-#define DF_IO1_ND_IO1 MFP_CFG(DF_IO1, AF0)
-#define DF_IO2_ND_IO2 MFP_CFG(DF_IO2, AF0)
-#define DF_IO3_ND_IO3 MFP_CFG(DF_IO3, AF0)
-#define DF_IO4_ND_IO4 MFP_CFG(DF_IO4, AF0)
-#define DF_IO5_ND_IO5 MFP_CFG(DF_IO5, AF0)
-#define DF_IO6_ND_IO6 MFP_CFG(DF_IO6, AF0)
-#define DF_IO7_ND_IO7 MFP_CFG(DF_IO7, AF0)
-#define DF_IO8_ND_IO8 MFP_CFG(DF_IO8, AF0)
-#define DF_IO9_ND_IO9 MFP_CFG(DF_IO9, AF0)
-#define DF_IO10_ND_IO10 MFP_CFG(DF_IO10, AF0)
-#define DF_IO11_ND_IO11 MFP_CFG(DF_IO11, AF0)
-#define DF_IO12_ND_IO12 MFP_CFG(DF_IO12, AF0)
-#define DF_IO13_ND_IO13 MFP_CFG(DF_IO13, AF0)
-#define DF_IO14_ND_IO14 MFP_CFG(DF_IO14, AF0)
-#define DF_IO15_ND_IO15 MFP_CFG(DF_IO15, AF0)
-#define DF_nCS0_SM_nCS2_nCS0 MFP_CFG(DF_nCS0_SM_nCS2, AF0)
-#define DF_ALE_SM_WEn_ND_ALE MFP_CFG(DF_ALE_SM_WEn, AF1)
-#define DF_CLE_SM_OEn_ND_CLE MFP_CFG(DF_CLE_SM_OEn, AF0)
-#define DF_WEn_DF_WEn MFP_CFG(DF_WEn, AF1)
-#define DF_REn_DF_REn MFP_CFG(DF_REn, AF1)
-#define DF_RDY0_DF_RDY0 MFP_CFG(DF_RDY0, AF0)
-
-/*keypad*/
-#define GPIO00_KP_MKIN0 MFP_CFG(GPIO0, AF1)
-#define GPIO01_KP_MKOUT0 MFP_CFG(GPIO1, AF1)
-#define GPIO02_KP_MKIN1 MFP_CFG(GPIO2, AF1)
-#define GPIO03_KP_MKOUT1 MFP_CFG(GPIO3, AF1)
-#define GPIO04_KP_MKIN2 MFP_CFG(GPIO4, AF1)
-#define GPIO05_KP_MKOUT2 MFP_CFG(GPIO5, AF1)
-#define GPIO06_KP_MKIN3 MFP_CFG(GPIO6, AF1)
-#define GPIO07_KP_MKOUT3 MFP_CFG(GPIO7, AF1)
-#define GPIO08_KP_MKIN4 MFP_CFG(GPIO8, AF1)
-#define GPIO09_KP_MKOUT4 MFP_CFG(GPIO9, AF1)
-#define GPIO10_KP_MKIN5 MFP_CFG(GPIO10, AF1)
-#define GPIO11_KP_MKOUT5 MFP_CFG(GPIO11, AF1)
-#define GPIO12_KP_MKIN6 MFP_CFG(GPIO12, AF1)
-#define GPIO13_KP_MKOUT6 MFP_CFG(GPIO13, AF1)
-#define GPIO14_KP_MKIN7 MFP_CFG(GPIO14, AF1)
-#define GPIO15_KP_MKOUT7 MFP_CFG(GPIO15, AF1)
-#define GPIO16_KP_DKIN0 MFP_CFG(GPIO16, AF1)
-#define GPIO17_KP_DKIN1 MFP_CFG(GPIO17, AF1)
-#define GPIO18_KP_DKIN2 MFP_CFG(GPIO18, AF1)
-#define GPIO19_KP_DKIN3 MFP_CFG(GPIO19, AF1)
-
-/* LCD */
-#define GPIO81_LCD_FCLK MFP_CFG(GPIO81, AF1)
-#define GPIO82_LCD_LCLK MFP_CFG(GPIO82, AF1)
-#define GPIO83_LCD_PCLK MFP_CFG(GPIO83, AF1)
-#define GPIO84_LCD_DENA MFP_CFG(GPIO84, AF1)
-#define GPIO85_LCD_DD0 MFP_CFG(GPIO85, AF1)
-#define GPIO86_LCD_DD1 MFP_CFG(GPIO86, AF1)
-#define GPIO87_LCD_DD2 MFP_CFG(GPIO87, AF1)
-#define GPIO88_LCD_DD3 MFP_CFG(GPIO88, AF1)
-#define GPIO89_LCD_DD4 MFP_CFG(GPIO89, AF1)
-#define GPIO90_LCD_DD5 MFP_CFG(GPIO90, AF1)
-#define GPIO91_LCD_DD6 MFP_CFG(GPIO91, AF1)
-#define GPIO92_LCD_DD7 MFP_CFG(GPIO92, AF1)
-#define GPIO93_LCD_DD8 MFP_CFG(GPIO93, AF1)
-#define GPIO94_LCD_DD9 MFP_CFG(GPIO94, AF1)
-#define GPIO95_LCD_DD10 MFP_CFG(GPIO95, AF1)
-#define GPIO96_LCD_DD11 MFP_CFG(GPIO96, AF1)
-#define GPIO97_LCD_DD12 MFP_CFG(GPIO97, AF1)
-#define GPIO98_LCD_DD13 MFP_CFG(GPIO98, AF1)
-#define GPIO100_LCD_DD14 MFP_CFG(GPIO100, AF1)
-#define GPIO101_LCD_DD15 MFP_CFG(GPIO101, AF1)
-#define GPIO102_LCD_DD16 MFP_CFG(GPIO102, AF1)
-#define GPIO103_LCD_DD17 MFP_CFG(GPIO103, AF1)
-#define GPIO104_LCD_DD18 MFP_CFG(GPIO104, AF1)
-#define GPIO105_LCD_DD19 MFP_CFG(GPIO105, AF1)
-#define GPIO106_LCD_DD20 MFP_CFG(GPIO106, AF1)
-#define GPIO107_LCD_DD21 MFP_CFG(GPIO107, AF1)
-#define GPIO108_LCD_DD22 MFP_CFG(GPIO108, AF1)
-#define GPIO109_LCD_DD23 MFP_CFG(GPIO109, AF1)
-
-#define GPIO104_LCD_SPIDOUT MFP_CFG(GPIO104, AF3)
-#define GPIO105_LCD_SPIDIN MFP_CFG(GPIO105, AF3)
-#define GPIO107_LCD_CS1 MFP_CFG(GPIO107, AF3)
-#define GPIO108_LCD_DCLK MFP_CFG(GPIO108, AF3)
-
-#define GPIO106_LCD_RESET MFP_CFG(GPIO106, AF0)
-
-/*smart panel*/
-#define GPIO82_LCD_A0 MFP_CFG(GPIO82, AF0)
-#define GPIO83_LCD_WR MFP_CFG(GPIO83, AF0)
-#define GPIO103_LCD_CS MFP_CFG(GPIO103, AF0)
-
-/*1wire*/
-#define GPIO106_1WIRE MFP_CFG(GPIO106, AF3)
-
-/*CCIC*/
-#define GPIO67_CCIC_IN7 MFP_CFG_DRV(GPIO67, AF1, MEDIUM)
-#define GPIO68_CCIC_IN6 MFP_CFG_DRV(GPIO68, AF1, MEDIUM)
-#define GPIO69_CCIC_IN5 MFP_CFG_DRV(GPIO69, AF1, MEDIUM)
-#define GPIO70_CCIC_IN4 MFP_CFG_DRV(GPIO70, AF1, MEDIUM)
-#define GPIO71_CCIC_IN3 MFP_CFG_DRV(GPIO71, AF1, MEDIUM)
-#define GPIO72_CCIC_IN2 MFP_CFG_DRV(GPIO72, AF1, MEDIUM)
-#define GPIO73_CCIC_IN1 MFP_CFG_DRV(GPIO73, AF1, MEDIUM)
-#define GPIO74_CCIC_IN0 MFP_CFG_DRV(GPIO74, AF1, MEDIUM)
-#define GPIO75_CAM_HSYNC MFP_CFG_DRV(GPIO75, AF1, MEDIUM)
-#define GPIO76_CAM_VSYNC MFP_CFG_DRV(GPIO76, AF1, MEDIUM)
-#define GPIO77_CAM_MCLK MFP_CFG_DRV(GPIO77, AF1, MEDIUM)
-#define GPIO78_CAM_PCLK MFP_CFG_DRV(GPIO78, AF1, MEDIUM)
-
-/* MMC1 */
-#define MMC1_DAT7_MMC1_DAT7 MFP_CFG_DRV(MMC1_DAT7, AF0, MEDIUM)
-#define MMC1_DAT6_MMC1_DAT6 MFP_CFG_DRV(MMC1_DAT6, AF0, MEDIUM)
-#define MMC1_DAT5_MMC1_DAT5 MFP_CFG_DRV(MMC1_DAT5, AF0, MEDIUM)
-#define MMC1_DAT4_MMC1_DAT4 MFP_CFG_DRV(MMC1_DAT4, AF0, MEDIUM)
-#define MMC1_DAT3_MMC1_DAT3 MFP_CFG_DRV(MMC1_DAT3, AF0, MEDIUM)
-#define MMC1_DAT2_MMC1_DAT2 MFP_CFG_DRV(MMC1_DAT2, AF0, MEDIUM)
-#define MMC1_DAT1_MMC1_DAT1 MFP_CFG_DRV(MMC1_DAT1, AF0, MEDIUM)
-#define MMC1_DAT0_MMC1_DAT0 MFP_CFG_DRV(MMC1_DAT0, AF0, MEDIUM)
-#define MMC1_CMD_MMC1_CMD MFP_CFG_DRV(MMC1_CMD, AF0, MEDIUM)
-#define MMC1_CLK_MMC1_CLK MFP_CFG_DRV(MMC1_CLK, AF0, MEDIUM)
-#define MMC1_CD_MMC1_CD MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM)
-#define MMC1_WP_MMC1_WP MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM)
-
-/* PWM */
-#define GPIO27_PWM3_AF2 MFP_CFG(GPIO27, AF2)
-#define GPIO51_PWM2_OUT MFP_CFG(GPIO51, AF2)
-#define GPIO117_PWM1_OUT MFP_CFG(GPIO117, AF2)
-#define GPIO118_PWM2_OUT MFP_CFG(GPIO118, AF2)
-#define GPIO119_PWM3_OUT MFP_CFG(GPIO119, AF2)
-#define GPIO120_PWM4_OUT MFP_CFG(GPIO120, AF2)
-
-#endif /* __ASM_MACH MFP_PXA910_H */
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
deleted file mode 100644
index 7111535f325f..000000000000
--- a/arch/arm/mach-mmp/teton_bga.c
+++ /dev/null
@@ -1,100 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/teton_bga.c
- *
- * Support for the Marvell PXA168 Teton BGA Development Platform.
- *
- * Author: Mark F. Brown <mark.brown314@gmail.com>
- *
- * This code is based on aspenite.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/gpio-pxa.h>
-#include <linux/input.h>
-#include <linux/platform_data/keypad-pxa27x.h>
-#include <linux/i2c.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "addr-map.h"
-#include "mfp-pxa168.h"
-#include "pxa168.h"
-#include "teton_bga.h"
-#include "irqs.h"
-
-#include "common.h"
-
-static unsigned long teton_bga_pin_config[] __initdata = {
- /* UART1 */
- GPIO107_UART1_TXD,
- GPIO108_UART1_RXD,
-
- /* Keypad */
- GPIO109_KP_MKIN1,
- GPIO110_KP_MKIN0,
- GPIO111_KP_MKOUT7,
- GPIO112_KP_MKOUT6,
-
- /* I2C Bus */
- GPIO105_CI2C_SDA,
- GPIO106_CI2C_SCL,
-
- /* RTC */
- GPIO78_GPIO,
-};
-
-static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static unsigned int teton_bga_matrix_key_map[] = {
- KEY(0, 6, KEY_ESC),
- KEY(0, 7, KEY_ENTER),
- KEY(1, 6, KEY_LEFT),
- KEY(1, 7, KEY_RIGHT),
-};
-
-static struct matrix_keymap_data teton_bga_matrix_keymap_data = {
- .keymap = teton_bga_matrix_key_map,
- .keymap_size = ARRAY_SIZE(teton_bga_matrix_key_map),
-};
-
-static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = {
- .matrix_key_rows = 2,
- .matrix_key_cols = 8,
- .matrix_keymap_data = &teton_bga_matrix_keymap_data,
- .debounce_interval = 30,
-};
-
-static struct i2c_board_info teton_bga_i2c_info[] __initdata = {
- {
- I2C_BOARD_INFO("ds1337", 0x68),
- .irq = MMP_GPIO_TO_IRQ(RTC_INT_GPIO)
- },
-};
-
-static void __init teton_bga_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(teton_bga_pin_config));
-
- /* on-chip devices */
- pxa168_add_uart(1);
- pxa168_add_keypad(&teton_bga_keypad_info);
- pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info));
- platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&pxa168_device_gpio);
-}
-
-MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = MMP_NR_IRQS,
- .init_irq = pxa168_init_irq,
- .init_time = pxa168_timer_init,
- .init_machine = teton_bga_init,
- .restart = pxa168_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/teton_bga.h b/arch/arm/mach-mmp/teton_bga.h
deleted file mode 100644
index 73050096f0bd..000000000000
--- a/arch/arm/mach-mmp/teton_bga.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Support for the Marvell PXA168 Teton BGA Development Platform.
- */
-#ifndef __ASM_MACH_TETON_BGA_H
-#define __ASM_MACH_TETON_BGA_H
-
-/* GPIOs */
-#define MMC_PWENA_GPIO 27
-#define USBHPENB_GPIO 55
-#define RTC_INT_GPIO 78
-#define LCD_VBLK_EN_GPIO 79
-#define LCD_DVDD_EN_GPIO 80
-#define RST_WIFI_GPIO 81
-#define CF_PWEN_GPIO 82
-#define USB_OC_GPIO 83
-#define PWM_GPIO 84
-#define USBHPENA_GPIO 85
-#define TS_INT_GPIO 86
-#define CIR_GPIO 108
-
-#endif /* __ASM_MACH_TETON_BGA_H */
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
deleted file mode 100644
index 345b2e6d5c7e..000000000000
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ /dev/null
@@ -1,315 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/ttc_dkb.c
- *
- * Support for the Marvell PXA910-based TTC_DKB Development Platform.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/onenand.h>
-#include <linux/interrupt.h>
-#include <linux/platform_data/pca953x.h>
-#include <linux/gpio.h>
-#include <linux/gpio-pxa.h>
-#include <linux/mfd/88pm860x.h>
-#include <linux/platform_data/mv_usb.h>
-#include <linux/spi/spi.h>
-#include <linux/delay.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include "addr-map.h"
-#include "mfp-pxa910.h"
-#include "pxa910.h"
-#include "irqs.h"
-#include "regs-usb.h"
-
-#include "common.h"
-
-#define TTCDKB_GPIO_EXT0(x) (MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 : \
- ((x < 16) ? x : 15)))
-#define TTCDKB_GPIO_EXT1(x) (MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \
- ((x < 16) ? x : 15)))
-
-/*
- * 16 board interrupts -- MAX7312 GPIO expander
- * 16 board interrupts -- PCA9575 GPIO expander
- * 24 board interrupts -- 88PM860x PMIC
- */
-#define TTCDKB_NR_IRQS (MMP_NR_IRQS + 16 + 16 + 24)
-
-static unsigned long ttc_dkb_pin_config[] __initdata = {
- /* UART2 */
- GPIO47_UART2_RXD,
- GPIO48_UART2_TXD,
-
- /* DFI */
- DF_IO0_ND_IO0,
- DF_IO1_ND_IO1,
- DF_IO2_ND_IO2,
- DF_IO3_ND_IO3,
- DF_IO4_ND_IO4,
- DF_IO5_ND_IO5,
- DF_IO6_ND_IO6,
- DF_IO7_ND_IO7,
- DF_IO8_ND_IO8,
- DF_IO9_ND_IO9,
- DF_IO10_ND_IO10,
- DF_IO11_ND_IO11,
- DF_IO12_ND_IO12,
- DF_IO13_ND_IO13,
- DF_IO14_ND_IO14,
- DF_IO15_ND_IO15,
- DF_nCS0_SM_nCS2_nCS0,
- DF_ALE_SM_WEn_ND_ALE,
- DF_CLE_SM_OEn_ND_CLE,
- DF_WEn_DF_WEn,
- DF_REn_DF_REn,
- DF_RDY0_DF_RDY0,
-};
-
-static struct pxa_gpio_platform_data pxa910_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct mtd_partition ttc_dkb_onenand_partitions[] = {
- {
- .name = "bootloader",
- .offset = 0,
- .size = SZ_1M,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "reserved",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_128K,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "reserved",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_8M,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = (SZ_2M + SZ_1M),
- .mask_flags = 0,
- }, {
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_32M + SZ_16M,
- .mask_flags = 0,
- }
-};
-
-static struct onenand_platform_data ttc_dkb_onenand_info = {
- .parts = ttc_dkb_onenand_partitions,
- .nr_parts = ARRAY_SIZE(ttc_dkb_onenand_partitions),
-};
-
-static struct resource ttc_dkb_resource_onenand[] = {
- [0] = {
- .start = SMC_CS0_PHYS_BASE,
- .end = SMC_CS0_PHYS_BASE + SZ_1M,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device ttc_dkb_device_onenand = {
- .name = "onenand-flash",
- .id = -1,
- .resource = ttc_dkb_resource_onenand,
- .num_resources = ARRAY_SIZE(ttc_dkb_resource_onenand),
- .dev = {
- .platform_data = &ttc_dkb_onenand_info,
- },
-};
-
-static struct platform_device *ttc_dkb_devices[] = {
- &pxa910_device_gpio,
- &pxa910_device_rtc,
- &ttc_dkb_device_onenand,
-};
-
-static struct pca953x_platform_data max7312_data[] = {
- {
- .gpio_base = TTCDKB_GPIO_EXT0(0),
- .irq_base = MMP_NR_IRQS,
- },
-};
-
-static struct pm860x_platform_data ttc_dkb_pm8607_info = {
- .irq_base = IRQ_BOARD_START,
-};
-
-static struct i2c_board_info ttc_dkb_i2c_info[] = {
- {
- .type = "88PM860x",
- .addr = 0x34,
- .platform_data = &ttc_dkb_pm8607_info,
- .irq = IRQ_PXA910_PMIC_INT,
- },
- {
- .type = "max7312",
- .addr = 0x23,
- .irq = MMP_GPIO_TO_IRQ(80),
- .platform_data = &max7312_data,
- },
-};
-
-#if IS_ENABLED(CONFIG_USB_SUPPORT)
-#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
-
-static struct mv_usb_platform_data ttc_usb_pdata = {
- .vbus = NULL,
- .mode = MV_USB_MODE_OTG,
- .otg_force_a_bus_req = 1,
- .phy_init = pxa_usb_phy_init,
- .phy_deinit = pxa_usb_phy_deinit,
- .set_vbus = NULL,
-};
-#endif
-#endif
-
-#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
-static struct pxa3xx_nand_platform_data dkb_nand_info = {};
-#endif
-
-#if IS_ENABLED(CONFIG_MMP_DISP)
-/* path config */
-#define CFG_IOPADMODE(iopad) (iopad) /* 0x0 ~ 0xd */
-#define SCLK_SOURCE_SELECT(x) (x << 30) /* 0x0 ~ 0x3 */
-/* link config */
-#define CFG_DUMBMODE(mode) (mode << 28) /* 0x0 ~ 0x6*/
-static struct mmp_mach_path_config dkb_disp_config[] = {
- [0] = {
- .name = "mmp-parallel",
- .overlay_num = 2,
- .output_type = PATH_OUT_PARALLEL,
- .path_config = CFG_IOPADMODE(0x1)
- | SCLK_SOURCE_SELECT(0x1),
- .link_config = CFG_DUMBMODE(0x2),
- },
-};
-
-static struct mmp_mach_plat_info dkb_disp_info = {
- .name = "mmp-disp",
- .clk_name = "disp0",
- .path_num = 1,
- .paths = dkb_disp_config,
-};
-
-static struct mmp_buffer_driver_mach_info dkb_fb_info = {
- .name = "mmp-fb",
- .path_name = "mmp-parallel",
- .overlay_id = 0,
- .dmafetch_id = 1,
- .default_pixfmt = PIXFMT_RGB565,
-};
-
-static void dkb_tpo_panel_power(int on)
-{
- int err;
- u32 spi_reset = mfp_to_gpio(MFP_PIN_GPIO106);
-
- if (on) {
- err = gpio_request(spi_reset, "TPO_LCD_SPI_RESET");
- if (err) {
- pr_err("failed to request GPIO for TPO LCD RESET\n");
- return;
- }
- gpio_direction_output(spi_reset, 0);
- udelay(100);
- gpio_set_value(spi_reset, 1);
- gpio_free(spi_reset);
- } else {
- err = gpio_request(spi_reset, "TPO_LCD_SPI_RESET");
- if (err) {
- pr_err("failed to request LCD RESET gpio\n");
- return;
- }
- gpio_set_value(spi_reset, 0);
- gpio_free(spi_reset);
- }
-}
-
-static struct mmp_mach_panel_info dkb_tpo_panel_info = {
- .name = "tpo-hvga",
- .plat_path_name = "mmp-parallel",
- .plat_set_onoff = dkb_tpo_panel_power,
-};
-
-static struct spi_board_info spi_board_info[] __initdata = {
- {
- .modalias = "tpo-hvga",
- .platform_data = &dkb_tpo_panel_info,
- .bus_num = 5,
- }
-};
-
-static void __init add_disp(void)
-{
- mmp_register_device(&pxa910_device_disp,
- &dkb_disp_info, sizeof(dkb_disp_info));
- spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
- mmp_register_device(&pxa910_device_fb,
- &dkb_fb_info, sizeof(dkb_fb_info));
- mmp_register_device(&pxa910_device_panel,
- &dkb_tpo_panel_info, sizeof(dkb_tpo_panel_info));
-}
-#endif
-
-static void __init ttc_dkb_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config));
-
- /* on-chip devices */
- pxa910_add_uart(1);
-#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
- pxa910_add_nand(&dkb_nand_info);
-#endif
-
- /* off-chip devices */
- pxa910_add_twsi(0, NULL, ARRAY_AND_SIZE(ttc_dkb_i2c_info));
- platform_device_add_data(&pxa910_device_gpio, &pxa910_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices));
-
-#if IS_ENABLED(CONFIG_USB_SUPPORT)
-#if IS_ENABLED(CONFIG_PHY_PXA_USB)
- platform_device_register(&pxa168_device_usb_phy);
-#endif
-
-#if IS_ENABLED(CONFIG_USB_MV_UDC)
- pxa168_device_u2o.dev.platform_data = &ttc_usb_pdata;
- platform_device_register(&pxa168_device_u2o);
-#endif
-
-#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
- pxa168_device_u2oehci.dev.platform_data = &ttc_usb_pdata;
- platform_device_register(&pxa168_device_u2oehci);
-#endif
-
-#if IS_ENABLED(CONFIG_USB_MV_OTG)
- pxa168_device_u2ootg.dev.platform_data = &ttc_usb_pdata;
- platform_device_register(&pxa168_device_u2ootg);
-#endif
-#endif
-
-#if IS_ENABLED(CONFIG_MMP_DISP)
- add_disp();
-#endif
-}
-
-MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = TTCDKB_NR_IRQS,
- .init_irq = pxa910_init_irq,
- .init_time = pxa910_timer_init,
- .init_machine = ttc_dkb_init,
- .restart = mmp_restart,
-MACHINE_END
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 08/11] ARM: mmp: remove all board files
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann
From: Arnd Bergmann <arnd@arndb.de>
The old-style board files were marked as 'unused' a while ago
and can now be removed for good, leaving only devicetree based
boot support.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/configs/pxa168_defconfig | 3 -
arch/arm/configs/pxa910_defconfig | 2 -
arch/arm/mach-mmp/Kconfig | 96 --------
arch/arm/mach-mmp/Makefile | 9 -
arch/arm/mach-mmp/aspenite.c | 284 ---------------------
arch/arm/mach-mmp/avengers_lite.c | 55 -----
arch/arm/mach-mmp/brownstone.c | 237 ------------------
arch/arm/mach-mmp/flint.c | 131 ----------
arch/arm/mach-mmp/gplugd.c | 206 ----------------
arch/arm/mach-mmp/jasper.c | 185 --------------
arch/arm/mach-mmp/mfp-mmp2.h | 396 ------------------------------
arch/arm/mach-mmp/mfp-pxa168.h | 355 --------------------------
arch/arm/mach-mmp/mfp-pxa910.h | 170 -------------
arch/arm/mach-mmp/teton_bga.c | 100 --------
arch/arm/mach-mmp/teton_bga.h | 22 --
arch/arm/mach-mmp/ttc_dkb.c | 315 ------------------------
16 files changed, 2566 deletions(-)
delete mode 100644 arch/arm/mach-mmp/aspenite.c
delete mode 100644 arch/arm/mach-mmp/avengers_lite.c
delete mode 100644 arch/arm/mach-mmp/brownstone.c
delete mode 100644 arch/arm/mach-mmp/flint.c
delete mode 100644 arch/arm/mach-mmp/gplugd.c
delete mode 100644 arch/arm/mach-mmp/jasper.c
delete mode 100644 arch/arm/mach-mmp/mfp-mmp2.h
delete mode 100644 arch/arm/mach-mmp/mfp-pxa168.h
delete mode 100644 arch/arm/mach-mmp/mfp-pxa910.h
delete mode 100644 arch/arm/mach-mmp/teton_bga.c
delete mode 100644 arch/arm/mach-mmp/teton_bga.h
delete mode 100644 arch/arm/mach-mmp/ttc_dkb.c
diff --git a/arch/arm/configs/pxa168_defconfig b/arch/arm/configs/pxa168_defconfig
index 826ebbef2e3c..8422ddc9bab2 100644
--- a/arch/arm/configs/pxa168_defconfig
+++ b/arch/arm/configs/pxa168_defconfig
@@ -1,9 +1,6 @@
CONFIG_SYSVIPC=y
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_BLK_DEV_BSG is not set
-CONFIG_MACH_ASPENITE=y
-CONFIG_MACH_ZYLONITE2=y
-CONFIG_MACH_AVENGERS_LITE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
diff --git a/arch/arm/configs/pxa910_defconfig b/arch/arm/configs/pxa910_defconfig
index 353008de5678..48e41ca582af 100644
--- a/arch/arm/configs/pxa910_defconfig
+++ b/arch/arm/configs/pxa910_defconfig
@@ -11,8 +11,6 @@ CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
-CONFIG_MACH_TAVOREVB=y
-CONFIG_MACH_TTC_DKB=y
CONFIG_AEABI=y
CONFIG_FPE_NWFPE=y
CONFIG_SLAB=y
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index da38106149c4..a1396c495b85 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -13,99 +13,6 @@ if ARCH_MMP
menu "Marvell PXA168/910/MMP2 Implementations"
-if ATAGS
-
-config MACH_ASPENITE
- bool "Marvell's PXA168 Aspenite Development Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA168
- help
- Say 'Y' here if you want to support the Marvell PXA168-based
- Aspenite Development Board.
-
-config MACH_ZYLONITE2
- bool "Marvell's PXA168 Zylonite2 Development Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA168
- help
- Say 'Y' here if you want to support the Marvell PXA168-based
- Zylonite2 Development Board.
-
-config MACH_AVENGERS_LITE
- bool "Marvell's PXA168 Avengers Lite Development Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA168
- help
- Say 'Y' here if you want to support the Marvell PXA168-based
- Avengers Lite Development Board.
-
-config MACH_TTC_DKB
- bool "Marvell's PXA910 TavorEVB/TTC_DKB Development Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA910
- help
- Say 'Y' here if you want to support the Marvell PXA910-based
- TTC_DKB Development Board.
-
-config MACH_BROWNSTONE
- bool "Marvell's Brownstone Development Platform"
- depends on ARCH_MULTI_V7
- depends on UNUSED_BOARD_FILES
- select CPU_MMP2
- help
- Say 'Y' here if you want to support the Marvell MMP2-based
- Brown Development Platform.
- MMP2-based board can't be co-existed with PXA168-based &
- PXA910-based development board. Since MMP2 is compatible to
- ARMv7 architecture.
-
-config MACH_FLINT
- bool "Marvell's Flint Development Platform"
- depends on ARCH_MULTI_V7
- depends on UNUSED_BOARD_FILES
- select CPU_MMP2
- help
- Say 'Y' here if you want to support the Marvell MMP2-based
- Flint Development Platform.
- MMP2-based board can't be co-existed with PXA168-based &
- PXA910-based development board. Since MMP2 is compatible to
- ARMv7 architecture.
-
-config MACH_MARVELL_JASPER
- bool "Marvell's Jasper Development Platform"
- depends on ARCH_MULTI_V7
- depends on UNUSED_BOARD_FILES
- select CPU_MMP2
- help
- Say 'Y' here if you want to support the Marvell MMP2-base
- Jasper Development Platform.
- MMP2-based board can't be co-existed with PXA168-based &
- PXA910-based development board. Since MMP2 is compatible to
- ARMv7 architecture.
-
-config MACH_TETON_BGA
- bool "Marvell's PXA168 Teton BGA Development Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA168
- help
- Say 'Y' here if you want to support the Marvell PXA168-based
- Teton BGA Development Board.
-
-config MACH_GPLUGD
- bool "Marvell's PXA168 GuruPlug Display (gplugD) Board"
- depends on ARCH_MULTI_V5
- depends on UNUSED_BOARD_FILES
- select CPU_PXA168
- help
- Say 'Y' here if you want to support the Marvell PXA168-based
- GuruPlug Display (gplugD) Board
-endif
-
config MACH_MMP_DT
bool "Support MMP (ARMv5) platforms from device tree"
depends on ARCH_MULTI_V5
@@ -178,7 +85,4 @@ config USB_EHCI_MV_U2O
help
Enables support for OTG controller which can be switched to host mode.
-config MMP_SRAM
- bool
-
endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 539d750aaf10..65cc9b691983 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -19,15 +19,6 @@ obj-$(CONFIG_MACH_MMP3_DT) += platsmp.o
endif
# board support
-obj-$(CONFIG_MACH_ASPENITE) += aspenite.o
-obj-$(CONFIG_MACH_ZYLONITE2) += aspenite.o
-obj-$(CONFIG_MACH_AVENGERS_LITE)+= avengers_lite.o
-obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o
-obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o
-obj-$(CONFIG_MACH_FLINT) += flint.o
-obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
obj-$(CONFIG_MACH_MMP_DT) += mmp-dt.o
obj-$(CONFIG_MACH_MMP2_DT) += mmp2-dt.o
obj-$(CONFIG_MACH_MMP3_DT) += mmp3.o
-obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o
-obj-$(CONFIG_MACH_GPLUGD) += gplugd.o
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
deleted file mode 100644
index 6314824b62fc..000000000000
--- a/arch/arm/mach-mmp/aspenite.c
+++ /dev/null
@@ -1,284 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/aspenite.c
- *
- * Support for the Marvell PXA168-based Aspenite and Zylonite2
- * Development Platform.
- */
-#include <linux/gpio.h>
-#include <linux/gpio-pxa.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/smc91x.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/rawnand.h>
-#include <linux/interrupt.h>
-#include <linux/platform_data/mv_usb.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <video/pxa168fb.h>
-#include <linux/input.h>
-#include <linux/platform_data/keypad-pxa27x.h>
-
-#include "addr-map.h"
-#include "mfp-pxa168.h"
-#include "pxa168.h"
-#include "pxa910.h"
-#include "irqs.h"
-#include "common.h"
-
-static unsigned long common_pin_config[] __initdata = {
- /* Data Flash Interface */
- GPIO0_DFI_D15,
- GPIO1_DFI_D14,
- GPIO2_DFI_D13,
- GPIO3_DFI_D12,
- GPIO4_DFI_D11,
- GPIO5_DFI_D10,
- GPIO6_DFI_D9,
- GPIO7_DFI_D8,
- GPIO8_DFI_D7,
- GPIO9_DFI_D6,
- GPIO10_DFI_D5,
- GPIO11_DFI_D4,
- GPIO12_DFI_D3,
- GPIO13_DFI_D2,
- GPIO14_DFI_D1,
- GPIO15_DFI_D0,
-
- /* Static Memory Controller */
- GPIO18_SMC_nCS0,
- GPIO34_SMC_nCS1,
- GPIO23_SMC_nLUA,
- GPIO25_SMC_nLLA,
- GPIO28_SMC_RDY,
- GPIO29_SMC_SCLK,
- GPIO35_SMC_BE1,
- GPIO36_SMC_BE2,
- GPIO27_GPIO, /* Ethernet IRQ */
-
- /* UART1 */
- GPIO107_UART1_RXD,
- GPIO108_UART1_TXD,
-
- /* SSP1 */
- GPIO113_I2S_MCLK,
- GPIO114_I2S_FRM,
- GPIO115_I2S_BCLK,
- GPIO116_I2S_RXD,
- GPIO117_I2S_TXD,
-
- /* LCD */
- GPIO56_LCD_FCLK_RD,
- GPIO57_LCD_LCLK_A0,
- GPIO58_LCD_PCLK_WR,
- GPIO59_LCD_DENA_BIAS,
- GPIO60_LCD_DD0,
- GPIO61_LCD_DD1,
- GPIO62_LCD_DD2,
- GPIO63_LCD_DD3,
- GPIO64_LCD_DD4,
- GPIO65_LCD_DD5,
- GPIO66_LCD_DD6,
- GPIO67_LCD_DD7,
- GPIO68_LCD_DD8,
- GPIO69_LCD_DD9,
- GPIO70_LCD_DD10,
- GPIO71_LCD_DD11,
- GPIO72_LCD_DD12,
- GPIO73_LCD_DD13,
- GPIO74_LCD_DD14,
- GPIO75_LCD_DD15,
- GPIO76_LCD_DD16,
- GPIO77_LCD_DD17,
- GPIO78_LCD_DD18,
- GPIO79_LCD_DD19,
- GPIO80_LCD_DD20,
- GPIO81_LCD_DD21,
- GPIO82_LCD_DD22,
- GPIO83_LCD_DD23,
-
- /* Keypad */
- GPIO109_KP_MKIN1,
- GPIO110_KP_MKIN0,
- GPIO111_KP_MKOUT7,
- GPIO112_KP_MKOUT6,
- GPIO121_KP_MKIN4,
-};
-
-static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct smc91x_platdata smc91x_info = {
- .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
-};
-
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = SMC_CS1_PHYS_BASE + 0x300,
- .end = SMC_CS1_PHYS_BASE + 0xfffff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = MMP_GPIO_TO_IRQ(27),
- .end = MMP_GPIO_TO_IRQ(27),
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
- }
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .dev = {
- .platform_data = &smc91x_info,
- },
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static struct mtd_partition aspenite_nand_partitions[] = {
- {
- .name = "bootloader",
- .offset = 0,
- .size = SZ_1M,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "reserved",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_128K,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "reserved",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_8M,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = (SZ_2M + SZ_1M),
- .mask_flags = 0,
- }, {
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_32M + SZ_16M,
- .mask_flags = 0,
- }
-};
-
-static struct pxa3xx_nand_platform_data aspenite_nand_info = {
- .parts = aspenite_nand_partitions,
- .nr_parts = ARRAY_SIZE(aspenite_nand_partitions),
-};
-
-static struct i2c_board_info aspenite_i2c_info[] __initdata = {
- { I2C_BOARD_INFO("wm8753", 0x1b), },
-};
-
-static struct fb_videomode video_modes[] = {
- [0] = {
- .pixclock = 30120,
- .refresh = 60,
- .xres = 800,
- .yres = 480,
- .hsync_len = 1,
- .left_margin = 215,
- .right_margin = 40,
- .vsync_len = 1,
- .upper_margin = 34,
- .lower_margin = 10,
- .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
- },
-};
-
-struct pxa168fb_mach_info aspenite_lcd_info = {
- .id = "Graphic Frame",
- .modes = video_modes,
- .num_modes = ARRAY_SIZE(video_modes),
- .pix_fmt = PIX_FMT_RGB565,
- .io_pin_allocation_mode = PIN_MODE_DUMB_24,
- .dumb_mode = DUMB_MODE_RGB888,
- .active = 1,
- .panel_rbswap = 0,
- .invert_pixclock = 0,
-};
-
-static const unsigned int aspenite_matrix_key_map[] = {
- KEY(0, 6, KEY_UP), /* SW 4 */
- KEY(0, 7, KEY_DOWN), /* SW 5 */
- KEY(1, 6, KEY_LEFT), /* SW 6 */
- KEY(1, 7, KEY_RIGHT), /* SW 7 */
- KEY(4, 6, KEY_ENTER), /* SW 8 */
- KEY(4, 7, KEY_ESC), /* SW 9 */
-};
-
-static struct matrix_keymap_data aspenite_matrix_keymap_data = {
- .keymap = aspenite_matrix_key_map,
- .keymap_size = ARRAY_SIZE(aspenite_matrix_key_map),
-};
-
-static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = {
- .matrix_key_rows = 5,
- .matrix_key_cols = 8,
- .matrix_keymap_data = &aspenite_matrix_keymap_data,
- .debounce_interval = 30,
-};
-
-#if IS_ENABLED(CONFIG_USB_EHCI_MV)
-static struct mv_usb_platform_data pxa168_sph_pdata = {
- .mode = MV_USB_MODE_HOST,
- .phy_init = pxa_usb_phy_init,
- .phy_deinit = pxa_usb_phy_deinit,
- .set_vbus = NULL,
-};
-#endif
-
-static void __init common_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(common_pin_config));
-
- /* on-chip devices */
- pxa168_add_uart(1);
- pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
- pxa168_add_ssp(1);
- pxa168_add_nand(&aspenite_nand_info);
- pxa168_add_fb(&aspenite_lcd_info);
- pxa168_add_keypad(&aspenite_keypad_info);
- platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&pxa168_device_gpio);
-
- /* off-chip devices */
- platform_device_register(&smc91x_device);
-
-#if IS_ENABLED(CONFIG_USB_SUPPORT)
-#if IS_ENABLED(CONFIG_PHY_PXA_USB)
- platform_device_register(&pxa168_device_usb_phy);
-#endif
-
-#if IS_ENABLED(CONFIG_USB_EHCI_MV)
- pxa168_add_usb_host(&pxa168_sph_pdata);
-#endif
-#endif
-}
-
-MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = MMP_NR_IRQS,
- .init_irq = pxa168_init_irq,
- .init_time = pxa168_timer_init,
- .init_machine = common_init,
- .restart = pxa168_restart,
-MACHINE_END
-
-MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = MMP_NR_IRQS,
- .init_irq = pxa168_init_irq,
- .init_time = pxa168_timer_init,
- .init_machine = common_init,
- .restart = pxa168_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
deleted file mode 100644
index 12e5a9441df9..000000000000
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ /dev/null
@@ -1,55 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/avengers_lite.c
- *
- * Support for the Marvell PXA168-based Avengers lite Development Platform.
- *
- * Copyright (C) 2009-2010 Marvell International Ltd.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/gpio-pxa.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "addr-map.h"
-#include "mfp-pxa168.h"
-#include "pxa168.h"
-#include "irqs.h"
-
-
-#include "common.h"
-#include <linux/delay.h>
-
-/* Avengers lite MFP configurations */
-static unsigned long avengers_lite_pin_config_V16F[] __initdata = {
- /* DEBUG_UART */
- GPIO88_UART2_TXD,
- GPIO89_UART2_RXD,
-};
-
-static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static void __init avengers_lite_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(avengers_lite_pin_config_V16F));
-
- /* on-chip devices */
- pxa168_add_uart(2);
- platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&pxa168_device_gpio);
-}
-
-MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = MMP_NR_IRQS,
- .init_irq = pxa168_init_irq,
- .init_time = pxa168_timer_init,
- .init_machine = avengers_lite_init,
- .restart = pxa168_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
deleted file mode 100644
index ce93bc395546..000000000000
--- a/arch/arm/mach-mmp/brownstone.c
+++ /dev/null
@@ -1,237 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/brownstone.c
- *
- * Support for the Marvell Brownstone Development Platform.
- *
- * Copyright (C) 2009-2010 Marvell International Ltd.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/gpio-pxa.h>
-#include <linux/gpio/machine.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/max8649.h>
-#include <linux/regulator/fixed.h>
-#include <linux/mfd/max8925.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "addr-map.h"
-#include "mfp-mmp2.h"
-#include "mmp2.h"
-#include "irqs.h"
-
-#include "common.h"
-
-#define BROWNSTONE_NR_IRQS (MMP_NR_IRQS + 40)
-
-#define GPIO_5V_ENABLE (89)
-
-static unsigned long brownstone_pin_config[] __initdata = {
- /* UART1 */
- GPIO29_UART1_RXD,
- GPIO30_UART1_TXD,
-
- /* UART3 */
- GPIO51_UART3_RXD,
- GPIO52_UART3_TXD,
-
- /* DFI */
- GPIO168_DFI_D0,
- GPIO167_DFI_D1,
- GPIO166_DFI_D2,
- GPIO165_DFI_D3,
- GPIO107_DFI_D4,
- GPIO106_DFI_D5,
- GPIO105_DFI_D6,
- GPIO104_DFI_D7,
- GPIO111_DFI_D8,
- GPIO164_DFI_D9,
- GPIO163_DFI_D10,
- GPIO162_DFI_D11,
- GPIO161_DFI_D12,
- GPIO110_DFI_D13,
- GPIO109_DFI_D14,
- GPIO108_DFI_D15,
- GPIO143_ND_nCS0,
- GPIO144_ND_nCS1,
- GPIO147_ND_nWE,
- GPIO148_ND_nRE,
- GPIO150_ND_ALE,
- GPIO149_ND_CLE,
- GPIO112_ND_RDY0,
- GPIO160_ND_RDY1,
-
- /* PMIC */
- PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
-
- /* MMC0 */
- GPIO131_MMC1_DAT3 | MFP_PULL_HIGH,
- GPIO132_MMC1_DAT2 | MFP_PULL_HIGH,
- GPIO133_MMC1_DAT1 | MFP_PULL_HIGH,
- GPIO134_MMC1_DAT0 | MFP_PULL_HIGH,
- GPIO136_MMC1_CMD | MFP_PULL_HIGH,
- GPIO139_MMC1_CLK,
- GPIO140_MMC1_CD | MFP_PULL_LOW,
- GPIO141_MMC1_WP | MFP_PULL_LOW,
-
- /* MMC1 */
- GPIO37_MMC2_DAT3 | MFP_PULL_HIGH,
- GPIO38_MMC2_DAT2 | MFP_PULL_HIGH,
- GPIO39_MMC2_DAT1 | MFP_PULL_HIGH,
- GPIO40_MMC2_DAT0 | MFP_PULL_HIGH,
- GPIO41_MMC2_CMD | MFP_PULL_HIGH,
- GPIO42_MMC2_CLK,
-
- /* MMC2 */
- GPIO165_MMC3_DAT7 | MFP_PULL_HIGH,
- GPIO162_MMC3_DAT6 | MFP_PULL_HIGH,
- GPIO166_MMC3_DAT5 | MFP_PULL_HIGH,
- GPIO163_MMC3_DAT4 | MFP_PULL_HIGH,
- GPIO167_MMC3_DAT3 | MFP_PULL_HIGH,
- GPIO164_MMC3_DAT2 | MFP_PULL_HIGH,
- GPIO168_MMC3_DAT1 | MFP_PULL_HIGH,
- GPIO111_MMC3_DAT0 | MFP_PULL_HIGH,
- GPIO112_MMC3_CMD | MFP_PULL_HIGH,
- GPIO151_MMC3_CLK,
-
- /* 5V regulator */
- GPIO89_GPIO,
-};
-
-static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct regulator_consumer_supply max8649_supply[] = {
- REGULATOR_SUPPLY("vcc_core", NULL),
-};
-
-static struct regulator_init_data max8649_init_data = {
- .constraints = {
- .name = "vcc_core range",
- .min_uV = 1150000,
- .max_uV = 1280000,
- .always_on = 1,
- .boot_on = 1,
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
- },
- .num_consumer_supplies = 1,
- .consumer_supplies = &max8649_supply[0],
-};
-
-static struct max8649_platform_data brownstone_max8649_info = {
- .mode = 2, /* VID1 = 1, VID0 = 0 */
- .extclk = 0,
- .ramp_timing = MAX8649_RAMP_32MV,
- .regulator = &max8649_init_data,
-};
-
-static struct regulator_consumer_supply brownstone_v_5vp_supplies[] = {
- REGULATOR_SUPPLY("v_5vp", NULL),
-};
-
-static struct regulator_init_data brownstone_v_5vp_data = {
- .constraints = {
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .num_consumer_supplies = ARRAY_SIZE(brownstone_v_5vp_supplies),
- .consumer_supplies = brownstone_v_5vp_supplies,
-};
-
-static struct fixed_voltage_config brownstone_v_5vp = {
- .supply_name = "v_5vp",
- .microvolts = 5000000,
- .enabled_at_boot = 1,
- .init_data = &brownstone_v_5vp_data,
-};
-
-static struct platform_device brownstone_v_5vp_device = {
- .name = "reg-fixed-voltage",
- .id = 1,
- .dev = {
- .platform_data = &brownstone_v_5vp,
- },
-};
-
-static struct gpiod_lookup_table brownstone_v_5vp_gpiod_table = {
- .dev_id = "reg-fixed-voltage.1", /* .id set to 1 above */
- .table = {
- GPIO_LOOKUP("gpio-pxa", GPIO_5V_ENABLE,
- NULL, GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct max8925_platform_data brownstone_max8925_info = {
- .irq_base = MMP_NR_IRQS,
-};
-
-static struct i2c_board_info brownstone_twsi1_info[] = {
- [0] = {
- .type = "max8649",
- .addr = 0x60,
- .platform_data = &brownstone_max8649_info,
- },
- [1] = {
- .type = "max8925",
- .addr = 0x3c,
- .irq = IRQ_MMP2_PMIC,
- .platform_data = &brownstone_max8925_info,
- },
-};
-
-static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
- .clk_delay_cycles = 0x1f,
-};
-
-static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc2 = {
- .clk_delay_cycles = 0x1f,
- .flags = PXA_FLAG_CARD_PERMANENT
- | PXA_FLAG_SD_8_BIT_CAPABLE_SLOT,
-};
-
-static struct sram_platdata mmp2_asram_platdata = {
- .pool_name = "asram",
- .granularity = SRAM_GRANULARITY,
-};
-
-static struct sram_platdata mmp2_isram_platdata = {
- .pool_name = "isram",
- .granularity = SRAM_GRANULARITY,
-};
-
-static void __init brownstone_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(brownstone_pin_config));
-
- /* on-chip devices */
- mmp2_add_uart(1);
- mmp2_add_uart(3);
- platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&mmp2_device_gpio);
- mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
- mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
- mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */
- mmp2_add_asram(&mmp2_asram_platdata);
- mmp2_add_isram(&mmp2_isram_platdata);
-
- /* enable 5v regulator */
- gpiod_add_lookup_table(&brownstone_v_5vp_gpiod_table);
- platform_device_register(&brownstone_v_5vp_device);
-}
-
-MACHINE_START(BROWNSTONE, "Brownstone Development Platform")
- /* Maintainer: Haojian Zhuang <haojian.zhuang@marvell.com> */
- .map_io = mmp_map_io,
- .nr_irqs = BROWNSTONE_NR_IRQS,
- .init_irq = mmp2_init_irq,
- .init_time = mmp2_timer_init,
- .init_machine = brownstone_init,
- .restart = mmp_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
deleted file mode 100644
index 9a7054368e55..000000000000
--- a/arch/arm/mach-mmp/flint.c
+++ /dev/null
@@ -1,131 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/flint.c
- *
- * Support for the Marvell Flint Development Platform.
- *
- * Copyright (C) 2009 Marvell International Ltd.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/smc91x.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-#include <linux/gpio-pxa.h>
-#include <linux/interrupt.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "addr-map.h"
-#include "mfp-mmp2.h"
-#include "mmp2.h"
-#include "irqs.h"
-
-#include "common.h"
-
-#define FLINT_NR_IRQS (MMP_NR_IRQS + 48)
-
-static unsigned long flint_pin_config[] __initdata = {
- /* UART1 */
- GPIO45_UART1_RXD,
- GPIO46_UART1_TXD,
-
- /* UART2 */
- GPIO47_UART2_RXD,
- GPIO48_UART2_TXD,
-
- /* SMC */
- GPIO151_SMC_SCLK,
- GPIO145_SMC_nCS0,
- GPIO146_SMC_nCS1,
- GPIO152_SMC_BE0,
- GPIO153_SMC_BE1,
- GPIO154_SMC_IRQ,
- GPIO113_SMC_RDY,
-
- /*Ethernet*/
- GPIO155_GPIO,
-
- /* DFI */
- GPIO168_DFI_D0,
- GPIO167_DFI_D1,
- GPIO166_DFI_D2,
- GPIO165_DFI_D3,
- GPIO107_DFI_D4,
- GPIO106_DFI_D5,
- GPIO105_DFI_D6,
- GPIO104_DFI_D7,
- GPIO111_DFI_D8,
- GPIO164_DFI_D9,
- GPIO163_DFI_D10,
- GPIO162_DFI_D11,
- GPIO161_DFI_D12,
- GPIO110_DFI_D13,
- GPIO109_DFI_D14,
- GPIO108_DFI_D15,
- GPIO143_ND_nCS0,
- GPIO144_ND_nCS1,
- GPIO147_ND_nWE,
- GPIO148_ND_nRE,
- GPIO150_ND_ALE,
- GPIO149_ND_CLE,
- GPIO112_ND_RDY0,
- GPIO160_ND_RDY1,
-};
-
-static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct smc91x_platdata flint_smc91x_info = {
- .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
-};
-
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = SMC_CS1_PHYS_BASE + 0x300,
- .end = SMC_CS1_PHYS_BASE + 0xfffff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = MMP_GPIO_TO_IRQ(155),
- .end = MMP_GPIO_TO_IRQ(155),
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
- }
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .dev = {
- .platform_data = &flint_smc91x_info,
- },
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static void __init flint_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(flint_pin_config));
-
- /* on-chip devices */
- mmp2_add_uart(1);
- mmp2_add_uart(2);
- platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&mmp2_device_gpio);
-
- /* off-chip devices */
- platform_device_register(&smc91x_device);
-}
-
-MACHINE_START(FLINT, "Flint Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = FLINT_NR_IRQS,
- .init_irq = mmp2_init_irq,
- .init_time = mmp2_timer_init,
- .init_machine = flint_init,
- .restart = mmp_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
deleted file mode 100644
index 5888b71944b8..000000000000
--- a/arch/arm/mach-mmp/gplugd.c
+++ /dev/null
@@ -1,206 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/gplugd.c
- *
- * Support for the Marvell PXA168-based GuruPlug Display (gplugD) Platform.
- */
-
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/gpio-pxa.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include "irqs.h"
-#include "pxa168.h"
-#include "mfp-pxa168.h"
-
-#include "common.h"
-
-static unsigned long gplugd_pin_config[] __initdata = {
- /* UART3 */
- GPIO8_UART3_TXD,
- GPIO9_UART3_RXD,
- GPIO1O_UART3_CTS,
- GPIO11_UART3_RTS,
-
- /* USB OTG PEN */
- GPIO18_GPIO,
-
- /* MMC2 */
- GPIO28_MMC2_CMD,
- GPIO29_MMC2_CLK,
- GPIO30_MMC2_DAT0,
- GPIO31_MMC2_DAT1,
- GPIO32_MMC2_DAT2,
- GPIO33_MMC2_DAT3,
-
- /* LCD & HDMI clock selection GPIO: 0: 74.176MHz, 1: 74.25 MHz */
- GPIO35_GPIO,
- GPIO36_GPIO, /* CEC Interrupt */
-
- /* MMC1 */
- GPIO43_MMC1_CLK,
- GPIO49_MMC1_CMD,
- GPIO41_MMC1_DAT0,
- GPIO40_MMC1_DAT1,
- GPIO52_MMC1_DAT2,
- GPIO51_MMC1_DAT3,
- GPIO53_MMC1_CD,
-
- /* LCD */
- GPIO56_LCD_FCLK_RD,
- GPIO57_LCD_LCLK_A0,
- GPIO58_LCD_PCLK_WR,
- GPIO59_LCD_DENA_BIAS,
- GPIO60_LCD_DD0,
- GPIO61_LCD_DD1,
- GPIO62_LCD_DD2,
- GPIO63_LCD_DD3,
- GPIO64_LCD_DD4,
- GPIO65_LCD_DD5,
- GPIO66_LCD_DD6,
- GPIO67_LCD_DD7,
- GPIO68_LCD_DD8,
- GPIO69_LCD_DD9,
- GPIO70_LCD_DD10,
- GPIO71_LCD_DD11,
- GPIO72_LCD_DD12,
- GPIO73_LCD_DD13,
- GPIO74_LCD_DD14,
- GPIO75_LCD_DD15,
- GPIO76_LCD_DD16,
- GPIO77_LCD_DD17,
- GPIO78_LCD_DD18,
- GPIO79_LCD_DD19,
- GPIO80_LCD_DD20,
- GPIO81_LCD_DD21,
- GPIO82_LCD_DD22,
- GPIO83_LCD_DD23,
-
- /* GPIO */
- GPIO84_GPIO,
- GPIO85_GPIO,
-
- /* Fast-Ethernet*/
- GPIO86_TX_CLK,
- GPIO87_TX_EN,
- GPIO88_TX_DQ3,
- GPIO89_TX_DQ2,
- GPIO90_TX_DQ1,
- GPIO91_TX_DQ0,
- GPIO92_MII_CRS,
- GPIO93_MII_COL,
- GPIO94_RX_CLK,
- GPIO95_RX_ER,
- GPIO96_RX_DQ3,
- GPIO97_RX_DQ2,
- GPIO98_RX_DQ1,
- GPIO99_RX_DQ0,
- GPIO100_MII_MDC,
- GPIO101_MII_MDIO,
- GPIO103_RX_DV,
- GPIO104_GPIO, /* Reset PHY */
-
- /* RTC interrupt */
- GPIO102_GPIO,
-
- /* I2C */
- GPIO105_CI2C_SDA,
- GPIO106_CI2C_SCL,
-
- /* SPI NOR Flash on SSP2 */
- GPIO107_SSP2_RXD,
- GPIO108_SSP2_TXD,
- GPIO110_GPIO, /* SPI_CSn */
- GPIO111_SSP2_CLK,
-
- /* Select JTAG */
- GPIO109_GPIO,
-
- /* I2S */
- GPIO114_I2S_FRM,
- GPIO115_I2S_BCLK,
- GPIO116_I2S_TXD
-};
-
-static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct i2c_board_info gplugd_i2c_board_info[] = {
- {
- .type = "isl1208",
- .addr = 0x6F,
- }
-};
-
-/* Bring PHY out of reset by setting GPIO 104 */
-static int gplugd_eth_init(void)
-{
- if (unlikely(gpio_request(104, "ETH_RESET_N"))) {
- printk(KERN_ERR "Can't get hold of GPIO 104 to bring Ethernet "
- "PHY out of reset\n");
- return -EIO;
- }
-
- gpio_direction_output(104, 1);
- gpio_free(104);
- return 0;
-}
-
-struct pxa168_eth_platform_data gplugd_eth_platform_data = {
- .port_number = 0,
- .phy_addr = 0,
- .speed = 0, /* Autonagotiation */
- .intf = PHY_INTERFACE_MODE_RMII,
- .init = gplugd_eth_init,
-};
-
-static void __init select_disp_freq(void)
-{
- /* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */
- if (unlikely(gpio_request(35, "DISP_FREQ_SEL"))) {
- printk(KERN_ERR "Can't get hold of GPIO 35 to select display "
- "frequency\n");
- } else {
- gpio_direction_output(35, 1);
- gpio_free(35);
- }
-
- if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) {
- printk(KERN_ERR "Can't get hold of GPIO 85 to select display "
- "frequency\n");
- } else {
- gpio_direction_output(85, 0);
- gpio_free(85);
- }
-}
-
-static void __init gplugd_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
-
- select_disp_freq();
-
- /* on-chip devices */
- pxa168_add_uart(3);
- pxa168_add_ssp(1);
- pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
- platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&pxa168_device_gpio);
-
- pxa168_add_eth(&gplugd_eth_platform_data);
-}
-
-MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
- .map_io = mmp_map_io,
- .nr_irqs = MMP_NR_IRQS,
- .init_irq = pxa168_init_irq,
- .init_time = pxa168_timer_init,
- .init_machine = gplugd_init,
- .restart = pxa168_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
deleted file mode 100644
index 2578e176fd48..000000000000
--- a/arch/arm/mach-mmp/jasper.c
+++ /dev/null
@@ -1,185 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/jasper.c
- *
- * Support for the Marvell Jasper Development Platform.
- *
- * Copyright (C) 2009-2010 Marvell International Ltd.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/gpio-pxa.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/max8649.h>
-#include <linux/mfd/max8925.h>
-#include <linux/interrupt.h>
-
-#include "irqs.h"
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "addr-map.h"
-#include "mfp-mmp2.h"
-#include "mmp2.h"
-
-#include "common.h"
-
-#define JASPER_NR_IRQS (MMP_NR_IRQS + 48)
-
-static unsigned long jasper_pin_config[] __initdata = {
- /* UART1 */
- GPIO29_UART1_RXD,
- GPIO30_UART1_TXD,
-
- /* UART3 */
- GPIO51_UART3_RXD,
- GPIO52_UART3_TXD,
-
- /* DFI */
- GPIO168_DFI_D0,
- GPIO167_DFI_D1,
- GPIO166_DFI_D2,
- GPIO165_DFI_D3,
- GPIO107_DFI_D4,
- GPIO106_DFI_D5,
- GPIO105_DFI_D6,
- GPIO104_DFI_D7,
- GPIO111_DFI_D8,
- GPIO164_DFI_D9,
- GPIO163_DFI_D10,
- GPIO162_DFI_D11,
- GPIO161_DFI_D12,
- GPIO110_DFI_D13,
- GPIO109_DFI_D14,
- GPIO108_DFI_D15,
- GPIO143_ND_nCS0,
- GPIO144_ND_nCS1,
- GPIO147_ND_nWE,
- GPIO148_ND_nRE,
- GPIO150_ND_ALE,
- GPIO149_ND_CLE,
- GPIO112_ND_RDY0,
- GPIO160_ND_RDY1,
-
- /* PMIC */
- PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
-
- /* MMC1 */
- GPIO131_MMC1_DAT3,
- GPIO132_MMC1_DAT2,
- GPIO133_MMC1_DAT1,
- GPIO134_MMC1_DAT0,
- GPIO136_MMC1_CMD,
- GPIO139_MMC1_CLK,
- GPIO140_MMC1_CD,
- GPIO141_MMC1_WP,
-
- /* MMC2 */
- GPIO37_MMC2_DAT3,
- GPIO38_MMC2_DAT2,
- GPIO39_MMC2_DAT1,
- GPIO40_MMC2_DAT0,
- GPIO41_MMC2_CMD,
- GPIO42_MMC2_CLK,
-
- /* MMC3 */
- GPIO165_MMC3_DAT7,
- GPIO162_MMC3_DAT6,
- GPIO166_MMC3_DAT5,
- GPIO163_MMC3_DAT4,
- GPIO167_MMC3_DAT3,
- GPIO164_MMC3_DAT2,
- GPIO168_MMC3_DAT1,
- GPIO111_MMC3_DAT0,
- GPIO112_MMC3_CMD,
- GPIO151_MMC3_CLK,
-};
-
-static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct regulator_consumer_supply max8649_supply[] = {
- REGULATOR_SUPPLY("vcc_core", NULL),
-};
-
-static struct regulator_init_data max8649_init_data = {
- .constraints = {
- .name = "vcc_core range",
- .min_uV = 1150000,
- .max_uV = 1280000,
- .always_on = 1,
- .boot_on = 1,
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
- },
- .num_consumer_supplies = 1,
- .consumer_supplies = &max8649_supply[0],
-};
-
-static struct max8649_platform_data jasper_max8649_info = {
- .mode = 2, /* VID1 = 1, VID0 = 0 */
- .extclk = 0,
- .ramp_timing = MAX8649_RAMP_32MV,
- .regulator = &max8649_init_data,
-};
-
-static struct max8925_backlight_pdata jasper_backlight_data = {
- .dual_string = 0,
-};
-
-static struct max8925_power_pdata jasper_power_data = {
- .batt_detect = 0, /* can't detect battery by ID pin */
- .topoff_threshold = MAX8925_TOPOFF_THR_10PER,
- .fast_charge = MAX8925_FCHG_1000MA,
-};
-
-static struct max8925_platform_data jasper_max8925_info = {
- .backlight = &jasper_backlight_data,
- .power = &jasper_power_data,
- .irq_base = MMP_NR_IRQS,
-};
-
-static struct i2c_board_info jasper_twsi1_info[] = {
- [0] = {
- .type = "max8649",
- .addr = 0x60,
- .platform_data = &jasper_max8649_info,
- },
- [1] = {
- .type = "max8925",
- .addr = 0x3c,
- .irq = IRQ_MMP2_PMIC,
- .platform_data = &jasper_max8925_info,
- },
-};
-
-static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
- .clk_delay_cycles = 0x1f,
-};
-
-static void __init jasper_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(jasper_pin_config));
-
- /* on-chip devices */
- mmp2_add_uart(1);
- mmp2_add_uart(3);
- mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info));
- platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&mmp2_device_gpio);
- mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
-
- regulator_has_full_constraints();
-}
-
-MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = JASPER_NR_IRQS,
- .init_irq = mmp2_init_irq,
- .init_time = mmp2_timer_init,
- .init_machine = jasper_init,
- .restart = mmp_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/mfp-mmp2.h b/arch/arm/mach-mmp/mfp-mmp2.h
deleted file mode 100644
index 1620222981e3..000000000000
--- a/arch/arm/mach-mmp/mfp-mmp2.h
+++ /dev/null
@@ -1,396 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_MFP_MMP2_H
-#define __ASM_MACH_MFP_MMP2_H
-
-#include "mfp.h"
-
-#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
-#define MFP_DRIVE_SLOW (0x2 << 13)
-#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x6 << 13)
-
-/* GPIO */
-#define GPIO0_GPIO MFP_CFG(GPIO0, AF0)
-#define GPIO1_GPIO MFP_CFG(GPIO1, AF0)
-#define GPIO2_GPIO MFP_CFG(GPIO2, AF0)
-#define GPIO3_GPIO MFP_CFG(GPIO3, AF0)
-#define GPIO4_GPIO MFP_CFG(GPIO4, AF0)
-#define GPIO5_GPIO MFP_CFG(GPIO5, AF0)
-#define GPIO6_GPIO MFP_CFG(GPIO6, AF0)
-#define GPIO7_GPIO MFP_CFG(GPIO7, AF0)
-#define GPIO8_GPIO MFP_CFG(GPIO8, AF0)
-#define GPIO9_GPIO MFP_CFG(GPIO9, AF0)
-#define GPIO10_GPIO MFP_CFG(GPIO10, AF0)
-#define GPIO11_GPIO MFP_CFG(GPIO11, AF0)
-#define GPIO12_GPIO MFP_CFG(GPIO12, AF0)
-#define GPIO13_GPIO MFP_CFG(GPIO13, AF0)
-#define GPIO14_GPIO MFP_CFG(GPIO14, AF0)
-#define GPIO15_GPIO MFP_CFG(GPIO15, AF0)
-#define GPIO16_GPIO MFP_CFG(GPIO16, AF0)
-#define GPIO17_GPIO MFP_CFG(GPIO17, AF0)
-#define GPIO18_GPIO MFP_CFG(GPIO18, AF0)
-#define GPIO19_GPIO MFP_CFG(GPIO19, AF0)
-#define GPIO20_GPIO MFP_CFG(GPIO20, AF0)
-#define GPIO21_GPIO MFP_CFG(GPIO21, AF0)
-#define GPIO22_GPIO MFP_CFG(GPIO22, AF0)
-#define GPIO23_GPIO MFP_CFG(GPIO23, AF0)
-#define GPIO24_GPIO MFP_CFG(GPIO24, AF0)
-#define GPIO25_GPIO MFP_CFG(GPIO25, AF0)
-#define GPIO26_GPIO MFP_CFG(GPIO26, AF0)
-#define GPIO27_GPIO MFP_CFG(GPIO27, AF0)
-#define GPIO28_GPIO MFP_CFG(GPIO28, AF0)
-#define GPIO29_GPIO MFP_CFG(GPIO29, AF0)
-#define GPIO30_GPIO MFP_CFG(GPIO30, AF0)
-#define GPIO31_GPIO MFP_CFG(GPIO31, AF0)
-#define GPIO32_GPIO MFP_CFG(GPIO32, AF0)
-#define GPIO33_GPIO MFP_CFG(GPIO33, AF0)
-#define GPIO34_GPIO MFP_CFG(GPIO34, AF0)
-#define GPIO35_GPIO MFP_CFG(GPIO35, AF0)
-#define GPIO36_GPIO MFP_CFG(GPIO36, AF0)
-#define GPIO37_GPIO MFP_CFG(GPIO37, AF0)
-#define GPIO38_GPIO MFP_CFG(GPIO38, AF0)
-#define GPIO39_GPIO MFP_CFG(GPIO39, AF0)
-#define GPIO40_GPIO MFP_CFG(GPIO40, AF0)
-#define GPIO41_GPIO MFP_CFG(GPIO41, AF0)
-#define GPIO42_GPIO MFP_CFG(GPIO42, AF0)
-#define GPIO43_GPIO MFP_CFG(GPIO43, AF0)
-#define GPIO44_GPIO MFP_CFG(GPIO44, AF0)
-#define GPIO45_GPIO MFP_CFG(GPIO45, AF0)
-#define GPIO46_GPIO MFP_CFG(GPIO46, AF0)
-#define GPIO47_GPIO MFP_CFG(GPIO47, AF0)
-#define GPIO48_GPIO MFP_CFG(GPIO48, AF0)
-#define GPIO49_GPIO MFP_CFG(GPIO49, AF0)
-#define GPIO50_GPIO MFP_CFG(GPIO50, AF0)
-#define GPIO51_GPIO MFP_CFG(GPIO51, AF0)
-#define GPIO52_GPIO MFP_CFG(GPIO52, AF0)
-#define GPIO53_GPIO MFP_CFG(GPIO53, AF0)
-#define GPIO54_GPIO MFP_CFG(GPIO54, AF0)
-#define GPIO55_GPIO MFP_CFG(GPIO55, AF0)
-#define GPIO56_GPIO MFP_CFG(GPIO56, AF0)
-#define GPIO57_GPIO MFP_CFG(GPIO57, AF0)
-#define GPIO58_GPIO MFP_CFG(GPIO58, AF0)
-#define GPIO59_GPIO MFP_CFG(GPIO59, AF0)
-#define GPIO60_GPIO MFP_CFG(GPIO60, AF0)
-#define GPIO61_GPIO MFP_CFG(GPIO61, AF0)
-#define GPIO62_GPIO MFP_CFG(GPIO62, AF0)
-#define GPIO63_GPIO MFP_CFG(GPIO63, AF0)
-#define GPIO64_GPIO MFP_CFG(GPIO64, AF0)
-#define GPIO65_GPIO MFP_CFG(GPIO65, AF0)
-#define GPIO66_GPIO MFP_CFG(GPIO66, AF0)
-#define GPIO67_GPIO MFP_CFG(GPIO67, AF0)
-#define GPIO68_GPIO MFP_CFG(GPIO68, AF0)
-#define GPIO69_GPIO MFP_CFG(GPIO69, AF0)
-#define GPIO70_GPIO MFP_CFG(GPIO70, AF0)
-#define GPIO71_GPIO MFP_CFG(GPIO71, AF0)
-#define GPIO72_GPIO MFP_CFG(GPIO72, AF0)
-#define GPIO73_GPIO MFP_CFG(GPIO73, AF0)
-#define GPIO74_GPIO MFP_CFG(GPIO74, AF0)
-#define GPIO75_GPIO MFP_CFG(GPIO75, AF0)
-#define GPIO76_GPIO MFP_CFG(GPIO76, AF0)
-#define GPIO77_GPIO MFP_CFG(GPIO77, AF0)
-#define GPIO78_GPIO MFP_CFG(GPIO78, AF0)
-#define GPIO79_GPIO MFP_CFG(GPIO79, AF0)
-#define GPIO80_GPIO MFP_CFG(GPIO80, AF0)
-#define GPIO81_GPIO MFP_CFG(GPIO81, AF0)
-#define GPIO82_GPIO MFP_CFG(GPIO82, AF0)
-#define GPIO83_GPIO MFP_CFG(GPIO83, AF0)
-#define GPIO84_GPIO MFP_CFG(GPIO84, AF0)
-#define GPIO85_GPIO MFP_CFG(GPIO85, AF0)
-#define GPIO86_GPIO MFP_CFG(GPIO86, AF0)
-#define GPIO87_GPIO MFP_CFG(GPIO87, AF0)
-#define GPIO88_GPIO MFP_CFG(GPIO88, AF0)
-#define GPIO89_GPIO MFP_CFG(GPIO89, AF0)
-#define GPIO90_GPIO MFP_CFG(GPIO90, AF0)
-#define GPIO91_GPIO MFP_CFG(GPIO91, AF0)
-#define GPIO92_GPIO MFP_CFG(GPIO92, AF0)
-#define GPIO93_GPIO MFP_CFG(GPIO93, AF0)
-#define GPIO94_GPIO MFP_CFG(GPIO94, AF0)
-#define GPIO95_GPIO MFP_CFG(GPIO95, AF0)
-#define GPIO96_GPIO MFP_CFG(GPIO96, AF0)
-#define GPIO97_GPIO MFP_CFG(GPIO97, AF0)
-#define GPIO98_GPIO MFP_CFG(GPIO98, AF0)
-#define GPIO99_GPIO MFP_CFG(GPIO99, AF0)
-#define GPIO100_GPIO MFP_CFG(GPIO100, AF0)
-#define GPIO101_GPIO MFP_CFG(GPIO101, AF0)
-#define GPIO102_GPIO MFP_CFG(GPIO102, AF1)
-#define GPIO103_GPIO MFP_CFG(GPIO103, AF1)
-#define GPIO104_GPIO MFP_CFG(GPIO104, AF1)
-#define GPIO105_GPIO MFP_CFG(GPIO105, AF1)
-#define GPIO106_GPIO MFP_CFG(GPIO106, AF1)
-#define GPIO107_GPIO MFP_CFG(GPIO107, AF1)
-#define GPIO108_GPIO MFP_CFG(GPIO108, AF1)
-#define GPIO109_GPIO MFP_CFG(GPIO109, AF1)
-#define GPIO110_GPIO MFP_CFG(GPIO110, AF1)
-#define GPIO111_GPIO MFP_CFG(GPIO111, AF1)
-#define GPIO112_GPIO MFP_CFG(GPIO112, AF1)
-#define GPIO113_GPIO MFP_CFG(GPIO113, AF1)
-#define GPIO114_GPIO MFP_CFG(GPIO114, AF0)
-#define GPIO115_GPIO MFP_CFG(GPIO115, AF0)
-#define GPIO116_GPIO MFP_CFG(GPIO116, AF0)
-#define GPIO117_GPIO MFP_CFG(GPIO117, AF0)
-#define GPIO118_GPIO MFP_CFG(GPIO118, AF0)
-#define GPIO119_GPIO MFP_CFG(GPIO119, AF0)
-#define GPIO120_GPIO MFP_CFG(GPIO120, AF0)
-#define GPIO121_GPIO MFP_CFG(GPIO121, AF0)
-#define GPIO122_GPIO MFP_CFG(GPIO122, AF0)
-#define GPIO123_GPIO MFP_CFG(GPIO123, AF0)
-#define GPIO124_GPIO MFP_CFG(GPIO124, AF0)
-#define GPIO125_GPIO MFP_CFG(GPIO125, AF0)
-#define GPIO126_GPIO MFP_CFG(GPIO126, AF0)
-#define GPIO127_GPIO MFP_CFG(GPIO127, AF0)
-#define GPIO128_GPIO MFP_CFG(GPIO128, AF0)
-#define GPIO129_GPIO MFP_CFG(GPIO129, AF0)
-#define GPIO130_GPIO MFP_CFG(GPIO130, AF0)
-#define GPIO131_GPIO MFP_CFG(GPIO131, AF0)
-#define GPIO132_GPIO MFP_CFG(GPIO132, AF0)
-#define GPIO133_GPIO MFP_CFG(GPIO133, AF0)
-#define GPIO134_GPIO MFP_CFG(GPIO134, AF0)
-#define GPIO135_GPIO MFP_CFG(GPIO135, AF0)
-#define GPIO136_GPIO MFP_CFG(GPIO136, AF0)
-#define GPIO137_GPIO MFP_CFG(GPIO137, AF0)
-#define GPIO138_GPIO MFP_CFG(GPIO138, AF0)
-#define GPIO139_GPIO MFP_CFG(GPIO139, AF0)
-#define GPIO140_GPIO MFP_CFG(GPIO140, AF0)
-#define GPIO141_GPIO MFP_CFG(GPIO141, AF0)
-#define GPIO142_GPIO MFP_CFG(GPIO142, AF1)
-#define GPIO143_GPIO MFP_CFG(GPIO143, AF1)
-#define GPIO144_GPIO MFP_CFG(GPIO144, AF1)
-#define GPIO145_GPIO MFP_CFG(GPIO145, AF1)
-#define GPIO146_GPIO MFP_CFG(GPIO146, AF1)
-#define GPIO147_GPIO MFP_CFG(GPIO147, AF1)
-#define GPIO148_GPIO MFP_CFG(GPIO148, AF1)
-#define GPIO149_GPIO MFP_CFG(GPIO149, AF1)
-#define GPIO150_GPIO MFP_CFG(GPIO150, AF1)
-#define GPIO151_GPIO MFP_CFG(GPIO151, AF1)
-#define GPIO152_GPIO MFP_CFG(GPIO152, AF1)
-#define GPIO153_GPIO MFP_CFG(GPIO153, AF1)
-#define GPIO154_GPIO MFP_CFG(GPIO154, AF1)
-#define GPIO155_GPIO MFP_CFG(GPIO155, AF1)
-#define GPIO156_GPIO MFP_CFG(GPIO156, AF1)
-#define GPIO157_GPIO MFP_CFG(GPIO157, AF1)
-#define GPIO158_GPIO MFP_CFG(GPIO158, AF1)
-#define GPIO159_GPIO MFP_CFG(GPIO159, AF1)
-#define GPIO160_GPIO MFP_CFG(GPIO160, AF1)
-#define GPIO161_GPIO MFP_CFG(GPIO161, AF1)
-#define GPIO162_GPIO MFP_CFG(GPIO162, AF1)
-#define GPIO163_GPIO MFP_CFG(GPIO163, AF1)
-#define GPIO164_GPIO MFP_CFG(GPIO164, AF1)
-#define GPIO165_GPIO MFP_CFG(GPIO165, AF1)
-#define GPIO166_GPIO MFP_CFG(GPIO166, AF1)
-#define GPIO167_GPIO MFP_CFG(GPIO167, AF1)
-#define GPIO168_GPIO MFP_CFG(GPIO168, AF1)
-
-/* DFI */
-#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0)
-#define GPIO109_DFI_D14 MFP_CFG(GPIO109, AF0)
-#define GPIO110_DFI_D13 MFP_CFG(GPIO110, AF0)
-#define GPIO161_DFI_D12 MFP_CFG(GPIO161, AF0)
-#define GPIO162_DFI_D11 MFP_CFG(GPIO162, AF0)
-#define GPIO163_DFI_D10 MFP_CFG(GPIO163, AF0)
-#define GPIO164_DFI_D9 MFP_CFG(GPIO164, AF0)
-#define GPIO111_DFI_D8 MFP_CFG(GPIO111, AF0)
-#define GPIO104_DFI_D7 MFP_CFG(GPIO104, AF0)
-#define GPIO105_DFI_D6 MFP_CFG(GPIO105, AF0)
-#define GPIO106_DFI_D5 MFP_CFG(GPIO106, AF0)
-#define GPIO107_DFI_D4 MFP_CFG(GPIO107, AF0)
-#define GPIO165_DFI_D3 MFP_CFG(GPIO165, AF0)
-#define GPIO166_DFI_D2 MFP_CFG(GPIO166, AF0)
-#define GPIO167_DFI_D1 MFP_CFG(GPIO167, AF0)
-#define GPIO168_DFI_D0 MFP_CFG(GPIO168, AF0)
-#define GPIO143_ND_nCS0 MFP_CFG(GPIO143, AF0)
-#define GPIO144_ND_nCS1 MFP_CFG(GPIO144, AF0)
-#define GPIO147_ND_nWE MFP_CFG(GPIO147, AF0)
-#define GPIO148_ND_nRE MFP_CFG(GPIO148, AF0)
-#define GPIO150_ND_ALE MFP_CFG(GPIO150, AF0)
-#define GPIO149_ND_CLE MFP_CFG(GPIO149, AF0)
-#define GPIO112_ND_RDY0 MFP_CFG(GPIO112, AF0)
-#define GPIO160_ND_RDY1 MFP_CFG(GPIO160, AF0)
-
-/* Static Memory Controller */
-#define GPIO145_SMC_nCS0 MFP_CFG(GPIO145, AF0)
-#define GPIO146_SMC_nCS1 MFP_CFG(GPIO146, AF0)
-#define GPIO152_SMC_BE0 MFP_CFG(GPIO152, AF0)
-#define GPIO153_SMC_BE1 MFP_CFG(GPIO153, AF0)
-#define GPIO154_SMC_IRQ MFP_CFG(GPIO154, AF0)
-#define GPIO113_SMC_RDY MFP_CFG(GPIO113, AF0)
-#define GPIO151_SMC_SCLK MFP_CFG(GPIO151, AF0)
-
-/* Ethernet */
-#define GPIO155_SM_ADVMUX MFP_CFG(GPIO155, AF2)
-
-/* UART1 */
-#define GPIO45_UART1_RXD MFP_CFG(GPIO45, AF1)
-#define GPIO46_UART1_TXD MFP_CFG(GPIO46, AF1)
-#define GPIO29_UART1_RXD MFP_CFG(GPIO29, AF1)
-#define GPIO30_UART1_TXD MFP_CFG(GPIO30, AF1)
-#define GPIO31_UART1_CTS MFP_CFG(GPIO31, AF1)
-#define GPIO32_UART1_RTS MFP_CFG(GPIO32, AF1)
-
-/* UART2 */
-#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF1)
-#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF1)
-#define GPIO49_UART2_CTS MFP_CFG(GPIO49, AF1)
-#define GPIO50_UART2_RTS MFP_CFG(GPIO50, AF1)
-
-/* UART3 */
-#define GPIO51_UART3_RXD MFP_CFG(GPIO51, AF1)
-#define GPIO52_UART3_TXD MFP_CFG(GPIO52, AF1)
-#define GPIO53_UART3_CTS MFP_CFG(GPIO53, AF1)
-#define GPIO54_UART3_RTS MFP_CFG(GPIO54, AF1)
-
-/* MMC1 */
-#define GPIO124_MMC1_DAT7 MFP_CFG_DRV(GPIO124, AF1, FAST)
-#define GPIO125_MMC1_DAT6 MFP_CFG_DRV(GPIO125, AF1, FAST)
-#define GPIO129_MMC1_DAT5 MFP_CFG_DRV(GPIO129, AF1, FAST)
-#define GPIO130_MMC1_DAT4 MFP_CFG_DRV(GPIO130, AF1, FAST)
-#define GPIO131_MMC1_DAT3 MFP_CFG_DRV(GPIO131, AF1, FAST)
-#define GPIO132_MMC1_DAT2 MFP_CFG_DRV(GPIO132, AF1, FAST)
-#define GPIO133_MMC1_DAT1 MFP_CFG_DRV(GPIO133, AF1, FAST)
-#define GPIO134_MMC1_DAT0 MFP_CFG_DRV(GPIO134, AF1, FAST)
-#define GPIO136_MMC1_CMD MFP_CFG_DRV(GPIO136, AF1, FAST)
-#define GPIO139_MMC1_CLK MFP_CFG_DRV(GPIO139, AF1, FAST)
-#define GPIO140_MMC1_CD MFP_CFG_DRV(GPIO140, AF1, FAST)
-#define GPIO141_MMC1_WP MFP_CFG_DRV(GPIO141, AF1, FAST)
-
-/*MMC2*/
-#define GPIO37_MMC2_DAT3 MFP_CFG_DRV(GPIO37, AF1, FAST)
-#define GPIO38_MMC2_DAT2 MFP_CFG_DRV(GPIO38, AF1, FAST)
-#define GPIO39_MMC2_DAT1 MFP_CFG_DRV(GPIO39, AF1, FAST)
-#define GPIO40_MMC2_DAT0 MFP_CFG_DRV(GPIO40, AF1, FAST)
-#define GPIO41_MMC2_CMD MFP_CFG_DRV(GPIO41, AF1, FAST)
-#define GPIO42_MMC2_CLK MFP_CFG_DRV(GPIO42, AF1, FAST)
-
-/*MMC3*/
-#define GPIO165_MMC3_DAT7 MFP_CFG_DRV(GPIO165, AF2, FAST)
-#define GPIO162_MMC3_DAT6 MFP_CFG_DRV(GPIO162, AF2, FAST)
-#define GPIO166_MMC3_DAT5 MFP_CFG_DRV(GPIO166, AF2, FAST)
-#define GPIO163_MMC3_DAT4 MFP_CFG_DRV(GPIO163, AF2, FAST)
-#define GPIO167_MMC3_DAT3 MFP_CFG_DRV(GPIO167, AF2, FAST)
-#define GPIO164_MMC3_DAT2 MFP_CFG_DRV(GPIO164, AF2, FAST)
-#define GPIO168_MMC3_DAT1 MFP_CFG_DRV(GPIO168, AF2, FAST)
-#define GPIO111_MMC3_DAT0 MFP_CFG_DRV(GPIO111, AF2, FAST)
-#define GPIO112_MMC3_CMD MFP_CFG_DRV(GPIO112, AF2, FAST)
-#define GPIO151_MMC3_CLK MFP_CFG_DRV(GPIO151, AF2, FAST)
-
-/* LCD */
-#define GPIO74_LCD_FCLK MFP_CFG_DRV(GPIO74, AF1, FAST)
-#define GPIO75_LCD_LCLK MFP_CFG_DRV(GPIO75, AF1, FAST)
-#define GPIO76_LCD_PCLK MFP_CFG_DRV(GPIO76, AF1, FAST)
-#define GPIO77_LCD_DENA MFP_CFG_DRV(GPIO77, AF1, FAST)
-#define GPIO78_LCD_DD0 MFP_CFG_DRV(GPIO78, AF1, FAST)
-#define GPIO79_LCD_DD1 MFP_CFG_DRV(GPIO79, AF1, FAST)
-#define GPIO80_LCD_DD2 MFP_CFG_DRV(GPIO80, AF1, FAST)
-#define GPIO81_LCD_DD3 MFP_CFG_DRV(GPIO81, AF1, FAST)
-#define GPIO82_LCD_DD4 MFP_CFG_DRV(GPIO82, AF1, FAST)
-#define GPIO83_LCD_DD5 MFP_CFG_DRV(GPIO83, AF1, FAST)
-#define GPIO84_LCD_DD6 MFP_CFG_DRV(GPIO84, AF1, FAST)
-#define GPIO85_LCD_DD7 MFP_CFG_DRV(GPIO85, AF1, FAST)
-#define GPIO86_LCD_DD8 MFP_CFG_DRV(GPIO86, AF1, FAST)
-#define GPIO87_LCD_DD9 MFP_CFG_DRV(GPIO87, AF1, FAST)
-#define GPIO88_LCD_DD10 MFP_CFG_DRV(GPIO88, AF1, FAST)
-#define GPIO89_LCD_DD11 MFP_CFG_DRV(GPIO89, AF1, FAST)
-#define GPIO90_LCD_DD12 MFP_CFG_DRV(GPIO90, AF1, FAST)
-#define GPIO91_LCD_DD13 MFP_CFG_DRV(GPIO91, AF1, FAST)
-#define GPIO92_LCD_DD14 MFP_CFG_DRV(GPIO92, AF1, FAST)
-#define GPIO93_LCD_DD15 MFP_CFG_DRV(GPIO93, AF1, FAST)
-#define GPIO94_LCD_DD16 MFP_CFG_DRV(GPIO94, AF1, FAST)
-#define GPIO95_LCD_DD17 MFP_CFG_DRV(GPIO95, AF1, FAST)
-#define GPIO96_LCD_DD18 MFP_CFG_DRV(GPIO96, AF1, FAST)
-#define GPIO97_LCD_DD19 MFP_CFG_DRV(GPIO97, AF1, FAST)
-#define GPIO98_LCD_DD20 MFP_CFG_DRV(GPIO98, AF1, FAST)
-#define GPIO99_LCD_DD21 MFP_CFG_DRV(GPIO99, AF1, FAST)
-#define GPIO100_LCD_DD22 MFP_CFG_DRV(GPIO100, AF1, FAST)
-#define GPIO101_LCD_DD23 MFP_CFG_DRV(GPIO101, AF1, FAST)
-#define GPIO94_SPI_DCLK MFP_CFG_DRV(GPIO94, AF3, FAST)
-#define GPIO95_SPI_CS0 MFP_CFG_DRV(GPIO95, AF3, FAST)
-#define GPIO96_SPI_DIN MFP_CFG_DRV(GPIO96, AF3, FAST)
-#define GPIO97_SPI_DOUT MFP_CFG_DRV(GPIO97, AF3, FAST)
-#define GPIO98_LCD_RST MFP_CFG_DRV(GPIO98, AF0, FAST)
-
-#define GPIO114_MN_CLK_OUT MFP_CFG_DRV(GPIO114, AF1, FAST)
-
-/*LCD TV path*/
-#define GPIO124_LCD_DD24 MFP_CFG_DRV(GPIO124, AF2, FAST)
-#define GPIO125_LCD_DD25 MFP_CFG_DRV(GPIO125, AF2, FAST)
-#define GPIO126_LCD_DD33 MFP_CFG_DRV(GPIO126, AF2, FAST)
-#define GPIO127_LCD_DD26 MFP_CFG_DRV(GPIO127, AF2, FAST)
-#define GPIO128_LCD_DD27 MFP_CFG_DRV(GPIO128, AF2, FAST)
-#define GPIO129_LCD_DD28 MFP_CFG_DRV(GPIO129, AF2, FAST)
-#define GPIO130_LCD_DD29 MFP_CFG_DRV(GPIO130, AF2, FAST)
-#define GPIO135_LCD_DD30 MFP_CFG_DRV(GPIO135, AF2, FAST)
-#define GPIO137_LCD_DD31 MFP_CFG_DRV(GPIO137, AF2, FAST)
-#define GPIO138_LCD_DD32 MFP_CFG_DRV(GPIO138, AF2, FAST)
-#define GPIO140_LCD_DD34 MFP_CFG_DRV(GPIO140, AF2, FAST)
-#define GPIO141_LCD_DD35 MFP_CFG_DRV(GPIO141, AF2, FAST)
-
-/* I2C */
-#define GPIO43_TWSI2_SCL MFP_CFG_DRV(GPIO43, AF1, SLOW)
-#define GPIO44_TWSI2_SDA MFP_CFG_DRV(GPIO44, AF1, SLOW)
-#define GPIO71_TWSI3_SCL MFP_CFG_DRV(GPIO71, AF1, SLOW)
-#define GPIO72_TWSI3_SDA MFP_CFG_DRV(GPIO72, AF1, SLOW)
-#define TWSI4_SCL MFP_CFG_DRV(TWSI4_SCL, AF0, SLOW)
-#define TWSI4_SDA MFP_CFG_DRV(TWSI4_SDA, AF0, SLOW)
-#define GPIO99_TWSI5_SCL MFP_CFG_DRV(GPIO99, AF4, SLOW)
-#define GPIO100_TWSI5_SDA MFP_CFG_DRV(GPIO100, AF4, SLOW)
-#define GPIO97_TWSI6_SCL MFP_CFG_DRV(GPIO97, AF2, SLOW)
-#define GPIO98_TWSI6_SDA MFP_CFG_DRV(GPIO98, AF2, SLOW)
-
-/* SSPA1 */
-#define GPIO24_I2S_SYSCLK MFP_CFG(GPIO24, AF1)
-#define GPIO25_I2S_BITCLK MFP_CFG(GPIO25, AF1)
-#define GPIO26_I2S_SYNC MFP_CFG(GPIO26, AF1)
-#define GPIO27_I2S_DATA_OUT MFP_CFG(GPIO27, AF1)
-#define GPIO28_I2S_SDATA_IN MFP_CFG(GPIO28, AF1)
-#define GPIO114_I2S_MCLK MFP_CFG(GPIO114, AF1)
-
-/* SSPA2 */
-#define GPIO33_SSPA2_CLK MFP_CFG(GPIO33, AF1)
-#define GPIO34_SSPA2_FRM MFP_CFG(GPIO34, AF1)
-#define GPIO35_SSPA2_TXD MFP_CFG(GPIO35, AF1)
-#define GPIO36_SSPA2_RXD MFP_CFG(GPIO36, AF1)
-
-/* Keypad */
-#define GPIO00_KP_MKIN0 MFP_CFG(GPIO0, AF1)
-#define GPIO01_KP_MKOUT0 MFP_CFG(GPIO1, AF1)
-#define GPIO02_KP_MKIN1 MFP_CFG(GPIO2, AF1)
-#define GPIO03_KP_MKOUT1 MFP_CFG(GPIO3, AF1)
-#define GPIO04_KP_MKIN2 MFP_CFG(GPIO4, AF1)
-#define GPIO05_KP_MKOUT2 MFP_CFG(GPIO5, AF1)
-#define GPIO06_KP_MKIN3 MFP_CFG(GPIO6, AF1)
-#define GPIO07_KP_MKOUT3 MFP_CFG(GPIO7, AF1)
-#define GPIO08_KP_MKIN4 MFP_CFG(GPIO8, AF1)
-#define GPIO09_KP_MKOUT4 MFP_CFG(GPIO9, AF1)
-#define GPIO10_KP_MKIN5 MFP_CFG(GPIO10, AF1)
-#define GPIO11_KP_MKOUT5 MFP_CFG(GPIO11, AF1)
-#define GPIO12_KP_MKIN6 MFP_CFG(GPIO12, AF1)
-#define GPIO13_KP_MKOUT6 MFP_CFG(GPIO13, AF1)
-#define GPIO14_KP_MKIN7 MFP_CFG(GPIO14, AF1)
-#define GPIO15_KP_MKOUT7 MFP_CFG(GPIO15, AF1)
-#define GPIO16_KP_DKIN0 MFP_CFG(GPIO16, AF1)
-#define GPIO17_KP_DKIN1 MFP_CFG(GPIO17, AF1)
-#define GPIO18_KP_DKIN2 MFP_CFG(GPIO18, AF1)
-#define GPIO19_KP_DKIN3 MFP_CFG(GPIO19, AF1)
-#define GPIO20_KP_DKIN4 MFP_CFG(GPIO20, AF1)
-#define GPIO21_KP_DKIN5 MFP_CFG(GPIO21, AF1)
-#define GPIO22_KP_DKIN6 MFP_CFG(GPIO22, AF1)
-#define GPIO23_KP_DKIN7 MFP_CFG(GPIO23, AF1)
-
-/* CAMERA */
-#define GPIO59_CCIC_IN7 MFP_CFG_DRV(GPIO59, AF1, FAST)
-#define GPIO60_CCIC_IN6 MFP_CFG_DRV(GPIO60, AF1, FAST)
-#define GPIO61_CCIC_IN5 MFP_CFG_DRV(GPIO61, AF1, FAST)
-#define GPIO62_CCIC_IN4 MFP_CFG_DRV(GPIO62, AF1, FAST)
-#define GPIO63_CCIC_IN3 MFP_CFG_DRV(GPIO63, AF1, FAST)
-#define GPIO64_CCIC_IN2 MFP_CFG_DRV(GPIO64, AF1, FAST)
-#define GPIO65_CCIC_IN1 MFP_CFG_DRV(GPIO65, AF1, FAST)
-#define GPIO66_CCIC_IN0 MFP_CFG_DRV(GPIO66, AF1, FAST)
-#define GPIO67_CAM_HSYNC MFP_CFG_DRV(GPIO67, AF1, FAST)
-#define GPIO68_CAM_VSYNC MFP_CFG_DRV(GPIO68, AF1, FAST)
-#define GPIO69_CAM_MCLK MFP_CFG_DRV(GPIO69, AF1, FAST)
-#define GPIO70_CAM_PCLK MFP_CFG_DRV(GPIO70, AF1, FAST)
-
-/* PMIC */
-#define PMIC_PMIC_INT MFP_CFG(PMIC_INT, AF0)
-
-#endif /* __ASM_MACH_MFP_MMP2_H */
-
diff --git a/arch/arm/mach-mmp/mfp-pxa168.h b/arch/arm/mach-mmp/mfp-pxa168.h
deleted file mode 100644
index 90d16d3419a4..000000000000
--- a/arch/arm/mach-mmp/mfp-pxa168.h
+++ /dev/null
@@ -1,355 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_MFP_PXA168_H
-#define __ASM_MACH_MFP_PXA168_H
-
-#include "mfp.h"
-
-#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
-#define MFP_DRIVE_SLOW (0x1 << 13)
-#define MFP_DRIVE_MEDIUM (0x2 << 13)
-#define MFP_DRIVE_FAST (0x3 << 13)
-
-#undef MFP_CFG
-#undef MFP_CFG_DRV
-
-#define MFP_CFG(pin, af) \
- (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM)
-
-#define MFP_CFG_DRV(pin, af, drv) \
- (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv)
-
-/* GPIO */
-#define GPIO0_GPIO MFP_CFG(GPIO0, AF5)
-#define GPIO1_GPIO MFP_CFG(GPIO1, AF5)
-#define GPIO2_GPIO MFP_CFG(GPIO2, AF5)
-#define GPIO3_GPIO MFP_CFG(GPIO3, AF5)
-#define GPIO4_GPIO MFP_CFG(GPIO4, AF5)
-#define GPIO5_GPIO MFP_CFG(GPIO5, AF5)
-#define GPIO6_GPIO MFP_CFG(GPIO6, AF5)
-#define GPIO7_GPIO MFP_CFG(GPIO7, AF5)
-#define GPIO8_GPIO MFP_CFG(GPIO8, AF5)
-#define GPIO9_GPIO MFP_CFG(GPIO9, AF5)
-#define GPIO10_GPIO MFP_CFG(GPIO10, AF5)
-#define GPIO11_GPIO MFP_CFG(GPIO11, AF5)
-#define GPIO12_GPIO MFP_CFG(GPIO12, AF5)
-#define GPIO13_GPIO MFP_CFG(GPIO13, AF5)
-#define GPIO14_GPIO MFP_CFG(GPIO14, AF5)
-#define GPIO15_GPIO MFP_CFG(GPIO15, AF5)
-#define GPIO16_GPIO MFP_CFG(GPIO16, AF0)
-#define GPIO17_GPIO MFP_CFG(GPIO17, AF5)
-#define GPIO18_GPIO MFP_CFG(GPIO18, AF0)
-#define GPIO19_GPIO MFP_CFG(GPIO19, AF5)
-#define GPIO20_GPIO MFP_CFG(GPIO20, AF0)
-#define GPIO21_GPIO MFP_CFG(GPIO21, AF5)
-#define GPIO22_GPIO MFP_CFG(GPIO22, AF5)
-#define GPIO23_GPIO MFP_CFG(GPIO23, AF5)
-#define GPIO24_GPIO MFP_CFG(GPIO24, AF5)
-#define GPIO25_GPIO MFP_CFG(GPIO25, AF5)
-#define GPIO26_GPIO MFP_CFG(GPIO26, AF0)
-#define GPIO27_GPIO MFP_CFG(GPIO27, AF5)
-#define GPIO28_GPIO MFP_CFG(GPIO28, AF5)
-#define GPIO29_GPIO MFP_CFG(GPIO29, AF5)
-#define GPIO30_GPIO MFP_CFG(GPIO30, AF5)
-#define GPIO31_GPIO MFP_CFG(GPIO31, AF5)
-#define GPIO32_GPIO MFP_CFG(GPIO32, AF5)
-#define GPIO33_GPIO MFP_CFG(GPIO33, AF5)
-#define GPIO34_GPIO MFP_CFG(GPIO34, AF0)
-#define GPIO35_GPIO MFP_CFG(GPIO35, AF0)
-#define GPIO36_GPIO MFP_CFG(GPIO36, AF0)
-#define GPIO37_GPIO MFP_CFG(GPIO37, AF0)
-#define GPIO38_GPIO MFP_CFG(GPIO38, AF0)
-#define GPIO39_GPIO MFP_CFG(GPIO39, AF0)
-#define GPIO40_GPIO MFP_CFG(GPIO40, AF0)
-#define GPIO41_GPIO MFP_CFG(GPIO41, AF0)
-#define GPIO42_GPIO MFP_CFG(GPIO42, AF0)
-#define GPIO43_GPIO MFP_CFG(GPIO43, AF0)
-#define GPIO44_GPIO MFP_CFG(GPIO44, AF0)
-#define GPIO45_GPIO MFP_CFG(GPIO45, AF0)
-#define GPIO46_GPIO MFP_CFG(GPIO46, AF0)
-#define GPIO47_GPIO MFP_CFG(GPIO47, AF0)
-#define GPIO48_GPIO MFP_CFG(GPIO48, AF0)
-#define GPIO49_GPIO MFP_CFG(GPIO49, AF0)
-#define GPIO50_GPIO MFP_CFG(GPIO50, AF0)
-#define GPIO51_GPIO MFP_CFG(GPIO51, AF0)
-#define GPIO52_GPIO MFP_CFG(GPIO52, AF0)
-#define GPIO53_GPIO MFP_CFG(GPIO53, AF0)
-#define GPIO54_GPIO MFP_CFG(GPIO54, AF0)
-#define GPIO55_GPIO MFP_CFG(GPIO55, AF0)
-#define GPIO56_GPIO MFP_CFG(GPIO56, AF0)
-#define GPIO57_GPIO MFP_CFG(GPIO57, AF0)
-#define GPIO58_GPIO MFP_CFG(GPIO58, AF0)
-#define GPIO59_GPIO MFP_CFG(GPIO59, AF0)
-#define GPIO60_GPIO MFP_CFG(GPIO60, AF0)
-#define GPIO61_GPIO MFP_CFG(GPIO61, AF0)
-#define GPIO62_GPIO MFP_CFG(GPIO62, AF0)
-#define GPIO63_GPIO MFP_CFG(GPIO63, AF0)
-#define GPIO64_GPIO MFP_CFG(GPIO64, AF0)
-#define GPIO65_GPIO MFP_CFG(GPIO65, AF0)
-#define GPIO66_GPIO MFP_CFG(GPIO66, AF0)
-#define GPIO67_GPIO MFP_CFG(GPIO67, AF0)
-#define GPIO68_GPIO MFP_CFG(GPIO68, AF0)
-#define GPIO69_GPIO MFP_CFG(GPIO69, AF0)
-#define GPIO70_GPIO MFP_CFG(GPIO70, AF0)
-#define GPIO71_GPIO MFP_CFG(GPIO71, AF0)
-#define GPIO72_GPIO MFP_CFG(GPIO72, AF0)
-#define GPIO73_GPIO MFP_CFG(GPIO73, AF0)
-#define GPIO74_GPIO MFP_CFG(GPIO74, AF0)
-#define GPIO75_GPIO MFP_CFG(GPIO75, AF0)
-#define GPIO76_GPIO MFP_CFG(GPIO76, AF0)
-#define GPIO77_GPIO MFP_CFG(GPIO77, AF0)
-#define GPIO78_GPIO MFP_CFG(GPIO78, AF0)
-#define GPIO79_GPIO MFP_CFG(GPIO79, AF0)
-#define GPIO80_GPIO MFP_CFG(GPIO80, AF0)
-#define GPIO81_GPIO MFP_CFG(GPIO81, AF0)
-#define GPIO82_GPIO MFP_CFG(GPIO82, AF0)
-#define GPIO83_GPIO MFP_CFG(GPIO83, AF0)
-#define GPIO84_GPIO MFP_CFG(GPIO84, AF0)
-#define GPIO85_GPIO MFP_CFG(GPIO85, AF0)
-#define GPIO86_GPIO MFP_CFG(GPIO86, AF0)
-#define GPIO87_GPIO MFP_CFG(GPIO87, AF0)
-#define GPIO88_GPIO MFP_CFG(GPIO88, AF0)
-#define GPIO89_GPIO MFP_CFG(GPIO89, AF0)
-#define GPIO90_GPIO MFP_CFG(GPIO90, AF0)
-#define GPIO91_GPIO MFP_CFG(GPIO91, AF0)
-#define GPIO92_GPIO MFP_CFG(GPIO92, AF0)
-#define GPIO93_GPIO MFP_CFG(GPIO93, AF0)
-#define GPIO94_GPIO MFP_CFG(GPIO94, AF0)
-#define GPIO95_GPIO MFP_CFG(GPIO95, AF0)
-#define GPIO96_GPIO MFP_CFG(GPIO96, AF0)
-#define GPIO97_GPIO MFP_CFG(GPIO97, AF0)
-#define GPIO98_GPIO MFP_CFG(GPIO98, AF0)
-#define GPIO99_GPIO MFP_CFG(GPIO99, AF0)
-#define GPIO100_GPIO MFP_CFG(GPIO100, AF0)
-#define GPIO101_GPIO MFP_CFG(GPIO101, AF0)
-#define GPIO102_GPIO MFP_CFG(GPIO102, AF0)
-#define GPIO103_GPIO MFP_CFG(GPIO103, AF0)
-#define GPIO104_GPIO MFP_CFG(GPIO104, AF0)
-#define GPIO105_GPIO MFP_CFG(GPIO105, AF0)
-#define GPIO106_GPIO MFP_CFG(GPIO106, AF0)
-#define GPIO107_GPIO MFP_CFG(GPIO107, AF0)
-#define GPIO108_GPIO MFP_CFG(GPIO108, AF0)
-#define GPIO109_GPIO MFP_CFG(GPIO109, AF0)
-#define GPIO110_GPIO MFP_CFG(GPIO110, AF0)
-#define GPIO111_GPIO MFP_CFG(GPIO111, AF0)
-#define GPIO112_GPIO MFP_CFG(GPIO112, AF0)
-#define GPIO113_GPIO MFP_CFG(GPIO113, AF0)
-#define GPIO114_GPIO MFP_CFG(GPIO114, AF0)
-#define GPIO115_GPIO MFP_CFG(GPIO115, AF0)
-#define GPIO116_GPIO MFP_CFG(GPIO116, AF0)
-#define GPIO117_GPIO MFP_CFG(GPIO117, AF0)
-#define GPIO118_GPIO MFP_CFG(GPIO118, AF0)
-#define GPIO119_GPIO MFP_CFG(GPIO119, AF0)
-#define GPIO120_GPIO MFP_CFG(GPIO120, AF0)
-#define GPIO121_GPIO MFP_CFG(GPIO121, AF0)
-#define GPIO122_GPIO MFP_CFG(GPIO122, AF0)
-
-/* DFI */
-#define GPIO0_DFI_D15 MFP_CFG(GPIO0, AF0)
-#define GPIO1_DFI_D14 MFP_CFG(GPIO1, AF0)
-#define GPIO2_DFI_D13 MFP_CFG(GPIO2, AF0)
-#define GPIO3_DFI_D12 MFP_CFG(GPIO3, AF0)
-#define GPIO4_DFI_D11 MFP_CFG(GPIO4, AF0)
-#define GPIO5_DFI_D10 MFP_CFG(GPIO5, AF0)
-#define GPIO6_DFI_D9 MFP_CFG(GPIO6, AF0)
-#define GPIO7_DFI_D8 MFP_CFG(GPIO7, AF0)
-#define GPIO8_DFI_D7 MFP_CFG(GPIO8, AF0)
-#define GPIO9_DFI_D6 MFP_CFG(GPIO9, AF0)
-#define GPIO10_DFI_D5 MFP_CFG(GPIO10, AF0)
-#define GPIO11_DFI_D4 MFP_CFG(GPIO11, AF0)
-#define GPIO12_DFI_D3 MFP_CFG(GPIO12, AF0)
-#define GPIO13_DFI_D2 MFP_CFG(GPIO13, AF0)
-#define GPIO14_DFI_D1 MFP_CFG(GPIO14, AF0)
-#define GPIO15_DFI_D0 MFP_CFG(GPIO15, AF0)
-
-#define GPIO30_DFI_ADDR0 MFP_CFG(GPIO30, AF0)
-#define GPIO31_DFI_ADDR1 MFP_CFG(GPIO31, AF0)
-#define GPIO32_DFI_ADDR2 MFP_CFG(GPIO32, AF0)
-#define GPIO33_DFI_ADDR3 MFP_CFG(GPIO33, AF0)
-
-/* NAND */
-#define GPIO16_ND_nCS0 MFP_CFG(GPIO16, AF1)
-#define GPIO17_ND_nWE MFP_CFG(GPIO17, AF0)
-#define GPIO21_ND_ALE MFP_CFG(GPIO21, AF0)
-#define GPIO22_ND_CLE MFP_CFG(GPIO22, AF0)
-#define GPIO24_ND_nRE MFP_CFG(GPIO24, AF0)
-#define GPIO26_ND_RnB1 MFP_CFG(GPIO26, AF1)
-#define GPIO27_ND_RnB2 MFP_CFG(GPIO27, AF1)
-
-/* Static Memory Controller */
-#define GPIO18_SMC_nCS0 MFP_CFG(GPIO18, AF3)
-#define GPIO18_SMC_nCS1 MFP_CFG(GPIO18, AF2)
-#define GPIO16_SMC_nCS0 MFP_CFG(GPIO16, AF2)
-#define GPIO16_SMC_nCS1 MFP_CFG(GPIO16, AF3)
-#define GPIO19_SMC_nCS0 MFP_CFG(GPIO19, AF0)
-#define GPIO20_SMC_nCS1 MFP_CFG(GPIO20, AF2)
-#define GPIO23_SMC_nLUA MFP_CFG(GPIO23, AF0)
-#define GPIO25_SMC_nLLA MFP_CFG(GPIO25, AF0)
-#define GPIO27_SMC_IRQ MFP_CFG(GPIO27, AF0)
-#define GPIO28_SMC_RDY MFP_CFG(GPIO28, AF0)
-#define GPIO29_SMC_SCLK MFP_CFG(GPIO29, AF0)
-#define GPIO34_SMC_nCS1 MFP_CFG(GPIO34, AF2)
-#define GPIO35_SMC_BE1 MFP_CFG(GPIO35, AF2)
-#define GPIO36_SMC_BE2 MFP_CFG(GPIO36, AF2)
-
-/* Compact Flash */
-#define GPIO19_CF_nCE1 MFP_CFG(GPIO19, AF3)
-#define GPIO20_CF_nCE2 MFP_CFG(GPIO20, AF3)
-#define GPIO23_CF_nALE MFP_CFG(GPIO23, AF3)
-#define GPIO25_CF_nRESET MFP_CFG(GPIO25, AF3)
-#define GPIO28_CF_RDY MFP_CFG(GPIO28, AF3)
-#define GPIO29_CF_STSCH MFP_CFG(GPIO29, AF3)
-#define GPIO30_CF_nREG MFP_CFG(GPIO30, AF3)
-#define GPIO31_CF_nIOIS16 MFP_CFG(GPIO31, AF3)
-#define GPIO32_CF_nCD1 MFP_CFG(GPIO32, AF3)
-#define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3)
-
-/* UART */
-#define GPIO8_UART3_TXD MFP_CFG(GPIO8, AF2)
-#define GPIO9_UART3_RXD MFP_CFG(GPIO9, AF2)
-#define GPIO1O_UART3_CTS MFP_CFG(GPIO10, AF2)
-#define GPIO11_UART3_RTS MFP_CFG(GPIO11, AF2)
-#define GPIO88_UART2_TXD MFP_CFG(GPIO88, AF2)
-#define GPIO89_UART2_RXD MFP_CFG(GPIO89, AF2)
-#define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST)
-#define GPIO107_UART1_RXD MFP_CFG_DRV(GPIO107, AF2, FAST)
-#define GPIO108_UART1_RXD MFP_CFG_DRV(GPIO108, AF1, FAST)
-#define GPIO108_UART1_TXD MFP_CFG_DRV(GPIO108, AF2, FAST)
-#define GPIO109_UART1_CTS MFP_CFG(GPIO109, AF1)
-#define GPIO109_UART1_RTS MFP_CFG(GPIO109, AF2)
-#define GPIO110_UART1_RTS MFP_CFG(GPIO110, AF1)
-#define GPIO110_UART1_CTS MFP_CFG(GPIO110, AF2)
-#define GPIO111_UART1_RI MFP_CFG(GPIO111, AF1)
-#define GPIO111_UART1_DSR MFP_CFG(GPIO111, AF2)
-#define GPIO112_UART1_DTR MFP_CFG(GPIO111, AF1)
-#define GPIO112_UART1_DCD MFP_CFG(GPIO112, AF2)
-
-/* MMC1 */
-#define GPIO37_MMC1_DAT7 MFP_CFG(GPIO37, AF1)
-#define GPIO38_MMC1_DAT6 MFP_CFG(GPIO38, AF1)
-#define GPIO54_MMC1_DAT5 MFP_CFG(GPIO54, AF1)
-#define GPIO48_MMC1_DAT4 MFP_CFG(GPIO48, AF1)
-#define GPIO51_MMC1_DAT3 MFP_CFG(GPIO51, AF1)
-#define GPIO52_MMC1_DAT2 MFP_CFG(GPIO52, AF1)
-#define GPIO40_MMC1_DAT1 MFP_CFG(GPIO40, AF1)
-#define GPIO41_MMC1_DAT0 MFP_CFG(GPIO41, AF1)
-#define GPIO49_MMC1_CMD MFP_CFG(GPIO49, AF1)
-#define GPIO43_MMC1_CLK MFP_CFG(GPIO43, AF1)
-#define GPIO53_MMC1_CD MFP_CFG(GPIO53, AF1)
-#define GPIO46_MMC1_WP MFP_CFG(GPIO46, AF1)
-
-/* MMC2 */
-#define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST)
-#define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST)
-#define GPIO30_MMC2_DAT0 MFP_CFG_DRV(GPIO30, AF6, FAST)
-#define GPIO31_MMC2_DAT1 MFP_CFG_DRV(GPIO31, AF6, FAST)
-#define GPIO32_MMC2_DAT2 MFP_CFG_DRV(GPIO32, AF6, FAST)
-#define GPIO33_MMC2_DAT3 MFP_CFG_DRV(GPIO33, AF6, FAST)
-
-/* MMC4 */
-#define GPIO125_MMC4_DAT3 MFP_CFG_DRV(GPIO125, AF7, FAST)
-#define GPIO126_MMC4_DAT2 MFP_CFG_DRV(GPIO126, AF7, FAST)
-#define GPIO127_MMC4_DAT1 MFP_CFG_DRV(GPIO127, AF7, FAST)
-#define GPIO0_2_MMC4_DAT0 MFP_CFG_DRV(GPIO0_2, AF7, FAST)
-#define GPIO1_2_MMC4_CMD MFP_CFG_DRV(GPIO1_2, AF7, FAST)
-#define GPIO2_2_MMC4_CLK MFP_CFG_DRV(GPIO2_2, AF7, FAST)
-
-/* LCD */
-#define GPIO84_LCD_CS MFP_CFG(GPIO84, AF1)
-#define GPIO60_LCD_DD0 MFP_CFG(GPIO60, AF1)
-#define GPIO61_LCD_DD1 MFP_CFG(GPIO61, AF1)
-#define GPIO70_LCD_DD10 MFP_CFG(GPIO70, AF1)
-#define GPIO71_LCD_DD11 MFP_CFG(GPIO71, AF1)
-#define GPIO72_LCD_DD12 MFP_CFG(GPIO72, AF1)
-#define GPIO73_LCD_DD13 MFP_CFG(GPIO73, AF1)
-#define GPIO74_LCD_DD14 MFP_CFG(GPIO74, AF1)
-#define GPIO75_LCD_DD15 MFP_CFG(GPIO75, AF1)
-#define GPIO76_LCD_DD16 MFP_CFG(GPIO76, AF1)
-#define GPIO77_LCD_DD17 MFP_CFG(GPIO77, AF1)
-#define GPIO78_LCD_DD18 MFP_CFG(GPIO78, AF1)
-#define GPIO79_LCD_DD19 MFP_CFG(GPIO79, AF1)
-#define GPIO62_LCD_DD2 MFP_CFG(GPIO62, AF1)
-#define GPIO80_LCD_DD20 MFP_CFG(GPIO80, AF1)
-#define GPIO81_LCD_DD21 MFP_CFG(GPIO81, AF1)
-#define GPIO82_LCD_DD22 MFP_CFG(GPIO82, AF1)
-#define GPIO83_LCD_DD23 MFP_CFG(GPIO83, AF1)
-#define GPIO63_LCD_DD3 MFP_CFG(GPIO63, AF1)
-#define GPIO64_LCD_DD4 MFP_CFG(GPIO64, AF1)
-#define GPIO65_LCD_DD5 MFP_CFG(GPIO65, AF1)
-#define GPIO66_LCD_DD6 MFP_CFG(GPIO66, AF1)
-#define GPIO67_LCD_DD7 MFP_CFG(GPIO67, AF1)
-#define GPIO68_LCD_DD8 MFP_CFG(GPIO68, AF1)
-#define GPIO69_LCD_DD9 MFP_CFG(GPIO69, AF1)
-#define GPIO59_LCD_DENA_BIAS MFP_CFG(GPIO59, AF1)
-#define GPIO56_LCD_FCLK_RD MFP_CFG(GPIO56, AF1)
-#define GPIO57_LCD_LCLK_A0 MFP_CFG(GPIO57, AF1)
-#define GPIO58_LCD_PCLK_WR MFP_CFG(GPIO58, AF1)
-#define GPIO85_LCD_VSYNC MFP_CFG(GPIO85, AF1)
-
-/* I2C */
-#define GPIO105_CI2C_SDA MFP_CFG(GPIO105, AF1)
-#define GPIO106_CI2C_SCL MFP_CFG(GPIO106, AF1)
-
-/* I2S */
-#define GPIO113_I2S_MCLK MFP_CFG(GPIO113, AF6)
-#define GPIO114_I2S_FRM MFP_CFG(GPIO114, AF1)
-#define GPIO115_I2S_BCLK MFP_CFG(GPIO115, AF1)
-#define GPIO116_I2S_RXD MFP_CFG(GPIO116, AF2)
-#define GPIO116_I2S_TXD MFP_CFG(GPIO116, AF1)
-#define GPIO117_I2S_TXD MFP_CFG(GPIO117, AF2)
-
-/* PWM */
-#define GPIO96_PWM3_OUT MFP_CFG(GPIO96, AF1)
-#define GPIO97_PWM2_OUT MFP_CFG(GPIO97, AF1)
-#define GPIO98_PWM1_OUT MFP_CFG(GPIO98, AF1)
-#define GPIO104_PWM4_OUT MFP_CFG(GPIO104, AF1)
-#define GPIO106_PWM2_OUT MFP_CFG(GPIO106, AF2)
-#define GPIO74_PWM4_OUT MFP_CFG(GPIO74, AF2)
-#define GPIO75_PWM3_OUT MFP_CFG(GPIO75, AF2)
-#define GPIO76_PWM2_OUT MFP_CFG(GPIO76, AF2)
-#define GPIO77_PWM1_OUT MFP_CFG(GPIO77, AF2)
-#define GPIO82_PWM4_OUT MFP_CFG(GPIO82, AF2)
-#define GPIO83_PWM3_OUT MFP_CFG(GPIO83, AF2)
-#define GPIO84_PWM2_OUT MFP_CFG(GPIO84, AF2)
-#define GPIO85_PWM1_OUT MFP_CFG(GPIO85, AF2)
-#define GPIO84_PWM1_OUT MFP_CFG(GPIO84, AF4)
-#define GPIO122_PWM3_OUT MFP_CFG(GPIO122, AF3)
-#define GPIO123_PWM1_OUT MFP_CFG(GPIO123, AF1)
-#define GPIO124_PWM2_OUT MFP_CFG(GPIO124, AF1)
-#define GPIO125_PWM3_OUT MFP_CFG(GPIO125, AF1)
-#define GPIO126_PWM4_OUT MFP_CFG(GPIO126, AF1)
-#define GPIO86_PWM1_OUT MFP_CFG(GPIO86, AF2)
-#define GPIO86_PWM2_OUT MFP_CFG(GPIO86, AF3)
-
-/* Keypad */
-#define GPIO109_KP_MKIN1 MFP_CFG(GPIO109, AF7)
-#define GPIO110_KP_MKIN0 MFP_CFG(GPIO110, AF7)
-#define GPIO111_KP_MKOUT7 MFP_CFG(GPIO111, AF7)
-#define GPIO112_KP_MKOUT6 MFP_CFG(GPIO112, AF7)
-#define GPIO121_KP_MKIN4 MFP_CFG(GPIO121, AF7)
-
-/* Fast Ethernet */
-#define GPIO86_TX_CLK MFP_CFG(GPIO86, AF5)
-#define GPIO87_TX_EN MFP_CFG(GPIO87, AF5)
-#define GPIO88_TX_DQ3 MFP_CFG(GPIO88, AF5)
-#define GPIO89_TX_DQ2 MFP_CFG(GPIO89, AF5)
-#define GPIO90_TX_DQ1 MFP_CFG(GPIO90, AF5)
-#define GPIO91_TX_DQ0 MFP_CFG(GPIO91, AF5)
-#define GPIO92_MII_CRS MFP_CFG(GPIO92, AF5)
-#define GPIO93_MII_COL MFP_CFG(GPIO93, AF5)
-#define GPIO94_RX_CLK MFP_CFG(GPIO94, AF5)
-#define GPIO95_RX_ER MFP_CFG(GPIO95, AF5)
-#define GPIO96_RX_DQ3 MFP_CFG(GPIO96, AF5)
-#define GPIO97_RX_DQ2 MFP_CFG(GPIO97, AF5)
-#define GPIO98_RX_DQ1 MFP_CFG(GPIO98, AF5)
-#define GPIO99_RX_DQ0 MFP_CFG(GPIO99, AF5)
-#define GPIO100_MII_MDC MFP_CFG(GPIO100, AF5)
-#define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5)
-#define GPIO103_RX_DV MFP_CFG(GPIO103, AF5)
-
-/* SSP2 */
-#define GPIO107_SSP2_RXD MFP_CFG(GPIO107, AF4)
-#define GPIO108_SSP2_TXD MFP_CFG(GPIO108, AF4)
-#define GPIO111_SSP2_CLK MFP_CFG(GPIO111, AF4)
-#define GPIO112_SSP2_FRM MFP_CFG(GPIO112, AF4)
-
-#endif /* __ASM_MACH_MFP_PXA168_H */
diff --git a/arch/arm/mach-mmp/mfp-pxa910.h b/arch/arm/mach-mmp/mfp-pxa910.h
deleted file mode 100644
index 6f900cade631..000000000000
--- a/arch/arm/mach-mmp/mfp-pxa910.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_MFP_PXA910_H
-#define __ASM_MACH_MFP_PXA910_H
-
-#include "mfp.h"
-
-#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
-#define MFP_DRIVE_SLOW (0x2 << 13)
-#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x6 << 13)
-
-/* UART2 */
-#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6)
-#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF6)
-
-/* UART3 */
-#define GPIO31_UART3_RXD MFP_CFG(GPIO31, AF4)
-#define GPIO32_UART3_TXD MFP_CFG(GPIO32, AF4)
-
-/*IRDA*/
-#define GPIO51_IRDA_SHDN MFP_CFG(GPIO51, AF0)
-
-/* SMC */
-#define SM_nCS0_nCS0 MFP_CFG(SM_nCS0, AF0)
-#define SM_ADV_SM_ADV MFP_CFG(SM_ADV, AF0)
-#define SM_SCLK_SM_SCLK MFP_CFG(SM_SCLK, AF0)
-#define SM_BE0_SM_BE0 MFP_CFG(SM_BE0, AF1)
-#define SM_BE1_SM_BE1 MFP_CFG(SM_BE1, AF1)
-
-/* I2C */
-#define GPIO53_CI2C_SCL MFP_CFG(GPIO53, AF2)
-#define GPIO54_CI2C_SDA MFP_CFG(GPIO54, AF2)
-
-/* SSP1 (I2S) */
-#define GPIO24_SSP1_SDATA_IN MFP_CFG_DRV(GPIO24, AF1, MEDIUM)
-#define GPIO21_SSP1_BITCLK MFP_CFG_DRV(GPIO21, AF1, MEDIUM)
-#define GPIO20_SSP1_SYSCLK MFP_CFG_DRV(GPIO20, AF1, MEDIUM)
-#define GPIO22_SSP1_SYNC MFP_CFG_DRV(GPIO22, AF1, MEDIUM)
-#define GPIO23_SSP1_DATA_OUT MFP_CFG_DRV(GPIO23, AF1, MEDIUM)
-#define GPIO124_MN_CLK_OUT MFP_CFG_DRV(GPIO124, AF1, MEDIUM)
-#define GPIO123_CLK_REQ MFP_CFG_DRV(GPIO123, AF0, MEDIUM)
-
-/* DFI */
-#define DF_IO0_ND_IO0 MFP_CFG(DF_IO0, AF0)
-#define DF_IO1_ND_IO1 MFP_CFG(DF_IO1, AF0)
-#define DF_IO2_ND_IO2 MFP_CFG(DF_IO2, AF0)
-#define DF_IO3_ND_IO3 MFP_CFG(DF_IO3, AF0)
-#define DF_IO4_ND_IO4 MFP_CFG(DF_IO4, AF0)
-#define DF_IO5_ND_IO5 MFP_CFG(DF_IO5, AF0)
-#define DF_IO6_ND_IO6 MFP_CFG(DF_IO6, AF0)
-#define DF_IO7_ND_IO7 MFP_CFG(DF_IO7, AF0)
-#define DF_IO8_ND_IO8 MFP_CFG(DF_IO8, AF0)
-#define DF_IO9_ND_IO9 MFP_CFG(DF_IO9, AF0)
-#define DF_IO10_ND_IO10 MFP_CFG(DF_IO10, AF0)
-#define DF_IO11_ND_IO11 MFP_CFG(DF_IO11, AF0)
-#define DF_IO12_ND_IO12 MFP_CFG(DF_IO12, AF0)
-#define DF_IO13_ND_IO13 MFP_CFG(DF_IO13, AF0)
-#define DF_IO14_ND_IO14 MFP_CFG(DF_IO14, AF0)
-#define DF_IO15_ND_IO15 MFP_CFG(DF_IO15, AF0)
-#define DF_nCS0_SM_nCS2_nCS0 MFP_CFG(DF_nCS0_SM_nCS2, AF0)
-#define DF_ALE_SM_WEn_ND_ALE MFP_CFG(DF_ALE_SM_WEn, AF1)
-#define DF_CLE_SM_OEn_ND_CLE MFP_CFG(DF_CLE_SM_OEn, AF0)
-#define DF_WEn_DF_WEn MFP_CFG(DF_WEn, AF1)
-#define DF_REn_DF_REn MFP_CFG(DF_REn, AF1)
-#define DF_RDY0_DF_RDY0 MFP_CFG(DF_RDY0, AF0)
-
-/*keypad*/
-#define GPIO00_KP_MKIN0 MFP_CFG(GPIO0, AF1)
-#define GPIO01_KP_MKOUT0 MFP_CFG(GPIO1, AF1)
-#define GPIO02_KP_MKIN1 MFP_CFG(GPIO2, AF1)
-#define GPIO03_KP_MKOUT1 MFP_CFG(GPIO3, AF1)
-#define GPIO04_KP_MKIN2 MFP_CFG(GPIO4, AF1)
-#define GPIO05_KP_MKOUT2 MFP_CFG(GPIO5, AF1)
-#define GPIO06_KP_MKIN3 MFP_CFG(GPIO6, AF1)
-#define GPIO07_KP_MKOUT3 MFP_CFG(GPIO7, AF1)
-#define GPIO08_KP_MKIN4 MFP_CFG(GPIO8, AF1)
-#define GPIO09_KP_MKOUT4 MFP_CFG(GPIO9, AF1)
-#define GPIO10_KP_MKIN5 MFP_CFG(GPIO10, AF1)
-#define GPIO11_KP_MKOUT5 MFP_CFG(GPIO11, AF1)
-#define GPIO12_KP_MKIN6 MFP_CFG(GPIO12, AF1)
-#define GPIO13_KP_MKOUT6 MFP_CFG(GPIO13, AF1)
-#define GPIO14_KP_MKIN7 MFP_CFG(GPIO14, AF1)
-#define GPIO15_KP_MKOUT7 MFP_CFG(GPIO15, AF1)
-#define GPIO16_KP_DKIN0 MFP_CFG(GPIO16, AF1)
-#define GPIO17_KP_DKIN1 MFP_CFG(GPIO17, AF1)
-#define GPIO18_KP_DKIN2 MFP_CFG(GPIO18, AF1)
-#define GPIO19_KP_DKIN3 MFP_CFG(GPIO19, AF1)
-
-/* LCD */
-#define GPIO81_LCD_FCLK MFP_CFG(GPIO81, AF1)
-#define GPIO82_LCD_LCLK MFP_CFG(GPIO82, AF1)
-#define GPIO83_LCD_PCLK MFP_CFG(GPIO83, AF1)
-#define GPIO84_LCD_DENA MFP_CFG(GPIO84, AF1)
-#define GPIO85_LCD_DD0 MFP_CFG(GPIO85, AF1)
-#define GPIO86_LCD_DD1 MFP_CFG(GPIO86, AF1)
-#define GPIO87_LCD_DD2 MFP_CFG(GPIO87, AF1)
-#define GPIO88_LCD_DD3 MFP_CFG(GPIO88, AF1)
-#define GPIO89_LCD_DD4 MFP_CFG(GPIO89, AF1)
-#define GPIO90_LCD_DD5 MFP_CFG(GPIO90, AF1)
-#define GPIO91_LCD_DD6 MFP_CFG(GPIO91, AF1)
-#define GPIO92_LCD_DD7 MFP_CFG(GPIO92, AF1)
-#define GPIO93_LCD_DD8 MFP_CFG(GPIO93, AF1)
-#define GPIO94_LCD_DD9 MFP_CFG(GPIO94, AF1)
-#define GPIO95_LCD_DD10 MFP_CFG(GPIO95, AF1)
-#define GPIO96_LCD_DD11 MFP_CFG(GPIO96, AF1)
-#define GPIO97_LCD_DD12 MFP_CFG(GPIO97, AF1)
-#define GPIO98_LCD_DD13 MFP_CFG(GPIO98, AF1)
-#define GPIO100_LCD_DD14 MFP_CFG(GPIO100, AF1)
-#define GPIO101_LCD_DD15 MFP_CFG(GPIO101, AF1)
-#define GPIO102_LCD_DD16 MFP_CFG(GPIO102, AF1)
-#define GPIO103_LCD_DD17 MFP_CFG(GPIO103, AF1)
-#define GPIO104_LCD_DD18 MFP_CFG(GPIO104, AF1)
-#define GPIO105_LCD_DD19 MFP_CFG(GPIO105, AF1)
-#define GPIO106_LCD_DD20 MFP_CFG(GPIO106, AF1)
-#define GPIO107_LCD_DD21 MFP_CFG(GPIO107, AF1)
-#define GPIO108_LCD_DD22 MFP_CFG(GPIO108, AF1)
-#define GPIO109_LCD_DD23 MFP_CFG(GPIO109, AF1)
-
-#define GPIO104_LCD_SPIDOUT MFP_CFG(GPIO104, AF3)
-#define GPIO105_LCD_SPIDIN MFP_CFG(GPIO105, AF3)
-#define GPIO107_LCD_CS1 MFP_CFG(GPIO107, AF3)
-#define GPIO108_LCD_DCLK MFP_CFG(GPIO108, AF3)
-
-#define GPIO106_LCD_RESET MFP_CFG(GPIO106, AF0)
-
-/*smart panel*/
-#define GPIO82_LCD_A0 MFP_CFG(GPIO82, AF0)
-#define GPIO83_LCD_WR MFP_CFG(GPIO83, AF0)
-#define GPIO103_LCD_CS MFP_CFG(GPIO103, AF0)
-
-/*1wire*/
-#define GPIO106_1WIRE MFP_CFG(GPIO106, AF3)
-
-/*CCIC*/
-#define GPIO67_CCIC_IN7 MFP_CFG_DRV(GPIO67, AF1, MEDIUM)
-#define GPIO68_CCIC_IN6 MFP_CFG_DRV(GPIO68, AF1, MEDIUM)
-#define GPIO69_CCIC_IN5 MFP_CFG_DRV(GPIO69, AF1, MEDIUM)
-#define GPIO70_CCIC_IN4 MFP_CFG_DRV(GPIO70, AF1, MEDIUM)
-#define GPIO71_CCIC_IN3 MFP_CFG_DRV(GPIO71, AF1, MEDIUM)
-#define GPIO72_CCIC_IN2 MFP_CFG_DRV(GPIO72, AF1, MEDIUM)
-#define GPIO73_CCIC_IN1 MFP_CFG_DRV(GPIO73, AF1, MEDIUM)
-#define GPIO74_CCIC_IN0 MFP_CFG_DRV(GPIO74, AF1, MEDIUM)
-#define GPIO75_CAM_HSYNC MFP_CFG_DRV(GPIO75, AF1, MEDIUM)
-#define GPIO76_CAM_VSYNC MFP_CFG_DRV(GPIO76, AF1, MEDIUM)
-#define GPIO77_CAM_MCLK MFP_CFG_DRV(GPIO77, AF1, MEDIUM)
-#define GPIO78_CAM_PCLK MFP_CFG_DRV(GPIO78, AF1, MEDIUM)
-
-/* MMC1 */
-#define MMC1_DAT7_MMC1_DAT7 MFP_CFG_DRV(MMC1_DAT7, AF0, MEDIUM)
-#define MMC1_DAT6_MMC1_DAT6 MFP_CFG_DRV(MMC1_DAT6, AF0, MEDIUM)
-#define MMC1_DAT5_MMC1_DAT5 MFP_CFG_DRV(MMC1_DAT5, AF0, MEDIUM)
-#define MMC1_DAT4_MMC1_DAT4 MFP_CFG_DRV(MMC1_DAT4, AF0, MEDIUM)
-#define MMC1_DAT3_MMC1_DAT3 MFP_CFG_DRV(MMC1_DAT3, AF0, MEDIUM)
-#define MMC1_DAT2_MMC1_DAT2 MFP_CFG_DRV(MMC1_DAT2, AF0, MEDIUM)
-#define MMC1_DAT1_MMC1_DAT1 MFP_CFG_DRV(MMC1_DAT1, AF0, MEDIUM)
-#define MMC1_DAT0_MMC1_DAT0 MFP_CFG_DRV(MMC1_DAT0, AF0, MEDIUM)
-#define MMC1_CMD_MMC1_CMD MFP_CFG_DRV(MMC1_CMD, AF0, MEDIUM)
-#define MMC1_CLK_MMC1_CLK MFP_CFG_DRV(MMC1_CLK, AF0, MEDIUM)
-#define MMC1_CD_MMC1_CD MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM)
-#define MMC1_WP_MMC1_WP MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM)
-
-/* PWM */
-#define GPIO27_PWM3_AF2 MFP_CFG(GPIO27, AF2)
-#define GPIO51_PWM2_OUT MFP_CFG(GPIO51, AF2)
-#define GPIO117_PWM1_OUT MFP_CFG(GPIO117, AF2)
-#define GPIO118_PWM2_OUT MFP_CFG(GPIO118, AF2)
-#define GPIO119_PWM3_OUT MFP_CFG(GPIO119, AF2)
-#define GPIO120_PWM4_OUT MFP_CFG(GPIO120, AF2)
-
-#endif /* __ASM_MACH MFP_PXA910_H */
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
deleted file mode 100644
index 7111535f325f..000000000000
--- a/arch/arm/mach-mmp/teton_bga.c
+++ /dev/null
@@ -1,100 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/teton_bga.c
- *
- * Support for the Marvell PXA168 Teton BGA Development Platform.
- *
- * Author: Mark F. Brown <mark.brown314@gmail.com>
- *
- * This code is based on aspenite.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/gpio-pxa.h>
-#include <linux/input.h>
-#include <linux/platform_data/keypad-pxa27x.h>
-#include <linux/i2c.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "addr-map.h"
-#include "mfp-pxa168.h"
-#include "pxa168.h"
-#include "teton_bga.h"
-#include "irqs.h"
-
-#include "common.h"
-
-static unsigned long teton_bga_pin_config[] __initdata = {
- /* UART1 */
- GPIO107_UART1_TXD,
- GPIO108_UART1_RXD,
-
- /* Keypad */
- GPIO109_KP_MKIN1,
- GPIO110_KP_MKIN0,
- GPIO111_KP_MKOUT7,
- GPIO112_KP_MKOUT6,
-
- /* I2C Bus */
- GPIO105_CI2C_SDA,
- GPIO106_CI2C_SCL,
-
- /* RTC */
- GPIO78_GPIO,
-};
-
-static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static unsigned int teton_bga_matrix_key_map[] = {
- KEY(0, 6, KEY_ESC),
- KEY(0, 7, KEY_ENTER),
- KEY(1, 6, KEY_LEFT),
- KEY(1, 7, KEY_RIGHT),
-};
-
-static struct matrix_keymap_data teton_bga_matrix_keymap_data = {
- .keymap = teton_bga_matrix_key_map,
- .keymap_size = ARRAY_SIZE(teton_bga_matrix_key_map),
-};
-
-static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = {
- .matrix_key_rows = 2,
- .matrix_key_cols = 8,
- .matrix_keymap_data = &teton_bga_matrix_keymap_data,
- .debounce_interval = 30,
-};
-
-static struct i2c_board_info teton_bga_i2c_info[] __initdata = {
- {
- I2C_BOARD_INFO("ds1337", 0x68),
- .irq = MMP_GPIO_TO_IRQ(RTC_INT_GPIO)
- },
-};
-
-static void __init teton_bga_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(teton_bga_pin_config));
-
- /* on-chip devices */
- pxa168_add_uart(1);
- pxa168_add_keypad(&teton_bga_keypad_info);
- pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info));
- platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_device_register(&pxa168_device_gpio);
-}
-
-MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = MMP_NR_IRQS,
- .init_irq = pxa168_init_irq,
- .init_time = pxa168_timer_init,
- .init_machine = teton_bga_init,
- .restart = pxa168_restart,
-MACHINE_END
diff --git a/arch/arm/mach-mmp/teton_bga.h b/arch/arm/mach-mmp/teton_bga.h
deleted file mode 100644
index 73050096f0bd..000000000000
--- a/arch/arm/mach-mmp/teton_bga.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Support for the Marvell PXA168 Teton BGA Development Platform.
- */
-#ifndef __ASM_MACH_TETON_BGA_H
-#define __ASM_MACH_TETON_BGA_H
-
-/* GPIOs */
-#define MMC_PWENA_GPIO 27
-#define USBHPENB_GPIO 55
-#define RTC_INT_GPIO 78
-#define LCD_VBLK_EN_GPIO 79
-#define LCD_DVDD_EN_GPIO 80
-#define RST_WIFI_GPIO 81
-#define CF_PWEN_GPIO 82
-#define USB_OC_GPIO 83
-#define PWM_GPIO 84
-#define USBHPENA_GPIO 85
-#define TS_INT_GPIO 86
-#define CIR_GPIO 108
-
-#endif /* __ASM_MACH_TETON_BGA_H */
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
deleted file mode 100644
index 345b2e6d5c7e..000000000000
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ /dev/null
@@ -1,315 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/ttc_dkb.c
- *
- * Support for the Marvell PXA910-based TTC_DKB Development Platform.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/onenand.h>
-#include <linux/interrupt.h>
-#include <linux/platform_data/pca953x.h>
-#include <linux/gpio.h>
-#include <linux/gpio-pxa.h>
-#include <linux/mfd/88pm860x.h>
-#include <linux/platform_data/mv_usb.h>
-#include <linux/spi/spi.h>
-#include <linux/delay.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include "addr-map.h"
-#include "mfp-pxa910.h"
-#include "pxa910.h"
-#include "irqs.h"
-#include "regs-usb.h"
-
-#include "common.h"
-
-#define TTCDKB_GPIO_EXT0(x) (MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 : \
- ((x < 16) ? x : 15)))
-#define TTCDKB_GPIO_EXT1(x) (MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \
- ((x < 16) ? x : 15)))
-
-/*
- * 16 board interrupts -- MAX7312 GPIO expander
- * 16 board interrupts -- PCA9575 GPIO expander
- * 24 board interrupts -- 88PM860x PMIC
- */
-#define TTCDKB_NR_IRQS (MMP_NR_IRQS + 16 + 16 + 24)
-
-static unsigned long ttc_dkb_pin_config[] __initdata = {
- /* UART2 */
- GPIO47_UART2_RXD,
- GPIO48_UART2_TXD,
-
- /* DFI */
- DF_IO0_ND_IO0,
- DF_IO1_ND_IO1,
- DF_IO2_ND_IO2,
- DF_IO3_ND_IO3,
- DF_IO4_ND_IO4,
- DF_IO5_ND_IO5,
- DF_IO6_ND_IO6,
- DF_IO7_ND_IO7,
- DF_IO8_ND_IO8,
- DF_IO9_ND_IO9,
- DF_IO10_ND_IO10,
- DF_IO11_ND_IO11,
- DF_IO12_ND_IO12,
- DF_IO13_ND_IO13,
- DF_IO14_ND_IO14,
- DF_IO15_ND_IO15,
- DF_nCS0_SM_nCS2_nCS0,
- DF_ALE_SM_WEn_ND_ALE,
- DF_CLE_SM_OEn_ND_CLE,
- DF_WEn_DF_WEn,
- DF_REn_DF_REn,
- DF_RDY0_DF_RDY0,
-};
-
-static struct pxa_gpio_platform_data pxa910_gpio_pdata = {
- .irq_base = MMP_GPIO_TO_IRQ(0),
-};
-
-static struct mtd_partition ttc_dkb_onenand_partitions[] = {
- {
- .name = "bootloader",
- .offset = 0,
- .size = SZ_1M,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "reserved",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_128K,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "reserved",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_8M,
- .mask_flags = MTD_WRITEABLE,
- }, {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = (SZ_2M + SZ_1M),
- .mask_flags = 0,
- }, {
- .name = "filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_32M + SZ_16M,
- .mask_flags = 0,
- }
-};
-
-static struct onenand_platform_data ttc_dkb_onenand_info = {
- .parts = ttc_dkb_onenand_partitions,
- .nr_parts = ARRAY_SIZE(ttc_dkb_onenand_partitions),
-};
-
-static struct resource ttc_dkb_resource_onenand[] = {
- [0] = {
- .start = SMC_CS0_PHYS_BASE,
- .end = SMC_CS0_PHYS_BASE + SZ_1M,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device ttc_dkb_device_onenand = {
- .name = "onenand-flash",
- .id = -1,
- .resource = ttc_dkb_resource_onenand,
- .num_resources = ARRAY_SIZE(ttc_dkb_resource_onenand),
- .dev = {
- .platform_data = &ttc_dkb_onenand_info,
- },
-};
-
-static struct platform_device *ttc_dkb_devices[] = {
- &pxa910_device_gpio,
- &pxa910_device_rtc,
- &ttc_dkb_device_onenand,
-};
-
-static struct pca953x_platform_data max7312_data[] = {
- {
- .gpio_base = TTCDKB_GPIO_EXT0(0),
- .irq_base = MMP_NR_IRQS,
- },
-};
-
-static struct pm860x_platform_data ttc_dkb_pm8607_info = {
- .irq_base = IRQ_BOARD_START,
-};
-
-static struct i2c_board_info ttc_dkb_i2c_info[] = {
- {
- .type = "88PM860x",
- .addr = 0x34,
- .platform_data = &ttc_dkb_pm8607_info,
- .irq = IRQ_PXA910_PMIC_INT,
- },
- {
- .type = "max7312",
- .addr = 0x23,
- .irq = MMP_GPIO_TO_IRQ(80),
- .platform_data = &max7312_data,
- },
-};
-
-#if IS_ENABLED(CONFIG_USB_SUPPORT)
-#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
-
-static struct mv_usb_platform_data ttc_usb_pdata = {
- .vbus = NULL,
- .mode = MV_USB_MODE_OTG,
- .otg_force_a_bus_req = 1,
- .phy_init = pxa_usb_phy_init,
- .phy_deinit = pxa_usb_phy_deinit,
- .set_vbus = NULL,
-};
-#endif
-#endif
-
-#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
-static struct pxa3xx_nand_platform_data dkb_nand_info = {};
-#endif
-
-#if IS_ENABLED(CONFIG_MMP_DISP)
-/* path config */
-#define CFG_IOPADMODE(iopad) (iopad) /* 0x0 ~ 0xd */
-#define SCLK_SOURCE_SELECT(x) (x << 30) /* 0x0 ~ 0x3 */
-/* link config */
-#define CFG_DUMBMODE(mode) (mode << 28) /* 0x0 ~ 0x6*/
-static struct mmp_mach_path_config dkb_disp_config[] = {
- [0] = {
- .name = "mmp-parallel",
- .overlay_num = 2,
- .output_type = PATH_OUT_PARALLEL,
- .path_config = CFG_IOPADMODE(0x1)
- | SCLK_SOURCE_SELECT(0x1),
- .link_config = CFG_DUMBMODE(0x2),
- },
-};
-
-static struct mmp_mach_plat_info dkb_disp_info = {
- .name = "mmp-disp",
- .clk_name = "disp0",
- .path_num = 1,
- .paths = dkb_disp_config,
-};
-
-static struct mmp_buffer_driver_mach_info dkb_fb_info = {
- .name = "mmp-fb",
- .path_name = "mmp-parallel",
- .overlay_id = 0,
- .dmafetch_id = 1,
- .default_pixfmt = PIXFMT_RGB565,
-};
-
-static void dkb_tpo_panel_power(int on)
-{
- int err;
- u32 spi_reset = mfp_to_gpio(MFP_PIN_GPIO106);
-
- if (on) {
- err = gpio_request(spi_reset, "TPO_LCD_SPI_RESET");
- if (err) {
- pr_err("failed to request GPIO for TPO LCD RESET\n");
- return;
- }
- gpio_direction_output(spi_reset, 0);
- udelay(100);
- gpio_set_value(spi_reset, 1);
- gpio_free(spi_reset);
- } else {
- err = gpio_request(spi_reset, "TPO_LCD_SPI_RESET");
- if (err) {
- pr_err("failed to request LCD RESET gpio\n");
- return;
- }
- gpio_set_value(spi_reset, 0);
- gpio_free(spi_reset);
- }
-}
-
-static struct mmp_mach_panel_info dkb_tpo_panel_info = {
- .name = "tpo-hvga",
- .plat_path_name = "mmp-parallel",
- .plat_set_onoff = dkb_tpo_panel_power,
-};
-
-static struct spi_board_info spi_board_info[] __initdata = {
- {
- .modalias = "tpo-hvga",
- .platform_data = &dkb_tpo_panel_info,
- .bus_num = 5,
- }
-};
-
-static void __init add_disp(void)
-{
- mmp_register_device(&pxa910_device_disp,
- &dkb_disp_info, sizeof(dkb_disp_info));
- spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
- mmp_register_device(&pxa910_device_fb,
- &dkb_fb_info, sizeof(dkb_fb_info));
- mmp_register_device(&pxa910_device_panel,
- &dkb_tpo_panel_info, sizeof(dkb_tpo_panel_info));
-}
-#endif
-
-static void __init ttc_dkb_init(void)
-{
- mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config));
-
- /* on-chip devices */
- pxa910_add_uart(1);
-#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
- pxa910_add_nand(&dkb_nand_info);
-#endif
-
- /* off-chip devices */
- pxa910_add_twsi(0, NULL, ARRAY_AND_SIZE(ttc_dkb_i2c_info));
- platform_device_add_data(&pxa910_device_gpio, &pxa910_gpio_pdata,
- sizeof(struct pxa_gpio_platform_data));
- platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices));
-
-#if IS_ENABLED(CONFIG_USB_SUPPORT)
-#if IS_ENABLED(CONFIG_PHY_PXA_USB)
- platform_device_register(&pxa168_device_usb_phy);
-#endif
-
-#if IS_ENABLED(CONFIG_USB_MV_UDC)
- pxa168_device_u2o.dev.platform_data = &ttc_usb_pdata;
- platform_device_register(&pxa168_device_u2o);
-#endif
-
-#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
- pxa168_device_u2oehci.dev.platform_data = &ttc_usb_pdata;
- platform_device_register(&pxa168_device_u2oehci);
-#endif
-
-#if IS_ENABLED(CONFIG_USB_MV_OTG)
- pxa168_device_u2ootg.dev.platform_data = &ttc_usb_pdata;
- platform_device_register(&pxa168_device_u2ootg);
-#endif
-#endif
-
-#if IS_ENABLED(CONFIG_MMP_DISP)
- add_disp();
-#endif
-}
-
-MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
- .map_io = mmp_map_io,
- .nr_irqs = TTCDKB_NR_IRQS,
- .init_irq = pxa910_init_irq,
- .init_time = pxa910_timer_init,
- .init_machine = ttc_dkb_init,
- .restart = mmp_restart,
-MACHINE_END
--
2.29.2
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^ permalink raw reply related [flat|nested] 55+ messages in thread
* [PATCH 09/11] ARM: mmp: remove custom sram code
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Vinod Koul
Cc: linux-kernel, Arnd Bergmann, dmaengine
From: Arnd Bergmann <arnd@arndb.de>
The MMP_SRAM code is no longer used by the tdma driver because
the Kconfig symbol is not selected, so remove it along with its
former callsite.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-mmp/Makefile | 1 -
arch/arm/mach-mmp/mmp2.h | 13 --
arch/arm/mach-mmp/sram.c | 167 ---------------------
drivers/dma/mmp_tdma.c | 7 +-
include/linux/platform_data/dma-mmp_tdma.h | 36 -----
5 files changed, 2 insertions(+), 222 deletions(-)
delete mode 100644 arch/arm/mach-mmp/sram.c
delete mode 100644 include/linux/platform_data/dma-mmp_tdma.h
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 65cc9b691983..cd874c5a6cb8 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -8,7 +8,6 @@ obj-y += common.o devices.o time.o
obj-$(CONFIG_CPU_PXA168) += pxa168.o
obj-$(CONFIG_CPU_PXA910) += pxa910.o
obj-$(CONFIG_CPU_MMP2) += mmp2.o
-obj-$(CONFIG_MMP_SRAM) += sram.o
ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o
diff --git a/arch/arm/mach-mmp/mmp2.h b/arch/arm/mach-mmp/mmp2.h
index 7f80b90248fb..5c80836aea76 100644
--- a/arch/arm/mach-mmp/mmp2.h
+++ b/arch/arm/mach-mmp/mmp2.h
@@ -10,7 +10,6 @@ extern void mmp2_clear_pmic_int(void);
#include <linux/i2c.h>
#include <linux/platform_data/i2c-pxa.h>
-#include <linux/platform_data/dma-mmp_tdma.h>
#include <linux/irqchip/mmp.h>
#include "devices.h"
@@ -29,8 +28,6 @@ extern struct mmp_device_desc mmp2_device_sdh0;
extern struct mmp_device_desc mmp2_device_sdh1;
extern struct mmp_device_desc mmp2_device_sdh2;
extern struct mmp_device_desc mmp2_device_sdh3;
-extern struct mmp_device_desc mmp2_device_asram;
-extern struct mmp_device_desc mmp2_device_isram;
extern struct platform_device mmp2_device_gpio;
@@ -90,15 +87,5 @@ static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data)
return mmp_register_device(d, data, sizeof(*data));
}
-static inline int mmp2_add_asram(struct sram_platdata *data)
-{
- return mmp_register_device(&mmp2_device_asram, data, sizeof(*data));
-}
-
-static inline int mmp2_add_isram(struct sram_platdata *data)
-{
- return mmp_register_device(&mmp2_device_isram, data, sizeof(*data));
-}
-
#endif /* __ASM_MACH_MMP2_H */
diff --git a/arch/arm/mach-mmp/sram.c b/arch/arm/mach-mmp/sram.c
deleted file mode 100644
index ecc46c31004f..000000000000
--- a/arch/arm/mach-mmp/sram.c
+++ /dev/null
@@ -1,167 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/sram.c
- *
- * based on mach-davinci/sram.c - DaVinci simple SRAM allocator
- *
- * Copyright (c) 2011 Marvell Semiconductors Inc.
- * All Rights Reserved
- *
- * Add for mmp sram support - Leo Yan <leoy@marvell.com>
- */
-
-#include <linux/module.h>
-#include <linux/mod_devicetable.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/genalloc.h>
-
-#include <linux/platform_data/dma-mmp_tdma.h>
-
-struct sram_bank_info {
- char *pool_name;
- struct gen_pool *gpool;
- int granularity;
-
- phys_addr_t sram_phys;
- void __iomem *sram_virt;
- u32 sram_size;
-
- struct list_head node;
-};
-
-static DEFINE_MUTEX(sram_lock);
-static LIST_HEAD(sram_bank_list);
-
-struct gen_pool *sram_get_gpool(char *pool_name)
-{
- struct sram_bank_info *info = NULL;
-
- if (!pool_name)
- return NULL;
-
- mutex_lock(&sram_lock);
-
- list_for_each_entry(info, &sram_bank_list, node)
- if (!strcmp(pool_name, info->pool_name))
- break;
-
- mutex_unlock(&sram_lock);
-
- if (&info->node == &sram_bank_list)
- return NULL;
-
- return info->gpool;
-}
-EXPORT_SYMBOL(sram_get_gpool);
-
-static int sram_probe(struct platform_device *pdev)
-{
- struct sram_platdata *pdata = pdev->dev.platform_data;
- struct sram_bank_info *info;
- struct resource *res;
- int ret = 0;
-
- if (!pdata || !pdata->pool_name)
- return -ENODEV;
-
- info = kzalloc(sizeof(*info), GFP_KERNEL);
- if (!info)
- return -ENOMEM;
-
- platform_set_drvdata(pdev, info);
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (res == NULL) {
- dev_err(&pdev->dev, "no memory resource defined\n");
- ret = -ENODEV;
- goto out;
- }
-
- if (!resource_size(res))
- return 0;
-
- info->sram_phys = (phys_addr_t)res->start;
- info->sram_size = resource_size(res);
- info->sram_virt = ioremap(info->sram_phys, info->sram_size);
- info->pool_name = kstrdup(pdata->pool_name, GFP_KERNEL);
- info->granularity = pdata->granularity;
-
- info->gpool = gen_pool_create(ilog2(info->granularity), -1);
- if (!info->gpool) {
- dev_err(&pdev->dev, "create pool failed\n");
- ret = -ENOMEM;
- goto create_pool_err;
- }
-
- ret = gen_pool_add_virt(info->gpool, (unsigned long)info->sram_virt,
- info->sram_phys, info->sram_size, -1);
- if (ret < 0) {
- dev_err(&pdev->dev, "add new chunk failed\n");
- ret = -ENOMEM;
- goto add_chunk_err;
- }
-
- mutex_lock(&sram_lock);
- list_add(&info->node, &sram_bank_list);
- mutex_unlock(&sram_lock);
-
- dev_info(&pdev->dev, "initialized\n");
- return 0;
-
-add_chunk_err:
- gen_pool_destroy(info->gpool);
-create_pool_err:
- iounmap(info->sram_virt);
- kfree(info->pool_name);
-out:
- kfree(info);
- return ret;
-}
-
-static int sram_remove(struct platform_device *pdev)
-{
- struct sram_bank_info *info;
-
- info = platform_get_drvdata(pdev);
-
- if (info->sram_size) {
- mutex_lock(&sram_lock);
- list_del(&info->node);
- mutex_unlock(&sram_lock);
-
- gen_pool_destroy(info->gpool);
- iounmap(info->sram_virt);
- kfree(info->pool_name);
- }
-
- kfree(info);
-
- return 0;
-}
-
-static const struct platform_device_id sram_id_table[] = {
- { "asram", MMP_ASRAM },
- { "isram", MMP_ISRAM },
- { }
-};
-
-static struct platform_driver sram_driver = {
- .probe = sram_probe,
- .remove = sram_remove,
- .driver = {
- .name = "mmp-sram",
- },
- .id_table = sram_id_table,
-};
-
-static int __init sram_init(void)
-{
- return platform_driver_register(&sram_driver);
-}
-core_initcall(sram_init);
-
-MODULE_LICENSE("GPL");
diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index a262e0eb4cc9..d83e608dca05 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -15,7 +15,7 @@
#include <linux/dmaengine.h>
#include <linux/platform_device.h>
#include <linux/device.h>
-#include <linux/platform_data/dma-mmp_tdma.h>
+#include <linux/genalloc.h>
#include <linux/of_device.h>
#include <linux/of_dma.h>
@@ -670,10 +670,7 @@ static int mmp_tdma_probe(struct platform_device *pdev)
INIT_LIST_HEAD(&tdev->device.channels);
- if (pdev->dev.of_node)
- pool = of_gen_pool_get(pdev->dev.of_node, "asram", 0);
- else
- pool = sram_get_gpool("asram");
+ pool = of_gen_pool_get(pdev->dev.of_node, "asram", 0);
if (!pool) {
dev_err(&pdev->dev, "asram pool not available\n");
return -ENOMEM;
diff --git a/include/linux/platform_data/dma-mmp_tdma.h b/include/linux/platform_data/dma-mmp_tdma.h
deleted file mode 100644
index 8bec5484dc86..000000000000
--- a/include/linux/platform_data/dma-mmp_tdma.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * SRAM Memory Management
- *
- * Copyright (c) 2011 Marvell Semiconductors Inc.
- */
-
-#ifndef __DMA_MMP_TDMA_H
-#define __DMA_MMP_TDMA_H
-
-#include <linux/genalloc.h>
-
-/* ARBITRARY: SRAM allocations are multiples of this 2^N size */
-#define SRAM_GRANULARITY 512
-
-enum sram_type {
- MMP_SRAM_UNDEFINED = 0,
- MMP_ASRAM,
- MMP_ISRAM,
-};
-
-struct sram_platdata {
- char *pool_name;
- int granularity;
-};
-
-#ifdef CONFIG_MMP_SRAM
-extern struct gen_pool *sram_get_gpool(char *pool_name);
-#else
-static inline struct gen_pool *sram_get_gpool(char *pool_name)
-{
- return NULL;
-}
-#endif
-
-#endif /* __DMA_MMP_TDMA_H */
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 09/11] ARM: mmp: remove custom sram code
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
Vinod Koul
Cc: linux-kernel, Arnd Bergmann, dmaengine
From: Arnd Bergmann <arnd@arndb.de>
The MMP_SRAM code is no longer used by the tdma driver because
the Kconfig symbol is not selected, so remove it along with its
former callsite.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-mmp/Makefile | 1 -
arch/arm/mach-mmp/mmp2.h | 13 --
arch/arm/mach-mmp/sram.c | 167 ---------------------
drivers/dma/mmp_tdma.c | 7 +-
include/linux/platform_data/dma-mmp_tdma.h | 36 -----
5 files changed, 2 insertions(+), 222 deletions(-)
delete mode 100644 arch/arm/mach-mmp/sram.c
delete mode 100644 include/linux/platform_data/dma-mmp_tdma.h
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 65cc9b691983..cd874c5a6cb8 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -8,7 +8,6 @@ obj-y += common.o devices.o time.o
obj-$(CONFIG_CPU_PXA168) += pxa168.o
obj-$(CONFIG_CPU_PXA910) += pxa910.o
obj-$(CONFIG_CPU_MMP2) += mmp2.o
-obj-$(CONFIG_MMP_SRAM) += sram.o
ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o
diff --git a/arch/arm/mach-mmp/mmp2.h b/arch/arm/mach-mmp/mmp2.h
index 7f80b90248fb..5c80836aea76 100644
--- a/arch/arm/mach-mmp/mmp2.h
+++ b/arch/arm/mach-mmp/mmp2.h
@@ -10,7 +10,6 @@ extern void mmp2_clear_pmic_int(void);
#include <linux/i2c.h>
#include <linux/platform_data/i2c-pxa.h>
-#include <linux/platform_data/dma-mmp_tdma.h>
#include <linux/irqchip/mmp.h>
#include "devices.h"
@@ -29,8 +28,6 @@ extern struct mmp_device_desc mmp2_device_sdh0;
extern struct mmp_device_desc mmp2_device_sdh1;
extern struct mmp_device_desc mmp2_device_sdh2;
extern struct mmp_device_desc mmp2_device_sdh3;
-extern struct mmp_device_desc mmp2_device_asram;
-extern struct mmp_device_desc mmp2_device_isram;
extern struct platform_device mmp2_device_gpio;
@@ -90,15 +87,5 @@ static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data)
return mmp_register_device(d, data, sizeof(*data));
}
-static inline int mmp2_add_asram(struct sram_platdata *data)
-{
- return mmp_register_device(&mmp2_device_asram, data, sizeof(*data));
-}
-
-static inline int mmp2_add_isram(struct sram_platdata *data)
-{
- return mmp_register_device(&mmp2_device_isram, data, sizeof(*data));
-}
-
#endif /* __ASM_MACH_MMP2_H */
diff --git a/arch/arm/mach-mmp/sram.c b/arch/arm/mach-mmp/sram.c
deleted file mode 100644
index ecc46c31004f..000000000000
--- a/arch/arm/mach-mmp/sram.c
+++ /dev/null
@@ -1,167 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/sram.c
- *
- * based on mach-davinci/sram.c - DaVinci simple SRAM allocator
- *
- * Copyright (c) 2011 Marvell Semiconductors Inc.
- * All Rights Reserved
- *
- * Add for mmp sram support - Leo Yan <leoy@marvell.com>
- */
-
-#include <linux/module.h>
-#include <linux/mod_devicetable.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/genalloc.h>
-
-#include <linux/platform_data/dma-mmp_tdma.h>
-
-struct sram_bank_info {
- char *pool_name;
- struct gen_pool *gpool;
- int granularity;
-
- phys_addr_t sram_phys;
- void __iomem *sram_virt;
- u32 sram_size;
-
- struct list_head node;
-};
-
-static DEFINE_MUTEX(sram_lock);
-static LIST_HEAD(sram_bank_list);
-
-struct gen_pool *sram_get_gpool(char *pool_name)
-{
- struct sram_bank_info *info = NULL;
-
- if (!pool_name)
- return NULL;
-
- mutex_lock(&sram_lock);
-
- list_for_each_entry(info, &sram_bank_list, node)
- if (!strcmp(pool_name, info->pool_name))
- break;
-
- mutex_unlock(&sram_lock);
-
- if (&info->node == &sram_bank_list)
- return NULL;
-
- return info->gpool;
-}
-EXPORT_SYMBOL(sram_get_gpool);
-
-static int sram_probe(struct platform_device *pdev)
-{
- struct sram_platdata *pdata = pdev->dev.platform_data;
- struct sram_bank_info *info;
- struct resource *res;
- int ret = 0;
-
- if (!pdata || !pdata->pool_name)
- return -ENODEV;
-
- info = kzalloc(sizeof(*info), GFP_KERNEL);
- if (!info)
- return -ENOMEM;
-
- platform_set_drvdata(pdev, info);
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (res == NULL) {
- dev_err(&pdev->dev, "no memory resource defined\n");
- ret = -ENODEV;
- goto out;
- }
-
- if (!resource_size(res))
- return 0;
-
- info->sram_phys = (phys_addr_t)res->start;
- info->sram_size = resource_size(res);
- info->sram_virt = ioremap(info->sram_phys, info->sram_size);
- info->pool_name = kstrdup(pdata->pool_name, GFP_KERNEL);
- info->granularity = pdata->granularity;
-
- info->gpool = gen_pool_create(ilog2(info->granularity), -1);
- if (!info->gpool) {
- dev_err(&pdev->dev, "create pool failed\n");
- ret = -ENOMEM;
- goto create_pool_err;
- }
-
- ret = gen_pool_add_virt(info->gpool, (unsigned long)info->sram_virt,
- info->sram_phys, info->sram_size, -1);
- if (ret < 0) {
- dev_err(&pdev->dev, "add new chunk failed\n");
- ret = -ENOMEM;
- goto add_chunk_err;
- }
-
- mutex_lock(&sram_lock);
- list_add(&info->node, &sram_bank_list);
- mutex_unlock(&sram_lock);
-
- dev_info(&pdev->dev, "initialized\n");
- return 0;
-
-add_chunk_err:
- gen_pool_destroy(info->gpool);
-create_pool_err:
- iounmap(info->sram_virt);
- kfree(info->pool_name);
-out:
- kfree(info);
- return ret;
-}
-
-static int sram_remove(struct platform_device *pdev)
-{
- struct sram_bank_info *info;
-
- info = platform_get_drvdata(pdev);
-
- if (info->sram_size) {
- mutex_lock(&sram_lock);
- list_del(&info->node);
- mutex_unlock(&sram_lock);
-
- gen_pool_destroy(info->gpool);
- iounmap(info->sram_virt);
- kfree(info->pool_name);
- }
-
- kfree(info);
-
- return 0;
-}
-
-static const struct platform_device_id sram_id_table[] = {
- { "asram", MMP_ASRAM },
- { "isram", MMP_ISRAM },
- { }
-};
-
-static struct platform_driver sram_driver = {
- .probe = sram_probe,
- .remove = sram_remove,
- .driver = {
- .name = "mmp-sram",
- },
- .id_table = sram_id_table,
-};
-
-static int __init sram_init(void)
-{
- return platform_driver_register(&sram_driver);
-}
-core_initcall(sram_init);
-
-MODULE_LICENSE("GPL");
diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index a262e0eb4cc9..d83e608dca05 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -15,7 +15,7 @@
#include <linux/dmaengine.h>
#include <linux/platform_device.h>
#include <linux/device.h>
-#include <linux/platform_data/dma-mmp_tdma.h>
+#include <linux/genalloc.h>
#include <linux/of_device.h>
#include <linux/of_dma.h>
@@ -670,10 +670,7 @@ static int mmp_tdma_probe(struct platform_device *pdev)
INIT_LIST_HEAD(&tdev->device.channels);
- if (pdev->dev.of_node)
- pool = of_gen_pool_get(pdev->dev.of_node, "asram", 0);
- else
- pool = sram_get_gpool("asram");
+ pool = of_gen_pool_get(pdev->dev.of_node, "asram", 0);
if (!pool) {
dev_err(&pdev->dev, "asram pool not available\n");
return -ENOMEM;
diff --git a/include/linux/platform_data/dma-mmp_tdma.h b/include/linux/platform_data/dma-mmp_tdma.h
deleted file mode 100644
index 8bec5484dc86..000000000000
--- a/include/linux/platform_data/dma-mmp_tdma.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * SRAM Memory Management
- *
- * Copyright (c) 2011 Marvell Semiconductors Inc.
- */
-
-#ifndef __DMA_MMP_TDMA_H
-#define __DMA_MMP_TDMA_H
-
-#include <linux/genalloc.h>
-
-/* ARBITRARY: SRAM allocations are multiples of this 2^N size */
-#define SRAM_GRANULARITY 512
-
-enum sram_type {
- MMP_SRAM_UNDEFINED = 0,
- MMP_ASRAM,
- MMP_ISRAM,
-};
-
-struct sram_platdata {
- char *pool_name;
- int granularity;
-};
-
-#ifdef CONFIG_MMP_SRAM
-extern struct gen_pool *sram_get_gpool(char *pool_name);
-#else
-static inline struct gen_pool *sram_get_gpool(char *pool_name)
-{
- return NULL;
-}
-#endif
-
-#endif /* __DMA_MMP_TDMA_H */
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH 09/11] ARM: mmp: remove custom sram code
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-11-04 14:07 ` Vinod Koul
-1 siblings, 0 replies; 55+ messages in thread
From: Vinod Koul @ 2022-11-04 14:07 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
linux-kernel, Arnd Bergmann, dmaengine
On 21-10-22, 17:49, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The MMP_SRAM code is no longer used by the tdma driver because
> the Kconfig symbol is not selected, so remove it along with its
> former callsite.
Acked-By: Vinod Koul <vkoul@kernel.org>
--
~Vinod
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH 09/11] ARM: mmp: remove custom sram code
@ 2022-11-04 14:07 ` Vinod Koul
0 siblings, 0 replies; 55+ messages in thread
From: Vinod Koul @ 2022-11-04 14:07 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel,
linux-kernel, Arnd Bergmann, dmaengine
On 21-10-22, 17:49, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The MMP_SRAM code is no longer used by the tdma driver because
> the Kconfig symbol is not selected, so remove it along with its
> former callsite.
Acked-By: Vinod Koul <vkoul@kernel.org>
--
~Vinod
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH 10/11] ARM: mmp: remove device definitions
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann
From: Arnd Bergmann <arnd@arndb.de>
Since all board support is now gone, a lot of code in the
platform is no longer called and can be removed as well.
The remaining parts are:
* The interrupt numbers for pxa910 are still needed for the
power management support.
* The 'mfp' device is still statically initialized from
platform code, though this could be moved into the
pinctrl code
* The CPU identification code is used for the cpu_is_mmp*()
macros.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-mmp/Makefile | 2 +-
arch/arm/mach-mmp/common.c | 5 -
arch/arm/mach-mmp/common.h | 2 -
arch/arm/mach-mmp/devices.c | 359 --------------------------------
arch/arm/mach-mmp/devices.h | 57 -----
arch/arm/mach-mmp/irqs.h | 173 ---------------
arch/arm/mach-mmp/mfp.h | 35 ----
arch/arm/mach-mmp/mmp2.c | 71 +------
arch/arm/mach-mmp/mmp2.h | 83 --------
arch/arm/mach-mmp/pm-mmp2.c | 34 ---
arch/arm/mach-mmp/pm-mmp2.h | 2 +-
arch/arm/mach-mmp/pm-pxa910.c | 106 ----------
arch/arm/mach-mmp/pxa168.c | 126 +----------
arch/arm/mach-mmp/pxa168.h | 123 -----------
arch/arm/mach-mmp/pxa910.c | 99 +--------
arch/arm/mach-mmp/pxa910.h | 79 -------
arch/arm/mach-mmp/regs-apbc.h | 19 --
arch/arm/mach-mmp/regs-apmu.h | 28 ---
arch/arm/mach-mmp/regs-timers.h | 5 -
arch/arm/mach-mmp/regs-usb.h | 155 --------------
arch/arm/mach-mmp/time.c | 9 +-
21 files changed, 7 insertions(+), 1565 deletions(-)
delete mode 100644 arch/arm/mach-mmp/devices.c
delete mode 100644 arch/arm/mach-mmp/devices.h
delete mode 100644 arch/arm/mach-mmp/mfp.h
delete mode 100644 arch/arm/mach-mmp/regs-apbc.h
delete mode 100644 arch/arm/mach-mmp/regs-apmu.h
delete mode 100644 arch/arm/mach-mmp/regs-usb.h
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index cd874c5a6cb8..95d4217132eb 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -2,7 +2,7 @@
#
# Makefile for Marvell's PXA168 processors line
#
-obj-y += common.o devices.o time.o
+obj-y += common.o time.o
# SoC support
obj-$(CONFIG_CPU_PXA168) += pxa168.o
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index e94349d4726c..b3c1a248db31 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -58,8 +58,3 @@ void __init mmp2_map_io(void)
mmp_map_io();
iotable_init(mmp2_io_desc, ARRAY_SIZE(mmp2_io_desc));
}
-
-void mmp_restart(enum reboot_mode mode, const char *cmd)
-{
- soft_restart(0);
-}
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index ed56b3f15b45..e18f05d5d68d 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -1,9 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0 */
#include <linux/reboot.h>
-#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
extern void mmp_timer_init(int irq, unsigned long rate);
extern void __init mmp_map_io(void);
extern void __init mmp2_map_io(void);
-extern void mmp_restart(enum reboot_mode, const char *);
diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c
deleted file mode 100644
index 9968239d8041..000000000000
--- a/arch/arm/mach-mmp/devices.c
+++ /dev/null
@@ -1,359 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/devices.c
- */
-
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/delay.h>
-
-#include <asm/irq.h>
-#include "irqs.h"
-#include "devices.h"
-#include <linux/soc/mmp/cputype.h>
-#include "regs-usb.h"
-
-int __init mmp_register_device(struct mmp_device_desc *desc,
- void *data, size_t size)
-{
- struct platform_device *pdev;
- struct resource res[2 + MAX_RESOURCE_DMA];
- int i, ret = 0, nres = 0;
-
- pdev = platform_device_alloc(desc->drv_name, desc->id);
- if (pdev == NULL)
- return -ENOMEM;
-
- pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
-
- memset(res, 0, sizeof(res));
-
- if (desc->start != -1ul && desc->size > 0) {
- res[nres].start = desc->start;
- res[nres].end = desc->start + desc->size - 1;
- res[nres].flags = IORESOURCE_MEM;
- nres++;
- }
-
- if (desc->irq != NO_IRQ) {
- res[nres].start = desc->irq;
- res[nres].end = desc->irq;
- res[nres].flags = IORESOURCE_IRQ;
- nres++;
- }
-
- for (i = 0; i < MAX_RESOURCE_DMA; i++, nres++) {
- if (desc->dma[i] == 0)
- break;
-
- res[nres].start = desc->dma[i];
- res[nres].end = desc->dma[i];
- res[nres].flags = IORESOURCE_DMA;
- }
-
- ret = platform_device_add_resources(pdev, res, nres);
- if (ret) {
- platform_device_put(pdev);
- return ret;
- }
-
- if (data && size) {
- ret = platform_device_add_data(pdev, data, size);
- if (ret) {
- platform_device_put(pdev);
- return ret;
- }
- }
-
- return platform_device_add(pdev);
-}
-
-#if IS_ENABLED(CONFIG_USB) || IS_ENABLED(CONFIG_USB_GADGET)
-#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV)
-#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168)
-
-/*****************************************************************************
- * The registers read/write routines
- *****************************************************************************/
-
-static unsigned int u2o_get(void __iomem *base, unsigned int offset)
-{
- return readl_relaxed(base + offset);
-}
-
-static void u2o_set(void __iomem *base, unsigned int offset,
- unsigned int value)
-{
- u32 reg;
-
- reg = readl_relaxed(base + offset);
- reg |= value;
- writel_relaxed(reg, base + offset);
- readl_relaxed(base + offset);
-}
-
-static void u2o_clear(void __iomem *base, unsigned int offset,
- unsigned int value)
-{
- u32 reg;
-
- reg = readl_relaxed(base + offset);
- reg &= ~value;
- writel_relaxed(reg, base + offset);
- readl_relaxed(base + offset);
-}
-
-static void u2o_write(void __iomem *base, unsigned int offset,
- unsigned int value)
-{
- writel_relaxed(value, base + offset);
- readl_relaxed(base + offset);
-}
-
-
-static DEFINE_MUTEX(phy_lock);
-static int phy_init_cnt;
-
-static int usb_phy_init_internal(void __iomem *base)
-{
- int loops;
-
- pr_info("Init usb phy!!!\n");
-
- /* Initialize the USB PHY power */
- if (cpu_is_pxa910()) {
- u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT)
- | (1<<UTMI_CTRL_PU_REF_SHIFT));
- }
-
- u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
- u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
-
- /* UTMI_PLL settings */
- u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK
- | UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK
- | UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK
- | UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK);
-
- u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT
- | 0xb<<UTMI_PLL_REFDIV_SHIFT | 3<<UTMI_PLL_PLLVDD18_SHIFT
- | 3<<UTMI_PLL_PLLVDD12_SHIFT | 3<<UTMI_PLL_PLLCALI12_SHIFT
- | 1<<UTMI_PLL_ICP_SHIFT | 3<<UTMI_PLL_KVCO_SHIFT);
-
- /* UTMI_TX */
- u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK
- | UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK
- | UTMI_TX_IMPCAL_VTH_MASK | UTMI_TX_REG_EXT_FS_RCAL_MASK
- | UTMI_TX_AMP_MASK);
- u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT
- | 4<<UTMI_TX_CK60_PHSEL_SHIFT | 4<<UTMI_TX_IMPCAL_VTH_SHIFT
- | 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT | 3<<UTMI_TX_AMP_SHIFT);
-
- /* UTMI_RX */
- u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK
- | UTMI_REG_SQ_LENGTH_MASK);
- u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT
- | 2<<UTMI_REG_SQ_LENGTH_SHIFT);
-
- /* UTMI_IVREF */
- if (cpu_is_pxa168())
- /* fixing Microsoft Altair board interface with NEC hub issue -
- * Set UTMI_IVREF from 0x4a3 to 0x4bf */
- u2o_write(base, UTMI_IVREF, 0x4bf);
-
- /* toggle VCOCAL_START bit of UTMI_PLL */
- udelay(200);
- u2o_set(base, UTMI_PLL, VCOCAL_START);
- udelay(40);
- u2o_clear(base, UTMI_PLL, VCOCAL_START);
-
- /* toggle REG_RCAL_START bit of UTMI_TX */
- udelay(400);
- u2o_set(base, UTMI_TX, REG_RCAL_START);
- udelay(40);
- u2o_clear(base, UTMI_TX, REG_RCAL_START);
- udelay(400);
-
- /* Make sure PHY PLL is ready */
- loops = 0;
- while ((u2o_get(base, UTMI_PLL) & PLL_READY) == 0) {
- mdelay(1);
- loops++;
- if (loops > 100) {
- printk(KERN_WARNING "calibrate timeout, UTMI_PLL %x\n",
- u2o_get(base, UTMI_PLL));
- break;
- }
- }
-
- if (cpu_is_pxa168()) {
- u2o_set(base, UTMI_RESERVE, 1 << 5);
- /* Turn on UTMI PHY OTG extension */
- u2o_write(base, UTMI_OTG_ADDON, 1);
- }
-
- return 0;
-}
-
-static int usb_phy_deinit_internal(void __iomem *base)
-{
- pr_info("Deinit usb phy!!!\n");
-
- if (cpu_is_pxa168())
- u2o_clear(base, UTMI_OTG_ADDON, UTMI_OTG_ADDON_OTG_ON);
-
- u2o_clear(base, UTMI_CTRL, UTMI_CTRL_RXBUF_PDWN);
- u2o_clear(base, UTMI_CTRL, UTMI_CTRL_TXBUF_PDWN);
- u2o_clear(base, UTMI_CTRL, UTMI_CTRL_USB_CLK_EN);
- u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
- u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
-
- return 0;
-}
-
-int pxa_usb_phy_init(void __iomem *phy_reg)
-{
- mutex_lock(&phy_lock);
- if (phy_init_cnt++ == 0)
- usb_phy_init_internal(phy_reg);
- mutex_unlock(&phy_lock);
- return 0;
-}
-
-void pxa_usb_phy_deinit(void __iomem *phy_reg)
-{
- WARN_ON(phy_init_cnt == 0);
-
- mutex_lock(&phy_lock);
- if (--phy_init_cnt == 0)
- usb_phy_deinit_internal(phy_reg);
- mutex_unlock(&phy_lock);
-}
-#endif
-#endif
-#endif
-
-#if IS_ENABLED(CONFIG_USB_SUPPORT)
-static u64 __maybe_unused usb_dma_mask = ~(u32)0;
-
-#if IS_ENABLED(CONFIG_PHY_PXA_USB)
-static struct resource pxa168_usb_phy_resources[] = {
- [0] = {
- .start = PXA168_U2O_PHYBASE,
- .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device pxa168_device_usb_phy = {
- .name = "pxa-usb-phy",
- .id = -1,
- .resource = pxa168_usb_phy_resources,
- .num_resources = ARRAY_SIZE(pxa168_usb_phy_resources),
- .dev = {
- .dma_mask = &usb_dma_mask,
- .coherent_dma_mask = 0xffffffff,
- }
-};
-#endif /* CONFIG_PHY_PXA_USB */
-
-#if IS_ENABLED(CONFIG_USB_MV_UDC)
-static struct resource pxa168_u2o_resources[] = {
- /* regbase */
- [0] = {
- .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
- .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "capregs",
- },
- /* phybase */
- [1] = {
- .start = PXA168_U2O_PHYBASE,
- .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "phyregs",
- },
- [2] = {
- .start = IRQ_PXA168_USB1,
- .end = IRQ_PXA168_USB1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa168_device_u2o = {
- .name = "mv-udc",
- .id = -1,
- .resource = pxa168_u2o_resources,
- .num_resources = ARRAY_SIZE(pxa168_u2o_resources),
- .dev = {
- .dma_mask = &usb_dma_mask,
- .coherent_dma_mask = 0xffffffff,
- }
-};
-#endif /* CONFIG_USB_MV_UDC */
-
-#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
-static struct resource pxa168_u2oehci_resources[] = {
- [0] = {
- .start = PXA168_U2O_REGBASE,
- .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_PXA168_USB1,
- .end = IRQ_PXA168_USB1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa168_device_u2oehci = {
- .name = "pxa-u2oehci",
- .id = -1,
- .dev = {
- .dma_mask = &usb_dma_mask,
- .coherent_dma_mask = 0xffffffff,
- },
-
- .num_resources = ARRAY_SIZE(pxa168_u2oehci_resources),
- .resource = pxa168_u2oehci_resources,
-};
-#endif
-
-#if IS_ENABLED(CONFIG_USB_MV_OTG)
-static struct resource pxa168_u2ootg_resources[] = {
- /* regbase */
- [0] = {
- .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
- .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "capregs",
- },
- /* phybase */
- [1] = {
- .start = PXA168_U2O_PHYBASE,
- .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "phyregs",
- },
- [2] = {
- .start = IRQ_PXA168_USB1,
- .end = IRQ_PXA168_USB1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa168_device_u2ootg = {
- .name = "mv-otg",
- .id = -1,
- .dev = {
- .dma_mask = &usb_dma_mask,
- .coherent_dma_mask = 0xffffffff,
- },
-
- .num_resources = ARRAY_SIZE(pxa168_u2ootg_resources),
- .resource = pxa168_u2ootg_resources,
-};
-#endif /* CONFIG_USB_MV_OTG */
-
-#endif
diff --git a/arch/arm/mach-mmp/devices.h b/arch/arm/mach-mmp/devices.h
deleted file mode 100644
index d4920ebfebc5..000000000000
--- a/arch/arm/mach-mmp/devices.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __MACH_DEVICE_H
-#define __MACH_DEVICE_H
-
-#include <linux/types.h>
-
-#define MAX_RESOURCE_DMA 2
-
-/* structure for describing the on-chip devices */
-struct mmp_device_desc {
- const char *dev_name;
- const char *drv_name;
- int id;
- int irq;
- unsigned long start;
- unsigned long size;
- int dma[MAX_RESOURCE_DMA];
-};
-
-#define PXA168_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \
-struct mmp_device_desc pxa168_device_##_name __initdata = { \
- .dev_name = "pxa168-" #_name, \
- .drv_name = _drv, \
- .id = _id, \
- .irq = IRQ_PXA168_##_irq, \
- .start = _start, \
- .size = _size, \
- .dma = { _dma }, \
-};
-
-#define PXA910_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \
-struct mmp_device_desc pxa910_device_##_name __initdata = { \
- .dev_name = "pxa910-" #_name, \
- .drv_name = _drv, \
- .id = _id, \
- .irq = IRQ_PXA910_##_irq, \
- .start = _start, \
- .size = _size, \
- .dma = { _dma }, \
-};
-
-#define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \
-struct mmp_device_desc mmp2_device_##_name __initdata = { \
- .dev_name = "mmp2-" #_name, \
- .drv_name = _drv, \
- .id = _id, \
- .irq = IRQ_MMP2_##_irq, \
- .start = _start, \
- .size = _size, \
- .dma = { _dma }, \
-}
-
-extern int mmp_register_device(struct mmp_device_desc *, void *, size_t);
-extern int pxa_usb_phy_init(void __iomem *phy_reg);
-extern void pxa_usb_phy_deinit(void __iomem *phy_reg);
-
-#endif /* __MACH_DEVICE_H */
diff --git a/arch/arm/mach-mmp/irqs.h b/arch/arm/mach-mmp/irqs.h
index 5acc4d532a43..b8446a17ea55 100644
--- a/arch/arm/mach-mmp/irqs.h
+++ b/arch/arm/mach-mmp/irqs.h
@@ -2,56 +2,6 @@
#ifndef __ASM_MACH_IRQS_H
#define __ASM_MACH_IRQS_H
-/*
- * Interrupt numbers for PXA168
- */
-#define IRQ_PXA168_NONE (-1)
-#define IRQ_PXA168_SSP4 0
-#define IRQ_PXA168_SSP3 1
-#define IRQ_PXA168_SSP2 2
-#define IRQ_PXA168_SSP1 3
-#define IRQ_PXA168_PMIC_INT 4
-#define IRQ_PXA168_RTC_INT 5
-#define IRQ_PXA168_RTC_ALARM 6
-#define IRQ_PXA168_TWSI0 7
-#define IRQ_PXA168_GPU 8
-#define IRQ_PXA168_KEYPAD 9
-#define IRQ_PXA168_ONEWIRE 12
-#define IRQ_PXA168_TIMER1 13
-#define IRQ_PXA168_TIMER2 14
-#define IRQ_PXA168_TIMER3 15
-#define IRQ_PXA168_CMU 16
-#define IRQ_PXA168_SSP5 17
-#define IRQ_PXA168_MSP_WAKEUP 19
-#define IRQ_PXA168_CF_WAKEUP 20
-#define IRQ_PXA168_XD_WAKEUP 21
-#define IRQ_PXA168_MFU 22
-#define IRQ_PXA168_MSP 23
-#define IRQ_PXA168_CF 24
-#define IRQ_PXA168_XD 25
-#define IRQ_PXA168_DDR_INT 26
-#define IRQ_PXA168_UART1 27
-#define IRQ_PXA168_UART2 28
-#define IRQ_PXA168_UART3 29
-#define IRQ_PXA168_WDT 35
-#define IRQ_PXA168_MAIN_PMU 36
-#define IRQ_PXA168_FRQ_CHANGE 38
-#define IRQ_PXA168_SDH1 39
-#define IRQ_PXA168_SDH2 40
-#define IRQ_PXA168_LCD 41
-#define IRQ_PXA168_CI 42
-#define IRQ_PXA168_USB1 44
-#define IRQ_PXA168_NAND 45
-#define IRQ_PXA168_HIFI_DMA 46
-#define IRQ_PXA168_DMA_INT0 47
-#define IRQ_PXA168_DMA_INT1 48
-#define IRQ_PXA168_GPIOX 49
-#define IRQ_PXA168_USB2 51
-#define IRQ_PXA168_AC97 57
-#define IRQ_PXA168_TWSI1 58
-#define IRQ_PXA168_AP_PMU 60
-#define IRQ_PXA168_SM_INT 63
-
/*
* Interrupt numbers for PXA910
*/
@@ -114,127 +64,4 @@
#define IRQ_PXA910_AP_PMU 60
#define IRQ_PXA910_SM_INT 63 /* from PinMux */
-/*
- * Interrupt numbers for MMP2
- */
-#define IRQ_MMP2_NONE (-1)
-#define IRQ_MMP2_SSP1 0
-#define IRQ_MMP2_SSP2 1
-#define IRQ_MMP2_SSPA1 2
-#define IRQ_MMP2_SSPA2 3
-#define IRQ_MMP2_PMIC_MUX 4 /* PMIC & Charger */
-#define IRQ_MMP2_RTC_MUX 5
-#define IRQ_MMP2_TWSI1 7
-#define IRQ_MMP2_GPU 8
-#define IRQ_MMP2_KEYPAD_MUX 9
-#define IRQ_MMP2_ROTARY 10
-#define IRQ_MMP2_TRACKBALL 11
-#define IRQ_MMP2_ONEWIRE 12
-#define IRQ_MMP2_TIMER1 13
-#define IRQ_MMP2_TIMER2 14
-#define IRQ_MMP2_TIMER3 15
-#define IRQ_MMP2_RIPC 16
-#define IRQ_MMP2_TWSI_MUX 17 /* TWSI2 ~ TWSI6 */
-#define IRQ_MMP2_HDMI 19
-#define IRQ_MMP2_SSP3 20
-#define IRQ_MMP2_SSP4 21
-#define IRQ_MMP2_USB_HS1 22
-#define IRQ_MMP2_USB_HS2 23
-#define IRQ_MMP2_UART3 24
-#define IRQ_MMP2_UART1 27
-#define IRQ_MMP2_UART2 28
-#define IRQ_MMP2_MIPI_DSI 29
-#define IRQ_MMP2_CI2 30
-#define IRQ_MMP2_PMU_TIMER1 31
-#define IRQ_MMP2_PMU_TIMER2 32
-#define IRQ_MMP2_PMU_TIMER3 33
-#define IRQ_MMP2_USB_FS 34
-#define IRQ_MMP2_MISC_MUX 35
-#define IRQ_MMP2_WDT1 36
-#define IRQ_MMP2_NAND_DMA 37
-#define IRQ_MMP2_USIM 38
-#define IRQ_MMP2_MMC 39
-#define IRQ_MMP2_WTM 40
-#define IRQ_MMP2_LCD 41
-#define IRQ_MMP2_CI 42
-#define IRQ_MMP2_IRE 43
-#define IRQ_MMP2_USB_OTG 44
-#define IRQ_MMP2_NAND 45
-#define IRQ_MMP2_UART4 46
-#define IRQ_MMP2_DMA_FIQ 47
-#define IRQ_MMP2_DMA_RIQ 48
-#define IRQ_MMP2_GPIO 49
-#define IRQ_MMP2_MIPI_HSI1_MUX 51
-#define IRQ_MMP2_MMC2 52
-#define IRQ_MMP2_MMC3 53
-#define IRQ_MMP2_MMC4 54
-#define IRQ_MMP2_MIPI_HSI0_MUX 55
-#define IRQ_MMP2_MSP 58
-#define IRQ_MMP2_MIPI_SLIM_DMA 59
-#define IRQ_MMP2_PJ4_FREQ_CHG 60
-#define IRQ_MMP2_MIPI_SLIM 62
-#define IRQ_MMP2_SM 63
-
-#define IRQ_MMP2_MUX_BASE 64
-
-/* secondary interrupt of INT #4 */
-#define IRQ_MMP2_PMIC_BASE (IRQ_MMP2_MUX_BASE)
-#define IRQ_MMP2_CHARGER (IRQ_MMP2_PMIC_BASE + 0)
-#define IRQ_MMP2_PMIC (IRQ_MMP2_PMIC_BASE + 1)
-
-/* secondary interrupt of INT #5 */
-#define IRQ_MMP2_RTC_BASE (IRQ_MMP2_PMIC_BASE + 2)
-#define IRQ_MMP2_RTC_ALARM (IRQ_MMP2_RTC_BASE + 0)
-#define IRQ_MMP2_RTC (IRQ_MMP2_RTC_BASE + 1)
-
-/* secondary interrupt of INT #9 */
-#define IRQ_MMP2_KEYPAD_BASE (IRQ_MMP2_RTC_BASE + 2)
-#define IRQ_MMP2_KPC (IRQ_MMP2_KEYPAD_BASE + 0)
-#define IRQ_MMP2_ROTORY (IRQ_MMP2_KEYPAD_BASE + 1)
-#define IRQ_MMP2_TBALL (IRQ_MMP2_KEYPAD_BASE + 2)
-
-/* secondary interrupt of INT #17 */
-#define IRQ_MMP2_TWSI_BASE (IRQ_MMP2_KEYPAD_BASE + 3)
-#define IRQ_MMP2_TWSI2 (IRQ_MMP2_TWSI_BASE + 0)
-#define IRQ_MMP2_TWSI3 (IRQ_MMP2_TWSI_BASE + 1)
-#define IRQ_MMP2_TWSI4 (IRQ_MMP2_TWSI_BASE + 2)
-#define IRQ_MMP2_TWSI5 (IRQ_MMP2_TWSI_BASE + 3)
-#define IRQ_MMP2_TWSI6 (IRQ_MMP2_TWSI_BASE + 4)
-
-/* secondary interrupt of INT #35 */
-#define IRQ_MMP2_MISC_BASE (IRQ_MMP2_TWSI_BASE + 5)
-#define IRQ_MMP2_PERF (IRQ_MMP2_MISC_BASE + 0)
-#define IRQ_MMP2_L2_PA_ECC (IRQ_MMP2_MISC_BASE + 1)
-#define IRQ_MMP2_L2_ECC (IRQ_MMP2_MISC_BASE + 2)
-#define IRQ_MMP2_L2_UECC (IRQ_MMP2_MISC_BASE + 3)
-#define IRQ_MMP2_DDR (IRQ_MMP2_MISC_BASE + 4)
-#define IRQ_MMP2_FAB0_TIMEOUT (IRQ_MMP2_MISC_BASE + 5)
-#define IRQ_MMP2_FAB1_TIMEOUT (IRQ_MMP2_MISC_BASE + 6)
-#define IRQ_MMP2_FAB2_TIMEOUT (IRQ_MMP2_MISC_BASE + 7)
-#define IRQ_MMP2_THERMAL (IRQ_MMP2_MISC_BASE + 9)
-#define IRQ_MMP2_MAIN_PMU (IRQ_MMP2_MISC_BASE + 10)
-#define IRQ_MMP2_WDT2 (IRQ_MMP2_MISC_BASE + 11)
-#define IRQ_MMP2_CORESIGHT (IRQ_MMP2_MISC_BASE + 12)
-#define IRQ_MMP2_COMMTX (IRQ_MMP2_MISC_BASE + 13)
-#define IRQ_MMP2_COMMRX (IRQ_MMP2_MISC_BASE + 14)
-
-/* secondary interrupt of INT #51 */
-#define IRQ_MMP2_MIPI_HSI1_BASE (IRQ_MMP2_MISC_BASE + 15)
-#define IRQ_MMP2_HSI1_CAWAKE (IRQ_MMP2_MIPI_HSI1_BASE + 0)
-#define IRQ_MMP2_MIPI_HSI_INT1 (IRQ_MMP2_MIPI_HSI1_BASE + 1)
-
-/* secondary interrupt of INT #55 */
-#define IRQ_MMP2_MIPI_HSI0_BASE (IRQ_MMP2_MIPI_HSI1_BASE + 2)
-#define IRQ_MMP2_HSI0_CAWAKE (IRQ_MMP2_MIPI_HSI0_BASE + 0)
-#define IRQ_MMP2_MIPI_HSI_INT0 (IRQ_MMP2_MIPI_HSI0_BASE + 1)
-
-#define IRQ_MMP2_MUX_END (IRQ_MMP2_MIPI_HSI0_BASE + 2)
-
-#define IRQ_GPIO_START 128
-#define MMP_NR_BUILTIN_GPIO 192
-#define MMP_GPIO_TO_IRQ(gpio) (IRQ_GPIO_START + (gpio))
-
-#define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
-#define MMP_NR_IRQS IRQ_BOARD_START
-
#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/mfp.h b/arch/arm/mach-mmp/mfp.h
deleted file mode 100644
index 6f3057987756..000000000000
--- a/arch/arm/mach-mmp/mfp.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_MFP_H
-#define __ASM_MACH_MFP_H
-
-#include <linux/soc/pxa/mfp.h>
-
-/*
- * NOTE: the MFPR register bit definitions on PXA168 processor lines are a
- * bit different from those on PXA3xx. Bit [7:10] are now reserved, which
- * were SLEEP_OE_N, SLEEP_DATA, SLEEP_SEL and the LSB of DRIVE bits.
- *
- * To cope with this difference and re-use the pxa3xx mfp code as much as
- * possible, we make the following compromise:
- *
- * 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT)
- * 2. DRIVE strength definitions redefined to include the reserved bit
- * - the reserved bit differs between pxa168 and pxa910, and the
- * MFP_DRIVE_* macros are individually defined in mfp-pxa{168,910}.h
- * 3. Override MFP_CFG() and MFP_CFG_DRV()
- * 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X()
- */
-
-#undef MFP_CFG
-#undef MFP_CFG_DRV
-#undef MFP_CFG_LPM
-#undef MFP_CFG_X
-#undef MFP_CFG_DEFAULT
-
-#define MFP_CFG(pin, af) \
- (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM)
-
-#define MFP_CFG_DRV(pin, af, drv) \
- (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv)
-
-#endif /* __ASM_MACH_MFP_H */
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index bbc4c2274de3..8ee6a4547731 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -19,11 +19,8 @@
#include <asm/mach/time.h>
#include "addr-map.h"
-#include "regs-apbc.h"
#include <linux/soc/mmp/cputype.h>
-#include "irqs.h"
-#include "mfp.h"
-#include "devices.h"
+#include <linux/soc/pxa/mfp.h>
#include "mmp2.h"
#include "pm-mmp2.h"
@@ -91,14 +88,6 @@ void mmp2_clear_pmic_int(void)
__raw_writel(data, mfpr_pmic);
}
-void __init mmp2_init_irq(void)
-{
- mmp2_init_icu();
-#ifdef CONFIG_PM
- icu_irq_chip.irq_set_wake = mmp2_set_wake;
-#endif
-}
-
static int __init mmp2_init(void)
{
if (cpu_is_mmp2()) {
@@ -115,61 +104,3 @@ static int __init mmp2_init(void)
return 0;
}
postcore_initcall(mmp2_init);
-
-#define APBC_TIMERS APBC_REG(0x024)
-
-void __init mmp2_timer_init(void)
-{
- unsigned long clk_rst;
-
- __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
-
- /*
- * enable bus/functional clock, enable 6.5MHz (divider 4),
- * release reset
- */
- clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
- __raw_writel(clk_rst, APBC_TIMERS);
-
- mmp_timer_init(IRQ_MMP2_TIMER1, 6500000);
-}
-
-/* on-chip devices */
-MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
-MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
-MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23);
-MMP2_DEVICE(uart4, "pxa2xx-uart", 3, UART4, 0xd4016000, 0x30, 18, 19);
-MMP2_DEVICE(twsi1, "pxa2xx-i2c", 0, TWSI1, 0xd4011000, 0x70);
-MMP2_DEVICE(twsi2, "pxa2xx-i2c", 1, TWSI2, 0xd4031000, 0x70);
-MMP2_DEVICE(twsi3, "pxa2xx-i2c", 2, TWSI3, 0xd4032000, 0x70);
-MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70);
-MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70);
-MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70);
-MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29);
-MMP2_DEVICE(sdh0, "sdhci-pxav3", 0, MMC, 0xd4280000, 0x120);
-MMP2_DEVICE(sdh1, "sdhci-pxav3", 1, MMC2, 0xd4280800, 0x120);
-MMP2_DEVICE(sdh2, "sdhci-pxav3", 2, MMC3, 0xd4281000, 0x120);
-MMP2_DEVICE(sdh3, "sdhci-pxav3", 3, MMC4, 0xd4281800, 0x120);
-MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000);
-/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */
-MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000);
-
-struct resource mmp2_resource_gpio[] = {
- {
- .start = 0xd4019000,
- .end = 0xd4019fff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_MMP2_GPIO,
- .end = IRQ_MMP2_GPIO,
- .name = "gpio_mux",
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device mmp2_device_gpio = {
- .name = "mmp2-gpio",
- .id = -1,
- .num_resources = ARRAY_SIZE(mmp2_resource_gpio),
- .resource = mmp2_resource_gpio,
-};
diff --git a/arch/arm/mach-mmp/mmp2.h b/arch/arm/mach-mmp/mmp2.h
index 5c80836aea76..6616d3f7a0ac 100644
--- a/arch/arm/mach-mmp/mmp2.h
+++ b/arch/arm/mach-mmp/mmp2.h
@@ -2,90 +2,7 @@
#ifndef __ASM_MACH_MMP2_H
#define __ASM_MACH_MMP2_H
-#include <linux/platform_data/pxa_sdhci.h>
-
-extern void mmp2_timer_init(void);
-extern void __init mmp2_init_irq(void);
extern void mmp2_clear_pmic_int(void);
-#include <linux/i2c.h>
-#include <linux/platform_data/i2c-pxa.h>
-#include <linux/irqchip/mmp.h>
-
-#include "devices.h"
-
-extern struct mmp_device_desc mmp2_device_uart1;
-extern struct mmp_device_desc mmp2_device_uart2;
-extern struct mmp_device_desc mmp2_device_uart3;
-extern struct mmp_device_desc mmp2_device_uart4;
-extern struct mmp_device_desc mmp2_device_twsi1;
-extern struct mmp_device_desc mmp2_device_twsi2;
-extern struct mmp_device_desc mmp2_device_twsi3;
-extern struct mmp_device_desc mmp2_device_twsi4;
-extern struct mmp_device_desc mmp2_device_twsi5;
-extern struct mmp_device_desc mmp2_device_twsi6;
-extern struct mmp_device_desc mmp2_device_sdh0;
-extern struct mmp_device_desc mmp2_device_sdh1;
-extern struct mmp_device_desc mmp2_device_sdh2;
-extern struct mmp_device_desc mmp2_device_sdh3;
-
-extern struct platform_device mmp2_device_gpio;
-
-static inline int mmp2_add_uart(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &mmp2_device_uart1; break;
- case 2: d = &mmp2_device_uart2; break;
- case 3: d = &mmp2_device_uart3; break;
- case 4: d = &mmp2_device_uart4; break;
- default:
- return -EINVAL;
- }
-
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
- struct i2c_board_info *info, unsigned size)
-{
- struct mmp_device_desc *d = NULL;
- int ret;
-
- switch (id) {
- case 1: d = &mmp2_device_twsi1; break;
- case 2: d = &mmp2_device_twsi2; break;
- case 3: d = &mmp2_device_twsi3; break;
- case 4: d = &mmp2_device_twsi4; break;
- case 5: d = &mmp2_device_twsi5; break;
- case 6: d = &mmp2_device_twsi6; break;
- default:
- return -EINVAL;
- }
-
- ret = i2c_register_board_info(id - 1, info, size);
- if (ret)
- return ret;
-
- return mmp_register_device(d, data, sizeof(*data));
-}
-
-static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 0: d = &mmp2_device_sdh0; break;
- case 1: d = &mmp2_device_sdh1; break;
- case 2: d = &mmp2_device_sdh2; break;
- case 3: d = &mmp2_device_sdh3; break;
- default:
- return -EINVAL;
- }
-
- return mmp_register_device(d, data, sizeof(*data));
-}
-
#endif /* __ASM_MACH_MMP2_H */
diff --git a/arch/arm/mach-mmp/pm-mmp2.c b/arch/arm/mach-mmp/pm-mmp2.c
index 7a6f74c32d42..bd6563962d77 100644
--- a/arch/arm/mach-mmp/pm-mmp2.c
+++ b/arch/arm/mach-mmp/pm-mmp2.c
@@ -21,40 +21,6 @@
#include "addr-map.h"
#include "pm-mmp2.h"
#include "regs-icu.h"
-#include "irqs.h"
-
-int mmp2_set_wake(struct irq_data *d, unsigned int on)
-{
- unsigned long data = 0;
- int irq = d->irq;
-
- /* enable wakeup sources */
- switch (irq) {
- case IRQ_MMP2_RTC:
- case IRQ_MMP2_RTC_ALARM:
- data = MPMU_WUCRM_PJ_WAKEUP(4) | MPMU_WUCRM_PJ_RTC_ALARM;
- break;
- case IRQ_MMP2_PMIC:
- data = MPMU_WUCRM_PJ_WAKEUP(7);
- break;
- case IRQ_MMP2_MMC2:
- /* mmc use WAKEUP2, same as GPIO wakeup source */
- data = MPMU_WUCRM_PJ_WAKEUP(2);
- break;
- }
- if (on) {
- if (data) {
- data |= __raw_readl(MPMU_WUCRM_PJ);
- __raw_writel(data, MPMU_WUCRM_PJ);
- }
- } else {
- if (data) {
- data = ~data & __raw_readl(MPMU_WUCRM_PJ);
- __raw_writel(data, MPMU_WUCRM_PJ);
- }
- }
- return 0;
-}
static void pm_scu_clk_disable(void)
{
diff --git a/arch/arm/mach-mmp/pm-mmp2.h b/arch/arm/mach-mmp/pm-mmp2.h
index 70299a9450d3..70cff8bf0cc8 100644
--- a/arch/arm/mach-mmp/pm-mmp2.h
+++ b/arch/arm/mach-mmp/pm-mmp2.h
@@ -55,5 +55,5 @@ enum {
};
extern void mmp2_pm_enter_lowpower_mode(int state);
-extern int mmp2_set_wake(struct irq_data *d, unsigned int on);
+
#endif
diff --git a/arch/arm/mach-mmp/pm-pxa910.c b/arch/arm/mach-mmp/pm-pxa910.c
index 1d71d73c1862..f6ba6db0aa36 100644
--- a/arch/arm/mach-mmp/pm-pxa910.c
+++ b/arch/arm/mach-mmp/pm-pxa910.c
@@ -22,112 +22,6 @@
#include "addr-map.h"
#include "pm-pxa910.h"
#include "regs-icu.h"
-#include "irqs.h"
-
-int pxa910_set_wake(struct irq_data *data, unsigned int on)
-{
- uint32_t awucrm = 0, apcr = 0;
- int irq = data->irq;
-
- /* setting wakeup sources */
- switch (irq) {
- /* wakeup line 2 */
- case IRQ_PXA910_AP_GPIO:
- awucrm = MPMU_AWUCRM_WAKEUP(2);
- apcr |= MPMU_APCR_SLPWP2;
- break;
- /* wakeup line 3 */
- case IRQ_PXA910_KEYPAD:
- awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_KEYPRESS;
- apcr |= MPMU_APCR_SLPWP3;
- break;
- case IRQ_PXA910_ROTARY:
- awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_NEWROTARY;
- apcr |= MPMU_APCR_SLPWP3;
- break;
- case IRQ_PXA910_TRACKBALL:
- awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_TRACKBALL;
- apcr |= MPMU_APCR_SLPWP3;
- break;
- /* wakeup line 4 */
- case IRQ_PXA910_AP1_TIMER1:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_1;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_AP1_TIMER2:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_2;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_AP1_TIMER3:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_3;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_AP2_TIMER1:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_1;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_AP2_TIMER2:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_2;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_AP2_TIMER3:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_3;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_RTC_ALARM:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_RTC_ALARM;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- /* wakeup line 5 */
- case IRQ_PXA910_USB1:
- case IRQ_PXA910_USB2:
- awucrm = MPMU_AWUCRM_WAKEUP(5);
- apcr |= MPMU_APCR_SLPWP5;
- break;
- /* wakeup line 6 */
- case IRQ_PXA910_MMC:
- awucrm = MPMU_AWUCRM_WAKEUP(6)
- | MPMU_AWUCRM_SDH1
- | MPMU_AWUCRM_SDH2;
- apcr |= MPMU_APCR_SLPWP6;
- break;
- /* wakeup line 7 */
- case IRQ_PXA910_PMIC_INT:
- awucrm = MPMU_AWUCRM_WAKEUP(7);
- apcr |= MPMU_APCR_SLPWP7;
- break;
- default:
- if (irq >= IRQ_GPIO_START && irq < IRQ_BOARD_START) {
- awucrm = MPMU_AWUCRM_WAKEUP(2);
- apcr |= MPMU_APCR_SLPWP2;
- } else {
- /* FIXME: This should return a proper error code ! */
- printk(KERN_ERR "Error: no defined wake up source irq: %d\n",
- irq);
- }
- }
-
- if (on) {
- if (awucrm) {
- awucrm |= __raw_readl(MPMU_AWUCRM);
- __raw_writel(awucrm, MPMU_AWUCRM);
- }
- if (apcr) {
- apcr = ~apcr & __raw_readl(MPMU_APCR);
- __raw_writel(apcr, MPMU_APCR);
- }
- } else {
- if (awucrm) {
- awucrm = ~awucrm & __raw_readl(MPMU_AWUCRM);
- __raw_writel(awucrm, MPMU_AWUCRM);
- }
- if (apcr) {
- apcr |= __raw_readl(MPMU_APCR);
- __raw_writel(apcr, MPMU_APCR);
- }
- }
- return 0;
-}
void pxa910_pm_enter_lowpower_mode(int state)
{
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 1e9389245d0e..565d4a6c3bd5 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -12,7 +12,6 @@
#include <linux/clk.h>
#include <linux/clk/mmp.h>
#include <linux/platform_device.h>
-#include <linux/platform_data/mv_usb.h>
#include <linux/dma-mapping.h>
#include <asm/mach/time.h>
@@ -21,13 +20,9 @@
#include "addr-map.h"
#include "common.h"
#include <linux/soc/mmp/cputype.h>
+#include <linux/soc/pxa/mfp.h>
#include "devices.h"
-#include "irqs.h"
-#include "mfp.h"
#include "pxa168.h"
-#include "regs-apbc.h"
-#include "regs-apmu.h"
-#include "regs-usb.h"
#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
@@ -41,11 +36,6 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
MFP_ADDR_END,
};
-void __init pxa168_init_irq(void)
-{
- icu_init_irq();
-}
-
static int __init pxa168_init(void)
{
if (cpu_is_pxa168()) {
@@ -59,117 +49,3 @@ static int __init pxa168_init(void)
return 0;
}
postcore_initcall(pxa168_init);
-
-/* system timer - clock enabled, 3.25MHz */
-#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
-#define APBC_TIMERS APBC_REG(0x34)
-
-void __init pxa168_timer_init(void)
-{
- /* this is early, we have to initialize the CCU registers by
- * ourselves instead of using clk_* API. Clock rate is defined
- * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
- */
- __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
-
- /* 3.25MHz, bus/functional clock enabled, release reset */
- __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
-
- mmp_timer_init(IRQ_PXA168_TIMER1, 3250000);
-}
-
-void pxa168_clear_keypad_wakeup(void)
-{
- uint32_t val;
- uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
-
- /* wake event clear is needed in order to clear keypad interrupt */
- val = __raw_readl(APMU_WAKE_CLR);
- __raw_writel(val | mask, APMU_WAKE_CLR);
-}
-
-/* on-chip devices */
-PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
-PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
-PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
-PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
-PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
-PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
-PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
-PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
-PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
-PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
-PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
-PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
-PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
-PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
-PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
-PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
-PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
-PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
-
-struct resource pxa168_resource_gpio[] = {
- {
- .start = 0xd4019000,
- .end = 0xd4019fff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_PXA168_GPIOX,
- .end = IRQ_PXA168_GPIOX,
- .name = "gpio_mux",
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa168_device_gpio = {
- .name = "mmp-gpio",
- .id = -1,
- .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
- .resource = pxa168_resource_gpio,
-};
-
-struct resource pxa168_usb_host_resources[] = {
- /* USB Host conroller register base */
- [0] = {
- .start = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
- .end = PXA168_U2H_REGBASE + USB_REG_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "capregs",
- },
- /* USB PHY register base */
- [1] = {
- .start = PXA168_U2H_PHYBASE,
- .end = PXA168_U2H_PHYBASE + USB_PHY_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "phyregs",
- },
- [2] = {
- .start = IRQ_PXA168_USB2,
- .end = IRQ_PXA168_USB2,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
-struct platform_device pxa168_device_usb_host = {
- .name = "pxa-sph",
- .id = -1,
- .dev = {
- .dma_mask = &pxa168_usb_host_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-
- .num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
- .resource = pxa168_usb_host_resources,
-};
-
-int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
-{
- pxa168_device_usb_host.dev.platform_data = pdata;
- return platform_device_register(&pxa168_device_usb_host);
-}
-
-void pxa168_restart(enum reboot_mode mode, const char *cmd)
-{
- soft_restart(0xffff0000);
-}
diff --git a/arch/arm/mach-mmp/pxa168.h b/arch/arm/mach-mmp/pxa168.h
index c1547e098f09..279783ef239d 100644
--- a/arch/arm/mach-mmp/pxa168.h
+++ b/arch/arm/mach-mmp/pxa168.h
@@ -10,130 +10,7 @@ extern void pxa168_restart(enum reboot_mode, const char *);
extern void pxa168_clear_keypad_wakeup(void);
#include <linux/i2c.h>
-#include <linux/platform_data/i2c-pxa.h>
-#include <linux/platform_data/mtd-nand-pxa3xx.h>
-#include <video/pxa168fb.h>
-#include <linux/platform_data/keypad-pxa27x.h>
-#include <linux/pxa168_eth.h>
-#include <linux/platform_data/mv_usb.h>
#include <linux/soc/mmp/cputype.h>
#include <linux/irqchip/mmp.h>
-#include "devices.h"
-
-extern struct mmp_device_desc pxa168_device_uart1;
-extern struct mmp_device_desc pxa168_device_uart2;
-extern struct mmp_device_desc pxa168_device_uart3;
-extern struct mmp_device_desc pxa168_device_twsi0;
-extern struct mmp_device_desc pxa168_device_twsi1;
-extern struct mmp_device_desc pxa168_device_pwm1;
-extern struct mmp_device_desc pxa168_device_pwm2;
-extern struct mmp_device_desc pxa168_device_pwm3;
-extern struct mmp_device_desc pxa168_device_pwm4;
-extern struct mmp_device_desc pxa168_device_ssp1;
-extern struct mmp_device_desc pxa168_device_ssp2;
-extern struct mmp_device_desc pxa168_device_ssp3;
-extern struct mmp_device_desc pxa168_device_ssp4;
-extern struct mmp_device_desc pxa168_device_ssp5;
-extern struct mmp_device_desc pxa168_device_nand;
-extern struct mmp_device_desc pxa168_device_fb;
-extern struct mmp_device_desc pxa168_device_keypad;
-extern struct mmp_device_desc pxa168_device_eth;
-
-/* pdata can be NULL */
-extern int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata);
-
-
-extern struct platform_device pxa168_device_gpio;
-
-static inline int pxa168_add_uart(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &pxa168_device_uart1; break;
- case 2: d = &pxa168_device_uart2; break;
- case 3: d = &pxa168_device_uart3; break;
- }
-
- if (d == NULL)
- return -EINVAL;
-
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int pxa168_add_twsi(int id, struct i2c_pxa_platform_data *data,
- struct i2c_board_info *info, unsigned size)
-{
- struct mmp_device_desc *d = NULL;
- int ret;
-
- switch (id) {
- case 0: d = &pxa168_device_twsi0; break;
- case 1: d = &pxa168_device_twsi1; break;
- default:
- return -EINVAL;
- }
-
- ret = i2c_register_board_info(id, info, size);
- if (ret)
- return ret;
-
- return mmp_register_device(d, data, sizeof(*data));
-}
-
-static inline int pxa168_add_pwm(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &pxa168_device_pwm1; break;
- case 2: d = &pxa168_device_pwm2; break;
- case 3: d = &pxa168_device_pwm3; break;
- case 4: d = &pxa168_device_pwm4; break;
- default:
- return -EINVAL;
- }
-
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int pxa168_add_ssp(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &pxa168_device_ssp1; break;
- case 2: d = &pxa168_device_ssp2; break;
- case 3: d = &pxa168_device_ssp3; break;
- case 4: d = &pxa168_device_ssp4; break;
- case 5: d = &pxa168_device_ssp5; break;
- default:
- return -EINVAL;
- }
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info)
-{
- return mmp_register_device(&pxa168_device_nand, info, sizeof(*info));
-}
-
-static inline int pxa168_add_fb(struct pxa168fb_mach_info *mi)
-{
- return mmp_register_device(&pxa168_device_fb, mi, sizeof(*mi));
-}
-
-static inline int pxa168_add_keypad(struct pxa27x_keypad_platform_data *data)
-{
- if (cpu_is_pxa168())
- data->clear_wakeup_event = pxa168_clear_keypad_wakeup;
-
- return mmp_register_device(&pxa168_device_keypad, data, sizeof(*data));
-}
-
-static inline int pxa168_add_eth(struct pxa168_eth_platform_data *data)
-{
- return mmp_register_device(&pxa168_device_eth, data, sizeof(*data));
-}
#endif /* __ASM_MACH_PXA168_H */
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index b19a069d9fab..f389b99cd9bd 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -17,13 +17,10 @@
#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/time.h>
#include "addr-map.h"
-#include "regs-apbc.h"
#include <linux/soc/mmp/cputype.h>
+#include <linux/soc/pxa/mfp.h>
#include "irqs.h"
-#include "mfp.h"
-#include "devices.h"
#include "pm-pxa910.h"
-#include "pxa910.h"
#include "common.h"
@@ -77,14 +74,6 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
MFP_ADDR_END,
};
-void __init pxa910_init_irq(void)
-{
- icu_init_irq();
-#ifdef CONFIG_PM
- icu_irq_chip.irq_set_wake = pxa910_set_wake;
-#endif
-}
-
static int __init pxa910_init(void)
{
if (cpu_is_pxa910()) {
@@ -102,89 +91,3 @@ static int __init pxa910_init(void)
return 0;
}
postcore_initcall(pxa910_init);
-
-/* system timer - clock enabled, 3.25MHz */
-#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
-#define APBC_TIMERS APBC_REG(0x34)
-
-void __init pxa910_timer_init(void)
-{
- /* reset and configure */
- __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
- __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
-
- mmp_timer_init(IRQ_PXA910_AP1_TIMER1, 3250000);
-}
-
-/* on-chip devices */
-
-/* NOTE: there are totally 3 UARTs on PXA910:
- *
- * UART1 - Slow UART (can be used both by AP and CP)
- * UART2/3 - Fast UART
- *
- * To be backward compatible with the legacy FFUART/BTUART/STUART sequence,
- * they are re-ordered as:
- *
- * pxa910_device_uart1 - UART2 as FFUART
- * pxa910_device_uart2 - UART3 as BTUART
- *
- * UART1 is not used by AP for the moment.
- */
-PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
-PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
-PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
-PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
-PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
-PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
-PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
-PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
-PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
-PXA910_DEVICE(disp, "mmp-disp", 0, LCD, 0xd420b000, 0x1ec);
-PXA910_DEVICE(fb, "mmp-fb", -1, NONE, 0, 0);
-PXA910_DEVICE(panel, "tpo-hvga", -1, NONE, 0, 0);
-
-struct resource pxa910_resource_gpio[] = {
- {
- .start = 0xd4019000,
- .end = 0xd4019fff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_PXA910_AP_GPIO,
- .end = IRQ_PXA910_AP_GPIO,
- .name = "gpio_mux",
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa910_device_gpio = {
- .name = "mmp-gpio",
- .id = -1,
- .num_resources = ARRAY_SIZE(pxa910_resource_gpio),
- .resource = pxa910_resource_gpio,
-};
-
-static struct resource pxa910_resource_rtc[] = {
- {
- .start = 0xd4010000,
- .end = 0xd401003f,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_PXA910_RTC_INT,
- .end = IRQ_PXA910_RTC_INT,
- .name = "rtc 1Hz",
- .flags = IORESOURCE_IRQ,
- }, {
- .start = IRQ_PXA910_RTC_ALARM,
- .end = IRQ_PXA910_RTC_ALARM,
- .name = "rtc alarm",
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa910_device_rtc = {
- .name = "sa1100-rtc",
- .id = -1,
- .num_resources = ARRAY_SIZE(pxa910_resource_rtc),
- .resource = pxa910_resource_rtc,
-};
diff --git a/arch/arm/mach-mmp/pxa910.h b/arch/arm/mach-mmp/pxa910.h
index 7d229214065a..66a691d89ae1 100644
--- a/arch/arm/mach-mmp/pxa910.h
+++ b/arch/arm/mach-mmp/pxa910.h
@@ -6,85 +6,6 @@ extern void pxa910_timer_init(void);
extern void __init pxa910_init_irq(void);
#include <linux/i2c.h>
-#include <linux/platform_data/i2c-pxa.h>
-#include <linux/platform_data/mtd-nand-pxa3xx.h>
-#include <video/mmp_disp.h>
#include <linux/irqchip/mmp.h>
-#include "devices.h"
-
-extern struct mmp_device_desc pxa910_device_uart1;
-extern struct mmp_device_desc pxa910_device_uart2;
-extern struct mmp_device_desc pxa910_device_twsi0;
-extern struct mmp_device_desc pxa910_device_twsi1;
-extern struct mmp_device_desc pxa910_device_pwm1;
-extern struct mmp_device_desc pxa910_device_pwm2;
-extern struct mmp_device_desc pxa910_device_pwm3;
-extern struct mmp_device_desc pxa910_device_pwm4;
-extern struct mmp_device_desc pxa910_device_nand;
-extern struct platform_device pxa168_device_usb_phy;
-extern struct platform_device pxa168_device_u2o;
-extern struct platform_device pxa168_device_u2ootg;
-extern struct platform_device pxa168_device_u2oehci;
-extern struct mmp_device_desc pxa910_device_disp;
-extern struct mmp_device_desc pxa910_device_fb;
-extern struct mmp_device_desc pxa910_device_panel;
-extern struct platform_device pxa910_device_gpio;
-extern struct platform_device pxa910_device_rtc;
-
-static inline int pxa910_add_uart(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &pxa910_device_uart1; break;
- case 2: d = &pxa910_device_uart2; break;
- }
-
- if (d == NULL)
- return -EINVAL;
-
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int pxa910_add_twsi(int id, struct i2c_pxa_platform_data *data,
- struct i2c_board_info *info, unsigned size)
-{
- struct mmp_device_desc *d = NULL;
- int ret;
-
- switch (id) {
- case 0: d = &pxa910_device_twsi0; break;
- case 1: d = &pxa910_device_twsi1; break;
- default:
- return -EINVAL;
- }
-
- ret = i2c_register_board_info(id, info, size);
- if (ret)
- return ret;
-
- return mmp_register_device(d, data, sizeof(*data));
-}
-
-static inline int pxa910_add_pwm(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &pxa910_device_pwm1; break;
- case 2: d = &pxa910_device_pwm2; break;
- case 3: d = &pxa910_device_pwm3; break;
- case 4: d = &pxa910_device_pwm4; break;
- default:
- return -EINVAL;
- }
-
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int pxa910_add_nand(struct pxa3xx_nand_platform_data *info)
-{
- return mmp_register_device(&pxa910_device_nand, info, sizeof(*info));
-}
#endif /* __ASM_MACH_PXA910_H */
diff --git a/arch/arm/mach-mmp/regs-apbc.h b/arch/arm/mach-mmp/regs-apbc.h
deleted file mode 100644
index d0d00c2cce38..000000000000
--- a/arch/arm/mach-mmp/regs-apbc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Application Peripheral Bus Clock Unit
- */
-
-#ifndef __ASM_MACH_REGS_APBC_H
-#define __ASM_MACH_REGS_APBC_H
-
-#include "addr-map.h"
-
-/* Common APB clock register bit definitions */
-#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */
-#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */
-#define APBC_RST (1 << 2) /* Reset Generation */
-
-/* Functional Clock Selection Mask */
-#define APBC_FNCLKSEL(x) (((x) & 0xf) << 4)
-
-#endif /* __ASM_MACH_REGS_APBC_H */
diff --git a/arch/arm/mach-mmp/regs-apmu.h b/arch/arm/mach-mmp/regs-apmu.h
deleted file mode 100644
index e36f6503adfb..000000000000
--- a/arch/arm/mach-mmp/regs-apmu.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Application Subsystem Power Management Unit
- */
-
-#ifndef __ASM_MACH_REGS_APMU_H
-#define __ASM_MACH_REGS_APMU_H
-
-#include "addr-map.h"
-
-#define APMU_FNCLK_EN (1 << 4)
-#define APMU_AXICLK_EN (1 << 3)
-#define APMU_FNRST_DIS (1 << 1)
-#define APMU_AXIRST_DIS (1 << 0)
-
-/* Wake Clear Register */
-#define APMU_WAKE_CLR APMU_REG(0x07c)
-
-#define APMU_PXA168_KP_WAKE_CLR (1 << 7)
-#define APMU_PXA168_CFI_WAKE_CLR (1 << 6)
-#define APMU_PXA168_XD_WAKE_CLR (1 << 5)
-#define APMU_PXA168_MSP_WAKE_CLR (1 << 4)
-#define APMU_PXA168_SD4_WAKE_CLR (1 << 3)
-#define APMU_PXA168_SD3_WAKE_CLR (1 << 2)
-#define APMU_PXA168_SD2_WAKE_CLR (1 << 1)
-#define APMU_PXA168_SD1_WAKE_CLR (1 << 0)
-
-#endif /* __ASM_MACH_REGS_APMU_H */
diff --git a/arch/arm/mach-mmp/regs-timers.h b/arch/arm/mach-mmp/regs-timers.h
index a69f4d7e3443..0cc4aca40e2c 100644
--- a/arch/arm/mach-mmp/regs-timers.h
+++ b/arch/arm/mach-mmp/regs-timers.h
@@ -6,11 +6,6 @@
#ifndef __ASM_MACH_REGS_TIMERS_H
#define __ASM_MACH_REGS_TIMERS_H
-#include "addr-map.h"
-
-#define TIMERS1_VIRT_BASE (APB_VIRT_BASE + 0x14000)
-#define TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x16000)
-
#define TMR_CCR (0x0000)
#define TMR_TN_MM(n, m) (0x0004 + ((n) << 3) + (((n) + (m)) << 2))
#define TMR_CR(n) (0x0028 + ((n) << 2))
diff --git a/arch/arm/mach-mmp/regs-usb.h b/arch/arm/mach-mmp/regs-usb.h
deleted file mode 100644
index ed0d1aa0ad6c..000000000000
--- a/arch/arm/mach-mmp/regs-usb.h
+++ /dev/null
@@ -1,155 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
- */
-
-#ifndef __ASM_ARCH_REGS_USB_H
-#define __ASM_ARCH_REGS_USB_H
-
-#define PXA168_U2O_REGBASE (0xd4208000)
-#define PXA168_U2O_PHYBASE (0xd4207000)
-
-#define PXA168_U2H_REGBASE (0xd4209000)
-#define PXA168_U2H_PHYBASE (0xd4206000)
-
-#define MMP3_HSIC1_REGBASE (0xf0001000)
-#define MMP3_HSIC1_PHYBASE (0xf0001800)
-
-#define MMP3_HSIC2_REGBASE (0xf0002000)
-#define MMP3_HSIC2_PHYBASE (0xf0002800)
-
-#define MMP3_FSIC_REGBASE (0xf0003000)
-#define MMP3_FSIC_PHYBASE (0xf0003800)
-
-
-#define USB_REG_RANGE (0x1ff)
-#define USB_PHY_RANGE (0xff)
-
-/* registers */
-#define U2x_CAPREGS_OFFSET 0x100
-
-/* phy regs */
-#define UTMI_REVISION 0x0
-#define UTMI_CTRL 0x4
-#define UTMI_PLL 0x8
-#define UTMI_TX 0xc
-#define UTMI_RX 0x10
-#define UTMI_IVREF 0x14
-#define UTMI_T0 0x18
-#define UTMI_T1 0x1c
-#define UTMI_T2 0x20
-#define UTMI_T3 0x24
-#define UTMI_T4 0x28
-#define UTMI_T5 0x2c
-#define UTMI_RESERVE 0x30
-#define UTMI_USB_INT 0x34
-#define UTMI_DBG_CTL 0x38
-#define UTMI_OTG_ADDON 0x3c
-
-/* For UTMICTRL Register */
-#define UTMI_CTRL_USB_CLK_EN (1 << 31)
-/* pxa168 */
-#define UTMI_CTRL_SUSPEND_SET1 (1 << 30)
-#define UTMI_CTRL_SUSPEND_SET2 (1 << 29)
-#define UTMI_CTRL_RXBUF_PDWN (1 << 24)
-#define UTMI_CTRL_TXBUF_PDWN (1 << 11)
-
-#define UTMI_CTRL_INPKT_DELAY_SHIFT 30
-#define UTMI_CTRL_INPKT_DELAY_SOF_SHIFT 28
-#define UTMI_CTRL_PU_REF_SHIFT 20
-#define UTMI_CTRL_ARC_PULLDN_SHIFT 12
-#define UTMI_CTRL_PLL_PWR_UP_SHIFT 1
-#define UTMI_CTRL_PWR_UP_SHIFT 0
-
-/* For UTMI_PLL Register */
-#define UTMI_PLL_PLLCALI12_SHIFT 29
-#define UTMI_PLL_PLLCALI12_MASK (0x3 << 29)
-
-#define UTMI_PLL_PLLVDD18_SHIFT 27
-#define UTMI_PLL_PLLVDD18_MASK (0x3 << 27)
-
-#define UTMI_PLL_PLLVDD12_SHIFT 25
-#define UTMI_PLL_PLLVDD12_MASK (0x3 << 25)
-
-#define UTMI_PLL_CLK_BLK_EN_SHIFT 24
-#define CLK_BLK_EN (0x1 << 24)
-#define PLL_READY (0x1 << 23)
-#define KVCO_EXT (0x1 << 22)
-#define VCOCAL_START (0x1 << 21)
-
-#define UTMI_PLL_KVCO_SHIFT 15
-#define UTMI_PLL_KVCO_MASK (0x7 << 15)
-
-#define UTMI_PLL_ICP_SHIFT 12
-#define UTMI_PLL_ICP_MASK (0x7 << 12)
-
-#define UTMI_PLL_FBDIV_SHIFT 4
-#define UTMI_PLL_FBDIV_MASK (0xFF << 4)
-
-#define UTMI_PLL_REFDIV_SHIFT 0
-#define UTMI_PLL_REFDIV_MASK (0xF << 0)
-
-/* For UTMI_TX Register */
-#define UTMI_TX_REG_EXT_FS_RCAL_SHIFT 27
-#define UTMI_TX_REG_EXT_FS_RCAL_MASK (0xf << 27)
-
-#define UTMI_TX_REG_EXT_FS_RCAL_EN_SHIFT 26
-#define UTMI_TX_REG_EXT_FS_RCAL_EN_MASK (0x1 << 26)
-
-#define UTMI_TX_TXVDD12_SHIFT 22
-#define UTMI_TX_TXVDD12_MASK (0x3 << 22)
-
-#define UTMI_TX_CK60_PHSEL_SHIFT 17
-#define UTMI_TX_CK60_PHSEL_MASK (0xf << 17)
-
-#define UTMI_TX_IMPCAL_VTH_SHIFT 14
-#define UTMI_TX_IMPCAL_VTH_MASK (0x7 << 14)
-
-#define REG_RCAL_START (0x1 << 12)
-
-#define UTMI_TX_LOW_VDD_EN_SHIFT 11
-
-#define UTMI_TX_AMP_SHIFT 0
-#define UTMI_TX_AMP_MASK (0x7 << 0)
-
-/* For UTMI_RX Register */
-#define UTMI_REG_SQ_LENGTH_SHIFT 15
-#define UTMI_REG_SQ_LENGTH_MASK (0x3 << 15)
-
-#define UTMI_RX_SQ_THRESH_SHIFT 4
-#define UTMI_RX_SQ_THRESH_MASK (0xf << 4)
-
-#define UTMI_OTG_ADDON_OTG_ON (1 << 0)
-
-/* fsic registers */
-#define FSIC_MISC 0x4
-#define FSIC_INT 0x28
-#define FSIC_CTRL 0x30
-
-/* HSIC registers */
-#define HSIC_PAD_CTRL 0x4
-
-#define HSIC_CTRL 0x8
-#define HSIC_CTRL_HSIC_ENABLE (1<<7)
-#define HSIC_CTRL_PLL_BYPASS (1<<4)
-
-#define TEST_GRP_0 0xc
-#define TEST_GRP_1 0x10
-
-#define HSIC_INT 0x14
-#define HSIC_INT_READY_INT_EN (1<<10)
-#define HSIC_INT_CONNECT_INT_EN (1<<9)
-#define HSIC_INT_CORE_INT_EN (1<<8)
-#define HSIC_INT_HS_READY (1<<2)
-#define HSIC_INT_CONNECT (1<<1)
-#define HSIC_INT_CORE (1<<0)
-
-#define HSIC_CONFIG 0x18
-#define USBHSIC_CTRL 0x20
-
-#define HSIC_USB_CTRL 0x28
-#define HSIC_USB_CTRL_CLKEN 1
-#define HSIC_USB_CLK_PHY 0x0
-#define HSIC_USB_CLK_PMU 0x1
-
-#endif /* __ASM_ARCH_PXA_U2O_H */
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 41b2e8abc9e6..0f0ed2428595 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -29,18 +29,13 @@
#include <linux/sched_clock.h>
#include <asm/mach/time.h>
-#include "addr-map.h"
#include "regs-timers.h"
-#include "regs-apbc.h"
-#include "irqs.h"
#include <linux/soc/mmp/cputype.h>
-#define TIMERS_VIRT_BASE TIMERS1_VIRT_BASE
-
#define MAX_DELTA (0xfffffffe)
#define MIN_DELTA (16)
-static void __iomem *mmp_timer_base = TIMERS_VIRT_BASE;
+static void __iomem *mmp_timer_base;
/*
* FIXME: the timer needs some delay to stablize the counter capture
@@ -174,7 +169,7 @@ static void __init timer_config(void)
__raw_writel(0x2, mmp_timer_base + TMR_CER);
}
-void __init mmp_timer_init(int irq, unsigned long rate)
+static void __init mmp_timer_init(int irq, unsigned long rate)
{
timer_config();
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 10/11] ARM: mmp: remove device definitions
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann
From: Arnd Bergmann <arnd@arndb.de>
Since all board support is now gone, a lot of code in the
platform is no longer called and can be removed as well.
The remaining parts are:
* The interrupt numbers for pxa910 are still needed for the
power management support.
* The 'mfp' device is still statically initialized from
platform code, though this could be moved into the
pinctrl code
* The CPU identification code is used for the cpu_is_mmp*()
macros.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-mmp/Makefile | 2 +-
arch/arm/mach-mmp/common.c | 5 -
arch/arm/mach-mmp/common.h | 2 -
arch/arm/mach-mmp/devices.c | 359 --------------------------------
arch/arm/mach-mmp/devices.h | 57 -----
arch/arm/mach-mmp/irqs.h | 173 ---------------
arch/arm/mach-mmp/mfp.h | 35 ----
arch/arm/mach-mmp/mmp2.c | 71 +------
arch/arm/mach-mmp/mmp2.h | 83 --------
arch/arm/mach-mmp/pm-mmp2.c | 34 ---
arch/arm/mach-mmp/pm-mmp2.h | 2 +-
arch/arm/mach-mmp/pm-pxa910.c | 106 ----------
arch/arm/mach-mmp/pxa168.c | 126 +----------
arch/arm/mach-mmp/pxa168.h | 123 -----------
arch/arm/mach-mmp/pxa910.c | 99 +--------
arch/arm/mach-mmp/pxa910.h | 79 -------
arch/arm/mach-mmp/regs-apbc.h | 19 --
arch/arm/mach-mmp/regs-apmu.h | 28 ---
arch/arm/mach-mmp/regs-timers.h | 5 -
arch/arm/mach-mmp/regs-usb.h | 155 --------------
arch/arm/mach-mmp/time.c | 9 +-
21 files changed, 7 insertions(+), 1565 deletions(-)
delete mode 100644 arch/arm/mach-mmp/devices.c
delete mode 100644 arch/arm/mach-mmp/devices.h
delete mode 100644 arch/arm/mach-mmp/mfp.h
delete mode 100644 arch/arm/mach-mmp/regs-apbc.h
delete mode 100644 arch/arm/mach-mmp/regs-apmu.h
delete mode 100644 arch/arm/mach-mmp/regs-usb.h
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index cd874c5a6cb8..95d4217132eb 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -2,7 +2,7 @@
#
# Makefile for Marvell's PXA168 processors line
#
-obj-y += common.o devices.o time.o
+obj-y += common.o time.o
# SoC support
obj-$(CONFIG_CPU_PXA168) += pxa168.o
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index e94349d4726c..b3c1a248db31 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -58,8 +58,3 @@ void __init mmp2_map_io(void)
mmp_map_io();
iotable_init(mmp2_io_desc, ARRAY_SIZE(mmp2_io_desc));
}
-
-void mmp_restart(enum reboot_mode mode, const char *cmd)
-{
- soft_restart(0);
-}
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index ed56b3f15b45..e18f05d5d68d 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -1,9 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0 */
#include <linux/reboot.h>
-#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
extern void mmp_timer_init(int irq, unsigned long rate);
extern void __init mmp_map_io(void);
extern void __init mmp2_map_io(void);
-extern void mmp_restart(enum reboot_mode, const char *);
diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c
deleted file mode 100644
index 9968239d8041..000000000000
--- a/arch/arm/mach-mmp/devices.c
+++ /dev/null
@@ -1,359 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/devices.c
- */
-
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/delay.h>
-
-#include <asm/irq.h>
-#include "irqs.h"
-#include "devices.h"
-#include <linux/soc/mmp/cputype.h>
-#include "regs-usb.h"
-
-int __init mmp_register_device(struct mmp_device_desc *desc,
- void *data, size_t size)
-{
- struct platform_device *pdev;
- struct resource res[2 + MAX_RESOURCE_DMA];
- int i, ret = 0, nres = 0;
-
- pdev = platform_device_alloc(desc->drv_name, desc->id);
- if (pdev == NULL)
- return -ENOMEM;
-
- pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
-
- memset(res, 0, sizeof(res));
-
- if (desc->start != -1ul && desc->size > 0) {
- res[nres].start = desc->start;
- res[nres].end = desc->start + desc->size - 1;
- res[nres].flags = IORESOURCE_MEM;
- nres++;
- }
-
- if (desc->irq != NO_IRQ) {
- res[nres].start = desc->irq;
- res[nres].end = desc->irq;
- res[nres].flags = IORESOURCE_IRQ;
- nres++;
- }
-
- for (i = 0; i < MAX_RESOURCE_DMA; i++, nres++) {
- if (desc->dma[i] == 0)
- break;
-
- res[nres].start = desc->dma[i];
- res[nres].end = desc->dma[i];
- res[nres].flags = IORESOURCE_DMA;
- }
-
- ret = platform_device_add_resources(pdev, res, nres);
- if (ret) {
- platform_device_put(pdev);
- return ret;
- }
-
- if (data && size) {
- ret = platform_device_add_data(pdev, data, size);
- if (ret) {
- platform_device_put(pdev);
- return ret;
- }
- }
-
- return platform_device_add(pdev);
-}
-
-#if IS_ENABLED(CONFIG_USB) || IS_ENABLED(CONFIG_USB_GADGET)
-#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV)
-#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168)
-
-/*****************************************************************************
- * The registers read/write routines
- *****************************************************************************/
-
-static unsigned int u2o_get(void __iomem *base, unsigned int offset)
-{
- return readl_relaxed(base + offset);
-}
-
-static void u2o_set(void __iomem *base, unsigned int offset,
- unsigned int value)
-{
- u32 reg;
-
- reg = readl_relaxed(base + offset);
- reg |= value;
- writel_relaxed(reg, base + offset);
- readl_relaxed(base + offset);
-}
-
-static void u2o_clear(void __iomem *base, unsigned int offset,
- unsigned int value)
-{
- u32 reg;
-
- reg = readl_relaxed(base + offset);
- reg &= ~value;
- writel_relaxed(reg, base + offset);
- readl_relaxed(base + offset);
-}
-
-static void u2o_write(void __iomem *base, unsigned int offset,
- unsigned int value)
-{
- writel_relaxed(value, base + offset);
- readl_relaxed(base + offset);
-}
-
-
-static DEFINE_MUTEX(phy_lock);
-static int phy_init_cnt;
-
-static int usb_phy_init_internal(void __iomem *base)
-{
- int loops;
-
- pr_info("Init usb phy!!!\n");
-
- /* Initialize the USB PHY power */
- if (cpu_is_pxa910()) {
- u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT)
- | (1<<UTMI_CTRL_PU_REF_SHIFT));
- }
-
- u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
- u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
-
- /* UTMI_PLL settings */
- u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK
- | UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK
- | UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK
- | UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK);
-
- u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT
- | 0xb<<UTMI_PLL_REFDIV_SHIFT | 3<<UTMI_PLL_PLLVDD18_SHIFT
- | 3<<UTMI_PLL_PLLVDD12_SHIFT | 3<<UTMI_PLL_PLLCALI12_SHIFT
- | 1<<UTMI_PLL_ICP_SHIFT | 3<<UTMI_PLL_KVCO_SHIFT);
-
- /* UTMI_TX */
- u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK
- | UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK
- | UTMI_TX_IMPCAL_VTH_MASK | UTMI_TX_REG_EXT_FS_RCAL_MASK
- | UTMI_TX_AMP_MASK);
- u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT
- | 4<<UTMI_TX_CK60_PHSEL_SHIFT | 4<<UTMI_TX_IMPCAL_VTH_SHIFT
- | 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT | 3<<UTMI_TX_AMP_SHIFT);
-
- /* UTMI_RX */
- u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK
- | UTMI_REG_SQ_LENGTH_MASK);
- u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT
- | 2<<UTMI_REG_SQ_LENGTH_SHIFT);
-
- /* UTMI_IVREF */
- if (cpu_is_pxa168())
- /* fixing Microsoft Altair board interface with NEC hub issue -
- * Set UTMI_IVREF from 0x4a3 to 0x4bf */
- u2o_write(base, UTMI_IVREF, 0x4bf);
-
- /* toggle VCOCAL_START bit of UTMI_PLL */
- udelay(200);
- u2o_set(base, UTMI_PLL, VCOCAL_START);
- udelay(40);
- u2o_clear(base, UTMI_PLL, VCOCAL_START);
-
- /* toggle REG_RCAL_START bit of UTMI_TX */
- udelay(400);
- u2o_set(base, UTMI_TX, REG_RCAL_START);
- udelay(40);
- u2o_clear(base, UTMI_TX, REG_RCAL_START);
- udelay(400);
-
- /* Make sure PHY PLL is ready */
- loops = 0;
- while ((u2o_get(base, UTMI_PLL) & PLL_READY) == 0) {
- mdelay(1);
- loops++;
- if (loops > 100) {
- printk(KERN_WARNING "calibrate timeout, UTMI_PLL %x\n",
- u2o_get(base, UTMI_PLL));
- break;
- }
- }
-
- if (cpu_is_pxa168()) {
- u2o_set(base, UTMI_RESERVE, 1 << 5);
- /* Turn on UTMI PHY OTG extension */
- u2o_write(base, UTMI_OTG_ADDON, 1);
- }
-
- return 0;
-}
-
-static int usb_phy_deinit_internal(void __iomem *base)
-{
- pr_info("Deinit usb phy!!!\n");
-
- if (cpu_is_pxa168())
- u2o_clear(base, UTMI_OTG_ADDON, UTMI_OTG_ADDON_OTG_ON);
-
- u2o_clear(base, UTMI_CTRL, UTMI_CTRL_RXBUF_PDWN);
- u2o_clear(base, UTMI_CTRL, UTMI_CTRL_TXBUF_PDWN);
- u2o_clear(base, UTMI_CTRL, UTMI_CTRL_USB_CLK_EN);
- u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
- u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
-
- return 0;
-}
-
-int pxa_usb_phy_init(void __iomem *phy_reg)
-{
- mutex_lock(&phy_lock);
- if (phy_init_cnt++ == 0)
- usb_phy_init_internal(phy_reg);
- mutex_unlock(&phy_lock);
- return 0;
-}
-
-void pxa_usb_phy_deinit(void __iomem *phy_reg)
-{
- WARN_ON(phy_init_cnt == 0);
-
- mutex_lock(&phy_lock);
- if (--phy_init_cnt == 0)
- usb_phy_deinit_internal(phy_reg);
- mutex_unlock(&phy_lock);
-}
-#endif
-#endif
-#endif
-
-#if IS_ENABLED(CONFIG_USB_SUPPORT)
-static u64 __maybe_unused usb_dma_mask = ~(u32)0;
-
-#if IS_ENABLED(CONFIG_PHY_PXA_USB)
-static struct resource pxa168_usb_phy_resources[] = {
- [0] = {
- .start = PXA168_U2O_PHYBASE,
- .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device pxa168_device_usb_phy = {
- .name = "pxa-usb-phy",
- .id = -1,
- .resource = pxa168_usb_phy_resources,
- .num_resources = ARRAY_SIZE(pxa168_usb_phy_resources),
- .dev = {
- .dma_mask = &usb_dma_mask,
- .coherent_dma_mask = 0xffffffff,
- }
-};
-#endif /* CONFIG_PHY_PXA_USB */
-
-#if IS_ENABLED(CONFIG_USB_MV_UDC)
-static struct resource pxa168_u2o_resources[] = {
- /* regbase */
- [0] = {
- .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
- .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "capregs",
- },
- /* phybase */
- [1] = {
- .start = PXA168_U2O_PHYBASE,
- .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "phyregs",
- },
- [2] = {
- .start = IRQ_PXA168_USB1,
- .end = IRQ_PXA168_USB1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa168_device_u2o = {
- .name = "mv-udc",
- .id = -1,
- .resource = pxa168_u2o_resources,
- .num_resources = ARRAY_SIZE(pxa168_u2o_resources),
- .dev = {
- .dma_mask = &usb_dma_mask,
- .coherent_dma_mask = 0xffffffff,
- }
-};
-#endif /* CONFIG_USB_MV_UDC */
-
-#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
-static struct resource pxa168_u2oehci_resources[] = {
- [0] = {
- .start = PXA168_U2O_REGBASE,
- .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_PXA168_USB1,
- .end = IRQ_PXA168_USB1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa168_device_u2oehci = {
- .name = "pxa-u2oehci",
- .id = -1,
- .dev = {
- .dma_mask = &usb_dma_mask,
- .coherent_dma_mask = 0xffffffff,
- },
-
- .num_resources = ARRAY_SIZE(pxa168_u2oehci_resources),
- .resource = pxa168_u2oehci_resources,
-};
-#endif
-
-#if IS_ENABLED(CONFIG_USB_MV_OTG)
-static struct resource pxa168_u2ootg_resources[] = {
- /* regbase */
- [0] = {
- .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
- .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "capregs",
- },
- /* phybase */
- [1] = {
- .start = PXA168_U2O_PHYBASE,
- .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "phyregs",
- },
- [2] = {
- .start = IRQ_PXA168_USB1,
- .end = IRQ_PXA168_USB1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa168_device_u2ootg = {
- .name = "mv-otg",
- .id = -1,
- .dev = {
- .dma_mask = &usb_dma_mask,
- .coherent_dma_mask = 0xffffffff,
- },
-
- .num_resources = ARRAY_SIZE(pxa168_u2ootg_resources),
- .resource = pxa168_u2ootg_resources,
-};
-#endif /* CONFIG_USB_MV_OTG */
-
-#endif
diff --git a/arch/arm/mach-mmp/devices.h b/arch/arm/mach-mmp/devices.h
deleted file mode 100644
index d4920ebfebc5..000000000000
--- a/arch/arm/mach-mmp/devices.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __MACH_DEVICE_H
-#define __MACH_DEVICE_H
-
-#include <linux/types.h>
-
-#define MAX_RESOURCE_DMA 2
-
-/* structure for describing the on-chip devices */
-struct mmp_device_desc {
- const char *dev_name;
- const char *drv_name;
- int id;
- int irq;
- unsigned long start;
- unsigned long size;
- int dma[MAX_RESOURCE_DMA];
-};
-
-#define PXA168_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \
-struct mmp_device_desc pxa168_device_##_name __initdata = { \
- .dev_name = "pxa168-" #_name, \
- .drv_name = _drv, \
- .id = _id, \
- .irq = IRQ_PXA168_##_irq, \
- .start = _start, \
- .size = _size, \
- .dma = { _dma }, \
-};
-
-#define PXA910_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \
-struct mmp_device_desc pxa910_device_##_name __initdata = { \
- .dev_name = "pxa910-" #_name, \
- .drv_name = _drv, \
- .id = _id, \
- .irq = IRQ_PXA910_##_irq, \
- .start = _start, \
- .size = _size, \
- .dma = { _dma }, \
-};
-
-#define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \
-struct mmp_device_desc mmp2_device_##_name __initdata = { \
- .dev_name = "mmp2-" #_name, \
- .drv_name = _drv, \
- .id = _id, \
- .irq = IRQ_MMP2_##_irq, \
- .start = _start, \
- .size = _size, \
- .dma = { _dma }, \
-}
-
-extern int mmp_register_device(struct mmp_device_desc *, void *, size_t);
-extern int pxa_usb_phy_init(void __iomem *phy_reg);
-extern void pxa_usb_phy_deinit(void __iomem *phy_reg);
-
-#endif /* __MACH_DEVICE_H */
diff --git a/arch/arm/mach-mmp/irqs.h b/arch/arm/mach-mmp/irqs.h
index 5acc4d532a43..b8446a17ea55 100644
--- a/arch/arm/mach-mmp/irqs.h
+++ b/arch/arm/mach-mmp/irqs.h
@@ -2,56 +2,6 @@
#ifndef __ASM_MACH_IRQS_H
#define __ASM_MACH_IRQS_H
-/*
- * Interrupt numbers for PXA168
- */
-#define IRQ_PXA168_NONE (-1)
-#define IRQ_PXA168_SSP4 0
-#define IRQ_PXA168_SSP3 1
-#define IRQ_PXA168_SSP2 2
-#define IRQ_PXA168_SSP1 3
-#define IRQ_PXA168_PMIC_INT 4
-#define IRQ_PXA168_RTC_INT 5
-#define IRQ_PXA168_RTC_ALARM 6
-#define IRQ_PXA168_TWSI0 7
-#define IRQ_PXA168_GPU 8
-#define IRQ_PXA168_KEYPAD 9
-#define IRQ_PXA168_ONEWIRE 12
-#define IRQ_PXA168_TIMER1 13
-#define IRQ_PXA168_TIMER2 14
-#define IRQ_PXA168_TIMER3 15
-#define IRQ_PXA168_CMU 16
-#define IRQ_PXA168_SSP5 17
-#define IRQ_PXA168_MSP_WAKEUP 19
-#define IRQ_PXA168_CF_WAKEUP 20
-#define IRQ_PXA168_XD_WAKEUP 21
-#define IRQ_PXA168_MFU 22
-#define IRQ_PXA168_MSP 23
-#define IRQ_PXA168_CF 24
-#define IRQ_PXA168_XD 25
-#define IRQ_PXA168_DDR_INT 26
-#define IRQ_PXA168_UART1 27
-#define IRQ_PXA168_UART2 28
-#define IRQ_PXA168_UART3 29
-#define IRQ_PXA168_WDT 35
-#define IRQ_PXA168_MAIN_PMU 36
-#define IRQ_PXA168_FRQ_CHANGE 38
-#define IRQ_PXA168_SDH1 39
-#define IRQ_PXA168_SDH2 40
-#define IRQ_PXA168_LCD 41
-#define IRQ_PXA168_CI 42
-#define IRQ_PXA168_USB1 44
-#define IRQ_PXA168_NAND 45
-#define IRQ_PXA168_HIFI_DMA 46
-#define IRQ_PXA168_DMA_INT0 47
-#define IRQ_PXA168_DMA_INT1 48
-#define IRQ_PXA168_GPIOX 49
-#define IRQ_PXA168_USB2 51
-#define IRQ_PXA168_AC97 57
-#define IRQ_PXA168_TWSI1 58
-#define IRQ_PXA168_AP_PMU 60
-#define IRQ_PXA168_SM_INT 63
-
/*
* Interrupt numbers for PXA910
*/
@@ -114,127 +64,4 @@
#define IRQ_PXA910_AP_PMU 60
#define IRQ_PXA910_SM_INT 63 /* from PinMux */
-/*
- * Interrupt numbers for MMP2
- */
-#define IRQ_MMP2_NONE (-1)
-#define IRQ_MMP2_SSP1 0
-#define IRQ_MMP2_SSP2 1
-#define IRQ_MMP2_SSPA1 2
-#define IRQ_MMP2_SSPA2 3
-#define IRQ_MMP2_PMIC_MUX 4 /* PMIC & Charger */
-#define IRQ_MMP2_RTC_MUX 5
-#define IRQ_MMP2_TWSI1 7
-#define IRQ_MMP2_GPU 8
-#define IRQ_MMP2_KEYPAD_MUX 9
-#define IRQ_MMP2_ROTARY 10
-#define IRQ_MMP2_TRACKBALL 11
-#define IRQ_MMP2_ONEWIRE 12
-#define IRQ_MMP2_TIMER1 13
-#define IRQ_MMP2_TIMER2 14
-#define IRQ_MMP2_TIMER3 15
-#define IRQ_MMP2_RIPC 16
-#define IRQ_MMP2_TWSI_MUX 17 /* TWSI2 ~ TWSI6 */
-#define IRQ_MMP2_HDMI 19
-#define IRQ_MMP2_SSP3 20
-#define IRQ_MMP2_SSP4 21
-#define IRQ_MMP2_USB_HS1 22
-#define IRQ_MMP2_USB_HS2 23
-#define IRQ_MMP2_UART3 24
-#define IRQ_MMP2_UART1 27
-#define IRQ_MMP2_UART2 28
-#define IRQ_MMP2_MIPI_DSI 29
-#define IRQ_MMP2_CI2 30
-#define IRQ_MMP2_PMU_TIMER1 31
-#define IRQ_MMP2_PMU_TIMER2 32
-#define IRQ_MMP2_PMU_TIMER3 33
-#define IRQ_MMP2_USB_FS 34
-#define IRQ_MMP2_MISC_MUX 35
-#define IRQ_MMP2_WDT1 36
-#define IRQ_MMP2_NAND_DMA 37
-#define IRQ_MMP2_USIM 38
-#define IRQ_MMP2_MMC 39
-#define IRQ_MMP2_WTM 40
-#define IRQ_MMP2_LCD 41
-#define IRQ_MMP2_CI 42
-#define IRQ_MMP2_IRE 43
-#define IRQ_MMP2_USB_OTG 44
-#define IRQ_MMP2_NAND 45
-#define IRQ_MMP2_UART4 46
-#define IRQ_MMP2_DMA_FIQ 47
-#define IRQ_MMP2_DMA_RIQ 48
-#define IRQ_MMP2_GPIO 49
-#define IRQ_MMP2_MIPI_HSI1_MUX 51
-#define IRQ_MMP2_MMC2 52
-#define IRQ_MMP2_MMC3 53
-#define IRQ_MMP2_MMC4 54
-#define IRQ_MMP2_MIPI_HSI0_MUX 55
-#define IRQ_MMP2_MSP 58
-#define IRQ_MMP2_MIPI_SLIM_DMA 59
-#define IRQ_MMP2_PJ4_FREQ_CHG 60
-#define IRQ_MMP2_MIPI_SLIM 62
-#define IRQ_MMP2_SM 63
-
-#define IRQ_MMP2_MUX_BASE 64
-
-/* secondary interrupt of INT #4 */
-#define IRQ_MMP2_PMIC_BASE (IRQ_MMP2_MUX_BASE)
-#define IRQ_MMP2_CHARGER (IRQ_MMP2_PMIC_BASE + 0)
-#define IRQ_MMP2_PMIC (IRQ_MMP2_PMIC_BASE + 1)
-
-/* secondary interrupt of INT #5 */
-#define IRQ_MMP2_RTC_BASE (IRQ_MMP2_PMIC_BASE + 2)
-#define IRQ_MMP2_RTC_ALARM (IRQ_MMP2_RTC_BASE + 0)
-#define IRQ_MMP2_RTC (IRQ_MMP2_RTC_BASE + 1)
-
-/* secondary interrupt of INT #9 */
-#define IRQ_MMP2_KEYPAD_BASE (IRQ_MMP2_RTC_BASE + 2)
-#define IRQ_MMP2_KPC (IRQ_MMP2_KEYPAD_BASE + 0)
-#define IRQ_MMP2_ROTORY (IRQ_MMP2_KEYPAD_BASE + 1)
-#define IRQ_MMP2_TBALL (IRQ_MMP2_KEYPAD_BASE + 2)
-
-/* secondary interrupt of INT #17 */
-#define IRQ_MMP2_TWSI_BASE (IRQ_MMP2_KEYPAD_BASE + 3)
-#define IRQ_MMP2_TWSI2 (IRQ_MMP2_TWSI_BASE + 0)
-#define IRQ_MMP2_TWSI3 (IRQ_MMP2_TWSI_BASE + 1)
-#define IRQ_MMP2_TWSI4 (IRQ_MMP2_TWSI_BASE + 2)
-#define IRQ_MMP2_TWSI5 (IRQ_MMP2_TWSI_BASE + 3)
-#define IRQ_MMP2_TWSI6 (IRQ_MMP2_TWSI_BASE + 4)
-
-/* secondary interrupt of INT #35 */
-#define IRQ_MMP2_MISC_BASE (IRQ_MMP2_TWSI_BASE + 5)
-#define IRQ_MMP2_PERF (IRQ_MMP2_MISC_BASE + 0)
-#define IRQ_MMP2_L2_PA_ECC (IRQ_MMP2_MISC_BASE + 1)
-#define IRQ_MMP2_L2_ECC (IRQ_MMP2_MISC_BASE + 2)
-#define IRQ_MMP2_L2_UECC (IRQ_MMP2_MISC_BASE + 3)
-#define IRQ_MMP2_DDR (IRQ_MMP2_MISC_BASE + 4)
-#define IRQ_MMP2_FAB0_TIMEOUT (IRQ_MMP2_MISC_BASE + 5)
-#define IRQ_MMP2_FAB1_TIMEOUT (IRQ_MMP2_MISC_BASE + 6)
-#define IRQ_MMP2_FAB2_TIMEOUT (IRQ_MMP2_MISC_BASE + 7)
-#define IRQ_MMP2_THERMAL (IRQ_MMP2_MISC_BASE + 9)
-#define IRQ_MMP2_MAIN_PMU (IRQ_MMP2_MISC_BASE + 10)
-#define IRQ_MMP2_WDT2 (IRQ_MMP2_MISC_BASE + 11)
-#define IRQ_MMP2_CORESIGHT (IRQ_MMP2_MISC_BASE + 12)
-#define IRQ_MMP2_COMMTX (IRQ_MMP2_MISC_BASE + 13)
-#define IRQ_MMP2_COMMRX (IRQ_MMP2_MISC_BASE + 14)
-
-/* secondary interrupt of INT #51 */
-#define IRQ_MMP2_MIPI_HSI1_BASE (IRQ_MMP2_MISC_BASE + 15)
-#define IRQ_MMP2_HSI1_CAWAKE (IRQ_MMP2_MIPI_HSI1_BASE + 0)
-#define IRQ_MMP2_MIPI_HSI_INT1 (IRQ_MMP2_MIPI_HSI1_BASE + 1)
-
-/* secondary interrupt of INT #55 */
-#define IRQ_MMP2_MIPI_HSI0_BASE (IRQ_MMP2_MIPI_HSI1_BASE + 2)
-#define IRQ_MMP2_HSI0_CAWAKE (IRQ_MMP2_MIPI_HSI0_BASE + 0)
-#define IRQ_MMP2_MIPI_HSI_INT0 (IRQ_MMP2_MIPI_HSI0_BASE + 1)
-
-#define IRQ_MMP2_MUX_END (IRQ_MMP2_MIPI_HSI0_BASE + 2)
-
-#define IRQ_GPIO_START 128
-#define MMP_NR_BUILTIN_GPIO 192
-#define MMP_GPIO_TO_IRQ(gpio) (IRQ_GPIO_START + (gpio))
-
-#define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
-#define MMP_NR_IRQS IRQ_BOARD_START
-
#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/mfp.h b/arch/arm/mach-mmp/mfp.h
deleted file mode 100644
index 6f3057987756..000000000000
--- a/arch/arm/mach-mmp/mfp.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_MFP_H
-#define __ASM_MACH_MFP_H
-
-#include <linux/soc/pxa/mfp.h>
-
-/*
- * NOTE: the MFPR register bit definitions on PXA168 processor lines are a
- * bit different from those on PXA3xx. Bit [7:10] are now reserved, which
- * were SLEEP_OE_N, SLEEP_DATA, SLEEP_SEL and the LSB of DRIVE bits.
- *
- * To cope with this difference and re-use the pxa3xx mfp code as much as
- * possible, we make the following compromise:
- *
- * 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT)
- * 2. DRIVE strength definitions redefined to include the reserved bit
- * - the reserved bit differs between pxa168 and pxa910, and the
- * MFP_DRIVE_* macros are individually defined in mfp-pxa{168,910}.h
- * 3. Override MFP_CFG() and MFP_CFG_DRV()
- * 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X()
- */
-
-#undef MFP_CFG
-#undef MFP_CFG_DRV
-#undef MFP_CFG_LPM
-#undef MFP_CFG_X
-#undef MFP_CFG_DEFAULT
-
-#define MFP_CFG(pin, af) \
- (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM)
-
-#define MFP_CFG_DRV(pin, af, drv) \
- (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv)
-
-#endif /* __ASM_MACH_MFP_H */
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index bbc4c2274de3..8ee6a4547731 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -19,11 +19,8 @@
#include <asm/mach/time.h>
#include "addr-map.h"
-#include "regs-apbc.h"
#include <linux/soc/mmp/cputype.h>
-#include "irqs.h"
-#include "mfp.h"
-#include "devices.h"
+#include <linux/soc/pxa/mfp.h>
#include "mmp2.h"
#include "pm-mmp2.h"
@@ -91,14 +88,6 @@ void mmp2_clear_pmic_int(void)
__raw_writel(data, mfpr_pmic);
}
-void __init mmp2_init_irq(void)
-{
- mmp2_init_icu();
-#ifdef CONFIG_PM
- icu_irq_chip.irq_set_wake = mmp2_set_wake;
-#endif
-}
-
static int __init mmp2_init(void)
{
if (cpu_is_mmp2()) {
@@ -115,61 +104,3 @@ static int __init mmp2_init(void)
return 0;
}
postcore_initcall(mmp2_init);
-
-#define APBC_TIMERS APBC_REG(0x024)
-
-void __init mmp2_timer_init(void)
-{
- unsigned long clk_rst;
-
- __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
-
- /*
- * enable bus/functional clock, enable 6.5MHz (divider 4),
- * release reset
- */
- clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
- __raw_writel(clk_rst, APBC_TIMERS);
-
- mmp_timer_init(IRQ_MMP2_TIMER1, 6500000);
-}
-
-/* on-chip devices */
-MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
-MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
-MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23);
-MMP2_DEVICE(uart4, "pxa2xx-uart", 3, UART4, 0xd4016000, 0x30, 18, 19);
-MMP2_DEVICE(twsi1, "pxa2xx-i2c", 0, TWSI1, 0xd4011000, 0x70);
-MMP2_DEVICE(twsi2, "pxa2xx-i2c", 1, TWSI2, 0xd4031000, 0x70);
-MMP2_DEVICE(twsi3, "pxa2xx-i2c", 2, TWSI3, 0xd4032000, 0x70);
-MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70);
-MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70);
-MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70);
-MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29);
-MMP2_DEVICE(sdh0, "sdhci-pxav3", 0, MMC, 0xd4280000, 0x120);
-MMP2_DEVICE(sdh1, "sdhci-pxav3", 1, MMC2, 0xd4280800, 0x120);
-MMP2_DEVICE(sdh2, "sdhci-pxav3", 2, MMC3, 0xd4281000, 0x120);
-MMP2_DEVICE(sdh3, "sdhci-pxav3", 3, MMC4, 0xd4281800, 0x120);
-MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000);
-/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */
-MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000);
-
-struct resource mmp2_resource_gpio[] = {
- {
- .start = 0xd4019000,
- .end = 0xd4019fff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_MMP2_GPIO,
- .end = IRQ_MMP2_GPIO,
- .name = "gpio_mux",
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device mmp2_device_gpio = {
- .name = "mmp2-gpio",
- .id = -1,
- .num_resources = ARRAY_SIZE(mmp2_resource_gpio),
- .resource = mmp2_resource_gpio,
-};
diff --git a/arch/arm/mach-mmp/mmp2.h b/arch/arm/mach-mmp/mmp2.h
index 5c80836aea76..6616d3f7a0ac 100644
--- a/arch/arm/mach-mmp/mmp2.h
+++ b/arch/arm/mach-mmp/mmp2.h
@@ -2,90 +2,7 @@
#ifndef __ASM_MACH_MMP2_H
#define __ASM_MACH_MMP2_H
-#include <linux/platform_data/pxa_sdhci.h>
-
-extern void mmp2_timer_init(void);
-extern void __init mmp2_init_irq(void);
extern void mmp2_clear_pmic_int(void);
-#include <linux/i2c.h>
-#include <linux/platform_data/i2c-pxa.h>
-#include <linux/irqchip/mmp.h>
-
-#include "devices.h"
-
-extern struct mmp_device_desc mmp2_device_uart1;
-extern struct mmp_device_desc mmp2_device_uart2;
-extern struct mmp_device_desc mmp2_device_uart3;
-extern struct mmp_device_desc mmp2_device_uart4;
-extern struct mmp_device_desc mmp2_device_twsi1;
-extern struct mmp_device_desc mmp2_device_twsi2;
-extern struct mmp_device_desc mmp2_device_twsi3;
-extern struct mmp_device_desc mmp2_device_twsi4;
-extern struct mmp_device_desc mmp2_device_twsi5;
-extern struct mmp_device_desc mmp2_device_twsi6;
-extern struct mmp_device_desc mmp2_device_sdh0;
-extern struct mmp_device_desc mmp2_device_sdh1;
-extern struct mmp_device_desc mmp2_device_sdh2;
-extern struct mmp_device_desc mmp2_device_sdh3;
-
-extern struct platform_device mmp2_device_gpio;
-
-static inline int mmp2_add_uart(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &mmp2_device_uart1; break;
- case 2: d = &mmp2_device_uart2; break;
- case 3: d = &mmp2_device_uart3; break;
- case 4: d = &mmp2_device_uart4; break;
- default:
- return -EINVAL;
- }
-
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
- struct i2c_board_info *info, unsigned size)
-{
- struct mmp_device_desc *d = NULL;
- int ret;
-
- switch (id) {
- case 1: d = &mmp2_device_twsi1; break;
- case 2: d = &mmp2_device_twsi2; break;
- case 3: d = &mmp2_device_twsi3; break;
- case 4: d = &mmp2_device_twsi4; break;
- case 5: d = &mmp2_device_twsi5; break;
- case 6: d = &mmp2_device_twsi6; break;
- default:
- return -EINVAL;
- }
-
- ret = i2c_register_board_info(id - 1, info, size);
- if (ret)
- return ret;
-
- return mmp_register_device(d, data, sizeof(*data));
-}
-
-static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 0: d = &mmp2_device_sdh0; break;
- case 1: d = &mmp2_device_sdh1; break;
- case 2: d = &mmp2_device_sdh2; break;
- case 3: d = &mmp2_device_sdh3; break;
- default:
- return -EINVAL;
- }
-
- return mmp_register_device(d, data, sizeof(*data));
-}
-
#endif /* __ASM_MACH_MMP2_H */
diff --git a/arch/arm/mach-mmp/pm-mmp2.c b/arch/arm/mach-mmp/pm-mmp2.c
index 7a6f74c32d42..bd6563962d77 100644
--- a/arch/arm/mach-mmp/pm-mmp2.c
+++ b/arch/arm/mach-mmp/pm-mmp2.c
@@ -21,40 +21,6 @@
#include "addr-map.h"
#include "pm-mmp2.h"
#include "regs-icu.h"
-#include "irqs.h"
-
-int mmp2_set_wake(struct irq_data *d, unsigned int on)
-{
- unsigned long data = 0;
- int irq = d->irq;
-
- /* enable wakeup sources */
- switch (irq) {
- case IRQ_MMP2_RTC:
- case IRQ_MMP2_RTC_ALARM:
- data = MPMU_WUCRM_PJ_WAKEUP(4) | MPMU_WUCRM_PJ_RTC_ALARM;
- break;
- case IRQ_MMP2_PMIC:
- data = MPMU_WUCRM_PJ_WAKEUP(7);
- break;
- case IRQ_MMP2_MMC2:
- /* mmc use WAKEUP2, same as GPIO wakeup source */
- data = MPMU_WUCRM_PJ_WAKEUP(2);
- break;
- }
- if (on) {
- if (data) {
- data |= __raw_readl(MPMU_WUCRM_PJ);
- __raw_writel(data, MPMU_WUCRM_PJ);
- }
- } else {
- if (data) {
- data = ~data & __raw_readl(MPMU_WUCRM_PJ);
- __raw_writel(data, MPMU_WUCRM_PJ);
- }
- }
- return 0;
-}
static void pm_scu_clk_disable(void)
{
diff --git a/arch/arm/mach-mmp/pm-mmp2.h b/arch/arm/mach-mmp/pm-mmp2.h
index 70299a9450d3..70cff8bf0cc8 100644
--- a/arch/arm/mach-mmp/pm-mmp2.h
+++ b/arch/arm/mach-mmp/pm-mmp2.h
@@ -55,5 +55,5 @@ enum {
};
extern void mmp2_pm_enter_lowpower_mode(int state);
-extern int mmp2_set_wake(struct irq_data *d, unsigned int on);
+
#endif
diff --git a/arch/arm/mach-mmp/pm-pxa910.c b/arch/arm/mach-mmp/pm-pxa910.c
index 1d71d73c1862..f6ba6db0aa36 100644
--- a/arch/arm/mach-mmp/pm-pxa910.c
+++ b/arch/arm/mach-mmp/pm-pxa910.c
@@ -22,112 +22,6 @@
#include "addr-map.h"
#include "pm-pxa910.h"
#include "regs-icu.h"
-#include "irqs.h"
-
-int pxa910_set_wake(struct irq_data *data, unsigned int on)
-{
- uint32_t awucrm = 0, apcr = 0;
- int irq = data->irq;
-
- /* setting wakeup sources */
- switch (irq) {
- /* wakeup line 2 */
- case IRQ_PXA910_AP_GPIO:
- awucrm = MPMU_AWUCRM_WAKEUP(2);
- apcr |= MPMU_APCR_SLPWP2;
- break;
- /* wakeup line 3 */
- case IRQ_PXA910_KEYPAD:
- awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_KEYPRESS;
- apcr |= MPMU_APCR_SLPWP3;
- break;
- case IRQ_PXA910_ROTARY:
- awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_NEWROTARY;
- apcr |= MPMU_APCR_SLPWP3;
- break;
- case IRQ_PXA910_TRACKBALL:
- awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_TRACKBALL;
- apcr |= MPMU_APCR_SLPWP3;
- break;
- /* wakeup line 4 */
- case IRQ_PXA910_AP1_TIMER1:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_1;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_AP1_TIMER2:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_2;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_AP1_TIMER3:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_3;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_AP2_TIMER1:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_1;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_AP2_TIMER2:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_2;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_AP2_TIMER3:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_3;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- case IRQ_PXA910_RTC_ALARM:
- awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_RTC_ALARM;
- apcr |= MPMU_APCR_SLPWP4;
- break;
- /* wakeup line 5 */
- case IRQ_PXA910_USB1:
- case IRQ_PXA910_USB2:
- awucrm = MPMU_AWUCRM_WAKEUP(5);
- apcr |= MPMU_APCR_SLPWP5;
- break;
- /* wakeup line 6 */
- case IRQ_PXA910_MMC:
- awucrm = MPMU_AWUCRM_WAKEUP(6)
- | MPMU_AWUCRM_SDH1
- | MPMU_AWUCRM_SDH2;
- apcr |= MPMU_APCR_SLPWP6;
- break;
- /* wakeup line 7 */
- case IRQ_PXA910_PMIC_INT:
- awucrm = MPMU_AWUCRM_WAKEUP(7);
- apcr |= MPMU_APCR_SLPWP7;
- break;
- default:
- if (irq >= IRQ_GPIO_START && irq < IRQ_BOARD_START) {
- awucrm = MPMU_AWUCRM_WAKEUP(2);
- apcr |= MPMU_APCR_SLPWP2;
- } else {
- /* FIXME: This should return a proper error code ! */
- printk(KERN_ERR "Error: no defined wake up source irq: %d\n",
- irq);
- }
- }
-
- if (on) {
- if (awucrm) {
- awucrm |= __raw_readl(MPMU_AWUCRM);
- __raw_writel(awucrm, MPMU_AWUCRM);
- }
- if (apcr) {
- apcr = ~apcr & __raw_readl(MPMU_APCR);
- __raw_writel(apcr, MPMU_APCR);
- }
- } else {
- if (awucrm) {
- awucrm = ~awucrm & __raw_readl(MPMU_AWUCRM);
- __raw_writel(awucrm, MPMU_AWUCRM);
- }
- if (apcr) {
- apcr |= __raw_readl(MPMU_APCR);
- __raw_writel(apcr, MPMU_APCR);
- }
- }
- return 0;
-}
void pxa910_pm_enter_lowpower_mode(int state)
{
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 1e9389245d0e..565d4a6c3bd5 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -12,7 +12,6 @@
#include <linux/clk.h>
#include <linux/clk/mmp.h>
#include <linux/platform_device.h>
-#include <linux/platform_data/mv_usb.h>
#include <linux/dma-mapping.h>
#include <asm/mach/time.h>
@@ -21,13 +20,9 @@
#include "addr-map.h"
#include "common.h"
#include <linux/soc/mmp/cputype.h>
+#include <linux/soc/pxa/mfp.h>
#include "devices.h"
-#include "irqs.h"
-#include "mfp.h"
#include "pxa168.h"
-#include "regs-apbc.h"
-#include "regs-apmu.h"
-#include "regs-usb.h"
#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
@@ -41,11 +36,6 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
MFP_ADDR_END,
};
-void __init pxa168_init_irq(void)
-{
- icu_init_irq();
-}
-
static int __init pxa168_init(void)
{
if (cpu_is_pxa168()) {
@@ -59,117 +49,3 @@ static int __init pxa168_init(void)
return 0;
}
postcore_initcall(pxa168_init);
-
-/* system timer - clock enabled, 3.25MHz */
-#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
-#define APBC_TIMERS APBC_REG(0x34)
-
-void __init pxa168_timer_init(void)
-{
- /* this is early, we have to initialize the CCU registers by
- * ourselves instead of using clk_* API. Clock rate is defined
- * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
- */
- __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
-
- /* 3.25MHz, bus/functional clock enabled, release reset */
- __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
-
- mmp_timer_init(IRQ_PXA168_TIMER1, 3250000);
-}
-
-void pxa168_clear_keypad_wakeup(void)
-{
- uint32_t val;
- uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
-
- /* wake event clear is needed in order to clear keypad interrupt */
- val = __raw_readl(APMU_WAKE_CLR);
- __raw_writel(val | mask, APMU_WAKE_CLR);
-}
-
-/* on-chip devices */
-PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
-PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
-PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
-PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
-PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
-PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
-PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
-PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
-PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
-PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
-PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
-PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
-PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
-PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
-PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
-PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
-PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
-PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
-
-struct resource pxa168_resource_gpio[] = {
- {
- .start = 0xd4019000,
- .end = 0xd4019fff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_PXA168_GPIOX,
- .end = IRQ_PXA168_GPIOX,
- .name = "gpio_mux",
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa168_device_gpio = {
- .name = "mmp-gpio",
- .id = -1,
- .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
- .resource = pxa168_resource_gpio,
-};
-
-struct resource pxa168_usb_host_resources[] = {
- /* USB Host conroller register base */
- [0] = {
- .start = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
- .end = PXA168_U2H_REGBASE + USB_REG_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "capregs",
- },
- /* USB PHY register base */
- [1] = {
- .start = PXA168_U2H_PHYBASE,
- .end = PXA168_U2H_PHYBASE + USB_PHY_RANGE,
- .flags = IORESOURCE_MEM,
- .name = "phyregs",
- },
- [2] = {
- .start = IRQ_PXA168_USB2,
- .end = IRQ_PXA168_USB2,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
-struct platform_device pxa168_device_usb_host = {
- .name = "pxa-sph",
- .id = -1,
- .dev = {
- .dma_mask = &pxa168_usb_host_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-
- .num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
- .resource = pxa168_usb_host_resources,
-};
-
-int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
-{
- pxa168_device_usb_host.dev.platform_data = pdata;
- return platform_device_register(&pxa168_device_usb_host);
-}
-
-void pxa168_restart(enum reboot_mode mode, const char *cmd)
-{
- soft_restart(0xffff0000);
-}
diff --git a/arch/arm/mach-mmp/pxa168.h b/arch/arm/mach-mmp/pxa168.h
index c1547e098f09..279783ef239d 100644
--- a/arch/arm/mach-mmp/pxa168.h
+++ b/arch/arm/mach-mmp/pxa168.h
@@ -10,130 +10,7 @@ extern void pxa168_restart(enum reboot_mode, const char *);
extern void pxa168_clear_keypad_wakeup(void);
#include <linux/i2c.h>
-#include <linux/platform_data/i2c-pxa.h>
-#include <linux/platform_data/mtd-nand-pxa3xx.h>
-#include <video/pxa168fb.h>
-#include <linux/platform_data/keypad-pxa27x.h>
-#include <linux/pxa168_eth.h>
-#include <linux/platform_data/mv_usb.h>
#include <linux/soc/mmp/cputype.h>
#include <linux/irqchip/mmp.h>
-#include "devices.h"
-
-extern struct mmp_device_desc pxa168_device_uart1;
-extern struct mmp_device_desc pxa168_device_uart2;
-extern struct mmp_device_desc pxa168_device_uart3;
-extern struct mmp_device_desc pxa168_device_twsi0;
-extern struct mmp_device_desc pxa168_device_twsi1;
-extern struct mmp_device_desc pxa168_device_pwm1;
-extern struct mmp_device_desc pxa168_device_pwm2;
-extern struct mmp_device_desc pxa168_device_pwm3;
-extern struct mmp_device_desc pxa168_device_pwm4;
-extern struct mmp_device_desc pxa168_device_ssp1;
-extern struct mmp_device_desc pxa168_device_ssp2;
-extern struct mmp_device_desc pxa168_device_ssp3;
-extern struct mmp_device_desc pxa168_device_ssp4;
-extern struct mmp_device_desc pxa168_device_ssp5;
-extern struct mmp_device_desc pxa168_device_nand;
-extern struct mmp_device_desc pxa168_device_fb;
-extern struct mmp_device_desc pxa168_device_keypad;
-extern struct mmp_device_desc pxa168_device_eth;
-
-/* pdata can be NULL */
-extern int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata);
-
-
-extern struct platform_device pxa168_device_gpio;
-
-static inline int pxa168_add_uart(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &pxa168_device_uart1; break;
- case 2: d = &pxa168_device_uart2; break;
- case 3: d = &pxa168_device_uart3; break;
- }
-
- if (d == NULL)
- return -EINVAL;
-
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int pxa168_add_twsi(int id, struct i2c_pxa_platform_data *data,
- struct i2c_board_info *info, unsigned size)
-{
- struct mmp_device_desc *d = NULL;
- int ret;
-
- switch (id) {
- case 0: d = &pxa168_device_twsi0; break;
- case 1: d = &pxa168_device_twsi1; break;
- default:
- return -EINVAL;
- }
-
- ret = i2c_register_board_info(id, info, size);
- if (ret)
- return ret;
-
- return mmp_register_device(d, data, sizeof(*data));
-}
-
-static inline int pxa168_add_pwm(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &pxa168_device_pwm1; break;
- case 2: d = &pxa168_device_pwm2; break;
- case 3: d = &pxa168_device_pwm3; break;
- case 4: d = &pxa168_device_pwm4; break;
- default:
- return -EINVAL;
- }
-
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int pxa168_add_ssp(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &pxa168_device_ssp1; break;
- case 2: d = &pxa168_device_ssp2; break;
- case 3: d = &pxa168_device_ssp3; break;
- case 4: d = &pxa168_device_ssp4; break;
- case 5: d = &pxa168_device_ssp5; break;
- default:
- return -EINVAL;
- }
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info)
-{
- return mmp_register_device(&pxa168_device_nand, info, sizeof(*info));
-}
-
-static inline int pxa168_add_fb(struct pxa168fb_mach_info *mi)
-{
- return mmp_register_device(&pxa168_device_fb, mi, sizeof(*mi));
-}
-
-static inline int pxa168_add_keypad(struct pxa27x_keypad_platform_data *data)
-{
- if (cpu_is_pxa168())
- data->clear_wakeup_event = pxa168_clear_keypad_wakeup;
-
- return mmp_register_device(&pxa168_device_keypad, data, sizeof(*data));
-}
-
-static inline int pxa168_add_eth(struct pxa168_eth_platform_data *data)
-{
- return mmp_register_device(&pxa168_device_eth, data, sizeof(*data));
-}
#endif /* __ASM_MACH_PXA168_H */
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index b19a069d9fab..f389b99cd9bd 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -17,13 +17,10 @@
#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/time.h>
#include "addr-map.h"
-#include "regs-apbc.h"
#include <linux/soc/mmp/cputype.h>
+#include <linux/soc/pxa/mfp.h>
#include "irqs.h"
-#include "mfp.h"
-#include "devices.h"
#include "pm-pxa910.h"
-#include "pxa910.h"
#include "common.h"
@@ -77,14 +74,6 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
MFP_ADDR_END,
};
-void __init pxa910_init_irq(void)
-{
- icu_init_irq();
-#ifdef CONFIG_PM
- icu_irq_chip.irq_set_wake = pxa910_set_wake;
-#endif
-}
-
static int __init pxa910_init(void)
{
if (cpu_is_pxa910()) {
@@ -102,89 +91,3 @@ static int __init pxa910_init(void)
return 0;
}
postcore_initcall(pxa910_init);
-
-/* system timer - clock enabled, 3.25MHz */
-#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
-#define APBC_TIMERS APBC_REG(0x34)
-
-void __init pxa910_timer_init(void)
-{
- /* reset and configure */
- __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
- __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
-
- mmp_timer_init(IRQ_PXA910_AP1_TIMER1, 3250000);
-}
-
-/* on-chip devices */
-
-/* NOTE: there are totally 3 UARTs on PXA910:
- *
- * UART1 - Slow UART (can be used both by AP and CP)
- * UART2/3 - Fast UART
- *
- * To be backward compatible with the legacy FFUART/BTUART/STUART sequence,
- * they are re-ordered as:
- *
- * pxa910_device_uart1 - UART2 as FFUART
- * pxa910_device_uart2 - UART3 as BTUART
- *
- * UART1 is not used by AP for the moment.
- */
-PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
-PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
-PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
-PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
-PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
-PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
-PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
-PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
-PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
-PXA910_DEVICE(disp, "mmp-disp", 0, LCD, 0xd420b000, 0x1ec);
-PXA910_DEVICE(fb, "mmp-fb", -1, NONE, 0, 0);
-PXA910_DEVICE(panel, "tpo-hvga", -1, NONE, 0, 0);
-
-struct resource pxa910_resource_gpio[] = {
- {
- .start = 0xd4019000,
- .end = 0xd4019fff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_PXA910_AP_GPIO,
- .end = IRQ_PXA910_AP_GPIO,
- .name = "gpio_mux",
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa910_device_gpio = {
- .name = "mmp-gpio",
- .id = -1,
- .num_resources = ARRAY_SIZE(pxa910_resource_gpio),
- .resource = pxa910_resource_gpio,
-};
-
-static struct resource pxa910_resource_rtc[] = {
- {
- .start = 0xd4010000,
- .end = 0xd401003f,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_PXA910_RTC_INT,
- .end = IRQ_PXA910_RTC_INT,
- .name = "rtc 1Hz",
- .flags = IORESOURCE_IRQ,
- }, {
- .start = IRQ_PXA910_RTC_ALARM,
- .end = IRQ_PXA910_RTC_ALARM,
- .name = "rtc alarm",
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa910_device_rtc = {
- .name = "sa1100-rtc",
- .id = -1,
- .num_resources = ARRAY_SIZE(pxa910_resource_rtc),
- .resource = pxa910_resource_rtc,
-};
diff --git a/arch/arm/mach-mmp/pxa910.h b/arch/arm/mach-mmp/pxa910.h
index 7d229214065a..66a691d89ae1 100644
--- a/arch/arm/mach-mmp/pxa910.h
+++ b/arch/arm/mach-mmp/pxa910.h
@@ -6,85 +6,6 @@ extern void pxa910_timer_init(void);
extern void __init pxa910_init_irq(void);
#include <linux/i2c.h>
-#include <linux/platform_data/i2c-pxa.h>
-#include <linux/platform_data/mtd-nand-pxa3xx.h>
-#include <video/mmp_disp.h>
#include <linux/irqchip/mmp.h>
-#include "devices.h"
-
-extern struct mmp_device_desc pxa910_device_uart1;
-extern struct mmp_device_desc pxa910_device_uart2;
-extern struct mmp_device_desc pxa910_device_twsi0;
-extern struct mmp_device_desc pxa910_device_twsi1;
-extern struct mmp_device_desc pxa910_device_pwm1;
-extern struct mmp_device_desc pxa910_device_pwm2;
-extern struct mmp_device_desc pxa910_device_pwm3;
-extern struct mmp_device_desc pxa910_device_pwm4;
-extern struct mmp_device_desc pxa910_device_nand;
-extern struct platform_device pxa168_device_usb_phy;
-extern struct platform_device pxa168_device_u2o;
-extern struct platform_device pxa168_device_u2ootg;
-extern struct platform_device pxa168_device_u2oehci;
-extern struct mmp_device_desc pxa910_device_disp;
-extern struct mmp_device_desc pxa910_device_fb;
-extern struct mmp_device_desc pxa910_device_panel;
-extern struct platform_device pxa910_device_gpio;
-extern struct platform_device pxa910_device_rtc;
-
-static inline int pxa910_add_uart(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &pxa910_device_uart1; break;
- case 2: d = &pxa910_device_uart2; break;
- }
-
- if (d == NULL)
- return -EINVAL;
-
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int pxa910_add_twsi(int id, struct i2c_pxa_platform_data *data,
- struct i2c_board_info *info, unsigned size)
-{
- struct mmp_device_desc *d = NULL;
- int ret;
-
- switch (id) {
- case 0: d = &pxa910_device_twsi0; break;
- case 1: d = &pxa910_device_twsi1; break;
- default:
- return -EINVAL;
- }
-
- ret = i2c_register_board_info(id, info, size);
- if (ret)
- return ret;
-
- return mmp_register_device(d, data, sizeof(*data));
-}
-
-static inline int pxa910_add_pwm(int id)
-{
- struct mmp_device_desc *d = NULL;
-
- switch (id) {
- case 1: d = &pxa910_device_pwm1; break;
- case 2: d = &pxa910_device_pwm2; break;
- case 3: d = &pxa910_device_pwm3; break;
- case 4: d = &pxa910_device_pwm4; break;
- default:
- return -EINVAL;
- }
-
- return mmp_register_device(d, NULL, 0);
-}
-
-static inline int pxa910_add_nand(struct pxa3xx_nand_platform_data *info)
-{
- return mmp_register_device(&pxa910_device_nand, info, sizeof(*info));
-}
#endif /* __ASM_MACH_PXA910_H */
diff --git a/arch/arm/mach-mmp/regs-apbc.h b/arch/arm/mach-mmp/regs-apbc.h
deleted file mode 100644
index d0d00c2cce38..000000000000
--- a/arch/arm/mach-mmp/regs-apbc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Application Peripheral Bus Clock Unit
- */
-
-#ifndef __ASM_MACH_REGS_APBC_H
-#define __ASM_MACH_REGS_APBC_H
-
-#include "addr-map.h"
-
-/* Common APB clock register bit definitions */
-#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */
-#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */
-#define APBC_RST (1 << 2) /* Reset Generation */
-
-/* Functional Clock Selection Mask */
-#define APBC_FNCLKSEL(x) (((x) & 0xf) << 4)
-
-#endif /* __ASM_MACH_REGS_APBC_H */
diff --git a/arch/arm/mach-mmp/regs-apmu.h b/arch/arm/mach-mmp/regs-apmu.h
deleted file mode 100644
index e36f6503adfb..000000000000
--- a/arch/arm/mach-mmp/regs-apmu.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Application Subsystem Power Management Unit
- */
-
-#ifndef __ASM_MACH_REGS_APMU_H
-#define __ASM_MACH_REGS_APMU_H
-
-#include "addr-map.h"
-
-#define APMU_FNCLK_EN (1 << 4)
-#define APMU_AXICLK_EN (1 << 3)
-#define APMU_FNRST_DIS (1 << 1)
-#define APMU_AXIRST_DIS (1 << 0)
-
-/* Wake Clear Register */
-#define APMU_WAKE_CLR APMU_REG(0x07c)
-
-#define APMU_PXA168_KP_WAKE_CLR (1 << 7)
-#define APMU_PXA168_CFI_WAKE_CLR (1 << 6)
-#define APMU_PXA168_XD_WAKE_CLR (1 << 5)
-#define APMU_PXA168_MSP_WAKE_CLR (1 << 4)
-#define APMU_PXA168_SD4_WAKE_CLR (1 << 3)
-#define APMU_PXA168_SD3_WAKE_CLR (1 << 2)
-#define APMU_PXA168_SD2_WAKE_CLR (1 << 1)
-#define APMU_PXA168_SD1_WAKE_CLR (1 << 0)
-
-#endif /* __ASM_MACH_REGS_APMU_H */
diff --git a/arch/arm/mach-mmp/regs-timers.h b/arch/arm/mach-mmp/regs-timers.h
index a69f4d7e3443..0cc4aca40e2c 100644
--- a/arch/arm/mach-mmp/regs-timers.h
+++ b/arch/arm/mach-mmp/regs-timers.h
@@ -6,11 +6,6 @@
#ifndef __ASM_MACH_REGS_TIMERS_H
#define __ASM_MACH_REGS_TIMERS_H
-#include "addr-map.h"
-
-#define TIMERS1_VIRT_BASE (APB_VIRT_BASE + 0x14000)
-#define TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x16000)
-
#define TMR_CCR (0x0000)
#define TMR_TN_MM(n, m) (0x0004 + ((n) << 3) + (((n) + (m)) << 2))
#define TMR_CR(n) (0x0028 + ((n) << 2))
diff --git a/arch/arm/mach-mmp/regs-usb.h b/arch/arm/mach-mmp/regs-usb.h
deleted file mode 100644
index ed0d1aa0ad6c..000000000000
--- a/arch/arm/mach-mmp/regs-usb.h
+++ /dev/null
@@ -1,155 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
- */
-
-#ifndef __ASM_ARCH_REGS_USB_H
-#define __ASM_ARCH_REGS_USB_H
-
-#define PXA168_U2O_REGBASE (0xd4208000)
-#define PXA168_U2O_PHYBASE (0xd4207000)
-
-#define PXA168_U2H_REGBASE (0xd4209000)
-#define PXA168_U2H_PHYBASE (0xd4206000)
-
-#define MMP3_HSIC1_REGBASE (0xf0001000)
-#define MMP3_HSIC1_PHYBASE (0xf0001800)
-
-#define MMP3_HSIC2_REGBASE (0xf0002000)
-#define MMP3_HSIC2_PHYBASE (0xf0002800)
-
-#define MMP3_FSIC_REGBASE (0xf0003000)
-#define MMP3_FSIC_PHYBASE (0xf0003800)
-
-
-#define USB_REG_RANGE (0x1ff)
-#define USB_PHY_RANGE (0xff)
-
-/* registers */
-#define U2x_CAPREGS_OFFSET 0x100
-
-/* phy regs */
-#define UTMI_REVISION 0x0
-#define UTMI_CTRL 0x4
-#define UTMI_PLL 0x8
-#define UTMI_TX 0xc
-#define UTMI_RX 0x10
-#define UTMI_IVREF 0x14
-#define UTMI_T0 0x18
-#define UTMI_T1 0x1c
-#define UTMI_T2 0x20
-#define UTMI_T3 0x24
-#define UTMI_T4 0x28
-#define UTMI_T5 0x2c
-#define UTMI_RESERVE 0x30
-#define UTMI_USB_INT 0x34
-#define UTMI_DBG_CTL 0x38
-#define UTMI_OTG_ADDON 0x3c
-
-/* For UTMICTRL Register */
-#define UTMI_CTRL_USB_CLK_EN (1 << 31)
-/* pxa168 */
-#define UTMI_CTRL_SUSPEND_SET1 (1 << 30)
-#define UTMI_CTRL_SUSPEND_SET2 (1 << 29)
-#define UTMI_CTRL_RXBUF_PDWN (1 << 24)
-#define UTMI_CTRL_TXBUF_PDWN (1 << 11)
-
-#define UTMI_CTRL_INPKT_DELAY_SHIFT 30
-#define UTMI_CTRL_INPKT_DELAY_SOF_SHIFT 28
-#define UTMI_CTRL_PU_REF_SHIFT 20
-#define UTMI_CTRL_ARC_PULLDN_SHIFT 12
-#define UTMI_CTRL_PLL_PWR_UP_SHIFT 1
-#define UTMI_CTRL_PWR_UP_SHIFT 0
-
-/* For UTMI_PLL Register */
-#define UTMI_PLL_PLLCALI12_SHIFT 29
-#define UTMI_PLL_PLLCALI12_MASK (0x3 << 29)
-
-#define UTMI_PLL_PLLVDD18_SHIFT 27
-#define UTMI_PLL_PLLVDD18_MASK (0x3 << 27)
-
-#define UTMI_PLL_PLLVDD12_SHIFT 25
-#define UTMI_PLL_PLLVDD12_MASK (0x3 << 25)
-
-#define UTMI_PLL_CLK_BLK_EN_SHIFT 24
-#define CLK_BLK_EN (0x1 << 24)
-#define PLL_READY (0x1 << 23)
-#define KVCO_EXT (0x1 << 22)
-#define VCOCAL_START (0x1 << 21)
-
-#define UTMI_PLL_KVCO_SHIFT 15
-#define UTMI_PLL_KVCO_MASK (0x7 << 15)
-
-#define UTMI_PLL_ICP_SHIFT 12
-#define UTMI_PLL_ICP_MASK (0x7 << 12)
-
-#define UTMI_PLL_FBDIV_SHIFT 4
-#define UTMI_PLL_FBDIV_MASK (0xFF << 4)
-
-#define UTMI_PLL_REFDIV_SHIFT 0
-#define UTMI_PLL_REFDIV_MASK (0xF << 0)
-
-/* For UTMI_TX Register */
-#define UTMI_TX_REG_EXT_FS_RCAL_SHIFT 27
-#define UTMI_TX_REG_EXT_FS_RCAL_MASK (0xf << 27)
-
-#define UTMI_TX_REG_EXT_FS_RCAL_EN_SHIFT 26
-#define UTMI_TX_REG_EXT_FS_RCAL_EN_MASK (0x1 << 26)
-
-#define UTMI_TX_TXVDD12_SHIFT 22
-#define UTMI_TX_TXVDD12_MASK (0x3 << 22)
-
-#define UTMI_TX_CK60_PHSEL_SHIFT 17
-#define UTMI_TX_CK60_PHSEL_MASK (0xf << 17)
-
-#define UTMI_TX_IMPCAL_VTH_SHIFT 14
-#define UTMI_TX_IMPCAL_VTH_MASK (0x7 << 14)
-
-#define REG_RCAL_START (0x1 << 12)
-
-#define UTMI_TX_LOW_VDD_EN_SHIFT 11
-
-#define UTMI_TX_AMP_SHIFT 0
-#define UTMI_TX_AMP_MASK (0x7 << 0)
-
-/* For UTMI_RX Register */
-#define UTMI_REG_SQ_LENGTH_SHIFT 15
-#define UTMI_REG_SQ_LENGTH_MASK (0x3 << 15)
-
-#define UTMI_RX_SQ_THRESH_SHIFT 4
-#define UTMI_RX_SQ_THRESH_MASK (0xf << 4)
-
-#define UTMI_OTG_ADDON_OTG_ON (1 << 0)
-
-/* fsic registers */
-#define FSIC_MISC 0x4
-#define FSIC_INT 0x28
-#define FSIC_CTRL 0x30
-
-/* HSIC registers */
-#define HSIC_PAD_CTRL 0x4
-
-#define HSIC_CTRL 0x8
-#define HSIC_CTRL_HSIC_ENABLE (1<<7)
-#define HSIC_CTRL_PLL_BYPASS (1<<4)
-
-#define TEST_GRP_0 0xc
-#define TEST_GRP_1 0x10
-
-#define HSIC_INT 0x14
-#define HSIC_INT_READY_INT_EN (1<<10)
-#define HSIC_INT_CONNECT_INT_EN (1<<9)
-#define HSIC_INT_CORE_INT_EN (1<<8)
-#define HSIC_INT_HS_READY (1<<2)
-#define HSIC_INT_CONNECT (1<<1)
-#define HSIC_INT_CORE (1<<0)
-
-#define HSIC_CONFIG 0x18
-#define USBHSIC_CTRL 0x20
-
-#define HSIC_USB_CTRL 0x28
-#define HSIC_USB_CTRL_CLKEN 1
-#define HSIC_USB_CLK_PHY 0x0
-#define HSIC_USB_CLK_PMU 0x1
-
-#endif /* __ASM_ARCH_PXA_U2O_H */
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 41b2e8abc9e6..0f0ed2428595 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -29,18 +29,13 @@
#include <linux/sched_clock.h>
#include <asm/mach/time.h>
-#include "addr-map.h"
#include "regs-timers.h"
-#include "regs-apbc.h"
-#include "irqs.h"
#include <linux/soc/mmp/cputype.h>
-#define TIMERS_VIRT_BASE TIMERS1_VIRT_BASE
-
#define MAX_DELTA (0xfffffffe)
#define MIN_DELTA (16)
-static void __iomem *mmp_timer_base = TIMERS_VIRT_BASE;
+static void __iomem *mmp_timer_base;
/*
* FIXME: the timer needs some delay to stablize the counter capture
@@ -174,7 +169,7 @@ static void __init timer_config(void)
__raw_writel(0x2, mmp_timer_base + TMR_CER);
}
-void __init mmp_timer_init(int irq, unsigned long rate)
+static void __init mmp_timer_init(int irq, unsigned long rate)
{
timer_config();
--
2.29.2
_______________________________________________
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^ permalink raw reply related [flat|nested] 55+ messages in thread
* [PATCH 11/11] ARM: mmp: remove old PM support
2022-10-21 15:49 ` Arnd Bergmann
@ 2022-10-21 15:49 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann
From: Arnd Bergmann <arnd@arndb.de>
Assuming that we don't actually want the old-style pm-mmp2.c
and pm-pxa910.c implementation, all these files can go away
as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-mmp/Kconfig | 3 -
arch/arm/mach-mmp/Makefile | 9 --
arch/arm/mach-mmp/irqs.h | 67 ----------
arch/arm/mach-mmp/mmp2.c | 106 ----------------
arch/arm/mach-mmp/mmp2.h | 8 --
arch/arm/mach-mmp/pm-mmp2.c | 214 --------------------------------
arch/arm/mach-mmp/pm-mmp2.h | 59 ---------
arch/arm/mach-mmp/pm-pxa910.c | 166 -------------------------
arch/arm/mach-mmp/pm-pxa910.h | 75 -----------
arch/arm/mach-mmp/pxa168.c | 51 --------
arch/arm/mach-mmp/pxa168.h | 16 ---
arch/arm/mach-mmp/pxa910.c | 93 --------------
arch/arm/mach-mmp/pxa910.h | 11 --
arch/arm/mach-mmp/regs-icu.h | 69 ----------
include/linux/soc/mmp/cputype.h | 24 +---
15 files changed, 1 insertion(+), 970 deletions(-)
delete mode 100644 arch/arm/mach-mmp/irqs.h
delete mode 100644 arch/arm/mach-mmp/mmp2.c
delete mode 100644 arch/arm/mach-mmp/mmp2.h
delete mode 100644 arch/arm/mach-mmp/pm-mmp2.c
delete mode 100644 arch/arm/mach-mmp/pm-mmp2.h
delete mode 100644 arch/arm/mach-mmp/pm-pxa910.c
delete mode 100644 arch/arm/mach-mmp/pm-pxa910.h
delete mode 100644 arch/arm/mach-mmp/pxa168.c
delete mode 100644 arch/arm/mach-mmp/pxa168.h
delete mode 100644 arch/arm/mach-mmp/pxa910.c
delete mode 100644 arch/arm/mach-mmp/pxa910.h
delete mode 100644 arch/arm/mach-mmp/regs-icu.h
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index a1396c495b85..85b0d9ddb7d8 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -20,8 +20,6 @@ config MACH_MMP_DT
select PINCTRL_SINGLE
select ARCH_HAS_RESET_CONTROLLER
select CPU_MOHAWK
- select CPU_PXA168 if ATAGS
- select CPU_PXA910 if ATAGS
help
Include support for Marvell MMP2 based platforms using
the device tree. Needn't select any other machine while
@@ -34,7 +32,6 @@ config MACH_MMP2_DT
select PINCTRL_SINGLE
select ARCH_HAS_RESET_CONTROLLER
select CPU_PJ4
- select CPU_MMP2 if ATAGS
select PM_GENERIC_DOMAINS if PM
select PM_GENERIC_DOMAINS_OF if PM && OF
help
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 95d4217132eb..5d4a1a4a48cf 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -4,15 +4,6 @@
#
obj-y += common.o time.o
-# SoC support
-obj-$(CONFIG_CPU_PXA168) += pxa168.o
-obj-$(CONFIG_CPU_PXA910) += pxa910.o
-obj-$(CONFIG_CPU_MMP2) += mmp2.o
-
-ifeq ($(CONFIG_PM),y)
-obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o
-obj-$(CONFIG_CPU_MMP2) += pm-mmp2.o
-endif
ifeq ($(CONFIG_SMP),y)
obj-$(CONFIG_MACH_MMP3_DT) += platsmp.o
endif
diff --git a/arch/arm/mach-mmp/irqs.h b/arch/arm/mach-mmp/irqs.h
deleted file mode 100644
index b8446a17ea55..000000000000
--- a/arch/arm/mach-mmp/irqs.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_IRQS_H
-#define __ASM_MACH_IRQS_H
-
-/*
- * Interrupt numbers for PXA910
- */
-#define IRQ_PXA910_NONE (-1)
-#define IRQ_PXA910_AIRQ 0
-#define IRQ_PXA910_SSP3 1
-#define IRQ_PXA910_SSP2 2
-#define IRQ_PXA910_SSP1 3
-#define IRQ_PXA910_PMIC_INT 4
-#define IRQ_PXA910_RTC_INT 5
-#define IRQ_PXA910_RTC_ALARM 6
-#define IRQ_PXA910_TWSI0 7
-#define IRQ_PXA910_GPU 8
-#define IRQ_PXA910_KEYPAD 9
-#define IRQ_PXA910_ROTARY 10
-#define IRQ_PXA910_TRACKBALL 11
-#define IRQ_PXA910_ONEWIRE 12
-#define IRQ_PXA910_AP1_TIMER1 13
-#define IRQ_PXA910_AP1_TIMER2 14
-#define IRQ_PXA910_AP1_TIMER3 15
-#define IRQ_PXA910_IPC_AP0 16
-#define IRQ_PXA910_IPC_AP1 17
-#define IRQ_PXA910_IPC_AP2 18
-#define IRQ_PXA910_IPC_AP3 19
-#define IRQ_PXA910_IPC_AP4 20
-#define IRQ_PXA910_IPC_CP0 21
-#define IRQ_PXA910_IPC_CP1 22
-#define IRQ_PXA910_IPC_CP2 23
-#define IRQ_PXA910_IPC_CP3 24
-#define IRQ_PXA910_IPC_CP4 25
-#define IRQ_PXA910_L2_DDR 26
-#define IRQ_PXA910_UART2 27
-#define IRQ_PXA910_UART3 28
-#define IRQ_PXA910_AP2_TIMER1 29
-#define IRQ_PXA910_AP2_TIMER2 30
-#define IRQ_PXA910_CP2_TIMER1 31
-#define IRQ_PXA910_CP2_TIMER2 32
-#define IRQ_PXA910_CP2_TIMER3 33
-#define IRQ_PXA910_GSSP 34
-#define IRQ_PXA910_CP2_WDT 35
-#define IRQ_PXA910_MAIN_PMU 36
-#define IRQ_PXA910_CP_FREQ_CHG 37
-#define IRQ_PXA910_AP_FREQ_CHG 38
-#define IRQ_PXA910_MMC 39
-#define IRQ_PXA910_AEU 40
-#define IRQ_PXA910_LCD 41
-#define IRQ_PXA910_CCIC 42
-#define IRQ_PXA910_IRE 43
-#define IRQ_PXA910_USB1 44
-#define IRQ_PXA910_NAND 45
-#define IRQ_PXA910_HIFI_DMA 46
-#define IRQ_PXA910_DMA_INT0 47
-#define IRQ_PXA910_DMA_INT1 48
-#define IRQ_PXA910_AP_GPIO 49
-#define IRQ_PXA910_AP2_TIMER3 50
-#define IRQ_PXA910_USB2 51
-#define IRQ_PXA910_TWSI1 54
-#define IRQ_PXA910_CP_GPIO 55
-#define IRQ_PXA910_UART1 59 /* Slow UART */
-#define IRQ_PXA910_AP_PMU 60
-#define IRQ_PXA910_SM_INT 63 /* from PinMux */
-
-#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
deleted file mode 100644
index 8ee6a4547731..000000000000
--- a/arch/arm/mach-mmp/mmp2.c
+++ /dev/null
@@ -1,106 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/mmp2.c
- *
- * code name MMP2
- *
- * Copyright (C) 2009 Marvell International Ltd.
- */
-#include <linux/clk/mmp.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/irqchip/mmp.h>
-#include <linux/platform_device.h>
-
-#include <asm/hardware/cache-tauros2.h>
-
-#include <asm/mach/time.h>
-#include "addr-map.h"
-#include <linux/soc/mmp/cputype.h>
-#include <linux/soc/pxa/mfp.h>
-#include "mmp2.h"
-#include "pm-mmp2.h"
-
-#include "common.h"
-
-#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
-
-static struct mfp_addr_map mmp2_addr_map[] __initdata = {
-
- MFP_ADDR_X(GPIO0, GPIO58, 0x54),
- MFP_ADDR_X(GPIO59, GPIO73, 0x280),
- MFP_ADDR_X(GPIO74, GPIO101, 0x170),
-
- MFP_ADDR(GPIO102, 0x0),
- MFP_ADDR(GPIO103, 0x4),
- MFP_ADDR(GPIO104, 0x1fc),
- MFP_ADDR(GPIO105, 0x1f8),
- MFP_ADDR(GPIO106, 0x1f4),
- MFP_ADDR(GPIO107, 0x1f0),
- MFP_ADDR(GPIO108, 0x21c),
- MFP_ADDR(GPIO109, 0x218),
- MFP_ADDR(GPIO110, 0x214),
- MFP_ADDR(GPIO111, 0x200),
- MFP_ADDR(GPIO112, 0x244),
- MFP_ADDR(GPIO113, 0x25c),
- MFP_ADDR(GPIO114, 0x164),
- MFP_ADDR_X(GPIO115, GPIO122, 0x260),
-
- MFP_ADDR(GPIO123, 0x148),
- MFP_ADDR_X(GPIO124, GPIO141, 0xc),
-
- MFP_ADDR(GPIO142, 0x8),
- MFP_ADDR_X(GPIO143, GPIO151, 0x220),
- MFP_ADDR_X(GPIO152, GPIO153, 0x248),
- MFP_ADDR_X(GPIO154, GPIO155, 0x254),
- MFP_ADDR_X(GPIO156, GPIO159, 0x14c),
-
- MFP_ADDR(GPIO160, 0x250),
- MFP_ADDR(GPIO161, 0x210),
- MFP_ADDR(GPIO162, 0x20c),
- MFP_ADDR(GPIO163, 0x208),
- MFP_ADDR(GPIO164, 0x204),
- MFP_ADDR(GPIO165, 0x1ec),
- MFP_ADDR(GPIO166, 0x1e8),
- MFP_ADDR(GPIO167, 0x1e4),
- MFP_ADDR(GPIO168, 0x1e0),
-
- MFP_ADDR_X(TWSI1_SCL, TWSI1_SDA, 0x140),
- MFP_ADDR_X(TWSI4_SCL, TWSI4_SDA, 0x2bc),
-
- MFP_ADDR(PMIC_INT, 0x2c4),
- MFP_ADDR(CLK_REQ, 0x160),
-
- MFP_ADDR_END,
-};
-
-void mmp2_clear_pmic_int(void)
-{
- void __iomem *mfpr_pmic;
- unsigned long data;
-
- mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
- data = __raw_readl(mfpr_pmic);
- __raw_writel(data | (1 << 6), mfpr_pmic);
- __raw_writel(data, mfpr_pmic);
-}
-
-static int __init mmp2_init(void)
-{
- if (cpu_is_mmp2()) {
-#ifdef CONFIG_CACHE_TAUROS2
- tauros2_init(0);
-#endif
- mfp_init_base(MFPR_VIRT_BASE);
- mfp_init_addr(mmp2_addr_map);
- mmp2_clk_init(APB_PHYS_BASE + 0x50000,
- AXI_PHYS_BASE + 0x82800,
- APB_PHYS_BASE + 0x15000);
- }
-
- return 0;
-}
-postcore_initcall(mmp2_init);
diff --git a/arch/arm/mach-mmp/mmp2.h b/arch/arm/mach-mmp/mmp2.h
deleted file mode 100644
index 6616d3f7a0ac..000000000000
--- a/arch/arm/mach-mmp/mmp2.h
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_MMP2_H
-#define __ASM_MACH_MMP2_H
-
-extern void mmp2_clear_pmic_int(void);
-
-#endif /* __ASM_MACH_MMP2_H */
-
diff --git a/arch/arm/mach-mmp/pm-mmp2.c b/arch/arm/mach-mmp/pm-mmp2.c
deleted file mode 100644
index bd6563962d77..000000000000
--- a/arch/arm/mach-mmp/pm-mmp2.c
+++ /dev/null
@@ -1,214 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * MMP2 Power Management Routines
- *
- * (C) Copyright 2012 Marvell International Ltd.
- * All Rights Reserved
- */
-
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/time.h>
-#include <linux/delay.h>
-#include <linux/suspend.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/interrupt.h>
-#include <asm/mach-types.h>
-
-#include <linux/soc/mmp/cputype.h>
-#include "addr-map.h"
-#include "pm-mmp2.h"
-#include "regs-icu.h"
-
-static void pm_scu_clk_disable(void)
-{
- unsigned int val;
-
- /* close AXI fabric clock gate */
- __raw_writel(0x0, CIU_REG(0x64));
- __raw_writel(0x0, CIU_REG(0x68));
-
- /* close MCB master clock gate */
- val = __raw_readl(CIU_REG(0x1c));
- val |= 0xf0;
- __raw_writel(val, CIU_REG(0x1c));
-
- return ;
-}
-
-static void pm_scu_clk_enable(void)
-{
- unsigned int val;
-
- /* open AXI fabric clock gate */
- __raw_writel(0x03003003, CIU_REG(0x64));
- __raw_writel(0x00303030, CIU_REG(0x68));
-
- /* open MCB master clock gate */
- val = __raw_readl(CIU_REG(0x1c));
- val &= ~(0xf0);
- __raw_writel(val, CIU_REG(0x1c));
-
- return ;
-}
-
-static void pm_mpmu_clk_disable(void)
-{
- /*
- * disable clocks in MPMU_CGR_PJ register
- * except clock for APMU_PLL1, APMU_PLL1_2 and AP_26M
- */
- __raw_writel(0x0000a010, MPMU_CGR_PJ);
-}
-
-static void pm_mpmu_clk_enable(void)
-{
- unsigned int val;
-
- __raw_writel(0xdffefffe, MPMU_CGR_PJ);
- val = __raw_readl(MPMU_PLL2_CTRL1);
- val |= (1 << 29);
- __raw_writel(val, MPMU_PLL2_CTRL1);
-
- return ;
-}
-
-void mmp2_pm_enter_lowpower_mode(int state)
-{
- uint32_t idle_cfg, apcr;
-
- idle_cfg = __raw_readl(APMU_PJ_IDLE_CFG);
- apcr = __raw_readl(MPMU_PCR_PJ);
- apcr &= ~(MPMU_PCR_PJ_SLPEN | MPMU_PCR_PJ_DDRCORSD | MPMU_PCR_PJ_APBSD
- | MPMU_PCR_PJ_AXISD | MPMU_PCR_PJ_VCTCXOSD | (1 << 13));
- idle_cfg &= ~APMU_PJ_IDLE_CFG_PJ_IDLE;
-
- switch (state) {
- case POWER_MODE_SYS_SLEEP:
- apcr |= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */
- apcr |= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */
- fallthrough;
- case POWER_MODE_CHIP_SLEEP:
- apcr |= MPMU_PCR_PJ_SLPEN;
- fallthrough;
- case POWER_MODE_APPS_SLEEP:
- apcr |= MPMU_PCR_PJ_APBSD; /* set APBSD */
- fallthrough;
- case POWER_MODE_APPS_IDLE:
- apcr |= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */
- apcr |= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */
- idle_cfg |= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */
- apcr |= MPMU_PCR_PJ_SPSD;
- fallthrough;
- case POWER_MODE_CORE_EXTIDLE:
- idle_cfg |= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */
- idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK;
- idle_cfg |= APMU_PJ_IDLE_CFG_PWR_SW(3)
- | APMU_PJ_IDLE_CFG_L2_PWR_SW;
- break;
- case POWER_MODE_CORE_INTIDLE:
- apcr &= ~MPMU_PCR_PJ_SPSD;
- break;
- }
-
- /* set reserve bits */
- apcr |= (1 << 30) | (1 << 25);
-
- /* finally write the registers back */
- __raw_writel(idle_cfg, APMU_PJ_IDLE_CFG);
- __raw_writel(apcr, MPMU_PCR_PJ); /* 0xfe086000 */
-}
-
-static int mmp2_pm_enter(suspend_state_t state)
-{
- int temp;
-
- temp = __raw_readl(MMP2_ICU_INT4_MASK);
- if (temp & (1 << 1)) {
- printk(KERN_ERR "%s: PMIC interrupt is handling\n", __func__);
- return -EAGAIN;
- }
-
- temp = __raw_readl(APMU_SRAM_PWR_DWN);
- temp |= ((1 << 19) | (1 << 18));
- __raw_writel(temp, APMU_SRAM_PWR_DWN);
- pm_mpmu_clk_disable();
- pm_scu_clk_disable();
-
- printk(KERN_INFO "%s: before suspend\n", __func__);
- cpu_do_idle();
- printk(KERN_INFO "%s: after suspend\n", __func__);
-
- pm_mpmu_clk_enable(); /* enable clocks in MPMU */
- pm_scu_clk_enable(); /* enable clocks in SCU */
-
- return 0;
-}
-
-/*
- * Called after processes are frozen, but before we shut down devices.
- */
-static int mmp2_pm_prepare(void)
-{
- mmp2_pm_enter_lowpower_mode(POWER_MODE_SYS_SLEEP);
-
- return 0;
-}
-
-/*
- * Called after devices are re-setup, but before processes are thawed.
- */
-static void mmp2_pm_finish(void)
-{
- mmp2_pm_enter_lowpower_mode(POWER_MODE_CORE_INTIDLE);
-}
-
-static int mmp2_pm_valid(suspend_state_t state)
-{
- return ((state == PM_SUSPEND_STANDBY) || (state == PM_SUSPEND_MEM));
-}
-
-/*
- * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
- */
-static const struct platform_suspend_ops mmp2_pm_ops = {
- .valid = mmp2_pm_valid,
- .prepare = mmp2_pm_prepare,
- .enter = mmp2_pm_enter,
- .finish = mmp2_pm_finish,
-};
-
-static int __init mmp2_pm_init(void)
-{
- uint32_t apcr;
-
- if (!cpu_is_mmp2())
- return -EIO;
-
- suspend_set_ops(&mmp2_pm_ops);
-
- /*
- * Set bit 0, Slow clock Select 32K clock input instead of VCXO
- * VCXO is chosen by default, which would be disabled in suspend
- */
- __raw_writel(0x5, MPMU_SCCR);
-
- /*
- * Clear bit 23 of CIU_CPU_CONF
- * direct PJ4 to DDR access through Memory Controller slow queue
- * fast queue has issue and cause lcd will flick
- */
- __raw_writel(__raw_readl(CIU_REG(0x8)) & ~(0x1 << 23), CIU_REG(0x8));
-
- /* Clear default low power control bit */
- apcr = __raw_readl(MPMU_PCR_PJ);
- apcr &= ~(MPMU_PCR_PJ_SLPEN | MPMU_PCR_PJ_DDRCORSD
- | MPMU_PCR_PJ_APBSD | MPMU_PCR_PJ_AXISD | 1 << 13);
- __raw_writel(apcr, MPMU_PCR_PJ);
-
- return 0;
-}
-
-late_initcall(mmp2_pm_init);
diff --git a/arch/arm/mach-mmp/pm-mmp2.h b/arch/arm/mach-mmp/pm-mmp2.h
deleted file mode 100644
index 70cff8bf0cc8..000000000000
--- a/arch/arm/mach-mmp/pm-mmp2.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * MMP2 Power Management Routines
- *
- * (C) Copyright 2010 Marvell International Ltd.
- * All Rights Reserved
- */
-
-#ifndef __MMP2_PM_H__
-#define __MMP2_PM_H__
-
-#include "addr-map.h"
-
-#define APMU_PJ_IDLE_CFG APMU_REG(0x018)
-#define APMU_PJ_IDLE_CFG_PJ_IDLE (1 << 1)
-#define APMU_PJ_IDLE_CFG_PJ_PWRDWN (1 << 5)
-#define APMU_PJ_IDLE_CFG_PWR_SW(x) ((x) << 16)
-#define APMU_PJ_IDLE_CFG_L2_PWR_SW (1 << 19)
-#define APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK (3 << 28)
-
-#define APMU_SRAM_PWR_DWN APMU_REG(0x08c)
-
-#define MPMU_SCCR MPMU_REG(0x038)
-#define MPMU_PCR_PJ MPMU_REG(0x1000)
-#define MPMU_PCR_PJ_AXISD (1 << 31)
-#define MPMU_PCR_PJ_SLPEN (1 << 29)
-#define MPMU_PCR_PJ_SPSD (1 << 28)
-#define MPMU_PCR_PJ_DDRCORSD (1 << 27)
-#define MPMU_PCR_PJ_APBSD (1 << 26)
-#define MPMU_PCR_PJ_INTCLR (1 << 24)
-#define MPMU_PCR_PJ_SLPWP0 (1 << 23)
-#define MPMU_PCR_PJ_SLPWP1 (1 << 22)
-#define MPMU_PCR_PJ_SLPWP2 (1 << 21)
-#define MPMU_PCR_PJ_SLPWP3 (1 << 20)
-#define MPMU_PCR_PJ_VCTCXOSD (1 << 19)
-#define MPMU_PCR_PJ_SLPWP4 (1 << 18)
-#define MPMU_PCR_PJ_SLPWP5 (1 << 17)
-#define MPMU_PCR_PJ_SLPWP6 (1 << 16)
-#define MPMU_PCR_PJ_SLPWP7 (1 << 15)
-
-#define MPMU_PLL2_CTRL1 MPMU_REG(0x0414)
-#define MPMU_CGR_PJ MPMU_REG(0x1024)
-#define MPMU_WUCRM_PJ MPMU_REG(0x104c)
-#define MPMU_WUCRM_PJ_WAKEUP(x) (1 << (x))
-#define MPMU_WUCRM_PJ_RTC_ALARM (1 << 17)
-
-enum {
- POWER_MODE_ACTIVE = 0,
- POWER_MODE_CORE_INTIDLE,
- POWER_MODE_CORE_EXTIDLE,
- POWER_MODE_APPS_IDLE,
- POWER_MODE_APPS_SLEEP,
- POWER_MODE_CHIP_SLEEP,
- POWER_MODE_SYS_SLEEP,
-};
-
-extern void mmp2_pm_enter_lowpower_mode(int state);
-
-#endif
diff --git a/arch/arm/mach-mmp/pm-pxa910.c b/arch/arm/mach-mmp/pm-pxa910.c
deleted file mode 100644
index f6ba6db0aa36..000000000000
--- a/arch/arm/mach-mmp/pm-pxa910.c
+++ /dev/null
@@ -1,166 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * PXA910 Power Management Routines
- *
- * (C) Copyright 2009 Marvell International Ltd.
- * All Rights Reserved
- */
-
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/time.h>
-#include <linux/delay.h>
-#include <linux/suspend.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <asm/mach-types.h>
-#include <asm/outercache.h>
-
-#include <linux/soc/mmp/cputype.h>
-#include "addr-map.h"
-#include "pm-pxa910.h"
-#include "regs-icu.h"
-
-void pxa910_pm_enter_lowpower_mode(int state)
-{
- uint32_t idle_cfg, apcr;
-
- idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG);
- apcr = __raw_readl(MPMU_APCR);
-
- apcr &= ~(MPMU_APCR_DDRCORSD | MPMU_APCR_APBSD | MPMU_APCR_AXISD
- | MPMU_APCR_VCTCXOSD | MPMU_APCR_STBYEN);
- idle_cfg &= ~(APMU_MOH_IDLE_CFG_MOH_IDLE
- | APMU_MOH_IDLE_CFG_MOH_PWRDWN);
-
- switch (state) {
- case POWER_MODE_UDR:
- /* only shutdown APB in UDR */
- apcr |= MPMU_APCR_STBYEN | MPMU_APCR_APBSD;
- fallthrough;
- case POWER_MODE_SYS_SLEEP:
- apcr |= MPMU_APCR_SLPEN; /* set the SLPEN bit */
- apcr |= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */
- fallthrough;
- case POWER_MODE_APPS_SLEEP:
- apcr |= MPMU_APCR_DDRCORSD; /* set DDRCORSD */
- fallthrough;
- case POWER_MODE_APPS_IDLE:
- apcr |= MPMU_APCR_AXISD; /* set AXISDD bit */
- fallthrough;
- case POWER_MODE_CORE_EXTIDLE:
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_IDLE;
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN;
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3)
- | APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3);
- fallthrough;
- case POWER_MODE_CORE_INTIDLE:
- break;
- }
-
- /* program the memory controller hardware sleep type and auto wakeup */
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ;
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN;
- __raw_writel(0x0, APMU_MC_HW_SLP_TYPE); /* auto refresh */
-
- /* set DSPSD, DTCMSD, BBSD, MSASLPEN */
- apcr |= MPMU_APCR_DSPSD | MPMU_APCR_DTCMSD | MPMU_APCR_BBSD
- | MPMU_APCR_MSASLPEN;
-
- /*always set SLEPEN bit mainly for MSA*/
- apcr |= MPMU_APCR_SLPEN;
-
- /* finally write the registers back */
- __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG);
- __raw_writel(apcr, MPMU_APCR);
-
-}
-
-static int pxa910_pm_enter(suspend_state_t state)
-{
- unsigned int idle_cfg, reg = 0;
-
- /*pmic thread not completed,exit;otherwise system can't be waked up*/
- reg = __raw_readl(ICU_INT_CONF(IRQ_PXA910_PMIC_INT));
- if ((reg & 0x3) == 0)
- return -EAGAIN;
-
- idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG);
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN
- | APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN;
- __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG);
-
- /* disable L2 */
- outer_disable();
- /* wait for l2 idle */
- while (!(readl(CIU_REG(0x8)) & (1 << 16)))
- udelay(1);
-
- cpu_do_idle();
-
- /* enable L2 */
- outer_resume();
- /* wait for l2 idle */
- while (!(readl(CIU_REG(0x8)) & (1 << 16)))
- udelay(1);
-
- idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG);
- idle_cfg &= ~(APMU_MOH_IDLE_CFG_MOH_PWRDWN
- | APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN);
- __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG);
-
- return 0;
-}
-
-/*
- * Called after processes are frozen, but before we shut down devices.
- */
-static int pxa910_pm_prepare(void)
-{
- pxa910_pm_enter_lowpower_mode(POWER_MODE_UDR);
- return 0;
-}
-
-/*
- * Called after devices are re-setup, but before processes are thawed.
- */
-static void pxa910_pm_finish(void)
-{
- pxa910_pm_enter_lowpower_mode(POWER_MODE_CORE_INTIDLE);
-}
-
-static int pxa910_pm_valid(suspend_state_t state)
-{
- return ((state == PM_SUSPEND_STANDBY) || (state == PM_SUSPEND_MEM));
-}
-
-static const struct platform_suspend_ops pxa910_pm_ops = {
- .valid = pxa910_pm_valid,
- .prepare = pxa910_pm_prepare,
- .enter = pxa910_pm_enter,
- .finish = pxa910_pm_finish,
-};
-
-static int __init pxa910_pm_init(void)
-{
- uint32_t awucrm = 0;
-
- if (!cpu_is_pxa910())
- return -EIO;
-
- suspend_set_ops(&pxa910_pm_ops);
-
- /* Set the following bits for MMP3 playback with VCTXO on */
- __raw_writel(__raw_readl(APMU_SQU_CLK_GATE_CTRL) | (1 << 30),
- APMU_SQU_CLK_GATE_CTRL);
- __raw_writel(__raw_readl(MPMU_FCCR) | (1 << 28), MPMU_FCCR);
-
- awucrm |= MPMU_AWUCRM_AP_ASYNC_INT | MPMU_AWUCRM_AP_FULL_IDLE;
- __raw_writel(awucrm, MPMU_AWUCRM);
-
- return 0;
-}
-
-late_initcall(pxa910_pm_init);
diff --git a/arch/arm/mach-mmp/pm-pxa910.h b/arch/arm/mach-mmp/pm-pxa910.h
deleted file mode 100644
index 8e6344adaf51..000000000000
--- a/arch/arm/mach-mmp/pm-pxa910.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * PXA910 Power Management Routines
- *
- * (C) Copyright 2009 Marvell International Ltd.
- * All Rights Reserved
- */
-
-#ifndef __PXA910_PM_H__
-#define __PXA910_PM_H__
-
-#define APMU_MOH_IDLE_CFG APMU_REG(0x0018)
-#define APMU_MOH_IDLE_CFG_MOH_IDLE (1 << 1)
-#define APMU_MOH_IDLE_CFG_MOH_PWRDWN (1 << 5)
-#define APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN (1 << 6)
-#define APMU_MOH_IDLE_CFG_MOH_PWR_SW(x) (((x) & 0x3) << 16)
-#define APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(x) (((x) & 0x3) << 18)
-#define APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ (1 << 21)
-#define APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN (1 << 20)
-
-#define APMU_SQU_CLK_GATE_CTRL APMU_REG(0x001c)
-#define APMU_MC_HW_SLP_TYPE APMU_REG(0x00b0)
-
-#define MPMU_FCCR MPMU_REG(0x0008)
-#define MPMU_APCR MPMU_REG(0x1000)
-#define MPMU_APCR_AXISD (1 << 31)
-#define MPMU_APCR_DSPSD (1 << 30)
-#define MPMU_APCR_SLPEN (1 << 29)
-#define MPMU_APCR_DTCMSD (1 << 28)
-#define MPMU_APCR_DDRCORSD (1 << 27)
-#define MPMU_APCR_APBSD (1 << 26)
-#define MPMU_APCR_BBSD (1 << 25)
-#define MPMU_APCR_SLPWP0 (1 << 23)
-#define MPMU_APCR_SLPWP1 (1 << 22)
-#define MPMU_APCR_SLPWP2 (1 << 21)
-#define MPMU_APCR_SLPWP3 (1 << 20)
-#define MPMU_APCR_VCTCXOSD (1 << 19)
-#define MPMU_APCR_SLPWP4 (1 << 18)
-#define MPMU_APCR_SLPWP5 (1 << 17)
-#define MPMU_APCR_SLPWP6 (1 << 16)
-#define MPMU_APCR_SLPWP7 (1 << 15)
-#define MPMU_APCR_MSASLPEN (1 << 14)
-#define MPMU_APCR_STBYEN (1 << 13)
-
-#define MPMU_AWUCRM MPMU_REG(0x104c)
-#define MPMU_AWUCRM_AP_ASYNC_INT (1 << 25)
-#define MPMU_AWUCRM_AP_FULL_IDLE (1 << 24)
-#define MPMU_AWUCRM_SDH1 (1 << 23)
-#define MPMU_AWUCRM_SDH2 (1 << 22)
-#define MPMU_AWUCRM_KEYPRESS (1 << 21)
-#define MPMU_AWUCRM_TRACKBALL (1 << 20)
-#define MPMU_AWUCRM_NEWROTARY (1 << 19)
-#define MPMU_AWUCRM_RTC_ALARM (1 << 17)
-#define MPMU_AWUCRM_AP2_TIMER_3 (1 << 13)
-#define MPMU_AWUCRM_AP2_TIMER_2 (1 << 12)
-#define MPMU_AWUCRM_AP2_TIMER_1 (1 << 11)
-#define MPMU_AWUCRM_AP1_TIMER_3 (1 << 10)
-#define MPMU_AWUCRM_AP1_TIMER_2 (1 << 9)
-#define MPMU_AWUCRM_AP1_TIMER_1 (1 << 8)
-#define MPMU_AWUCRM_WAKEUP(x) (1 << ((x) & 0x7))
-
-enum {
- POWER_MODE_ACTIVE = 0,
- POWER_MODE_CORE_INTIDLE,
- POWER_MODE_CORE_EXTIDLE,
- POWER_MODE_APPS_IDLE,
- POWER_MODE_APPS_SLEEP,
- POWER_MODE_SYS_SLEEP,
- POWER_MODE_HIBERNATE,
- POWER_MODE_UDR,
-};
-
-extern int pxa910_set_wake(struct irq_data *data, unsigned int on);
-
-#endif
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
deleted file mode 100644
index 565d4a6c3bd5..000000000000
--- a/arch/arm/mach-mmp/pxa168.c
+++ /dev/null
@@ -1,51 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/pxa168.c
- *
- * Code specific to PXA168
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/io.h>
-#include <linux/clk.h>
-#include <linux/clk/mmp.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/mach/time.h>
-#include <asm/system_misc.h>
-
-#include "addr-map.h"
-#include "common.h"
-#include <linux/soc/mmp/cputype.h>
-#include <linux/soc/pxa/mfp.h>
-#include "devices.h"
-#include "pxa168.h"
-
-#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
-
-static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
-{
- MFP_ADDR_X(GPIO0, GPIO36, 0x04c),
- MFP_ADDR_X(GPIO37, GPIO55, 0x000),
- MFP_ADDR_X(GPIO56, GPIO123, 0x0e0),
- MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
-
- MFP_ADDR_END,
-};
-
-static int __init pxa168_init(void)
-{
- if (cpu_is_pxa168()) {
- mfp_init_base(MFPR_VIRT_BASE);
- mfp_init_addr(pxa168_mfp_addr_map);
- pxa168_clk_init(APB_PHYS_BASE + 0x50000,
- AXI_PHYS_BASE + 0x82800,
- APB_PHYS_BASE + 0x15000);
- }
-
- return 0;
-}
-postcore_initcall(pxa168_init);
diff --git a/arch/arm/mach-mmp/pxa168.h b/arch/arm/mach-mmp/pxa168.h
deleted file mode 100644
index 279783ef239d..000000000000
--- a/arch/arm/mach-mmp/pxa168.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_PXA168_H
-#define __ASM_MACH_PXA168_H
-
-#include <linux/reboot.h>
-
-extern void pxa168_timer_init(void);
-extern void __init pxa168_init_irq(void);
-extern void pxa168_restart(enum reboot_mode, const char *);
-extern void pxa168_clear_keypad_wakeup(void);
-
-#include <linux/i2c.h>
-#include <linux/soc/mmp/cputype.h>
-#include <linux/irqchip/mmp.h>
-
-#endif /* __ASM_MACH_PXA168_H */
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
deleted file mode 100644
index f389b99cd9bd..000000000000
--- a/arch/arm/mach-mmp/pxa910.c
+++ /dev/null
@@ -1,93 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/pxa910.c
- *
- * Code specific to PXA910
- */
-#include <linux/clk/mmp.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/irqchip/mmp.h>
-#include <linux/platform_device.h>
-
-#include <asm/hardware/cache-tauros2.h>
-#include <asm/mach/time.h>
-#include "addr-map.h"
-#include <linux/soc/mmp/cputype.h>
-#include <linux/soc/pxa/mfp.h>
-#include "irqs.h"
-#include "pm-pxa910.h"
-
-#include "common.h"
-
-#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
-
-static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
-{
- MFP_ADDR_X(GPIO0, GPIO54, 0xdc),
- MFP_ADDR_X(GPIO67, GPIO98, 0x1b8),
- MFP_ADDR_X(GPIO100, GPIO109, 0x238),
-
- MFP_ADDR(GPIO123, 0xcc),
- MFP_ADDR(GPIO124, 0xd0),
-
- MFP_ADDR(DF_IO0, 0x40),
- MFP_ADDR(DF_IO1, 0x3c),
- MFP_ADDR(DF_IO2, 0x38),
- MFP_ADDR(DF_IO3, 0x34),
- MFP_ADDR(DF_IO4, 0x30),
- MFP_ADDR(DF_IO5, 0x2c),
- MFP_ADDR(DF_IO6, 0x28),
- MFP_ADDR(DF_IO7, 0x24),
- MFP_ADDR(DF_IO8, 0x20),
- MFP_ADDR(DF_IO9, 0x1c),
- MFP_ADDR(DF_IO10, 0x18),
- MFP_ADDR(DF_IO11, 0x14),
- MFP_ADDR(DF_IO12, 0x10),
- MFP_ADDR(DF_IO13, 0xc),
- MFP_ADDR(DF_IO14, 0x8),
- MFP_ADDR(DF_IO15, 0x4),
-
- MFP_ADDR(DF_nCS0_SM_nCS2, 0x44),
- MFP_ADDR(DF_nCS1_SM_nCS3, 0x48),
- MFP_ADDR(SM_nCS0, 0x4c),
- MFP_ADDR(SM_nCS1, 0x50),
- MFP_ADDR(DF_WEn, 0x54),
- MFP_ADDR(DF_REn, 0x58),
- MFP_ADDR(DF_CLE_SM_OEn, 0x5c),
- MFP_ADDR(DF_ALE_SM_WEn, 0x60),
- MFP_ADDR(SM_SCLK, 0x64),
- MFP_ADDR(DF_RDY0, 0x68),
- MFP_ADDR(SM_BE0, 0x6c),
- MFP_ADDR(SM_BE1, 0x70),
- MFP_ADDR(SM_ADV, 0x74),
- MFP_ADDR(DF_RDY1, 0x78),
- MFP_ADDR(SM_ADVMUX, 0x7c),
- MFP_ADDR(SM_RDY, 0x80),
-
- MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84),
-
- MFP_ADDR_END,
-};
-
-static int __init pxa910_init(void)
-{
- if (cpu_is_pxa910()) {
-#ifdef CONFIG_CACHE_TAUROS2
- tauros2_init(0);
-#endif
- mfp_init_base(MFPR_VIRT_BASE);
- mfp_init_addr(pxa910_mfp_addr_map);
- pxa910_clk_init(APB_PHYS_BASE + 0x50000,
- AXI_PHYS_BASE + 0x82800,
- APB_PHYS_BASE + 0x15000,
- APB_PHYS_BASE + 0x3b000);
- }
-
- return 0;
-}
-postcore_initcall(pxa910_init);
diff --git a/arch/arm/mach-mmp/pxa910.h b/arch/arm/mach-mmp/pxa910.h
deleted file mode 100644
index 66a691d89ae1..000000000000
--- a/arch/arm/mach-mmp/pxa910.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_PXA910_H
-#define __ASM_MACH_PXA910_H
-
-extern void pxa910_timer_init(void);
-extern void __init pxa910_init_irq(void);
-
-#include <linux/i2c.h>
-#include <linux/irqchip/mmp.h>
-
-#endif /* __ASM_MACH_PXA910_H */
diff --git a/arch/arm/mach-mmp/regs-icu.h b/arch/arm/mach-mmp/regs-icu.h
deleted file mode 100644
index 410743d2b402..000000000000
--- a/arch/arm/mach-mmp/regs-icu.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Interrupt Control Unit
- */
-
-#ifndef __ASM_MACH_ICU_H
-#define __ASM_MACH_ICU_H
-
-#include "addr-map.h"
-
-#define ICU_VIRT_BASE (AXI_VIRT_BASE + 0x82000)
-#define ICU_REG(x) (ICU_VIRT_BASE + (x))
-
-#define ICU2_VIRT_BASE (AXI_VIRT_BASE + 0x84000)
-#define ICU2_REG(x) (ICU2_VIRT_BASE + (x))
-
-#define ICU_INT_CONF(n) ICU_REG((n) << 2)
-#define ICU_INT_CONF_MASK (0xf)
-
-/************ PXA168/PXA910 (MMP) *********************/
-#define ICU_INT_CONF_AP_INT (1 << 6)
-#define ICU_INT_CONF_CP_INT (1 << 5)
-#define ICU_INT_CONF_IRQ (1 << 4)
-
-#define ICU_AP_FIQ_SEL_INT_NUM ICU_REG(0x108) /* AP FIQ Selected Interrupt */
-#define ICU_AP_IRQ_SEL_INT_NUM ICU_REG(0x10C) /* AP IRQ Selected Interrupt */
-#define ICU_AP_GBL_IRQ_MSK ICU_REG(0x114) /* AP Global Interrupt Mask */
-#define ICU_INT_STATUS_0 ICU_REG(0x128) /* Interrupt Stuats 0 */
-#define ICU_INT_STATUS_1 ICU_REG(0x12C) /* Interrupt Status 1 */
-
-/************************** MMP2 ***********************/
-
-/*
- * IRQ0/FIQ0 is routed to SP IRQ/FIQ.
- * IRQ1 is routed to PJ4 IRQ, and IRQ2 is routes to PJ4 FIQ.
- */
-#define ICU_INT_ROUTE_SP_IRQ (1 << 4)
-#define ICU_INT_ROUTE_PJ4_IRQ (1 << 5)
-#define ICU_INT_ROUTE_PJ4_FIQ (1 << 6)
-
-#define MMP2_ICU_PJ4_IRQ_STATUS0 ICU_REG(0x138)
-#define MMP2_ICU_PJ4_IRQ_STATUS1 ICU_REG(0x13c)
-#define MMP2_ICU_PJ4_FIQ_STATUS0 ICU_REG(0x140)
-#define MMP2_ICU_PJ4_FIQ_STATUS1 ICU_REG(0x144)
-
-#define MMP2_ICU_INT4_STATUS ICU_REG(0x150)
-#define MMP2_ICU_INT5_STATUS ICU_REG(0x154)
-#define MMP2_ICU_INT17_STATUS ICU_REG(0x158)
-#define MMP2_ICU_INT35_STATUS ICU_REG(0x15c)
-#define MMP2_ICU_INT51_STATUS ICU_REG(0x160)
-
-#define MMP2_ICU_INT4_MASK ICU_REG(0x168)
-#define MMP2_ICU_INT5_MASK ICU_REG(0x16C)
-#define MMP2_ICU_INT17_MASK ICU_REG(0x170)
-#define MMP2_ICU_INT35_MASK ICU_REG(0x174)
-#define MMP2_ICU_INT51_MASK ICU_REG(0x178)
-
-#define MMP2_ICU_SP_IRQ_SEL ICU_REG(0x100)
-#define MMP2_ICU_PJ4_IRQ_SEL ICU_REG(0x104)
-#define MMP2_ICU_PJ4_FIQ_SEL ICU_REG(0x108)
-
-#define MMP2_ICU_INVERT ICU_REG(0x164)
-
-#define MMP2_ICU_INV_PMIC (1 << 0)
-#define MMP2_ICU_INV_PERF (1 << 1)
-#define MMP2_ICU_INV_COMMTX (1 << 2)
-#define MMP2_ICU_INV_COMMRX (1 << 3)
-
-#endif /* __ASM_MACH_ICU_H */
diff --git a/include/linux/soc/mmp/cputype.h b/include/linux/soc/mmp/cputype.h
index 221790761e8e..f13d127fadc4 100644
--- a/include/linux/soc/mmp/cputype.h
+++ b/include/linux/soc/mmp/cputype.h
@@ -26,29 +26,7 @@
extern unsigned int mmp_chip_id;
-#ifdef CONFIG_CPU_PXA168
-static inline int cpu_is_pxa168(void)
-{
- return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
- ((mmp_chip_id & 0xfff) == 0x168);
-}
-#else
-#define cpu_is_pxa168() (0)
-#endif
-
-/* cpu_is_pxa910() is shared on both pxa910 and pxa920 */
-#ifdef CONFIG_CPU_PXA910
-static inline int cpu_is_pxa910(void)
-{
- return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
- (((mmp_chip_id & 0xfff) == 0x910) ||
- ((mmp_chip_id & 0xfff) == 0x920));
-}
-#else
-#define cpu_is_pxa910() (0)
-#endif
-
-#if defined(CONFIG_CPU_MMP2) || defined(CONFIG_MACH_MMP2_DT)
+#if defined(CONFIG_MACH_MMP2_DT)
static inline int cpu_is_mmp2(void)
{
return (((read_cpuid_id() >> 8) & 0xff) == 0x58) &&
--
2.29.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH 11/11] ARM: mmp: remove old PM support
@ 2022-10-21 15:49 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2022-10-21 15:49 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Linus Walleij, Lubomir Rintel
Cc: linux-kernel, Arnd Bergmann
From: Arnd Bergmann <arnd@arndb.de>
Assuming that we don't actually want the old-style pm-mmp2.c
and pm-pxa910.c implementation, all these files can go away
as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-mmp/Kconfig | 3 -
arch/arm/mach-mmp/Makefile | 9 --
arch/arm/mach-mmp/irqs.h | 67 ----------
arch/arm/mach-mmp/mmp2.c | 106 ----------------
arch/arm/mach-mmp/mmp2.h | 8 --
arch/arm/mach-mmp/pm-mmp2.c | 214 --------------------------------
arch/arm/mach-mmp/pm-mmp2.h | 59 ---------
arch/arm/mach-mmp/pm-pxa910.c | 166 -------------------------
arch/arm/mach-mmp/pm-pxa910.h | 75 -----------
arch/arm/mach-mmp/pxa168.c | 51 --------
arch/arm/mach-mmp/pxa168.h | 16 ---
arch/arm/mach-mmp/pxa910.c | 93 --------------
arch/arm/mach-mmp/pxa910.h | 11 --
arch/arm/mach-mmp/regs-icu.h | 69 ----------
include/linux/soc/mmp/cputype.h | 24 +---
15 files changed, 1 insertion(+), 970 deletions(-)
delete mode 100644 arch/arm/mach-mmp/irqs.h
delete mode 100644 arch/arm/mach-mmp/mmp2.c
delete mode 100644 arch/arm/mach-mmp/mmp2.h
delete mode 100644 arch/arm/mach-mmp/pm-mmp2.c
delete mode 100644 arch/arm/mach-mmp/pm-mmp2.h
delete mode 100644 arch/arm/mach-mmp/pm-pxa910.c
delete mode 100644 arch/arm/mach-mmp/pm-pxa910.h
delete mode 100644 arch/arm/mach-mmp/pxa168.c
delete mode 100644 arch/arm/mach-mmp/pxa168.h
delete mode 100644 arch/arm/mach-mmp/pxa910.c
delete mode 100644 arch/arm/mach-mmp/pxa910.h
delete mode 100644 arch/arm/mach-mmp/regs-icu.h
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index a1396c495b85..85b0d9ddb7d8 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -20,8 +20,6 @@ config MACH_MMP_DT
select PINCTRL_SINGLE
select ARCH_HAS_RESET_CONTROLLER
select CPU_MOHAWK
- select CPU_PXA168 if ATAGS
- select CPU_PXA910 if ATAGS
help
Include support for Marvell MMP2 based platforms using
the device tree. Needn't select any other machine while
@@ -34,7 +32,6 @@ config MACH_MMP2_DT
select PINCTRL_SINGLE
select ARCH_HAS_RESET_CONTROLLER
select CPU_PJ4
- select CPU_MMP2 if ATAGS
select PM_GENERIC_DOMAINS if PM
select PM_GENERIC_DOMAINS_OF if PM && OF
help
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 95d4217132eb..5d4a1a4a48cf 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -4,15 +4,6 @@
#
obj-y += common.o time.o
-# SoC support
-obj-$(CONFIG_CPU_PXA168) += pxa168.o
-obj-$(CONFIG_CPU_PXA910) += pxa910.o
-obj-$(CONFIG_CPU_MMP2) += mmp2.o
-
-ifeq ($(CONFIG_PM),y)
-obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o
-obj-$(CONFIG_CPU_MMP2) += pm-mmp2.o
-endif
ifeq ($(CONFIG_SMP),y)
obj-$(CONFIG_MACH_MMP3_DT) += platsmp.o
endif
diff --git a/arch/arm/mach-mmp/irqs.h b/arch/arm/mach-mmp/irqs.h
deleted file mode 100644
index b8446a17ea55..000000000000
--- a/arch/arm/mach-mmp/irqs.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_IRQS_H
-#define __ASM_MACH_IRQS_H
-
-/*
- * Interrupt numbers for PXA910
- */
-#define IRQ_PXA910_NONE (-1)
-#define IRQ_PXA910_AIRQ 0
-#define IRQ_PXA910_SSP3 1
-#define IRQ_PXA910_SSP2 2
-#define IRQ_PXA910_SSP1 3
-#define IRQ_PXA910_PMIC_INT 4
-#define IRQ_PXA910_RTC_INT 5
-#define IRQ_PXA910_RTC_ALARM 6
-#define IRQ_PXA910_TWSI0 7
-#define IRQ_PXA910_GPU 8
-#define IRQ_PXA910_KEYPAD 9
-#define IRQ_PXA910_ROTARY 10
-#define IRQ_PXA910_TRACKBALL 11
-#define IRQ_PXA910_ONEWIRE 12
-#define IRQ_PXA910_AP1_TIMER1 13
-#define IRQ_PXA910_AP1_TIMER2 14
-#define IRQ_PXA910_AP1_TIMER3 15
-#define IRQ_PXA910_IPC_AP0 16
-#define IRQ_PXA910_IPC_AP1 17
-#define IRQ_PXA910_IPC_AP2 18
-#define IRQ_PXA910_IPC_AP3 19
-#define IRQ_PXA910_IPC_AP4 20
-#define IRQ_PXA910_IPC_CP0 21
-#define IRQ_PXA910_IPC_CP1 22
-#define IRQ_PXA910_IPC_CP2 23
-#define IRQ_PXA910_IPC_CP3 24
-#define IRQ_PXA910_IPC_CP4 25
-#define IRQ_PXA910_L2_DDR 26
-#define IRQ_PXA910_UART2 27
-#define IRQ_PXA910_UART3 28
-#define IRQ_PXA910_AP2_TIMER1 29
-#define IRQ_PXA910_AP2_TIMER2 30
-#define IRQ_PXA910_CP2_TIMER1 31
-#define IRQ_PXA910_CP2_TIMER2 32
-#define IRQ_PXA910_CP2_TIMER3 33
-#define IRQ_PXA910_GSSP 34
-#define IRQ_PXA910_CP2_WDT 35
-#define IRQ_PXA910_MAIN_PMU 36
-#define IRQ_PXA910_CP_FREQ_CHG 37
-#define IRQ_PXA910_AP_FREQ_CHG 38
-#define IRQ_PXA910_MMC 39
-#define IRQ_PXA910_AEU 40
-#define IRQ_PXA910_LCD 41
-#define IRQ_PXA910_CCIC 42
-#define IRQ_PXA910_IRE 43
-#define IRQ_PXA910_USB1 44
-#define IRQ_PXA910_NAND 45
-#define IRQ_PXA910_HIFI_DMA 46
-#define IRQ_PXA910_DMA_INT0 47
-#define IRQ_PXA910_DMA_INT1 48
-#define IRQ_PXA910_AP_GPIO 49
-#define IRQ_PXA910_AP2_TIMER3 50
-#define IRQ_PXA910_USB2 51
-#define IRQ_PXA910_TWSI1 54
-#define IRQ_PXA910_CP_GPIO 55
-#define IRQ_PXA910_UART1 59 /* Slow UART */
-#define IRQ_PXA910_AP_PMU 60
-#define IRQ_PXA910_SM_INT 63 /* from PinMux */
-
-#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
deleted file mode 100644
index 8ee6a4547731..000000000000
--- a/arch/arm/mach-mmp/mmp2.c
+++ /dev/null
@@ -1,106 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/mmp2.c
- *
- * code name MMP2
- *
- * Copyright (C) 2009 Marvell International Ltd.
- */
-#include <linux/clk/mmp.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/irqchip/mmp.h>
-#include <linux/platform_device.h>
-
-#include <asm/hardware/cache-tauros2.h>
-
-#include <asm/mach/time.h>
-#include "addr-map.h"
-#include <linux/soc/mmp/cputype.h>
-#include <linux/soc/pxa/mfp.h>
-#include "mmp2.h"
-#include "pm-mmp2.h"
-
-#include "common.h"
-
-#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
-
-static struct mfp_addr_map mmp2_addr_map[] __initdata = {
-
- MFP_ADDR_X(GPIO0, GPIO58, 0x54),
- MFP_ADDR_X(GPIO59, GPIO73, 0x280),
- MFP_ADDR_X(GPIO74, GPIO101, 0x170),
-
- MFP_ADDR(GPIO102, 0x0),
- MFP_ADDR(GPIO103, 0x4),
- MFP_ADDR(GPIO104, 0x1fc),
- MFP_ADDR(GPIO105, 0x1f8),
- MFP_ADDR(GPIO106, 0x1f4),
- MFP_ADDR(GPIO107, 0x1f0),
- MFP_ADDR(GPIO108, 0x21c),
- MFP_ADDR(GPIO109, 0x218),
- MFP_ADDR(GPIO110, 0x214),
- MFP_ADDR(GPIO111, 0x200),
- MFP_ADDR(GPIO112, 0x244),
- MFP_ADDR(GPIO113, 0x25c),
- MFP_ADDR(GPIO114, 0x164),
- MFP_ADDR_X(GPIO115, GPIO122, 0x260),
-
- MFP_ADDR(GPIO123, 0x148),
- MFP_ADDR_X(GPIO124, GPIO141, 0xc),
-
- MFP_ADDR(GPIO142, 0x8),
- MFP_ADDR_X(GPIO143, GPIO151, 0x220),
- MFP_ADDR_X(GPIO152, GPIO153, 0x248),
- MFP_ADDR_X(GPIO154, GPIO155, 0x254),
- MFP_ADDR_X(GPIO156, GPIO159, 0x14c),
-
- MFP_ADDR(GPIO160, 0x250),
- MFP_ADDR(GPIO161, 0x210),
- MFP_ADDR(GPIO162, 0x20c),
- MFP_ADDR(GPIO163, 0x208),
- MFP_ADDR(GPIO164, 0x204),
- MFP_ADDR(GPIO165, 0x1ec),
- MFP_ADDR(GPIO166, 0x1e8),
- MFP_ADDR(GPIO167, 0x1e4),
- MFP_ADDR(GPIO168, 0x1e0),
-
- MFP_ADDR_X(TWSI1_SCL, TWSI1_SDA, 0x140),
- MFP_ADDR_X(TWSI4_SCL, TWSI4_SDA, 0x2bc),
-
- MFP_ADDR(PMIC_INT, 0x2c4),
- MFP_ADDR(CLK_REQ, 0x160),
-
- MFP_ADDR_END,
-};
-
-void mmp2_clear_pmic_int(void)
-{
- void __iomem *mfpr_pmic;
- unsigned long data;
-
- mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
- data = __raw_readl(mfpr_pmic);
- __raw_writel(data | (1 << 6), mfpr_pmic);
- __raw_writel(data, mfpr_pmic);
-}
-
-static int __init mmp2_init(void)
-{
- if (cpu_is_mmp2()) {
-#ifdef CONFIG_CACHE_TAUROS2
- tauros2_init(0);
-#endif
- mfp_init_base(MFPR_VIRT_BASE);
- mfp_init_addr(mmp2_addr_map);
- mmp2_clk_init(APB_PHYS_BASE + 0x50000,
- AXI_PHYS_BASE + 0x82800,
- APB_PHYS_BASE + 0x15000);
- }
-
- return 0;
-}
-postcore_initcall(mmp2_init);
diff --git a/arch/arm/mach-mmp/mmp2.h b/arch/arm/mach-mmp/mmp2.h
deleted file mode 100644
index 6616d3f7a0ac..000000000000
--- a/arch/arm/mach-mmp/mmp2.h
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_MMP2_H
-#define __ASM_MACH_MMP2_H
-
-extern void mmp2_clear_pmic_int(void);
-
-#endif /* __ASM_MACH_MMP2_H */
-
diff --git a/arch/arm/mach-mmp/pm-mmp2.c b/arch/arm/mach-mmp/pm-mmp2.c
deleted file mode 100644
index bd6563962d77..000000000000
--- a/arch/arm/mach-mmp/pm-mmp2.c
+++ /dev/null
@@ -1,214 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * MMP2 Power Management Routines
- *
- * (C) Copyright 2012 Marvell International Ltd.
- * All Rights Reserved
- */
-
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/time.h>
-#include <linux/delay.h>
-#include <linux/suspend.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/interrupt.h>
-#include <asm/mach-types.h>
-
-#include <linux/soc/mmp/cputype.h>
-#include "addr-map.h"
-#include "pm-mmp2.h"
-#include "regs-icu.h"
-
-static void pm_scu_clk_disable(void)
-{
- unsigned int val;
-
- /* close AXI fabric clock gate */
- __raw_writel(0x0, CIU_REG(0x64));
- __raw_writel(0x0, CIU_REG(0x68));
-
- /* close MCB master clock gate */
- val = __raw_readl(CIU_REG(0x1c));
- val |= 0xf0;
- __raw_writel(val, CIU_REG(0x1c));
-
- return ;
-}
-
-static void pm_scu_clk_enable(void)
-{
- unsigned int val;
-
- /* open AXI fabric clock gate */
- __raw_writel(0x03003003, CIU_REG(0x64));
- __raw_writel(0x00303030, CIU_REG(0x68));
-
- /* open MCB master clock gate */
- val = __raw_readl(CIU_REG(0x1c));
- val &= ~(0xf0);
- __raw_writel(val, CIU_REG(0x1c));
-
- return ;
-}
-
-static void pm_mpmu_clk_disable(void)
-{
- /*
- * disable clocks in MPMU_CGR_PJ register
- * except clock for APMU_PLL1, APMU_PLL1_2 and AP_26M
- */
- __raw_writel(0x0000a010, MPMU_CGR_PJ);
-}
-
-static void pm_mpmu_clk_enable(void)
-{
- unsigned int val;
-
- __raw_writel(0xdffefffe, MPMU_CGR_PJ);
- val = __raw_readl(MPMU_PLL2_CTRL1);
- val |= (1 << 29);
- __raw_writel(val, MPMU_PLL2_CTRL1);
-
- return ;
-}
-
-void mmp2_pm_enter_lowpower_mode(int state)
-{
- uint32_t idle_cfg, apcr;
-
- idle_cfg = __raw_readl(APMU_PJ_IDLE_CFG);
- apcr = __raw_readl(MPMU_PCR_PJ);
- apcr &= ~(MPMU_PCR_PJ_SLPEN | MPMU_PCR_PJ_DDRCORSD | MPMU_PCR_PJ_APBSD
- | MPMU_PCR_PJ_AXISD | MPMU_PCR_PJ_VCTCXOSD | (1 << 13));
- idle_cfg &= ~APMU_PJ_IDLE_CFG_PJ_IDLE;
-
- switch (state) {
- case POWER_MODE_SYS_SLEEP:
- apcr |= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */
- apcr |= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */
- fallthrough;
- case POWER_MODE_CHIP_SLEEP:
- apcr |= MPMU_PCR_PJ_SLPEN;
- fallthrough;
- case POWER_MODE_APPS_SLEEP:
- apcr |= MPMU_PCR_PJ_APBSD; /* set APBSD */
- fallthrough;
- case POWER_MODE_APPS_IDLE:
- apcr |= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */
- apcr |= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */
- idle_cfg |= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */
- apcr |= MPMU_PCR_PJ_SPSD;
- fallthrough;
- case POWER_MODE_CORE_EXTIDLE:
- idle_cfg |= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */
- idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK;
- idle_cfg |= APMU_PJ_IDLE_CFG_PWR_SW(3)
- | APMU_PJ_IDLE_CFG_L2_PWR_SW;
- break;
- case POWER_MODE_CORE_INTIDLE:
- apcr &= ~MPMU_PCR_PJ_SPSD;
- break;
- }
-
- /* set reserve bits */
- apcr |= (1 << 30) | (1 << 25);
-
- /* finally write the registers back */
- __raw_writel(idle_cfg, APMU_PJ_IDLE_CFG);
- __raw_writel(apcr, MPMU_PCR_PJ); /* 0xfe086000 */
-}
-
-static int mmp2_pm_enter(suspend_state_t state)
-{
- int temp;
-
- temp = __raw_readl(MMP2_ICU_INT4_MASK);
- if (temp & (1 << 1)) {
- printk(KERN_ERR "%s: PMIC interrupt is handling\n", __func__);
- return -EAGAIN;
- }
-
- temp = __raw_readl(APMU_SRAM_PWR_DWN);
- temp |= ((1 << 19) | (1 << 18));
- __raw_writel(temp, APMU_SRAM_PWR_DWN);
- pm_mpmu_clk_disable();
- pm_scu_clk_disable();
-
- printk(KERN_INFO "%s: before suspend\n", __func__);
- cpu_do_idle();
- printk(KERN_INFO "%s: after suspend\n", __func__);
-
- pm_mpmu_clk_enable(); /* enable clocks in MPMU */
- pm_scu_clk_enable(); /* enable clocks in SCU */
-
- return 0;
-}
-
-/*
- * Called after processes are frozen, but before we shut down devices.
- */
-static int mmp2_pm_prepare(void)
-{
- mmp2_pm_enter_lowpower_mode(POWER_MODE_SYS_SLEEP);
-
- return 0;
-}
-
-/*
- * Called after devices are re-setup, but before processes are thawed.
- */
-static void mmp2_pm_finish(void)
-{
- mmp2_pm_enter_lowpower_mode(POWER_MODE_CORE_INTIDLE);
-}
-
-static int mmp2_pm_valid(suspend_state_t state)
-{
- return ((state == PM_SUSPEND_STANDBY) || (state == PM_SUSPEND_MEM));
-}
-
-/*
- * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
- */
-static const struct platform_suspend_ops mmp2_pm_ops = {
- .valid = mmp2_pm_valid,
- .prepare = mmp2_pm_prepare,
- .enter = mmp2_pm_enter,
- .finish = mmp2_pm_finish,
-};
-
-static int __init mmp2_pm_init(void)
-{
- uint32_t apcr;
-
- if (!cpu_is_mmp2())
- return -EIO;
-
- suspend_set_ops(&mmp2_pm_ops);
-
- /*
- * Set bit 0, Slow clock Select 32K clock input instead of VCXO
- * VCXO is chosen by default, which would be disabled in suspend
- */
- __raw_writel(0x5, MPMU_SCCR);
-
- /*
- * Clear bit 23 of CIU_CPU_CONF
- * direct PJ4 to DDR access through Memory Controller slow queue
- * fast queue has issue and cause lcd will flick
- */
- __raw_writel(__raw_readl(CIU_REG(0x8)) & ~(0x1 << 23), CIU_REG(0x8));
-
- /* Clear default low power control bit */
- apcr = __raw_readl(MPMU_PCR_PJ);
- apcr &= ~(MPMU_PCR_PJ_SLPEN | MPMU_PCR_PJ_DDRCORSD
- | MPMU_PCR_PJ_APBSD | MPMU_PCR_PJ_AXISD | 1 << 13);
- __raw_writel(apcr, MPMU_PCR_PJ);
-
- return 0;
-}
-
-late_initcall(mmp2_pm_init);
diff --git a/arch/arm/mach-mmp/pm-mmp2.h b/arch/arm/mach-mmp/pm-mmp2.h
deleted file mode 100644
index 70cff8bf0cc8..000000000000
--- a/arch/arm/mach-mmp/pm-mmp2.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * MMP2 Power Management Routines
- *
- * (C) Copyright 2010 Marvell International Ltd.
- * All Rights Reserved
- */
-
-#ifndef __MMP2_PM_H__
-#define __MMP2_PM_H__
-
-#include "addr-map.h"
-
-#define APMU_PJ_IDLE_CFG APMU_REG(0x018)
-#define APMU_PJ_IDLE_CFG_PJ_IDLE (1 << 1)
-#define APMU_PJ_IDLE_CFG_PJ_PWRDWN (1 << 5)
-#define APMU_PJ_IDLE_CFG_PWR_SW(x) ((x) << 16)
-#define APMU_PJ_IDLE_CFG_L2_PWR_SW (1 << 19)
-#define APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK (3 << 28)
-
-#define APMU_SRAM_PWR_DWN APMU_REG(0x08c)
-
-#define MPMU_SCCR MPMU_REG(0x038)
-#define MPMU_PCR_PJ MPMU_REG(0x1000)
-#define MPMU_PCR_PJ_AXISD (1 << 31)
-#define MPMU_PCR_PJ_SLPEN (1 << 29)
-#define MPMU_PCR_PJ_SPSD (1 << 28)
-#define MPMU_PCR_PJ_DDRCORSD (1 << 27)
-#define MPMU_PCR_PJ_APBSD (1 << 26)
-#define MPMU_PCR_PJ_INTCLR (1 << 24)
-#define MPMU_PCR_PJ_SLPWP0 (1 << 23)
-#define MPMU_PCR_PJ_SLPWP1 (1 << 22)
-#define MPMU_PCR_PJ_SLPWP2 (1 << 21)
-#define MPMU_PCR_PJ_SLPWP3 (1 << 20)
-#define MPMU_PCR_PJ_VCTCXOSD (1 << 19)
-#define MPMU_PCR_PJ_SLPWP4 (1 << 18)
-#define MPMU_PCR_PJ_SLPWP5 (1 << 17)
-#define MPMU_PCR_PJ_SLPWP6 (1 << 16)
-#define MPMU_PCR_PJ_SLPWP7 (1 << 15)
-
-#define MPMU_PLL2_CTRL1 MPMU_REG(0x0414)
-#define MPMU_CGR_PJ MPMU_REG(0x1024)
-#define MPMU_WUCRM_PJ MPMU_REG(0x104c)
-#define MPMU_WUCRM_PJ_WAKEUP(x) (1 << (x))
-#define MPMU_WUCRM_PJ_RTC_ALARM (1 << 17)
-
-enum {
- POWER_MODE_ACTIVE = 0,
- POWER_MODE_CORE_INTIDLE,
- POWER_MODE_CORE_EXTIDLE,
- POWER_MODE_APPS_IDLE,
- POWER_MODE_APPS_SLEEP,
- POWER_MODE_CHIP_SLEEP,
- POWER_MODE_SYS_SLEEP,
-};
-
-extern void mmp2_pm_enter_lowpower_mode(int state);
-
-#endif
diff --git a/arch/arm/mach-mmp/pm-pxa910.c b/arch/arm/mach-mmp/pm-pxa910.c
deleted file mode 100644
index f6ba6db0aa36..000000000000
--- a/arch/arm/mach-mmp/pm-pxa910.c
+++ /dev/null
@@ -1,166 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * PXA910 Power Management Routines
- *
- * (C) Copyright 2009 Marvell International Ltd.
- * All Rights Reserved
- */
-
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/time.h>
-#include <linux/delay.h>
-#include <linux/suspend.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <asm/mach-types.h>
-#include <asm/outercache.h>
-
-#include <linux/soc/mmp/cputype.h>
-#include "addr-map.h"
-#include "pm-pxa910.h"
-#include "regs-icu.h"
-
-void pxa910_pm_enter_lowpower_mode(int state)
-{
- uint32_t idle_cfg, apcr;
-
- idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG);
- apcr = __raw_readl(MPMU_APCR);
-
- apcr &= ~(MPMU_APCR_DDRCORSD | MPMU_APCR_APBSD | MPMU_APCR_AXISD
- | MPMU_APCR_VCTCXOSD | MPMU_APCR_STBYEN);
- idle_cfg &= ~(APMU_MOH_IDLE_CFG_MOH_IDLE
- | APMU_MOH_IDLE_CFG_MOH_PWRDWN);
-
- switch (state) {
- case POWER_MODE_UDR:
- /* only shutdown APB in UDR */
- apcr |= MPMU_APCR_STBYEN | MPMU_APCR_APBSD;
- fallthrough;
- case POWER_MODE_SYS_SLEEP:
- apcr |= MPMU_APCR_SLPEN; /* set the SLPEN bit */
- apcr |= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */
- fallthrough;
- case POWER_MODE_APPS_SLEEP:
- apcr |= MPMU_APCR_DDRCORSD; /* set DDRCORSD */
- fallthrough;
- case POWER_MODE_APPS_IDLE:
- apcr |= MPMU_APCR_AXISD; /* set AXISDD bit */
- fallthrough;
- case POWER_MODE_CORE_EXTIDLE:
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_IDLE;
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN;
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3)
- | APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3);
- fallthrough;
- case POWER_MODE_CORE_INTIDLE:
- break;
- }
-
- /* program the memory controller hardware sleep type and auto wakeup */
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ;
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN;
- __raw_writel(0x0, APMU_MC_HW_SLP_TYPE); /* auto refresh */
-
- /* set DSPSD, DTCMSD, BBSD, MSASLPEN */
- apcr |= MPMU_APCR_DSPSD | MPMU_APCR_DTCMSD | MPMU_APCR_BBSD
- | MPMU_APCR_MSASLPEN;
-
- /*always set SLEPEN bit mainly for MSA*/
- apcr |= MPMU_APCR_SLPEN;
-
- /* finally write the registers back */
- __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG);
- __raw_writel(apcr, MPMU_APCR);
-
-}
-
-static int pxa910_pm_enter(suspend_state_t state)
-{
- unsigned int idle_cfg, reg = 0;
-
- /*pmic thread not completed,exit;otherwise system can't be waked up*/
- reg = __raw_readl(ICU_INT_CONF(IRQ_PXA910_PMIC_INT));
- if ((reg & 0x3) == 0)
- return -EAGAIN;
-
- idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG);
- idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN
- | APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN;
- __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG);
-
- /* disable L2 */
- outer_disable();
- /* wait for l2 idle */
- while (!(readl(CIU_REG(0x8)) & (1 << 16)))
- udelay(1);
-
- cpu_do_idle();
-
- /* enable L2 */
- outer_resume();
- /* wait for l2 idle */
- while (!(readl(CIU_REG(0x8)) & (1 << 16)))
- udelay(1);
-
- idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG);
- idle_cfg &= ~(APMU_MOH_IDLE_CFG_MOH_PWRDWN
- | APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN);
- __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG);
-
- return 0;
-}
-
-/*
- * Called after processes are frozen, but before we shut down devices.
- */
-static int pxa910_pm_prepare(void)
-{
- pxa910_pm_enter_lowpower_mode(POWER_MODE_UDR);
- return 0;
-}
-
-/*
- * Called after devices are re-setup, but before processes are thawed.
- */
-static void pxa910_pm_finish(void)
-{
- pxa910_pm_enter_lowpower_mode(POWER_MODE_CORE_INTIDLE);
-}
-
-static int pxa910_pm_valid(suspend_state_t state)
-{
- return ((state == PM_SUSPEND_STANDBY) || (state == PM_SUSPEND_MEM));
-}
-
-static const struct platform_suspend_ops pxa910_pm_ops = {
- .valid = pxa910_pm_valid,
- .prepare = pxa910_pm_prepare,
- .enter = pxa910_pm_enter,
- .finish = pxa910_pm_finish,
-};
-
-static int __init pxa910_pm_init(void)
-{
- uint32_t awucrm = 0;
-
- if (!cpu_is_pxa910())
- return -EIO;
-
- suspend_set_ops(&pxa910_pm_ops);
-
- /* Set the following bits for MMP3 playback with VCTXO on */
- __raw_writel(__raw_readl(APMU_SQU_CLK_GATE_CTRL) | (1 << 30),
- APMU_SQU_CLK_GATE_CTRL);
- __raw_writel(__raw_readl(MPMU_FCCR) | (1 << 28), MPMU_FCCR);
-
- awucrm |= MPMU_AWUCRM_AP_ASYNC_INT | MPMU_AWUCRM_AP_FULL_IDLE;
- __raw_writel(awucrm, MPMU_AWUCRM);
-
- return 0;
-}
-
-late_initcall(pxa910_pm_init);
diff --git a/arch/arm/mach-mmp/pm-pxa910.h b/arch/arm/mach-mmp/pm-pxa910.h
deleted file mode 100644
index 8e6344adaf51..000000000000
--- a/arch/arm/mach-mmp/pm-pxa910.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * PXA910 Power Management Routines
- *
- * (C) Copyright 2009 Marvell International Ltd.
- * All Rights Reserved
- */
-
-#ifndef __PXA910_PM_H__
-#define __PXA910_PM_H__
-
-#define APMU_MOH_IDLE_CFG APMU_REG(0x0018)
-#define APMU_MOH_IDLE_CFG_MOH_IDLE (1 << 1)
-#define APMU_MOH_IDLE_CFG_MOH_PWRDWN (1 << 5)
-#define APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN (1 << 6)
-#define APMU_MOH_IDLE_CFG_MOH_PWR_SW(x) (((x) & 0x3) << 16)
-#define APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(x) (((x) & 0x3) << 18)
-#define APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ (1 << 21)
-#define APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN (1 << 20)
-
-#define APMU_SQU_CLK_GATE_CTRL APMU_REG(0x001c)
-#define APMU_MC_HW_SLP_TYPE APMU_REG(0x00b0)
-
-#define MPMU_FCCR MPMU_REG(0x0008)
-#define MPMU_APCR MPMU_REG(0x1000)
-#define MPMU_APCR_AXISD (1 << 31)
-#define MPMU_APCR_DSPSD (1 << 30)
-#define MPMU_APCR_SLPEN (1 << 29)
-#define MPMU_APCR_DTCMSD (1 << 28)
-#define MPMU_APCR_DDRCORSD (1 << 27)
-#define MPMU_APCR_APBSD (1 << 26)
-#define MPMU_APCR_BBSD (1 << 25)
-#define MPMU_APCR_SLPWP0 (1 << 23)
-#define MPMU_APCR_SLPWP1 (1 << 22)
-#define MPMU_APCR_SLPWP2 (1 << 21)
-#define MPMU_APCR_SLPWP3 (1 << 20)
-#define MPMU_APCR_VCTCXOSD (1 << 19)
-#define MPMU_APCR_SLPWP4 (1 << 18)
-#define MPMU_APCR_SLPWP5 (1 << 17)
-#define MPMU_APCR_SLPWP6 (1 << 16)
-#define MPMU_APCR_SLPWP7 (1 << 15)
-#define MPMU_APCR_MSASLPEN (1 << 14)
-#define MPMU_APCR_STBYEN (1 << 13)
-
-#define MPMU_AWUCRM MPMU_REG(0x104c)
-#define MPMU_AWUCRM_AP_ASYNC_INT (1 << 25)
-#define MPMU_AWUCRM_AP_FULL_IDLE (1 << 24)
-#define MPMU_AWUCRM_SDH1 (1 << 23)
-#define MPMU_AWUCRM_SDH2 (1 << 22)
-#define MPMU_AWUCRM_KEYPRESS (1 << 21)
-#define MPMU_AWUCRM_TRACKBALL (1 << 20)
-#define MPMU_AWUCRM_NEWROTARY (1 << 19)
-#define MPMU_AWUCRM_RTC_ALARM (1 << 17)
-#define MPMU_AWUCRM_AP2_TIMER_3 (1 << 13)
-#define MPMU_AWUCRM_AP2_TIMER_2 (1 << 12)
-#define MPMU_AWUCRM_AP2_TIMER_1 (1 << 11)
-#define MPMU_AWUCRM_AP1_TIMER_3 (1 << 10)
-#define MPMU_AWUCRM_AP1_TIMER_2 (1 << 9)
-#define MPMU_AWUCRM_AP1_TIMER_1 (1 << 8)
-#define MPMU_AWUCRM_WAKEUP(x) (1 << ((x) & 0x7))
-
-enum {
- POWER_MODE_ACTIVE = 0,
- POWER_MODE_CORE_INTIDLE,
- POWER_MODE_CORE_EXTIDLE,
- POWER_MODE_APPS_IDLE,
- POWER_MODE_APPS_SLEEP,
- POWER_MODE_SYS_SLEEP,
- POWER_MODE_HIBERNATE,
- POWER_MODE_UDR,
-};
-
-extern int pxa910_set_wake(struct irq_data *data, unsigned int on);
-
-#endif
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
deleted file mode 100644
index 565d4a6c3bd5..000000000000
--- a/arch/arm/mach-mmp/pxa168.c
+++ /dev/null
@@ -1,51 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/pxa168.c
- *
- * Code specific to PXA168
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/io.h>
-#include <linux/clk.h>
-#include <linux/clk/mmp.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/mach/time.h>
-#include <asm/system_misc.h>
-
-#include "addr-map.h"
-#include "common.h"
-#include <linux/soc/mmp/cputype.h>
-#include <linux/soc/pxa/mfp.h>
-#include "devices.h"
-#include "pxa168.h"
-
-#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
-
-static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
-{
- MFP_ADDR_X(GPIO0, GPIO36, 0x04c),
- MFP_ADDR_X(GPIO37, GPIO55, 0x000),
- MFP_ADDR_X(GPIO56, GPIO123, 0x0e0),
- MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
-
- MFP_ADDR_END,
-};
-
-static int __init pxa168_init(void)
-{
- if (cpu_is_pxa168()) {
- mfp_init_base(MFPR_VIRT_BASE);
- mfp_init_addr(pxa168_mfp_addr_map);
- pxa168_clk_init(APB_PHYS_BASE + 0x50000,
- AXI_PHYS_BASE + 0x82800,
- APB_PHYS_BASE + 0x15000);
- }
-
- return 0;
-}
-postcore_initcall(pxa168_init);
diff --git a/arch/arm/mach-mmp/pxa168.h b/arch/arm/mach-mmp/pxa168.h
deleted file mode 100644
index 279783ef239d..000000000000
--- a/arch/arm/mach-mmp/pxa168.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_PXA168_H
-#define __ASM_MACH_PXA168_H
-
-#include <linux/reboot.h>
-
-extern void pxa168_timer_init(void);
-extern void __init pxa168_init_irq(void);
-extern void pxa168_restart(enum reboot_mode, const char *);
-extern void pxa168_clear_keypad_wakeup(void);
-
-#include <linux/i2c.h>
-#include <linux/soc/mmp/cputype.h>
-#include <linux/irqchip/mmp.h>
-
-#endif /* __ASM_MACH_PXA168_H */
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
deleted file mode 100644
index f389b99cd9bd..000000000000
--- a/arch/arm/mach-mmp/pxa910.c
+++ /dev/null
@@ -1,93 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-mmp/pxa910.c
- *
- * Code specific to PXA910
- */
-#include <linux/clk/mmp.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/irqchip/mmp.h>
-#include <linux/platform_device.h>
-
-#include <asm/hardware/cache-tauros2.h>
-#include <asm/mach/time.h>
-#include "addr-map.h"
-#include <linux/soc/mmp/cputype.h>
-#include <linux/soc/pxa/mfp.h>
-#include "irqs.h"
-#include "pm-pxa910.h"
-
-#include "common.h"
-
-#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
-
-static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
-{
- MFP_ADDR_X(GPIO0, GPIO54, 0xdc),
- MFP_ADDR_X(GPIO67, GPIO98, 0x1b8),
- MFP_ADDR_X(GPIO100, GPIO109, 0x238),
-
- MFP_ADDR(GPIO123, 0xcc),
- MFP_ADDR(GPIO124, 0xd0),
-
- MFP_ADDR(DF_IO0, 0x40),
- MFP_ADDR(DF_IO1, 0x3c),
- MFP_ADDR(DF_IO2, 0x38),
- MFP_ADDR(DF_IO3, 0x34),
- MFP_ADDR(DF_IO4, 0x30),
- MFP_ADDR(DF_IO5, 0x2c),
- MFP_ADDR(DF_IO6, 0x28),
- MFP_ADDR(DF_IO7, 0x24),
- MFP_ADDR(DF_IO8, 0x20),
- MFP_ADDR(DF_IO9, 0x1c),
- MFP_ADDR(DF_IO10, 0x18),
- MFP_ADDR(DF_IO11, 0x14),
- MFP_ADDR(DF_IO12, 0x10),
- MFP_ADDR(DF_IO13, 0xc),
- MFP_ADDR(DF_IO14, 0x8),
- MFP_ADDR(DF_IO15, 0x4),
-
- MFP_ADDR(DF_nCS0_SM_nCS2, 0x44),
- MFP_ADDR(DF_nCS1_SM_nCS3, 0x48),
- MFP_ADDR(SM_nCS0, 0x4c),
- MFP_ADDR(SM_nCS1, 0x50),
- MFP_ADDR(DF_WEn, 0x54),
- MFP_ADDR(DF_REn, 0x58),
- MFP_ADDR(DF_CLE_SM_OEn, 0x5c),
- MFP_ADDR(DF_ALE_SM_WEn, 0x60),
- MFP_ADDR(SM_SCLK, 0x64),
- MFP_ADDR(DF_RDY0, 0x68),
- MFP_ADDR(SM_BE0, 0x6c),
- MFP_ADDR(SM_BE1, 0x70),
- MFP_ADDR(SM_ADV, 0x74),
- MFP_ADDR(DF_RDY1, 0x78),
- MFP_ADDR(SM_ADVMUX, 0x7c),
- MFP_ADDR(SM_RDY, 0x80),
-
- MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84),
-
- MFP_ADDR_END,
-};
-
-static int __init pxa910_init(void)
-{
- if (cpu_is_pxa910()) {
-#ifdef CONFIG_CACHE_TAUROS2
- tauros2_init(0);
-#endif
- mfp_init_base(MFPR_VIRT_BASE);
- mfp_init_addr(pxa910_mfp_addr_map);
- pxa910_clk_init(APB_PHYS_BASE + 0x50000,
- AXI_PHYS_BASE + 0x82800,
- APB_PHYS_BASE + 0x15000,
- APB_PHYS_BASE + 0x3b000);
- }
-
- return 0;
-}
-postcore_initcall(pxa910_init);
diff --git a/arch/arm/mach-mmp/pxa910.h b/arch/arm/mach-mmp/pxa910.h
deleted file mode 100644
index 66a691d89ae1..000000000000
--- a/arch/arm/mach-mmp/pxa910.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_PXA910_H
-#define __ASM_MACH_PXA910_H
-
-extern void pxa910_timer_init(void);
-extern void __init pxa910_init_irq(void);
-
-#include <linux/i2c.h>
-#include <linux/irqchip/mmp.h>
-
-#endif /* __ASM_MACH_PXA910_H */
diff --git a/arch/arm/mach-mmp/regs-icu.h b/arch/arm/mach-mmp/regs-icu.h
deleted file mode 100644
index 410743d2b402..000000000000
--- a/arch/arm/mach-mmp/regs-icu.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Interrupt Control Unit
- */
-
-#ifndef __ASM_MACH_ICU_H
-#define __ASM_MACH_ICU_H
-
-#include "addr-map.h"
-
-#define ICU_VIRT_BASE (AXI_VIRT_BASE + 0x82000)
-#define ICU_REG(x) (ICU_VIRT_BASE + (x))
-
-#define ICU2_VIRT_BASE (AXI_VIRT_BASE + 0x84000)
-#define ICU2_REG(x) (ICU2_VIRT_BASE + (x))
-
-#define ICU_INT_CONF(n) ICU_REG((n) << 2)
-#define ICU_INT_CONF_MASK (0xf)
-
-/************ PXA168/PXA910 (MMP) *********************/
-#define ICU_INT_CONF_AP_INT (1 << 6)
-#define ICU_INT_CONF_CP_INT (1 << 5)
-#define ICU_INT_CONF_IRQ (1 << 4)
-
-#define ICU_AP_FIQ_SEL_INT_NUM ICU_REG(0x108) /* AP FIQ Selected Interrupt */
-#define ICU_AP_IRQ_SEL_INT_NUM ICU_REG(0x10C) /* AP IRQ Selected Interrupt */
-#define ICU_AP_GBL_IRQ_MSK ICU_REG(0x114) /* AP Global Interrupt Mask */
-#define ICU_INT_STATUS_0 ICU_REG(0x128) /* Interrupt Stuats 0 */
-#define ICU_INT_STATUS_1 ICU_REG(0x12C) /* Interrupt Status 1 */
-
-/************************** MMP2 ***********************/
-
-/*
- * IRQ0/FIQ0 is routed to SP IRQ/FIQ.
- * IRQ1 is routed to PJ4 IRQ, and IRQ2 is routes to PJ4 FIQ.
- */
-#define ICU_INT_ROUTE_SP_IRQ (1 << 4)
-#define ICU_INT_ROUTE_PJ4_IRQ (1 << 5)
-#define ICU_INT_ROUTE_PJ4_FIQ (1 << 6)
-
-#define MMP2_ICU_PJ4_IRQ_STATUS0 ICU_REG(0x138)
-#define MMP2_ICU_PJ4_IRQ_STATUS1 ICU_REG(0x13c)
-#define MMP2_ICU_PJ4_FIQ_STATUS0 ICU_REG(0x140)
-#define MMP2_ICU_PJ4_FIQ_STATUS1 ICU_REG(0x144)
-
-#define MMP2_ICU_INT4_STATUS ICU_REG(0x150)
-#define MMP2_ICU_INT5_STATUS ICU_REG(0x154)
-#define MMP2_ICU_INT17_STATUS ICU_REG(0x158)
-#define MMP2_ICU_INT35_STATUS ICU_REG(0x15c)
-#define MMP2_ICU_INT51_STATUS ICU_REG(0x160)
-
-#define MMP2_ICU_INT4_MASK ICU_REG(0x168)
-#define MMP2_ICU_INT5_MASK ICU_REG(0x16C)
-#define MMP2_ICU_INT17_MASK ICU_REG(0x170)
-#define MMP2_ICU_INT35_MASK ICU_REG(0x174)
-#define MMP2_ICU_INT51_MASK ICU_REG(0x178)
-
-#define MMP2_ICU_SP_IRQ_SEL ICU_REG(0x100)
-#define MMP2_ICU_PJ4_IRQ_SEL ICU_REG(0x104)
-#define MMP2_ICU_PJ4_FIQ_SEL ICU_REG(0x108)
-
-#define MMP2_ICU_INVERT ICU_REG(0x164)
-
-#define MMP2_ICU_INV_PMIC (1 << 0)
-#define MMP2_ICU_INV_PERF (1 << 1)
-#define MMP2_ICU_INV_COMMTX (1 << 2)
-#define MMP2_ICU_INV_COMMRX (1 << 3)
-
-#endif /* __ASM_MACH_ICU_H */
diff --git a/include/linux/soc/mmp/cputype.h b/include/linux/soc/mmp/cputype.h
index 221790761e8e..f13d127fadc4 100644
--- a/include/linux/soc/mmp/cputype.h
+++ b/include/linux/soc/mmp/cputype.h
@@ -26,29 +26,7 @@
extern unsigned int mmp_chip_id;
-#ifdef CONFIG_CPU_PXA168
-static inline int cpu_is_pxa168(void)
-{
- return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
- ((mmp_chip_id & 0xfff) == 0x168);
-}
-#else
-#define cpu_is_pxa168() (0)
-#endif
-
-/* cpu_is_pxa910() is shared on both pxa910 and pxa920 */
-#ifdef CONFIG_CPU_PXA910
-static inline int cpu_is_pxa910(void)
-{
- return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
- (((mmp_chip_id & 0xfff) == 0x910) ||
- ((mmp_chip_id & 0xfff) == 0x920));
-}
-#else
-#define cpu_is_pxa910() (0)
-#endif
-
-#if defined(CONFIG_CPU_MMP2) || defined(CONFIG_MACH_MMP2_DT)
+#if defined(CONFIG_MACH_MMP2_DT)
static inline int cpu_is_mmp2(void)
{
return (((read_cpuid_id() >> 8) & 0xff) == 0x58) &&
--
2.29.2
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