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* [PATCH v5] cxl: update names for interleave granularity conversion macros
@ 2022-10-25 16:56 Dave Jiang
  2022-10-25 19:25 ` Alison Schofield
  0 siblings, 1 reply; 2+ messages in thread
From: Dave Jiang @ 2022-10-25 16:56 UTC (permalink / raw)
  To: linux-cxl
  Cc: dan.j.williams, ira.weiny, vishal.l.verma, alison.schofield,
	Jonathan.Cameron

Change names for granularity macros to clearly indicate which
variable is encoded and which is the actual granularity.

granularity == interleave granularity
eig == encoded interleave granularity

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---

v5:
- Merge mangled patch. Fixed mistake.
v4:
- rebased against cxl/pending branch. Conflict against Adam's patch.
v3:
- change enig to eig for better consistency of overall code (Jonathan, Dan)
- Pick up Jonatha's review tag.
v2:
- change ig to granularity for better clarification (Alison)


 drivers/cxl/acpi.c        |    2 +-
 drivers/cxl/core/hdm.c    |    6 +++---
 drivers/cxl/core/region.c |    6 +++---
 drivers/cxl/cxl.h         |   13 +++++++------
 4 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index fb649683dd3a..9434f8333287 100644
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c
@@ -105,7 +105,7 @@ static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
 	rc = cxl_to_ways(cfmws->interleave_ways, &ways);
 	if (rc)
 		return rc;
-	rc = cxl_to_granularity(cfmws->granularity, &ig);
+	rc = eig_to_granularity(cfmws->granularity, &ig);
 	if (rc)
 		return rc;
 	for (i = 0; i < ways; i++)
diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
index d1d2caea5c62..a04ce9e6e186 100644
--- a/drivers/cxl/core/hdm.c
+++ b/drivers/cxl/core/hdm.c
@@ -492,7 +492,7 @@ static void cxld_set_interleave(struct cxl_decoder *cxld, u32 *ctrl)
 	if (WARN_ONCE(ways_to_cxl(cxld->interleave_ways, &eiw),
 		      "invalid interleave_ways: %d\n", cxld->interleave_ways))
 		return;
-	if (WARN_ONCE(granularity_to_cxl(cxld->interleave_granularity, &eig),
+	if (WARN_ONCE(granularity_to_eig(cxld->interleave_granularity, &eig),
 		      "invalid interleave_granularity: %d\n",
 		      cxld->interleave_granularity))
 		return;
@@ -744,8 +744,8 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
 			 port->id, cxld->id, ctrl);
 		return rc;
 	}
-	rc = cxl_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
-				&cxld->interleave_granularity);
+	rc = eig_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
+				 &cxld->interleave_granularity);
 	if (rc)
 		return rc;
 
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 401148016978..df294a6fd2c9 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -390,7 +390,7 @@ static ssize_t interleave_granularity_store(struct device *dev,
 	if (rc)
 		return rc;
 
-	rc = granularity_to_cxl(val, &ig);
+	rc = granularity_to_eig(val, &ig);
 	if (rc)
 		return rc;
 
@@ -1002,7 +1002,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
 		parent_iw = parent_cxld->interleave_ways;
 	}
 
-	rc = granularity_to_cxl(parent_ig, &peig);
+	rc = granularity_to_eig(parent_ig, &peig);
 	if (rc) {
 		dev_dbg(&cxlr->dev, "%s:%s: invalid parent granularity: %d\n",
 			dev_name(parent_port->uport),
@@ -1039,7 +1039,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
 		eig = peig;
 	}
 
-	rc = cxl_to_granularity(eig, &ig);
+	rc = eig_to_granularity(eig, &ig);
 	if (rc) {
 		dev_dbg(&cxlr->dev, "%s:%s: invalid interleave: %d\n",
 			dev_name(port->uport), dev_name(&port->dev),
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 3ab81ad9d2e5..b6abab1c622d 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -73,11 +73,11 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
 }
 
 /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
-static inline int cxl_to_granularity(u16 ig, unsigned int *val)
+static inline int eig_to_granularity(u16 eig, unsigned int *granularity)
 {
-	if (ig > CXL_DECODER_MAX_ENCODED_IG)
+	if (eig > CXL_DECODER_MAX_ENCODED_IG)
 		return -EINVAL;
-	*val = CXL_DECODER_MIN_GRANULARITY << ig;
+	*granularity = CXL_DECODER_MIN_GRANULARITY << eig;
 	return 0;
 }
 
@@ -98,11 +98,12 @@ static inline int cxl_to_ways(u8 eniw, unsigned int *val)
 	return 0;
 }
 
-static inline int granularity_to_cxl(int g, u16 *ig)
+static inline int granularity_to_eig(int granularity, u16 *eig)
 {
-	if (g > SZ_16K || g < CXL_DECODER_MIN_GRANULARITY || !is_power_of_2(g))
+	if (granularity > SZ_16K || granularity < CXL_DECODER_MIN_GRANULARITY ||
+	    !is_power_of_2(granularity))
 		return -EINVAL;
-	*ig = ilog2(g) - 8;
+	*eig = ilog2(granularity) - 8;
 	return 0;
 }
 



^ permalink raw reply related	[flat|nested] 2+ messages in thread
* Re: [PATCH v5] cxl: update names for interleave granularity conversion macros
  2022-10-25 16:56 [PATCH v5] cxl: update names for interleave granularity conversion macros Dave Jiang
@ 2022-10-25 19:25 ` Alison Schofield
  0 siblings, 0 replies; 2+ messages in thread
From: Alison Schofield @ 2022-10-25 19:25 UTC (permalink / raw)
  To: Dave Jiang
  Cc: linux-cxl, dan.j.williams, ira.weiny, vishal.l.verma, Jonathan.Cameron

On Tue, Oct 25, 2022 at 09:56:09AM -0700, Dave Jiang wrote:
> Change names for granularity macros to clearly indicate which
> variable is encoded and which is the actual granularity.
> 
> granularity == interleave granularity
> eig == encoded interleave granularity
> 
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> ---

Reviewed-by: Alison Schofield <alison.schofield@intel.com>

> 
> v5:
> - Merge mangled patch. Fixed mistake.
> v4:
> - rebased against cxl/pending branch. Conflict against Adam's patch.
> v3:
> - change enig to eig for better consistency of overall code (Jonathan, Dan)
> - Pick up Jonatha's review tag.
> v2:
> - change ig to granularity for better clarification (Alison)
> 
> 
>  drivers/cxl/acpi.c        |    2 +-
>  drivers/cxl/core/hdm.c    |    6 +++---
>  drivers/cxl/core/region.c |    6 +++---
>  drivers/cxl/cxl.h         |   13 +++++++------
>  4 files changed, 14 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index fb649683dd3a..9434f8333287 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -105,7 +105,7 @@ static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
>  	rc = cxl_to_ways(cfmws->interleave_ways, &ways);
>  	if (rc)
>  		return rc;
> -	rc = cxl_to_granularity(cfmws->granularity, &ig);
> +	rc = eig_to_granularity(cfmws->granularity, &ig);
>  	if (rc)
>  		return rc;
>  	for (i = 0; i < ways; i++)
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index d1d2caea5c62..a04ce9e6e186 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -492,7 +492,7 @@ static void cxld_set_interleave(struct cxl_decoder *cxld, u32 *ctrl)
>  	if (WARN_ONCE(ways_to_cxl(cxld->interleave_ways, &eiw),
>  		      "invalid interleave_ways: %d\n", cxld->interleave_ways))
>  		return;
> -	if (WARN_ONCE(granularity_to_cxl(cxld->interleave_granularity, &eig),
> +	if (WARN_ONCE(granularity_to_eig(cxld->interleave_granularity, &eig),
>  		      "invalid interleave_granularity: %d\n",
>  		      cxld->interleave_granularity))
>  		return;
> @@ -744,8 +744,8 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
>  			 port->id, cxld->id, ctrl);
>  		return rc;
>  	}
> -	rc = cxl_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
> -				&cxld->interleave_granularity);
> +	rc = eig_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
> +				 &cxld->interleave_granularity);
>  	if (rc)
>  		return rc;
>  
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index 401148016978..df294a6fd2c9 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -390,7 +390,7 @@ static ssize_t interleave_granularity_store(struct device *dev,
>  	if (rc)
>  		return rc;
>  
> -	rc = granularity_to_cxl(val, &ig);
> +	rc = granularity_to_eig(val, &ig);
>  	if (rc)
>  		return rc;
>  
> @@ -1002,7 +1002,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
>  		parent_iw = parent_cxld->interleave_ways;
>  	}
>  
> -	rc = granularity_to_cxl(parent_ig, &peig);
> +	rc = granularity_to_eig(parent_ig, &peig);
>  	if (rc) {
>  		dev_dbg(&cxlr->dev, "%s:%s: invalid parent granularity: %d\n",
>  			dev_name(parent_port->uport),
> @@ -1039,7 +1039,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
>  		eig = peig;
>  	}
>  
> -	rc = cxl_to_granularity(eig, &ig);
> +	rc = eig_to_granularity(eig, &ig);
>  	if (rc) {
>  		dev_dbg(&cxlr->dev, "%s:%s: invalid interleave: %d\n",
>  			dev_name(port->uport), dev_name(&port->dev),
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index 3ab81ad9d2e5..b6abab1c622d 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -73,11 +73,11 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
>  }
>  
>  /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
> -static inline int cxl_to_granularity(u16 ig, unsigned int *val)
> +static inline int eig_to_granularity(u16 eig, unsigned int *granularity)
>  {
> -	if (ig > CXL_DECODER_MAX_ENCODED_IG)
> +	if (eig > CXL_DECODER_MAX_ENCODED_IG)
>  		return -EINVAL;
> -	*val = CXL_DECODER_MIN_GRANULARITY << ig;
> +	*granularity = CXL_DECODER_MIN_GRANULARITY << eig;
>  	return 0;
>  }
>  
> @@ -98,11 +98,12 @@ static inline int cxl_to_ways(u8 eniw, unsigned int *val)
>  	return 0;
>  }
>  
> -static inline int granularity_to_cxl(int g, u16 *ig)
> +static inline int granularity_to_eig(int granularity, u16 *eig)
>  {
> -	if (g > SZ_16K || g < CXL_DECODER_MIN_GRANULARITY || !is_power_of_2(g))
> +	if (granularity > SZ_16K || granularity < CXL_DECODER_MIN_GRANULARITY ||
> +	    !is_power_of_2(granularity))
>  		return -EINVAL;
> -	*ig = ilog2(g) - 8;
> +	*eig = ilog2(granularity) - 8;
>  	return 0;
>  }
>  
> 
> 

^ permalink raw reply	[flat|nested] 2+ messages in thread
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2022-10-25 16:56 [PATCH v5] cxl: update names for interleave granularity conversion macros Dave Jiang
2022-10-25 19:25 ` Alison Schofield

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