Re: [PATCH 1/2] dt-bindings: pinctrl: add schema for NXP S32 SoCs

[Chester Lin <clin@suse.com>]

Hi Linus,

On Tue, Nov 08, 2022 at 01:31:16PM +0100, Linus Walleij wrote:
> Hi Chester,
> 
> thanks for your patch!
> 

Thanks for reviewing this patch series as well!

> On Mon, Oct 31, 2022 at 11:09 AM Chester Lin <clin@suse.com> wrote:
> 
> > Add DT schema for the pinctrl driver of NXP S32 SoC family.
> >
> > Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
> > Signed-off-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com>
> > Signed-off-by: Chester Lin <clin@suse.com>
> (...)
> > +  nxp,pins:
> > +    $ref: /schemas/types.yaml#/definitions/uint32-array
> > +    description:
> > +      A list of [start, end] pin ID boundaries that correspond to each of
> > +      the register regions reserved.
> 
> That's an interesting approach.
> 
> But what about just hardcoding this into the driver instead?
> 
> If you have the compatible, surely you know these indexes from
> that compatible string?
> 

The nxp,pins property is more like a common language that both kernel and
u-boot can share with. Of course hardcoding indexes can be achieved as well
but that also means the index matrices in both kernel driver and u-boot driver
must be revised and synchronized if new boards may have different reg and
nxp,pins. IMHO, having these ID ranges in DT could be more intuitive, developers
can easily compare every pair with the corresponding reg entry in the same dts
file since reg maps are fragmented as I mentioned in Rob's code review[1].
Based on this approach, both kernel driver and u-boot driver can reuse the
same parser to acquire pin ID ranges from different boards, which can also
simplify codes and have less patches in the future.

Regards,
Chester

[1] https://lkml.org/lkml/2022/11/9/722

> Yours,
> Linus Walleij