From: William Breathitt Gray <wbg@kernel.org> To: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Cc: william.gray@linaro.org, jic23@kernel.org, alexandre.torgue@foss.st.com, olivier.moysan@foss.st.com, linux-iio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update Date: Sat, 26 Nov 2022 16:53:42 -0500 [thread overview] Message-ID: <Y4KK5tck2aCdKWXF@ishi> (raw) In-Reply-To: <20221123133609.465614-1-fabrice.gasnier@foss.st.com> [-- Attachment #1: Type: text/plain, Size: 1419 bytes --] On Wed, Nov 23, 2022 at 02:36:09PM +0100, Fabrice Gasnier wrote: > The ARR (auto reload register) and CMP (compare) registers are > successively written. The status bits to check the update of these > registers are polled together with regmap_read_poll_timeout(). > The condition to end the loop may become true, even if one of the register > isn't correctly updated. > So ensure both status bits are set before clearing them. > > Fixes: d8958824cf07 ("iio: counter: Add support for STM32 LPTimer") > Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Applied to the counter-current branch of counter.git. William Breathitt Gray > --- > drivers/counter/stm32-lptimer-cnt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/counter/stm32-lptimer-cnt.c b/drivers/counter/stm32-lptimer-cnt.c > index d6b80b6dfc28..8439755559b2 100644 > --- a/drivers/counter/stm32-lptimer-cnt.c > +++ b/drivers/counter/stm32-lptimer-cnt.c > @@ -69,7 +69,7 @@ static int stm32_lptim_set_enable_state(struct stm32_lptim_cnt *priv, > > /* ensure CMP & ARR registers are properly written */ > ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val, > - (val & STM32_LPTIM_CMPOK_ARROK), > + (val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK, > 100, 1000); > if (ret) > return ret; > -- > 2.25.1 > [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: William Breathitt Gray <wbg@kernel.org> To: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Cc: william.gray@linaro.org, jic23@kernel.org, alexandre.torgue@foss.st.com, olivier.moysan@foss.st.com, linux-iio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update Date: Sat, 26 Nov 2022 16:53:42 -0500 [thread overview] Message-ID: <Y4KK5tck2aCdKWXF@ishi> (raw) In-Reply-To: <20221123133609.465614-1-fabrice.gasnier@foss.st.com> [-- Attachment #1.1: Type: text/plain, Size: 1419 bytes --] On Wed, Nov 23, 2022 at 02:36:09PM +0100, Fabrice Gasnier wrote: > The ARR (auto reload register) and CMP (compare) registers are > successively written. The status bits to check the update of these > registers are polled together with regmap_read_poll_timeout(). > The condition to end the loop may become true, even if one of the register > isn't correctly updated. > So ensure both status bits are set before clearing them. > > Fixes: d8958824cf07 ("iio: counter: Add support for STM32 LPTimer") > Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Applied to the counter-current branch of counter.git. William Breathitt Gray > --- > drivers/counter/stm32-lptimer-cnt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/counter/stm32-lptimer-cnt.c b/drivers/counter/stm32-lptimer-cnt.c > index d6b80b6dfc28..8439755559b2 100644 > --- a/drivers/counter/stm32-lptimer-cnt.c > +++ b/drivers/counter/stm32-lptimer-cnt.c > @@ -69,7 +69,7 @@ static int stm32_lptim_set_enable_state(struct stm32_lptim_cnt *priv, > > /* ensure CMP & ARR registers are properly written */ > ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val, > - (val & STM32_LPTIM_CMPOK_ARROK), > + (val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK, > 100, 1000); > if (ret) > return ret; > -- > 2.25.1 > [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-11-26 21:53 UTC|newest] Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-11-23 13:36 [PATCH] counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update Fabrice Gasnier 2022-11-23 13:36 ` Fabrice Gasnier 2022-11-22 7:27 ` William Breathitt Gray 2022-11-22 7:27 ` William Breathitt Gray 2022-11-22 7:33 ` William Breathitt Gray 2022-11-22 7:33 ` William Breathitt Gray 2022-11-23 14:56 ` Fabrice Gasnier 2022-11-23 14:56 ` Fabrice Gasnier 2022-11-22 7:41 ` William Breathitt Gray 2022-11-22 7:41 ` William Breathitt Gray 2022-11-26 21:53 ` William Breathitt Gray [this message] 2022-11-26 21:53 ` William Breathitt Gray
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