* [PATCH 01/14] hw/arm/pxa: Avoid forward-declaring PXA2xxI2CState
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
@ 2023-01-09 14:02 ` Philippe Mathieu-Daudé
2023-01-09 14:02 ` [PATCH 02/14] hw/gpio/omap_gpio: Add local variable to avoid embedded cast Philippe Mathieu-Daudé
` (14 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:02 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
To avoid forward-declaring PXA2xxI2CState, declare
PXA2XX_I2C before its use in pxa2xx_i2c_init() prototype.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/arm/pxa.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/hw/arm/pxa.h b/include/hw/arm/pxa.h
index 1095504b86..cdbff85afe 100644
--- a/include/hw/arm/pxa.h
+++ b/include/hw/arm/pxa.h
@@ -119,14 +119,14 @@ void pxa27x_register_keypad(PXA2xxKeyPadState *kp,
const struct keymap *map, int size);
/* pxa2xx.c */
-typedef struct PXA2xxI2CState PXA2xxI2CState;
+#define TYPE_PXA2XX_I2C "pxa2xx_i2c"
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxI2CState, PXA2XX_I2C)
+
PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base,
qemu_irq irq, uint32_t page_size);
I2CBus *pxa2xx_i2c_bus(PXA2xxI2CState *s);
-#define TYPE_PXA2XX_I2C "pxa2xx_i2c"
typedef struct PXA2xxI2SState PXA2xxI2SState;
-OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxI2CState, PXA2XX_I2C)
#define TYPE_PXA2XX_FIR "pxa2xx-fir"
OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxFIrState, PXA2XX_FIR)
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 02/14] hw/gpio/omap_gpio: Add local variable to avoid embedded cast
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
2023-01-09 14:02 ` [PATCH 01/14] hw/arm/pxa: Avoid forward-declaring PXA2xxI2CState Philippe Mathieu-Daudé
@ 2023-01-09 14:02 ` Philippe Mathieu-Daudé
2023-01-09 14:02 ` [PATCH 03/14] hw/arm/omap: Drop useless casts from void * to pointer Philippe Mathieu-Daudé
` (13 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:02 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
Add a local 'struct omap_gpif_s *' variable to improve readability.
(This also eases next commit conversion).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/gpio/omap_gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c
index bd0841d57f..12ec16d1b0 100644
--- a/hw/gpio/omap_gpio.c
+++ b/hw/gpio/omap_gpio.c
@@ -53,7 +53,8 @@ struct omap_gpif_s {
/* General-Purpose I/O of OMAP1 */
static void omap_gpio_set(void *opaque, int line, int level)
{
- struct omap_gpio_s *s = &((struct omap_gpif_s *) opaque)->omap1;
+ struct omap_gpif_s *p = opaque;
+ struct omap_gpio_s *s = &p->omap1;
uint16_t prev = s->inputs;
if (level)
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 03/14] hw/arm/omap: Drop useless casts from void * to pointer
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
2023-01-09 14:02 ` [PATCH 01/14] hw/arm/pxa: Avoid forward-declaring PXA2xxI2CState Philippe Mathieu-Daudé
2023-01-09 14:02 ` [PATCH 02/14] hw/gpio/omap_gpio: Add local variable to avoid embedded cast Philippe Mathieu-Daudé
@ 2023-01-09 14:02 ` Philippe Mathieu-Daudé
2023-01-09 14:02 ` [PATCH 04/14] hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP1_GPIO type name Philippe Mathieu-Daudé
` (12 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:02 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/omap1.c | 115 ++++++++++++++++++--------------------
hw/arm/omap2.c | 40 ++++++-------
hw/arm/omap_sx1.c | 2 +-
hw/arm/palm.c | 2 +-
hw/char/omap_uart.c | 7 +--
hw/display/omap_dss.c | 15 +++--
hw/display/omap_lcdc.c | 9 ++-
hw/dma/omap_dma.c | 15 +++--
hw/gpio/omap_gpio.c | 15 +++--
hw/intc/omap_intc.c | 12 ++--
hw/misc/omap_gpmc.c | 12 ++--
hw/misc/omap_l4.c | 7 +--
hw/misc/omap_sdrc.c | 7 +--
hw/misc/omap_tap.c | 5 +-
hw/sd/omap_mmc.c | 9 ++-
hw/ssi/omap_spi.c | 7 +--
hw/timer/omap_gptimer.c | 22 ++++----
hw/timer/omap_synctimer.c | 4 +-
18 files changed, 142 insertions(+), 163 deletions(-)
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index f693faa43e..559c066ce9 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -176,7 +176,7 @@ static void omap_timer_fire(void *opaque)
static void omap_timer_tick(void *opaque)
{
- struct omap_mpu_timer_s *timer = (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *timer = opaque;
omap_timer_sync(timer);
omap_timer_fire(timer);
@@ -185,7 +185,7 @@ static void omap_timer_tick(void *opaque)
static void omap_timer_clk_update(void *opaque, int line, int on)
{
- struct omap_mpu_timer_s *timer = (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *timer = opaque;
omap_timer_sync(timer);
timer->rate = on ? omap_clk_getrate(timer->clk) : 0;
@@ -202,7 +202,7 @@ static void omap_timer_clk_setup(struct omap_mpu_timer_s *timer)
static uint64_t omap_mpu_timer_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_timer_s *s = (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
@@ -226,7 +226,7 @@ static uint64_t omap_mpu_timer_read(void *opaque, hwaddr addr,
static void omap_mpu_timer_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_timer_s *s = (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -308,7 +308,7 @@ struct omap_watchdog_timer_s {
static uint64_t omap_wd_timer_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_watchdog_timer_s *s = (struct omap_watchdog_timer_s *) opaque;
+ struct omap_watchdog_timer_s *s = opaque;
if (size != 2) {
return omap_badwidth_read16(opaque, addr);
@@ -333,7 +333,7 @@ static uint64_t omap_wd_timer_read(void *opaque, hwaddr addr,
static void omap_wd_timer_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_watchdog_timer_s *s = (struct omap_watchdog_timer_s *) opaque;
+ struct omap_watchdog_timer_s *s = opaque;
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
@@ -431,7 +431,7 @@ struct omap_32khz_timer_s {
static uint64_t omap_os_timer_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_32khz_timer_s *s = (struct omap_32khz_timer_s *) opaque;
+ struct omap_32khz_timer_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 4) {
@@ -458,7 +458,7 @@ static uint64_t omap_os_timer_read(void *opaque, hwaddr addr,
static void omap_os_timer_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_32khz_timer_s *s = (struct omap_32khz_timer_s *) opaque;
+ struct omap_32khz_timer_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 4) {
@@ -532,7 +532,7 @@ static struct omap_32khz_timer_s *omap_os_timer_init(MemoryRegion *memory,
static uint64_t omap_ulpd_pm_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
uint16_t ret;
if (size != 2) {
@@ -600,7 +600,7 @@ static inline void omap_ulpd_req_update(struct omap_mpu_state_s *s,
static void omap_ulpd_pm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
int64_t now, ticks;
int div, mult;
static const int bypass_div[4] = { 1, 2, 4, 4 };
@@ -765,7 +765,7 @@ static void omap_ulpd_pm_init(MemoryRegion *system_memory,
static uint64_t omap_pin_cfg_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
@@ -876,7 +876,7 @@ static inline void omap_pin_modconf1_update(struct omap_mpu_state_s *s,
static void omap_pin_cfg_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
uint32_t diff;
if (size != 4) {
@@ -988,7 +988,7 @@ static void omap_pin_cfg_init(MemoryRegion *system_memory,
static uint64_t omap_id_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
@@ -1070,7 +1070,7 @@ static void omap_id_init(MemoryRegion *memory, struct omap_mpu_state_s *mpu)
static uint64_t omap_mpui_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
@@ -1103,7 +1103,7 @@ static uint64_t omap_mpui_read(void *opaque, hwaddr addr,
static void omap_mpui_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -1168,7 +1168,7 @@ struct omap_tipb_bridge_s {
static uint64_t omap_tipb_bridge_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_tipb_bridge_s *s = (struct omap_tipb_bridge_s *) opaque;
+ struct omap_tipb_bridge_s *s = opaque;
if (size < 2) {
return omap_badwidth_read16(opaque, addr);
@@ -1198,7 +1198,7 @@ static uint64_t omap_tipb_bridge_read(void *opaque, hwaddr addr,
static void omap_tipb_bridge_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_tipb_bridge_s *s = (struct omap_tipb_bridge_s *) opaque;
+ struct omap_tipb_bridge_s *s = opaque;
if (size < 2) {
omap_badwidth_write16(opaque, addr, value);
@@ -1269,7 +1269,7 @@ static struct omap_tipb_bridge_s *omap_tipb_bridge_init(
static uint64_t omap_tcmi_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
uint32_t ret;
if (size != 4) {
@@ -1307,7 +1307,7 @@ static uint64_t omap_tcmi_read(void *opaque, hwaddr addr,
static void omap_tcmi_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -1384,7 +1384,7 @@ struct dpll_ctl_s {
static uint64_t omap_dpll_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct dpll_ctl_s *s = (struct dpll_ctl_s *) opaque;
+ struct dpll_ctl_s *s = opaque;
if (size != 2) {
return omap_badwidth_read16(opaque, addr);
@@ -1400,7 +1400,7 @@ static uint64_t omap_dpll_read(void *opaque, hwaddr addr,
static void omap_dpll_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct dpll_ctl_s *s = (struct dpll_ctl_s *) opaque;
+ struct dpll_ctl_s *s = opaque;
uint16_t diff;
static const int bypass_div[4] = { 1, 2, 4, 4 };
int div, mult;
@@ -1464,7 +1464,7 @@ static struct dpll_ctl_s *omap_dpll_init(MemoryRegion *memory,
static uint64_t omap_clkm_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 2) {
return omap_badwidth_read16(opaque, addr);
@@ -1668,7 +1668,7 @@ static inline void omap_clkm_ckout1_update(struct omap_mpu_state_s *s,
static void omap_clkm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
uint16_t diff;
omap_clk clk;
static const char *clkschemename[8] = {
@@ -1756,7 +1756,7 @@ static const MemoryRegionOps omap_clkm_ops = {
static uint64_t omap_clkdsp_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
CPUState *cpu = CPU(s->cpu);
if (size != 2) {
@@ -1801,7 +1801,7 @@ static inline void omap_clkdsp_idlect2_update(struct omap_mpu_state_s *s,
static void omap_clkdsp_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
uint16_t diff;
if (size != 2) {
@@ -1911,7 +1911,7 @@ struct omap_mpuio_s {
static void omap_mpuio_set(void *opaque, int line, int level)
{
- struct omap_mpuio_s *s = (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s = opaque;
uint16_t prev = s->inputs;
if (level)
@@ -1947,7 +1947,7 @@ static void omap_mpuio_kbd_update(struct omap_mpuio_s *s)
static uint64_t omap_mpuio_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpuio_s *s = (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
uint16_t ret;
@@ -2007,7 +2007,7 @@ static uint64_t omap_mpuio_read(void *opaque, hwaddr addr,
static void omap_mpuio_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpuio_s *s = (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
uint16_t diff;
int ln;
@@ -2104,7 +2104,7 @@ static void omap_mpuio_reset(struct omap_mpuio_s *s)
static void omap_mpuio_onoff(void *opaque, int line, int on)
{
- struct omap_mpuio_s *s = (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s = opaque;
s->clk = on;
if (on)
@@ -2198,10 +2198,9 @@ static void omap_uwire_transfer_start(struct omap_uwire_s *s)
}
}
-static uint64_t omap_uwire_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_uwire_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_uwire_s *s = (struct omap_uwire_s *) opaque;
+ struct omap_uwire_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 2) {
@@ -2235,7 +2234,7 @@ static uint64_t omap_uwire_read(void *opaque, hwaddr addr,
static void omap_uwire_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_uwire_s *s = (struct omap_uwire_s *) opaque;
+ struct omap_uwire_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 2) {
@@ -2351,10 +2350,9 @@ static void omap_pwl_update(struct omap_pwl_s *s)
}
}
-static uint64_t omap_pwl_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_pwl_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;
+ struct omap_pwl_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
@@ -2374,7 +2372,7 @@ static uint64_t omap_pwl_read(void *opaque, hwaddr addr,
static void omap_pwl_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;
+ struct omap_pwl_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
@@ -2414,7 +2412,7 @@ static void omap_pwl_reset(struct omap_pwl_s *s)
static void omap_pwl_clk_update(void *opaque, int line, int on)
{
- struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;
+ struct omap_pwl_s *s = opaque;
s->clk = on;
omap_pwl_update(s);
@@ -2445,10 +2443,9 @@ struct omap_pwt_s {
omap_clk clk;
};
-static uint64_t omap_pwt_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_pwt_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_pwt_s *s = (struct omap_pwt_s *) opaque;
+ struct omap_pwt_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
@@ -2470,7 +2467,7 @@ static uint64_t omap_pwt_read(void *opaque, hwaddr addr,
static void omap_pwt_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_pwt_s *s = (struct omap_pwt_s *) opaque;
+ struct omap_pwt_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
@@ -2577,10 +2574,9 @@ static void omap_rtc_alarm_update(struct omap_rtc_s *s)
printf("%s: conversion failed\n", __func__);
}
-static uint64_t omap_rtc_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_rtc_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_rtc_s *s = (struct omap_rtc_s *) opaque;
+ struct omap_rtc_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
uint8_t i;
@@ -2662,7 +2658,7 @@ static uint64_t omap_rtc_read(void *opaque, hwaddr addr,
static void omap_rtc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_rtc_s *s = (struct omap_rtc_s *) opaque;
+ struct omap_rtc_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
struct tm new_tm;
time_t ti[2];
@@ -3034,7 +3030,7 @@ static void omap_mcbsp_rx_newdata(struct omap_mcbsp_s *s)
static void omap_mcbsp_source_tick(void *opaque)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
static const int bps[8] = { 0, 1, 1, 2, 2, 2, -255, -255 };
if (!s->rx_rate)
@@ -3080,7 +3076,7 @@ static void omap_mcbsp_tx_newdata(struct omap_mcbsp_s *s)
static void omap_mcbsp_sink_tick(void *opaque)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
static const int bps[8] = { 0, 1, 1, 2, 2, 2, -255, -255 };
if (!s->tx_rate)
@@ -3173,7 +3169,7 @@ static void omap_mcbsp_req_update(struct omap_mcbsp_s *s)
static uint64_t omap_mcbsp_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
uint16_t ret;
@@ -3271,7 +3267,7 @@ static uint64_t omap_mcbsp_read(void *opaque, hwaddr addr,
static void omap_mcbsp_writeh(void *opaque, hwaddr addr,
uint32_t value)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
switch (offset) {
@@ -3407,7 +3403,7 @@ static void omap_mcbsp_writeh(void *opaque, hwaddr addr,
static void omap_mcbsp_writew(void *opaque, hwaddr addr,
uint32_t value)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (offset == 0x04) { /* DXR */
@@ -3498,7 +3494,7 @@ static struct omap_mcbsp_s *omap_mcbsp_init(MemoryRegion *system_memory,
static void omap_mcbsp_i2s_swallow(void *opaque, int line, int level)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
if (s->rx_rate) {
s->rx_req = s->codec->in.len;
@@ -3508,7 +3504,7 @@ static void omap_mcbsp_i2s_swallow(void *opaque, int line, int level)
static void omap_mcbsp_i2s_start(void *opaque, int line, int level)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
if (s->tx_rate) {
s->tx_req = s->codec->out.size;
@@ -3590,10 +3586,9 @@ static void omap_lpg_reset(struct omap_lpg_s *s)
omap_lpg_update(s);
}
-static uint64_t omap_lpg_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_lpg_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_lpg_s *s = (struct omap_lpg_s *) opaque;
+ struct omap_lpg_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
@@ -3615,7 +3610,7 @@ static uint64_t omap_lpg_read(void *opaque, hwaddr addr,
static void omap_lpg_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_lpg_s *s = (struct omap_lpg_s *) opaque;
+ struct omap_lpg_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
@@ -3650,7 +3645,7 @@ static const MemoryRegionOps omap_lpg_ops = {
static void omap_lpg_clk_update(void *opaque, int line, int on)
{
- struct omap_lpg_s *s = (struct omap_lpg_s *) opaque;
+ struct omap_lpg_s *s = opaque;
s->clk = on;
omap_lpg_update(s);
@@ -3713,7 +3708,7 @@ static void omap_setup_mpui_io(MemoryRegion *system_memory,
/* General chip reset */
static void omap1_mpu_reset(void *opaque)
{
- struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *mpu = opaque;
omap_dma_reset(mpu->dma);
omap_mpu_timer_reset(mpu->timer[0]);
@@ -3793,7 +3788,7 @@ static void omap_setup_dsp_mapping(MemoryRegion *system_memory,
void omap_mpu_wakeup(void *opaque, int irq, int req)
{
- struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *mpu = opaque;
CPUState *cpu = CPU(mpu->cpu);
if (cpu->halted) {
diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c
index 8571eedd73..366d6af1b6 100644
--- a/hw/arm/omap2.c
+++ b/hw/arm/omap2.c
@@ -167,7 +167,7 @@ static inline void omap_eac_out_empty(struct omap_eac_s *s)
static void omap_eac_in_cb(void *opaque, int avail_b)
{
- struct omap_eac_s *s = (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s = opaque;
s->codec.rxavail = avail_b >> 2;
omap_eac_in_refill(s);
@@ -177,7 +177,7 @@ static void omap_eac_in_cb(void *opaque, int avail_b)
static void omap_eac_out_cb(void *opaque, int free_b)
{
- struct omap_eac_s *s = (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s = opaque;
s->codec.txavail = free_b >> 2;
if (s->codec.txlen)
@@ -333,10 +333,9 @@ static void omap_eac_reset(struct omap_eac_s *s)
omap_eac_interrupt_update(s);
}
-static uint64_t omap_eac_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_eac_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_eac_s *s = (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s = opaque;
uint32_t ret;
if (size != 2) {
@@ -452,7 +451,7 @@ static uint64_t omap_eac_read(void *opaque, hwaddr addr,
static void omap_eac_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_eac_s *s = (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s = opaque;
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
@@ -656,7 +655,7 @@ static void omap_sti_reset(struct omap_sti_s *s)
static uint64_t omap_sti_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_sti_s *s = (struct omap_sti_s *) opaque;
+ struct omap_sti_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
@@ -697,7 +696,7 @@ static uint64_t omap_sti_read(void *opaque, hwaddr addr,
static void omap_sti_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_sti_s *s = (struct omap_sti_s *) opaque;
+ struct omap_sti_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -751,8 +750,7 @@ static const MemoryRegionOps omap_sti_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static uint64_t omap_sti_fifo_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_sti_fifo_read(void *opaque, hwaddr addr, unsigned size)
{
OMAP_BAD_REG(addr);
return 0;
@@ -761,7 +759,7 @@ static uint64_t omap_sti_fifo_read(void *opaque, hwaddr addr,
static void omap_sti_fifo_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_sti_s *s = (struct omap_sti_s *) opaque;
+ struct omap_sti_s *s = opaque;
int ch = addr >> 6;
uint8_t byte = value;
@@ -1057,7 +1055,7 @@ static void omap_prcm_int_update(struct omap_prcm_s *s, int dom)
static uint64_t omap_prcm_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_prcm_s *s = (struct omap_prcm_s *) opaque;
+ struct omap_prcm_s *s = opaque;
uint32_t ret;
if (size != 4) {
@@ -1369,7 +1367,7 @@ static void omap_prcm_dpll_update(struct omap_prcm_s *s)
static void omap_prcm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_prcm_s *s = (struct omap_prcm_s *) opaque;
+ struct omap_prcm_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -1849,7 +1847,7 @@ struct omap_sysctl_s {
static uint32_t omap_sysctl_read8(void *opaque, hwaddr addr)
{
- struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s = opaque;
int pad_offset, byte_offset;
int value;
@@ -1873,7 +1871,7 @@ static uint32_t omap_sysctl_read8(void *opaque, hwaddr addr)
static uint32_t omap_sysctl_read(void *opaque, hwaddr addr)
{
- struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s = opaque;
switch (addr) {
case 0x000: /* CONTROL_REVISION */
@@ -1971,10 +1969,9 @@ static uint32_t omap_sysctl_read(void *opaque, hwaddr addr)
return 0;
}
-static void omap_sysctl_write8(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_sysctl_write8(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s = opaque;
int pad_offset, byte_offset;
int prev_value;
@@ -1995,10 +1992,9 @@ static void omap_sysctl_write8(void *opaque, hwaddr addr,
}
}
-static void omap_sysctl_write(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_sysctl_write(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s = opaque;
switch (addr) {
case 0x000: /* CONTROL_REVISION */
@@ -2233,7 +2229,7 @@ static struct omap_sysctl_s *omap_sysctl_init(struct omap_target_agent_s *ta,
/* General chip reset */
static void omap2_mpu_reset(void *opaque)
{
- struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *mpu = opaque;
omap_dma_reset(mpu->dma);
omap_prcm_reset(mpu->prcm);
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index 57829b3744..744c09b492 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -65,7 +65,7 @@
static uint64_t static_read(void *opaque, hwaddr offset,
unsigned size)
{
- uint32_t *val = (uint32_t *) opaque;
+ uint32_t *val = opaque;
uint32_t mask = (4 / size) - 1;
return *val >> ((offset & mask) << 3);
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
index 68e11dd1ec..1457f10c83 100644
--- a/hw/arm/palm.c
+++ b/hw/arm/palm.c
@@ -115,7 +115,7 @@ static struct {
static void palmte_button_event(void *opaque, int keycode)
{
- struct omap_mpu_state_s *cpu = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *cpu = opaque;
if (palmte_keymap[keycode & 0x7f].row != -1)
omap_mpuio_key(cpu->mpuio,
diff --git a/hw/char/omap_uart.c b/hw/char/omap_uart.c
index e8da933378..1c890b9201 100644
--- a/hw/char/omap_uart.c
+++ b/hw/char/omap_uart.c
@@ -67,10 +67,9 @@ struct omap_uart_s *omap_uart_init(hwaddr base,
return s;
}
-static uint64_t omap_uart_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_uart_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_uart_s *s = (struct omap_uart_s *) opaque;
+ struct omap_uart_s *s = opaque;
if (size == 4) {
return omap_badwidth_read8(opaque, addr);
@@ -108,7 +107,7 @@ static uint64_t omap_uart_read(void *opaque, hwaddr addr,
static void omap_uart_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_uart_s *s = (struct omap_uart_s *) opaque;
+ struct omap_uart_s *s = opaque;
if (size == 4) {
omap_badwidth_write8(opaque, addr, value);
diff --git a/hw/display/omap_dss.c b/hw/display/omap_dss.c
index 09e18407b4..f33fc7606d 100644
--- a/hw/display/omap_dss.c
+++ b/hw/display/omap_dss.c
@@ -175,7 +175,7 @@ void omap_dss_reset(struct omap_dss_s *s)
static uint64_t omap_diss_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
@@ -213,7 +213,7 @@ static uint64_t omap_diss_read(void *opaque, hwaddr addr,
static void omap_diss_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -254,7 +254,7 @@ static const MemoryRegionOps omap_diss_ops = {
static uint64_t omap_disc_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
@@ -379,7 +379,7 @@ static uint64_t omap_disc_read(void *opaque, hwaddr addr,
static void omap_disc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -669,10 +669,9 @@ static void omap_rfbi_transfer_start(struct omap_dss_s *s)
omap_dispc_interrupt_update(s);
}
-static uint64_t omap_rfbi_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_rfbi_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
@@ -739,7 +738,7 @@ static uint64_t omap_rfbi_read(void *opaque, hwaddr addr,
static void omap_rfbi_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
diff --git a/hw/display/omap_lcdc.c b/hw/display/omap_lcdc.c
index 0ba42ef637..3532a801be 100644
--- a/hw/display/omap_lcdc.c
+++ b/hw/display/omap_lcdc.c
@@ -198,7 +198,7 @@ static void draw_line16_32(void *opaque, uint8_t *d, const uint8_t *s,
static void omap_update_display(void *opaque)
{
- struct omap_lcd_panel_s *omap_lcd = (struct omap_lcd_panel_s *) opaque;
+ struct omap_lcd_panel_s *omap_lcd = opaque;
DisplaySurface *surface;
drawfn draw_line;
int size, height, first, last;
@@ -376,10 +376,9 @@ static void omap_lcd_update(struct omap_lcd_panel_s *s) {
}
}
-static uint64_t omap_lcdc_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_lcdc_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque;
+ struct omap_lcd_panel_s *s = opaque;
switch (addr) {
case 0x00: /* LCD_CONTROL */
@@ -412,7 +411,7 @@ static uint64_t omap_lcdc_read(void *opaque, hwaddr addr,
static void omap_lcdc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque;
+ struct omap_lcd_panel_s *s = opaque;
switch (addr) {
case 0x00: /* LCD_CONTROL */
diff --git a/hw/dma/omap_dma.c b/hw/dma/omap_dma.c
index 6677237d42..c6e35ba4b8 100644
--- a/hw/dma/omap_dma.c
+++ b/hw/dma/omap_dma.c
@@ -1454,10 +1454,9 @@ static int omap_dma_sys_read(struct omap_dma_s *s, int offset,
return 0;
}
-static uint64_t omap_dma_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_dma_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
int reg, ch;
uint16_t ret;
@@ -1505,7 +1504,7 @@ static uint64_t omap_dma_read(void *opaque, hwaddr addr,
static void omap_dma_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
int reg, ch;
if (size != 2) {
@@ -1557,7 +1556,7 @@ static const MemoryRegionOps omap_dma_ops = {
static void omap_dma_request(void *opaque, int drq, int req)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
/* The request pins are level triggered in QEMU. */
if (req) {
if (~s->dma->drqbmp & (1ULL << drq)) {
@@ -1571,7 +1570,7 @@ static void omap_dma_request(void *opaque, int drq, int req)
/* XXX: this won't be needed once soc_dma knows about clocks. */
static void omap_dma_clk_update(void *opaque, int line, int on)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
int i;
s->dma->freq = omap_clk_getrate(s->clk);
@@ -1703,7 +1702,7 @@ static void omap_dma_interrupts_4_update(struct omap_dma_s *s)
static uint64_t omap_dma4_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
int irqn = 0, chnum;
struct omap_dma_channel_s *ch;
@@ -1859,7 +1858,7 @@ static uint64_t omap_dma4_read(void *opaque, hwaddr addr,
static void omap_dma4_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
int chnum, irqn = 0;
struct omap_dma_channel_s *ch;
diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c
index 12ec16d1b0..b3cb3499bd 100644
--- a/hw/gpio/omap_gpio.c
+++ b/hw/gpio/omap_gpio.c
@@ -72,7 +72,7 @@ static void omap_gpio_set(void *opaque, int line, int level)
static uint64_t omap_gpio_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpio_s *s = (struct omap_gpio_s *) opaque;
+ struct omap_gpio_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 2) {
@@ -110,7 +110,7 @@ static uint64_t omap_gpio_read(void *opaque, hwaddr addr,
static void omap_gpio_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpio_s *s = (struct omap_gpio_s *) opaque;
+ struct omap_gpio_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
uint16_t diff;
int ln;
@@ -309,7 +309,7 @@ static void omap2_gpio_module_reset(struct omap2_gpio_s *s)
static uint32_t omap2_gpio_module_read(void *opaque, hwaddr addr)
{
- struct omap2_gpio_s *s = (struct omap2_gpio_s *) opaque;
+ struct omap2_gpio_s *s = opaque;
switch (addr) {
case 0x00: /* GPIO_REVISION */
@@ -382,7 +382,7 @@ static uint32_t omap2_gpio_module_read(void *opaque, hwaddr addr)
static void omap2_gpio_module_write(void *opaque, hwaddr addr,
uint32_t value)
{
- struct omap2_gpio_s *s = (struct omap2_gpio_s *) opaque;
+ struct omap2_gpio_s *s = opaque;
uint32_t diff;
int ln;
@@ -611,10 +611,9 @@ static void omap2_gpif_reset(DeviceState *dev)
s->gpo = 0;
}
-static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap2_gpif_s *s = (struct omap2_gpif_s *) opaque;
+ struct omap2_gpif_s *s = opaque;
switch (addr) {
case 0x00: /* IPGENERICOCPSPL_REVISION */
@@ -643,7 +642,7 @@ static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr,
static void omap2_gpif_top_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap2_gpif_s *s = (struct omap2_gpif_s *) opaque;
+ struct omap2_gpif_s *s = opaque;
switch (addr) {
case 0x00: /* IPGENERICOCPSPL_REVISION */
diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c
index d7183d035e..9f6a71ce30 100644
--- a/hw/intc/omap_intc.c
+++ b/hw/intc/omap_intc.c
@@ -109,7 +109,7 @@ static inline void omap_inth_update(struct omap_intr_handler_s *s, int is_fiq)
static void omap_set_intr(void *opaque, int irq, int req)
{
- struct omap_intr_handler_s *ih = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *ih = opaque;
uint32_t rise;
struct omap_intr_handler_bank_s *bank = &ih->bank[irq >> 5];
@@ -136,7 +136,7 @@ static void omap_set_intr(void *opaque, int irq, int req)
/* Simplified version with no edge detection */
static void omap_set_intr_noedge(void *opaque, int irq, int req)
{
- struct omap_intr_handler_s *ih = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *ih = opaque;
uint32_t rise;
struct omap_intr_handler_bank_s *bank = &ih->bank[irq >> 5];
@@ -156,7 +156,7 @@ static void omap_set_intr_noedge(void *opaque, int irq, int req)
static uint64_t omap_inth_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *s = opaque;
int i, offset = addr;
int bank_no = offset >> 8;
int line_no;
@@ -234,7 +234,7 @@ static uint64_t omap_inth_read(void *opaque, hwaddr addr,
static void omap_inth_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *s = opaque;
int i, offset = addr;
int bank_no = offset >> 8;
struct omap_intr_handler_bank_s *bank = &s->bank[bank_no];
@@ -423,7 +423,7 @@ static const TypeInfo omap_intc_info = {
static uint64_t omap2_inth_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *s = opaque;
int offset = addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank = NULL;
@@ -504,7 +504,7 @@ static uint64_t omap2_inth_read(void *opaque, hwaddr addr,
static void omap2_inth_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *s = opaque;
int offset = addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank = NULL;
diff --git a/hw/misc/omap_gpmc.c b/hw/misc/omap_gpmc.c
index 10de7a5523..67158eb164 100644
--- a/hw/misc/omap_gpmc.c
+++ b/hw/misc/omap_gpmc.c
@@ -126,7 +126,7 @@ static void omap_gpmc_dma_update(struct omap_gpmc_s *s, int value)
static uint64_t omap_nand_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpmc_cs_file_s *f = (struct omap_gpmc_cs_file_s *)opaque;
+ struct omap_gpmc_cs_file_s *f = opaque;
uint64_t v;
nand_setpins(f->dev, 0, 0, 0, 1, 0);
switch (omap_gpmc_devsize(f)) {
@@ -205,7 +205,7 @@ static void omap_nand_setio(DeviceState *dev, uint64_t value,
static void omap_nand_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpmc_cs_file_s *f = (struct omap_gpmc_cs_file_s *)opaque;
+ struct omap_gpmc_cs_file_s *f = opaque;
nand_setpins(f->dev, 0, 0, 0, 1, 0);
omap_nand_setio(f->dev, value, omap_gpmc_devsize(f), size);
}
@@ -290,7 +290,7 @@ static void fill_prefetch_fifo(struct omap_gpmc_s *s)
static uint64_t omap_gpmc_prefetch_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpmc_s *s = (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s = opaque;
uint32_t data;
if (s->prefetch.config1 & 1) {
/* The TRM doesn't define the behaviour if you read from the
@@ -320,7 +320,7 @@ static uint64_t omap_gpmc_prefetch_read(void *opaque, hwaddr addr,
static void omap_gpmc_prefetch_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpmc_s *s = (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s = opaque;
int cs = prefetch_cs(s->prefetch.config1);
if ((s->prefetch.config1 & 1) == 0) {
/* The TRM doesn't define the behaviour of writing to the
@@ -509,7 +509,7 @@ static int gpmc_wordaccess_only(hwaddr addr)
static uint64_t omap_gpmc_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpmc_s *s = (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s = opaque;
int cs;
struct omap_gpmc_cs_file_s *f;
@@ -621,7 +621,7 @@ static uint64_t omap_gpmc_read(void *opaque, hwaddr addr,
static void omap_gpmc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpmc_s *s = (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s = opaque;
int cs;
struct omap_gpmc_cs_file_s *f;
diff --git a/hw/misc/omap_l4.c b/hw/misc/omap_l4.c
index 54aeaecd69..b7875489da 100644
--- a/hw/misc/omap_l4.c
+++ b/hw/misc/omap_l4.c
@@ -52,10 +52,9 @@ hwaddr omap_l4_region_size(struct omap_target_agent_s *ta,
return ta->start[region].size;
}
-static uint64_t omap_l4ta_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_l4ta_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
+ struct omap_target_agent_s *s = opaque;
if (size != 2) {
return omap_badwidth_read16(opaque, addr);
@@ -79,7 +78,7 @@ static uint64_t omap_l4ta_read(void *opaque, hwaddr addr,
static void omap_l4ta_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
+ struct omap_target_agent_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
diff --git a/hw/misc/omap_sdrc.c b/hw/misc/omap_sdrc.c
index f2f72f6810..6aa1b3ef7f 100644
--- a/hw/misc/omap_sdrc.c
+++ b/hw/misc/omap_sdrc.c
@@ -31,10 +31,9 @@ void omap_sdrc_reset(struct omap_sdrc_s *s)
s->config = 0x10;
}
-static uint64_t omap_sdrc_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_sdrc_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_sdrc_s *s = (struct omap_sdrc_s *) opaque;
+ struct omap_sdrc_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
@@ -89,7 +88,7 @@ static uint64_t omap_sdrc_read(void *opaque, hwaddr addr,
static void omap_sdrc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_sdrc_s *s = (struct omap_sdrc_s *) opaque;
+ struct omap_sdrc_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
diff --git a/hw/misc/omap_tap.c b/hw/misc/omap_tap.c
index 3f595e8df7..4d7fb7d85f 100644
--- a/hw/misc/omap_tap.c
+++ b/hw/misc/omap_tap.c
@@ -23,10 +23,9 @@
#include "hw/arm/omap.h"
/* TEST-Chip-level TAP */
-static uint64_t omap_tap_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_tap_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c
index b67def6381..edd3cf2a1e 100644
--- a/hw/sd/omap_mmc.c
+++ b/hw/sd/omap_mmc.c
@@ -321,11 +321,10 @@ void omap_mmc_reset(struct omap_mmc_s *host)
device_cold_reset(DEVICE(host->card));
}
-static uint64_t omap_mmc_read(void *opaque, hwaddr offset,
- unsigned size)
+static uint64_t omap_mmc_read(void *opaque, hwaddr offset, unsigned size)
{
uint16_t i;
- struct omap_mmc_s *s = (struct omap_mmc_s *) opaque;
+ struct omap_mmc_s *s = opaque;
if (size != 2) {
return omap_badwidth_read16(opaque, offset);
@@ -418,7 +417,7 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
int i;
- struct omap_mmc_s *s = (struct omap_mmc_s *) opaque;
+ struct omap_mmc_s *s = opaque;
if (size != 2) {
omap_badwidth_write16(opaque, offset, value);
@@ -576,7 +575,7 @@ static const MemoryRegionOps omap_mmc_ops = {
static void omap_mmc_cover_cb(void *opaque, int line, int level)
{
- struct omap_mmc_s *host = (struct omap_mmc_s *) opaque;
+ struct omap_mmc_s *host = opaque;
if (!host->cdet_state && level) {
host->status |= 0x0002;
diff --git a/hw/ssi/omap_spi.c b/hw/ssi/omap_spi.c
index 7c7e689707..8f85c3e391 100644
--- a/hw/ssi/omap_spi.c
+++ b/hw/ssi/omap_spi.c
@@ -134,10 +134,9 @@ void omap_mcspi_reset(struct omap_mcspi_s *s)
omap_mcspi_interrupt_update(s);
}
-static uint64_t omap_mcspi_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_mcspi_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_mcspi_s *s = (struct omap_mcspi_s *) opaque;
+ struct omap_mcspi_s *s = opaque;
int ch = 0;
uint32_t ret;
@@ -226,7 +225,7 @@ static uint64_t omap_mcspi_read(void *opaque, hwaddr addr,
static void omap_mcspi_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mcspi_s *s = (struct omap_mcspi_s *) opaque;
+ struct omap_mcspi_s *s = opaque;
int ch = 0;
if (size != 4) {
diff --git a/hw/timer/omap_gptimer.c b/hw/timer/omap_gptimer.c
index c407190138..34e6af7aff 100644
--- a/hw/timer/omap_gptimer.c
+++ b/hw/timer/omap_gptimer.c
@@ -159,7 +159,7 @@ static inline void omap_gp_timer_trigger(struct omap_gp_timer_s *timer)
static void omap_gp_timer_tick(void *opaque)
{
- struct omap_gp_timer_s *timer = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *timer = opaque;
if (!timer->ar) {
timer->st = 0;
@@ -179,7 +179,7 @@ static void omap_gp_timer_tick(void *opaque)
static void omap_gp_timer_match(void *opaque)
{
- struct omap_gp_timer_s *timer = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *timer = opaque;
if (timer->trigger == gpt_trigger_both)
omap_gp_timer_trigger(timer);
@@ -189,7 +189,7 @@ static void omap_gp_timer_match(void *opaque)
static void omap_gp_timer_input(void *opaque, int line, int on)
{
- struct omap_gp_timer_s *s = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s = opaque;
int trigger;
switch (s->capture) {
@@ -219,7 +219,7 @@ static void omap_gp_timer_input(void *opaque, int line, int on)
static void omap_gp_timer_clk_update(void *opaque, int line, int on)
{
- struct omap_gp_timer_s *timer = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *timer = opaque;
omap_gp_timer_sync(timer);
timer->rate = on ? omap_clk_getrate(timer->clk) : 0;
@@ -262,7 +262,7 @@ void omap_gp_timer_reset(struct omap_gp_timer_s *s)
static uint32_t omap_gp_timer_readw(void *opaque, hwaddr addr)
{
- struct omap_gp_timer_s *s = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s = opaque;
switch (addr) {
case 0x00: /* TIDR */
@@ -328,7 +328,7 @@ static uint32_t omap_gp_timer_readw(void *opaque, hwaddr addr)
static uint32_t omap_gp_timer_readh(void *opaque, hwaddr addr)
{
- struct omap_gp_timer_s *s = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s = opaque;
uint32_t ret;
if (addr & 2)
@@ -340,10 +340,9 @@ static uint32_t omap_gp_timer_readh(void *opaque, hwaddr addr)
}
}
-static void omap_gp_timer_write(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_gp_timer_write(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_gp_timer_s *s = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s = opaque;
switch (addr) {
case 0x00: /* TIDR */
@@ -440,10 +439,9 @@ static void omap_gp_timer_write(void *opaque, hwaddr addr,
}
}
-static void omap_gp_timer_writeh(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_gp_timer_writeh(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_gp_timer_s *s = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s = opaque;
if (addr & 2)
omap_gp_timer_write(opaque, addr, (value << 16) | s->writeh);
diff --git a/hw/timer/omap_synctimer.c b/hw/timer/omap_synctimer.c
index 72b997939b..d93a9344ed 100644
--- a/hw/timer/omap_synctimer.c
+++ b/hw/timer/omap_synctimer.c
@@ -39,7 +39,7 @@ void omap_synctimer_reset(struct omap_synctimer_s *s)
static uint32_t omap_synctimer_readw(void *opaque, hwaddr addr)
{
- struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
+ struct omap_synctimer_s *s = opaque;
switch (addr) {
case 0x00: /* 32KSYNCNT_REV */
@@ -55,7 +55,7 @@ static uint32_t omap_synctimer_readw(void *opaque, hwaddr addr)
static uint32_t omap_synctimer_readh(void *opaque, hwaddr addr)
{
- struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
+ struct omap_synctimer_s *s = opaque;
uint32_t ret;
if (addr & 2)
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 04/14] hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP1_GPIO type name
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2023-01-09 14:02 ` [PATCH 03/14] hw/arm/omap: Drop useless casts from void * to pointer Philippe Mathieu-Daudé
@ 2023-01-09 14:02 ` Philippe Mathieu-Daudé
2023-01-09 14:02 ` [PATCH 05/14] hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP2_GPIO " Philippe Mathieu-Daudé
` (11 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:02 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
Following docs/devel/style.rst guidelines, rename omap_gpif_s ->
Omap1GpioState. This also remove a use of 'struct' in the
DECLARE_INSTANCE_CHECKER() macro call.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/gpio/omap_gpio.c | 16 ++++++++--------
include/hw/arm/omap.h | 6 +++---
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c
index b3cb3499bd..23502315ea 100644
--- a/hw/gpio/omap_gpio.c
+++ b/hw/gpio/omap_gpio.c
@@ -41,7 +41,7 @@ struct omap_gpio_s {
uint16_t pins;
};
-struct omap_gpif_s {
+struct Omap1GpioState {
SysBusDevice parent_obj;
MemoryRegion iomem;
@@ -53,7 +53,7 @@ struct omap_gpif_s {
/* General-Purpose I/O of OMAP1 */
static void omap_gpio_set(void *opaque, int line, int level)
{
- struct omap_gpif_s *p = opaque;
+ Omap1GpioState *p = opaque;
struct omap_gpio_s *s = &p->omap1;
uint16_t prev = s->inputs;
@@ -594,7 +594,7 @@ static const MemoryRegionOps omap2_gpio_module_ops = {
static void omap_gpif_reset(DeviceState *dev)
{
- struct omap_gpif_s *s = OMAP1_GPIO(dev);
+ Omap1GpioState *s = OMAP1_GPIO(dev);
omap_gpio_reset(&s->omap1);
}
@@ -677,7 +677,7 @@ static const MemoryRegionOps omap2_gpif_top_ops = {
static void omap_gpio_init(Object *obj)
{
DeviceState *dev = DEVICE(obj);
- struct omap_gpif_s *s = OMAP1_GPIO(obj);
+ Omap1GpioState *s = OMAP1_GPIO(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
qdev_init_gpio_in(dev, omap_gpio_set, 16);
@@ -690,7 +690,7 @@ static void omap_gpio_init(Object *obj)
static void omap_gpio_realize(DeviceState *dev, Error **errp)
{
- struct omap_gpif_s *s = OMAP1_GPIO(dev);
+ Omap1GpioState *s = OMAP1_GPIO(dev);
if (!s->clk) {
error_setg(errp, "omap-gpio: clk not connected");
@@ -742,13 +742,13 @@ static void omap2_gpio_realize(DeviceState *dev, Error **errp)
}
}
-void omap_gpio_set_clk(omap_gpif *gpio, omap_clk clk)
+void omap_gpio_set_clk(Omap1GpioState *gpio, omap_clk clk)
{
gpio->clk = clk;
}
static Property omap_gpio_properties[] = {
- DEFINE_PROP_INT32("mpu_model", struct omap_gpif_s, mpu_model, 0),
+ DEFINE_PROP_INT32("mpu_model", Omap1GpioState, mpu_model, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -766,7 +766,7 @@ static void omap_gpio_class_init(ObjectClass *klass, void *data)
static const TypeInfo omap_gpio_info = {
.name = TYPE_OMAP1_GPIO,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(struct omap_gpif_s),
+ .instance_size = sizeof(Omap1GpioState),
.instance_init = omap_gpio_init,
.class_init = omap_gpio_class_init,
};
diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h
index ff6a173f8a..29d2ed7e3b 100644
--- a/include/hw/arm/omap.h
+++ b/include/hw/arm/omap.h
@@ -103,18 +103,18 @@ void omap_i2c_set_fclk(OMAPI2CState *i2c, omap_clk clk);
/* omap_gpio.c */
#define TYPE_OMAP1_GPIO "omap-gpio"
-DECLARE_INSTANCE_CHECKER(struct omap_gpif_s, OMAP1_GPIO,
+typedef struct Omap1GpioState Omap1GpioState;
+DECLARE_INSTANCE_CHECKER(Omap1GpioState, OMAP1_GPIO,
TYPE_OMAP1_GPIO)
#define TYPE_OMAP2_GPIO "omap2-gpio"
DECLARE_INSTANCE_CHECKER(struct omap2_gpif_s, OMAP2_GPIO,
TYPE_OMAP2_GPIO)
-typedef struct omap_gpif_s omap_gpif;
typedef struct omap2_gpif_s omap2_gpif;
/* TODO: clock framework (see above) */
-void omap_gpio_set_clk(omap_gpif *gpio, omap_clk clk);
+void omap_gpio_set_clk(Omap1GpioState *gpio, omap_clk clk);
void omap2_gpio_set_iclk(omap2_gpif *gpio, omap_clk clk);
void omap2_gpio_set_fclk(omap2_gpif *gpio, uint8_t i, omap_clk clk);
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 05/14] hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP2_GPIO type name
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2023-01-09 14:02 ` [PATCH 04/14] hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP1_GPIO type name Philippe Mathieu-Daudé
@ 2023-01-09 14:02 ` Philippe Mathieu-Daudé
2023-01-09 14:02 ` [PATCH 06/14] hw/intc/omap_intc: Use CamelCase for TYPE_OMAP_INTC " Philippe Mathieu-Daudé
` (10 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:02 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
Following docs/devel/style.rst guidelines, rename omap2_gpif_s ->
Omap2GpioState. This also remove a use of 'struct' in the
DECLARE_INSTANCE_CHECKER() macro call.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/gpio/omap_gpio.c | 20 ++++++++++----------
include/hw/arm/omap.h | 9 ++++-----
2 files changed, 14 insertions(+), 15 deletions(-)
diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c
index 23502315ea..a3341d70f1 100644
--- a/hw/gpio/omap_gpio.c
+++ b/hw/gpio/omap_gpio.c
@@ -210,7 +210,7 @@ struct omap2_gpio_s {
uint8_t delay;
};
-struct omap2_gpif_s {
+struct Omap2GpioState {
SysBusDevice parent_obj;
MemoryRegion iomem;
@@ -274,7 +274,7 @@ static inline void omap2_gpio_module_int(struct omap2_gpio_s *s, int line)
static void omap2_gpio_set(void *opaque, int line, int level)
{
- struct omap2_gpif_s *p = opaque;
+ Omap2GpioState *p = opaque;
struct omap2_gpio_s *s = &p->modules[line >> 5];
line &= 31;
@@ -601,7 +601,7 @@ static void omap_gpif_reset(DeviceState *dev)
static void omap2_gpif_reset(DeviceState *dev)
{
- struct omap2_gpif_s *s = OMAP2_GPIO(dev);
+ Omap2GpioState *s = OMAP2_GPIO(dev);
int i;
for (i = 0; i < s->modulecount; i++) {
@@ -613,7 +613,7 @@ static void omap2_gpif_reset(DeviceState *dev)
static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap2_gpif_s *s = opaque;
+ Omap2GpioState *s = opaque;
switch (addr) {
case 0x00: /* IPGENERICOCPSPL_REVISION */
@@ -642,7 +642,7 @@ static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr, unsigned size)
static void omap2_gpif_top_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap2_gpif_s *s = opaque;
+ Omap2GpioState *s = opaque;
switch (addr) {
case 0x00: /* IPGENERICOCPSPL_REVISION */
@@ -699,7 +699,7 @@ static void omap_gpio_realize(DeviceState *dev, Error **errp)
static void omap2_gpio_realize(DeviceState *dev, Error **errp)
{
- struct omap2_gpif_s *s = OMAP2_GPIO(dev);
+ Omap2GpioState *s = OMAP2_GPIO(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
int i;
@@ -771,19 +771,19 @@ static const TypeInfo omap_gpio_info = {
.class_init = omap_gpio_class_init,
};
-void omap2_gpio_set_iclk(omap2_gpif *gpio, omap_clk clk)
+void omap2_gpio_set_iclk(Omap2GpioState *gpio, omap_clk clk)
{
gpio->iclk = clk;
}
-void omap2_gpio_set_fclk(omap2_gpif *gpio, uint8_t i, omap_clk clk)
+void omap2_gpio_set_fclk(Omap2GpioState *gpio, uint8_t i, omap_clk clk)
{
assert(i <= 5);
gpio->fclk[i] = clk;
}
static Property omap2_gpio_properties[] = {
- DEFINE_PROP_INT32("mpu_model", struct omap2_gpif_s, mpu_model, 0),
+ DEFINE_PROP_INT32("mpu_model", Omap2GpioState, mpu_model, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -801,7 +801,7 @@ static void omap2_gpio_class_init(ObjectClass *klass, void *data)
static const TypeInfo omap2_gpio_info = {
.name = TYPE_OMAP2_GPIO,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(struct omap2_gpif_s),
+ .instance_size = sizeof(Omap2GpioState),
.class_init = omap2_gpio_class_init,
};
diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h
index 29d2ed7e3b..9e30ba7ba2 100644
--- a/include/hw/arm/omap.h
+++ b/include/hw/arm/omap.h
@@ -108,16 +108,15 @@ DECLARE_INSTANCE_CHECKER(Omap1GpioState, OMAP1_GPIO,
TYPE_OMAP1_GPIO)
#define TYPE_OMAP2_GPIO "omap2-gpio"
-DECLARE_INSTANCE_CHECKER(struct omap2_gpif_s, OMAP2_GPIO,
+typedef struct Omap2GpioState Omap2GpioState;
+DECLARE_INSTANCE_CHECKER(Omap2GpioState, OMAP2_GPIO,
TYPE_OMAP2_GPIO)
-typedef struct omap2_gpif_s omap2_gpif;
-
/* TODO: clock framework (see above) */
void omap_gpio_set_clk(Omap1GpioState *gpio, omap_clk clk);
-void omap2_gpio_set_iclk(omap2_gpif *gpio, omap_clk clk);
-void omap2_gpio_set_fclk(omap2_gpif *gpio, uint8_t i, omap_clk clk);
+void omap2_gpio_set_iclk(Omap2GpioState *gpio, omap_clk clk);
+void omap2_gpio_set_fclk(Omap2GpioState *gpio, uint8_t i, omap_clk clk);
/* OMAP2 l4 Interconnect */
struct omap_l4_s;
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 06/14] hw/intc/omap_intc: Use CamelCase for TYPE_OMAP_INTC type name
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2023-01-09 14:02 ` [PATCH 05/14] hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP2_GPIO " Philippe Mathieu-Daudé
@ 2023-01-09 14:02 ` Philippe Mathieu-Daudé
2023-01-09 14:02 ` [PATCH 07/14] hw/arm/stellaris: Drop useless casts from void * to pointer Philippe Mathieu-Daudé
` (9 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:02 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
Following docs/devel/style.rst guidelines, rename
omap_intr_handler_s -> OMAPIntcState. This also remove a
use of 'struct' in the DECLARE_INSTANCE_CHECKER() macro call.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/intc/omap_intc.c | 38 +++++++++++++++++++-------------------
include/hw/arm/omap.h | 9 ++++-----
2 files changed, 23 insertions(+), 24 deletions(-)
diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c
index 9f6a71ce30..647bf324a8 100644
--- a/hw/intc/omap_intc.c
+++ b/hw/intc/omap_intc.c
@@ -38,7 +38,7 @@ struct omap_intr_handler_bank_s {
unsigned char priority[32];
};
-struct omap_intr_handler_s {
+struct OMAPIntcState {
SysBusDevice parent_obj;
qemu_irq *pins;
@@ -60,7 +60,7 @@ struct omap_intr_handler_s {
struct omap_intr_handler_bank_s bank[3];
};
-static void omap_inth_sir_update(struct omap_intr_handler_s *s, int is_fiq)
+static void omap_inth_sir_update(OMAPIntcState *s, int is_fiq)
{
int i, j, sir_intr, p_intr, p;
uint32_t level;
@@ -88,7 +88,7 @@ static void omap_inth_sir_update(struct omap_intr_handler_s *s, int is_fiq)
s->sir_intr[is_fiq] = sir_intr;
}
-static inline void omap_inth_update(struct omap_intr_handler_s *s, int is_fiq)
+static inline void omap_inth_update(OMAPIntcState *s, int is_fiq)
{
int i;
uint32_t has_intr = 0;
@@ -109,7 +109,7 @@ static inline void omap_inth_update(struct omap_intr_handler_s *s, int is_fiq)
static void omap_set_intr(void *opaque, int irq, int req)
{
- struct omap_intr_handler_s *ih = opaque;
+ OMAPIntcState *ih = opaque;
uint32_t rise;
struct omap_intr_handler_bank_s *bank = &ih->bank[irq >> 5];
@@ -136,7 +136,7 @@ static void omap_set_intr(void *opaque, int irq, int req)
/* Simplified version with no edge detection */
static void omap_set_intr_noedge(void *opaque, int irq, int req)
{
- struct omap_intr_handler_s *ih = opaque;
+ OMAPIntcState *ih = opaque;
uint32_t rise;
struct omap_intr_handler_bank_s *bank = &ih->bank[irq >> 5];
@@ -156,7 +156,7 @@ static void omap_set_intr_noedge(void *opaque, int irq, int req)
static uint64_t omap_inth_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_intr_handler_s *s = opaque;
+ OMAPIntcState *s = opaque;
int i, offset = addr;
int bank_no = offset >> 8;
int line_no;
@@ -234,7 +234,7 @@ static uint64_t omap_inth_read(void *opaque, hwaddr addr,
static void omap_inth_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_intr_handler_s *s = opaque;
+ OMAPIntcState *s = opaque;
int i, offset = addr;
int bank_no = offset >> 8;
struct omap_intr_handler_bank_s *bank = &s->bank[bank_no];
@@ -336,7 +336,7 @@ static const MemoryRegionOps omap_inth_mem_ops = {
static void omap_inth_reset(DeviceState *dev)
{
- struct omap_intr_handler_s *s = OMAP_INTC(dev);
+ OMAPIntcState *s = OMAP_INTC(dev);
int i;
for (i = 0; i < s->nbanks; ++i){
@@ -366,7 +366,7 @@ static void omap_inth_reset(DeviceState *dev)
static void omap_intc_init(Object *obj)
{
DeviceState *dev = DEVICE(obj);
- struct omap_intr_handler_s *s = OMAP_INTC(obj);
+ OMAPIntcState *s = OMAP_INTC(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
s->nbanks = 1;
@@ -380,25 +380,25 @@ static void omap_intc_init(Object *obj)
static void omap_intc_realize(DeviceState *dev, Error **errp)
{
- struct omap_intr_handler_s *s = OMAP_INTC(dev);
+ OMAPIntcState *s = OMAP_INTC(dev);
if (!s->iclk) {
error_setg(errp, "omap-intc: clk not connected");
}
}
-void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk)
+void omap_intc_set_iclk(OMAPIntcState *intc, omap_clk clk)
{
intc->iclk = clk;
}
-void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk)
+void omap_intc_set_fclk(OMAPIntcState *intc, omap_clk clk)
{
intc->fclk = clk;
}
static Property omap_intc_properties[] = {
- DEFINE_PROP_UINT32("size", struct omap_intr_handler_s, size, 0x100),
+ DEFINE_PROP_UINT32("size", OMAPIntcState, size, 0x100),
DEFINE_PROP_END_OF_LIST(),
};
@@ -423,7 +423,7 @@ static const TypeInfo omap_intc_info = {
static uint64_t omap2_inth_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_intr_handler_s *s = opaque;
+ OMAPIntcState *s = opaque;
int offset = addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank = NULL;
@@ -504,7 +504,7 @@ static uint64_t omap2_inth_read(void *opaque, hwaddr addr,
static void omap2_inth_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_intr_handler_s *s = opaque;
+ OMAPIntcState *s = opaque;
int offset = addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank = NULL;
@@ -622,7 +622,7 @@ static const MemoryRegionOps omap2_inth_mem_ops = {
static void omap2_intc_init(Object *obj)
{
DeviceState *dev = DEVICE(obj);
- struct omap_intr_handler_s *s = OMAP_INTC(obj);
+ OMAPIntcState *s = OMAP_INTC(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
s->level_only = 1;
@@ -637,7 +637,7 @@ static void omap2_intc_init(Object *obj)
static void omap2_intc_realize(DeviceState *dev, Error **errp)
{
- struct omap_intr_handler_s *s = OMAP_INTC(dev);
+ OMAPIntcState *s = OMAP_INTC(dev);
if (!s->iclk) {
error_setg(errp, "omap2-intc: iclk not connected");
@@ -650,7 +650,7 @@ static void omap2_intc_realize(DeviceState *dev, Error **errp)
}
static Property omap2_intc_properties[] = {
- DEFINE_PROP_UINT8("revision", struct omap_intr_handler_s,
+ DEFINE_PROP_UINT8("revision", OMAPIntcState,
revision, 0x21),
DEFINE_PROP_END_OF_LIST(),
};
@@ -676,7 +676,7 @@ static const TypeInfo omap2_intc_info = {
static const TypeInfo omap_intc_type_info = {
.name = TYPE_OMAP_INTC,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(omap_intr_handler),
+ .instance_size = sizeof(OMAPIntcState),
.abstract = true,
};
diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h
index 9e30ba7ba2..c275d9b681 100644
--- a/include/hw/arm/omap.h
+++ b/include/hw/arm/omap.h
@@ -70,9 +70,8 @@ void omap_clk_reparent(omap_clk clk, omap_clk parent);
/* omap_intc.c */
#define TYPE_OMAP_INTC "common-omap-intc"
-typedef struct omap_intr_handler_s omap_intr_handler;
-DECLARE_INSTANCE_CHECKER(omap_intr_handler, OMAP_INTC,
- TYPE_OMAP_INTC)
+typedef struct OMAPIntcState OMAPIntcState;
+DECLARE_INSTANCE_CHECKER(OMAPIntcState, OMAP_INTC, TYPE_OMAP_INTC)
/*
@@ -89,8 +88,8 @@ DECLARE_INSTANCE_CHECKER(omap_intr_handler, OMAP_INTC,
* (ie the struct omap_mpu_state_s*) to do the clockname to pointer
* translation.)
*/
-void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk);
-void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk);
+void omap_intc_set_iclk(OMAPIntcState *intc, omap_clk clk);
+void omap_intc_set_fclk(OMAPIntcState *intc, omap_clk clk);
/* omap_i2c.c */
#define TYPE_OMAP_I2C "omap_i2c"
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 07/14] hw/arm/stellaris: Drop useless casts from void * to pointer
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2023-01-09 14:02 ` [PATCH 06/14] hw/intc/omap_intc: Use CamelCase for TYPE_OMAP_INTC " Philippe Mathieu-Daudé
@ 2023-01-09 14:02 ` Philippe Mathieu-Daudé
2023-01-09 14:03 ` [PATCH 08/14] hw/arm/stellaris: Use CamelCase for STELLARIS_ADC type name Philippe Mathieu-Daudé
` (8 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:02 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/stellaris.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index a9e96c37f8..051c242e9d 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -749,7 +749,7 @@ static void stellaris_adc_update(stellaris_adc_state *s)
static void stellaris_adc_trigger(void *opaque, int irq, int level)
{
- stellaris_adc_state *s = (stellaris_adc_state *)opaque;
+ stellaris_adc_state *s = opaque;
int n;
for (n = 0; n < 4; n++) {
@@ -785,7 +785,7 @@ static void stellaris_adc_reset(stellaris_adc_state *s)
static uint64_t stellaris_adc_read(void *opaque, hwaddr offset,
unsigned size)
{
- stellaris_adc_state *s = (stellaris_adc_state *)opaque;
+ stellaris_adc_state *s = opaque;
/* TODO: Implement this. */
if (offset >= 0x40 && offset < 0xc0) {
@@ -833,7 +833,7 @@ static uint64_t stellaris_adc_read(void *opaque, hwaddr offset,
static void stellaris_adc_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
- stellaris_adc_state *s = (stellaris_adc_state *)opaque;
+ stellaris_adc_state *s = opaque;
/* TODO: Implement this. */
if (offset >= 0x40 && offset < 0xc0) {
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 08/14] hw/arm/stellaris: Use CamelCase for STELLARIS_ADC type name
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2023-01-09 14:02 ` [PATCH 07/14] hw/arm/stellaris: Drop useless casts from void * to pointer Philippe Mathieu-Daudé
@ 2023-01-09 14:03 ` Philippe Mathieu-Daudé
2023-01-09 14:03 ` [PATCH 09/14] hw/arm/bcm2836: Remove definitions generated by OBJECT_DECLARE_TYPE() Philippe Mathieu-Daudé
` (7 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
Following docs/devel/style.rst guidelines, rename
stellaris_adc_state -> StellarisADCState. This also remove a
use of 'struct' in the DECLARE_INSTANCE_CHECKER() macro call.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/stellaris.c | 73 +++++++++++++++++++++++-----------------------
1 file changed, 36 insertions(+), 37 deletions(-)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 051c242e9d..67a2293d35 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -674,9 +674,8 @@ static void stellaris_i2c_init(Object *obj)
#define STELLARIS_ADC_FIFO_FULL 0x1000
#define TYPE_STELLARIS_ADC "stellaris-adc"
-typedef struct StellarisADCState stellaris_adc_state;
-DECLARE_INSTANCE_CHECKER(stellaris_adc_state, STELLARIS_ADC,
- TYPE_STELLARIS_ADC)
+typedef struct StellarisADCState StellarisADCState;
+DECLARE_INSTANCE_CHECKER(StellarisADCState, STELLARIS_ADC, TYPE_STELLARIS_ADC)
struct StellarisADCState {
SysBusDevice parent_obj;
@@ -700,7 +699,7 @@ struct StellarisADCState {
qemu_irq irq[4];
};
-static uint32_t stellaris_adc_fifo_read(stellaris_adc_state *s, int n)
+static uint32_t stellaris_adc_fifo_read(StellarisADCState *s, int n)
{
int tail;
@@ -716,7 +715,7 @@ static uint32_t stellaris_adc_fifo_read(stellaris_adc_state *s, int n)
return s->fifo[n].data[tail];
}
-static void stellaris_adc_fifo_write(stellaris_adc_state *s, int n,
+static void stellaris_adc_fifo_write(StellarisADCState *s, int n,
uint32_t value)
{
int head;
@@ -736,7 +735,7 @@ static void stellaris_adc_fifo_write(stellaris_adc_state *s, int n,
s->fifo[n].state |= STELLARIS_ADC_FIFO_FULL;
}
-static void stellaris_adc_update(stellaris_adc_state *s)
+static void stellaris_adc_update(StellarisADCState *s)
{
int level;
int n;
@@ -749,7 +748,7 @@ static void stellaris_adc_update(stellaris_adc_state *s)
static void stellaris_adc_trigger(void *opaque, int irq, int level)
{
- stellaris_adc_state *s = opaque;
+ StellarisADCState *s = opaque;
int n;
for (n = 0; n < 4; n++) {
@@ -771,7 +770,7 @@ static void stellaris_adc_trigger(void *opaque, int irq, int level)
}
}
-static void stellaris_adc_reset(stellaris_adc_state *s)
+static void stellaris_adc_reset(StellarisADCState *s)
{
int n;
@@ -785,7 +784,7 @@ static void stellaris_adc_reset(stellaris_adc_state *s)
static uint64_t stellaris_adc_read(void *opaque, hwaddr offset,
unsigned size)
{
- stellaris_adc_state *s = opaque;
+ StellarisADCState *s = opaque;
/* TODO: Implement this. */
if (offset >= 0x40 && offset < 0xc0) {
@@ -833,7 +832,7 @@ static uint64_t stellaris_adc_read(void *opaque, hwaddr offset,
static void stellaris_adc_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
- stellaris_adc_state *s = opaque;
+ StellarisADCState *s = opaque;
/* TODO: Implement this. */
if (offset >= 0x40 && offset < 0xc0) {
@@ -901,31 +900,31 @@ static const VMStateDescription vmstate_stellaris_adc = {
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
- VMSTATE_UINT32(actss, stellaris_adc_state),
- VMSTATE_UINT32(ris, stellaris_adc_state),
- VMSTATE_UINT32(im, stellaris_adc_state),
- VMSTATE_UINT32(emux, stellaris_adc_state),
- VMSTATE_UINT32(ostat, stellaris_adc_state),
- VMSTATE_UINT32(ustat, stellaris_adc_state),
- VMSTATE_UINT32(sspri, stellaris_adc_state),
- VMSTATE_UINT32(sac, stellaris_adc_state),
- VMSTATE_UINT32(fifo[0].state, stellaris_adc_state),
- VMSTATE_UINT32_ARRAY(fifo[0].data, stellaris_adc_state, 16),
- VMSTATE_UINT32(ssmux[0], stellaris_adc_state),
- VMSTATE_UINT32(ssctl[0], stellaris_adc_state),
- VMSTATE_UINT32(fifo[1].state, stellaris_adc_state),
- VMSTATE_UINT32_ARRAY(fifo[1].data, stellaris_adc_state, 16),
- VMSTATE_UINT32(ssmux[1], stellaris_adc_state),
- VMSTATE_UINT32(ssctl[1], stellaris_adc_state),
- VMSTATE_UINT32(fifo[2].state, stellaris_adc_state),
- VMSTATE_UINT32_ARRAY(fifo[2].data, stellaris_adc_state, 16),
- VMSTATE_UINT32(ssmux[2], stellaris_adc_state),
- VMSTATE_UINT32(ssctl[2], stellaris_adc_state),
- VMSTATE_UINT32(fifo[3].state, stellaris_adc_state),
- VMSTATE_UINT32_ARRAY(fifo[3].data, stellaris_adc_state, 16),
- VMSTATE_UINT32(ssmux[3], stellaris_adc_state),
- VMSTATE_UINT32(ssctl[3], stellaris_adc_state),
- VMSTATE_UINT32(noise, stellaris_adc_state),
+ VMSTATE_UINT32(actss, StellarisADCState),
+ VMSTATE_UINT32(ris, StellarisADCState),
+ VMSTATE_UINT32(im, StellarisADCState),
+ VMSTATE_UINT32(emux, StellarisADCState),
+ VMSTATE_UINT32(ostat, StellarisADCState),
+ VMSTATE_UINT32(ustat, StellarisADCState),
+ VMSTATE_UINT32(sspri, StellarisADCState),
+ VMSTATE_UINT32(sac, StellarisADCState),
+ VMSTATE_UINT32(fifo[0].state, StellarisADCState),
+ VMSTATE_UINT32_ARRAY(fifo[0].data, StellarisADCState, 16),
+ VMSTATE_UINT32(ssmux[0], StellarisADCState),
+ VMSTATE_UINT32(ssctl[0], StellarisADCState),
+ VMSTATE_UINT32(fifo[1].state, StellarisADCState),
+ VMSTATE_UINT32_ARRAY(fifo[1].data, StellarisADCState, 16),
+ VMSTATE_UINT32(ssmux[1], StellarisADCState),
+ VMSTATE_UINT32(ssctl[1], StellarisADCState),
+ VMSTATE_UINT32(fifo[2].state, StellarisADCState),
+ VMSTATE_UINT32_ARRAY(fifo[2].data, StellarisADCState, 16),
+ VMSTATE_UINT32(ssmux[2], StellarisADCState),
+ VMSTATE_UINT32(ssctl[2], StellarisADCState),
+ VMSTATE_UINT32(fifo[3].state, StellarisADCState),
+ VMSTATE_UINT32_ARRAY(fifo[3].data, StellarisADCState, 16),
+ VMSTATE_UINT32(ssmux[3], StellarisADCState),
+ VMSTATE_UINT32(ssctl[3], StellarisADCState),
+ VMSTATE_UINT32(noise, StellarisADCState),
VMSTATE_END_OF_LIST()
}
};
@@ -933,7 +932,7 @@ static const VMStateDescription vmstate_stellaris_adc = {
static void stellaris_adc_init(Object *obj)
{
DeviceState *dev = DEVICE(obj);
- stellaris_adc_state *s = STELLARIS_ADC(obj);
+ StellarisADCState *s = STELLARIS_ADC(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
int n;
@@ -1381,7 +1380,7 @@ static void stellaris_adc_class_init(ObjectClass *klass, void *data)
static const TypeInfo stellaris_adc_info = {
.name = TYPE_STELLARIS_ADC,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(stellaris_adc_state),
+ .instance_size = sizeof(StellarisADCState),
.instance_init = stellaris_adc_init,
.class_init = stellaris_adc_class_init,
};
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 09/14] hw/arm/bcm2836: Remove definitions generated by OBJECT_DECLARE_TYPE()
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2023-01-09 14:03 ` [PATCH 08/14] hw/arm/stellaris: Use CamelCase for STELLARIS_ADC type name Philippe Mathieu-Daudé
@ 2023-01-09 14:03 ` Philippe Mathieu-Daudé
2023-01-09 14:03 ` [PATCH 10/14] hw/arm/npcm7xx: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() Philippe Mathieu-Daudé
` (6 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
The typedef and definitions are generated by the OBJECT_DECLARE_TYPE
macro in "hw/arm/bcm2836.h":
20 #define TYPE_BCM283X "bcm283x"
21 OBJECT_DECLARE_TYPE(BCM283XState, BCM283XClass, BCM283X)
The script ran in commit a489d1951c ("Use OBJECT_DECLARE_TYPE when
possible") missed them because they are declared in a different
file unit. Remove them.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/bcm2836.c | 9 ++-------
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 24354338ca..f894338fc6 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -16,7 +16,7 @@
#include "hw/arm/raspi_platform.h"
#include "hw/sysbus.h"
-typedef struct BCM283XClass {
+struct BCM283XClass {
/*< private >*/
DeviceClass parent_class;
/*< public >*/
@@ -26,12 +26,7 @@ typedef struct BCM283XClass {
hwaddr peri_base; /* Peripheral base address seen by the CPU */
hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
int clusterid;
-} BCM283XClass;
-
-#define BCM283X_CLASS(klass) \
- OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
-#define BCM283X_GET_CLASS(obj) \
- OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
+};
static Property bcm2836_enabled_cores_property =
DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus, 0);
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 10/14] hw/arm/npcm7xx: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2023-01-09 14:03 ` [PATCH 09/14] hw/arm/bcm2836: Remove definitions generated by OBJECT_DECLARE_TYPE() Philippe Mathieu-Daudé
@ 2023-01-09 14:03 ` Philippe Mathieu-Daudé
2023-01-09 14:03 ` [PATCH 11/14] hw/misc/sbsa_ec: Rename TYPE_SBSA_EC -> TYPE_SBSA_SECURE_EC Philippe Mathieu-Daudé
` (5 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
NPCM7XX models have been commited after the conversion from
commit 8063396bf3 ("Use OBJECT_DECLARE_SIMPLE_TYPE when possible").
Manually convert them.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/adc/npcm7xx_adc.h | 7 +++----
include/hw/arm/npcm7xx.h | 18 ++++++------------
include/hw/i2c/npcm7xx_smbus.h | 7 +++----
include/hw/misc/npcm7xx_clk.h | 2 +-
include/hw/misc/npcm7xx_gcr.h | 6 +++---
include/hw/misc/npcm7xx_mft.h | 7 +++----
include/hw/misc/npcm7xx_pwm.h | 3 +--
include/hw/misc/npcm7xx_rng.h | 6 +++---
include/hw/net/npcm7xx_emc.h | 5 +----
include/hw/sd/npcm7xx_sdhci.h | 4 ++--
10 files changed, 26 insertions(+), 39 deletions(-)
diff --git a/include/hw/adc/npcm7xx_adc.h b/include/hw/adc/npcm7xx_adc.h
index 7d8442107a..93330a408d 100644
--- a/include/hw/adc/npcm7xx_adc.h
+++ b/include/hw/adc/npcm7xx_adc.h
@@ -42,7 +42,7 @@
* @iref: The internal reference voltage, initialized at launch time.
* @rv: The calibrated output values of 0.5V and 1.5V for the ADC.
*/
-typedef struct {
+struct NPCM7xxADCState {
SysBusDevice parent;
MemoryRegion iomem;
@@ -60,10 +60,9 @@ typedef struct {
uint32_t iref;
uint16_t calibration_r_values[NPCM7XX_ADC_NUM_CALIB];
-} NPCM7xxADCState;
+};
#define TYPE_NPCM7XX_ADC "npcm7xx-adc"
-#define NPCM7XX_ADC(obj) \
- OBJECT_CHECK(NPCM7xxADCState, (obj), TYPE_NPCM7XX_ADC)
+OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxADCState, NPCM7XX_ADC)
#endif /* NPCM7XX_ADC_H */
diff --git a/include/hw/arm/npcm7xx.h b/include/hw/arm/npcm7xx.h
index ce593235d9..f1b7e4a48d 100644
--- a/include/hw/arm/npcm7xx.h
+++ b/include/hw/arm/npcm7xx.h
@@ -52,7 +52,7 @@
#define NPCM7XX_NR_PWM_MODULES 2
-typedef struct NPCM7xxMachine {
+struct NPCM7xxMachine {
MachineState parent;
/*
* PWM fan splitter. each splitter connects to one PWM output and
@@ -60,11 +60,10 @@ typedef struct NPCM7xxMachine {
*/
SplitIRQ fan_splitter[NPCM7XX_NR_PWM_MODULES *
NPCM7XX_PWM_PER_MODULE];
-} NPCM7xxMachine;
+};
#define TYPE_NPCM7XX_MACHINE MACHINE_TYPE_NAME("npcm7xx")
-#define NPCM7XX_MACHINE(obj) \
- OBJECT_CHECK(NPCM7xxMachine, (obj), TYPE_NPCM7XX_MACHINE)
+OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxMachine, NPCM7XX_MACHINE)
typedef struct NPCM7xxMachineClass {
MachineClass parent;
@@ -77,7 +76,7 @@ typedef struct NPCM7xxMachineClass {
#define NPCM7XX_MACHINE_GET_CLASS(obj) \
OBJECT_GET_CLASS(NPCM7xxMachineClass, (obj), TYPE_NPCM7XX_MACHINE)
-typedef struct NPCM7xxState {
+struct NPCM7xxState {
DeviceState parent;
ARMCPU cpu[NPCM7XX_MAX_NUM_CPUS];
@@ -105,10 +104,10 @@ typedef struct NPCM7xxState {
NPCM7xxFIUState fiu[2];
NPCM7xxEMCState emc[2];
NPCM7xxSDHCIState mmc;
-} NPCM7xxState;
+};
#define TYPE_NPCM7XX "npcm7xx"
-#define NPCM7XX(obj) OBJECT_CHECK(NPCM7xxState, (obj), TYPE_NPCM7XX)
+OBJECT_DECLARE_TYPE(NPCM7xxState, NPCM7xxClass, NPCM7XX)
#define TYPE_NPCM730 "npcm730"
#define TYPE_NPCM750 "npcm750"
@@ -122,11 +121,6 @@ typedef struct NPCM7xxClass {
uint32_t num_cpus;
} NPCM7xxClass;
-#define NPCM7XX_CLASS(klass) \
- OBJECT_CLASS_CHECK(NPCM7xxClass, (klass), TYPE_NPCM7XX)
-#define NPCM7XX_GET_CLASS(obj) \
- OBJECT_GET_CLASS(NPCM7xxClass, (obj), TYPE_NPCM7XX)
-
/**
* npcm7xx_load_kernel - Loads memory with everything needed to boot
* @machine - The machine containing the SoC to be booted.
diff --git a/include/hw/i2c/npcm7xx_smbus.h b/include/hw/i2c/npcm7xx_smbus.h
index 7d59ee917e..3555e6836f 100644
--- a/include/hw/i2c/npcm7xx_smbus.h
+++ b/include/hw/i2c/npcm7xx_smbus.h
@@ -68,7 +68,7 @@ typedef enum NPCM7xxSMBusStatus {
* @rx_cur: The current position of rx_fifo.
* @status: The current status of the SMBus.
*/
-typedef struct NPCM7xxSMBusState {
+struct NPCM7xxSMBusState {
SysBusDevice parent;
MemoryRegion iomem;
@@ -104,10 +104,9 @@ typedef struct NPCM7xxSMBusState {
uint8_t rx_cur;
NPCM7xxSMBusStatus status;
-} NPCM7xxSMBusState;
+};
#define TYPE_NPCM7XX_SMBUS "npcm7xx-smbus"
-#define NPCM7XX_SMBUS(obj) OBJECT_CHECK(NPCM7xxSMBusState, (obj), \
- TYPE_NPCM7XX_SMBUS)
+OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxSMBusState, NPCM7XX_SMBUS)
#endif /* NPCM7XX_SMBUS_H */
diff --git a/include/hw/misc/npcm7xx_clk.h b/include/hw/misc/npcm7xx_clk.h
index d5c8d16ca4..5ed4a4672b 100644
--- a/include/hw/misc/npcm7xx_clk.h
+++ b/include/hw/misc/npcm7xx_clk.h
@@ -175,6 +175,6 @@ struct NPCM7xxCLKState {
};
#define TYPE_NPCM7XX_CLK "npcm7xx-clk"
-#define NPCM7XX_CLK(obj) OBJECT_CHECK(NPCM7xxCLKState, (obj), TYPE_NPCM7XX_CLK)
+OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxCLKState, NPCM7XX_CLK)
#endif /* NPCM7XX_CLK_H */
diff --git a/include/hw/misc/npcm7xx_gcr.h b/include/hw/misc/npcm7xx_gcr.h
index 9419e0a7d2..c0bbdda77e 100644
--- a/include/hw/misc/npcm7xx_gcr.h
+++ b/include/hw/misc/npcm7xx_gcr.h
@@ -55,7 +55,7 @@
*/
#define NPCM7XX_GCR_NR_REGS (0x148 / sizeof(uint32_t))
-typedef struct NPCM7xxGCRState {
+struct NPCM7xxGCRState {
SysBusDevice parent;
MemoryRegion iomem;
@@ -65,9 +65,9 @@ typedef struct NPCM7xxGCRState {
uint32_t reset_pwron;
uint32_t reset_mdlr;
uint32_t reset_intcr3;
-} NPCM7xxGCRState;
+};
#define TYPE_NPCM7XX_GCR "npcm7xx-gcr"
-#define NPCM7XX_GCR(obj) OBJECT_CHECK(NPCM7xxGCRState, (obj), TYPE_NPCM7XX_GCR)
+OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxGCRState, NPCM7XX_GCR)
#endif /* NPCM7XX_GCR_H */
diff --git a/include/hw/misc/npcm7xx_mft.h b/include/hw/misc/npcm7xx_mft.h
index 36785e3ba8..d6384382ce 100644
--- a/include/hw/misc/npcm7xx_mft.h
+++ b/include/hw/misc/npcm7xx_mft.h
@@ -49,7 +49,7 @@
* @max_rpm: The maximum rpm for fans. Order: A0, B0, A1, B1.
* @duty: The duty cycles for fans, relative to NPCM7XX_PWM_MAX_DUTY.
*/
-typedef struct NPCM7xxMFTState {
+struct NPCM7xxMFTState {
SysBusDevice parent;
MemoryRegion iomem;
@@ -61,10 +61,9 @@ typedef struct NPCM7xxMFTState {
uint32_t max_rpm[NPCM7XX_MFT_FANIN_COUNT];
uint32_t duty[NPCM7XX_MFT_FANIN_COUNT];
-} NPCM7xxMFTState;
+};
#define TYPE_NPCM7XX_MFT "npcm7xx-mft"
-#define NPCM7XX_MFT(obj) \
- OBJECT_CHECK(NPCM7xxMFTState, (obj), TYPE_NPCM7XX_MFT)
+OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxMFTState, NPCM7XX_MFT)
#endif /* NPCM7XX_MFT_H */
diff --git a/include/hw/misc/npcm7xx_pwm.h b/include/hw/misc/npcm7xx_pwm.h
index 7ad632a93a..bf953440ac 100644
--- a/include/hw/misc/npcm7xx_pwm.h
+++ b/include/hw/misc/npcm7xx_pwm.h
@@ -101,7 +101,6 @@ struct NPCM7xxPWMState {
};
#define TYPE_NPCM7XX_PWM "npcm7xx-pwm"
-#define NPCM7XX_PWM(obj) \
- OBJECT_CHECK(NPCM7xxPWMState, (obj), TYPE_NPCM7XX_PWM)
+OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxPWMState, NPCM7XX_PWM)
#endif /* NPCM7XX_PWM_H */
diff --git a/include/hw/misc/npcm7xx_rng.h b/include/hw/misc/npcm7xx_rng.h
index 5e85fd439d..650375dc2c 100644
--- a/include/hw/misc/npcm7xx_rng.h
+++ b/include/hw/misc/npcm7xx_rng.h
@@ -18,7 +18,7 @@
#include "hw/sysbus.h"
-typedef struct NPCM7xxRNGState {
+struct NPCM7xxRNGState {
SysBusDevice parent;
MemoryRegion iomem;
@@ -26,9 +26,9 @@ typedef struct NPCM7xxRNGState {
uint8_t rngcs;
uint8_t rngd;
uint8_t rngmode;
-} NPCM7xxRNGState;
+};
#define TYPE_NPCM7XX_RNG "npcm7xx-rng"
-#define NPCM7XX_RNG(obj) OBJECT_CHECK(NPCM7xxRNGState, (obj), TYPE_NPCM7XX_RNG)
+OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxRNGState, NPCM7XX_RNG)
#endif /* NPCM7XX_RNG_H */
diff --git a/include/hw/net/npcm7xx_emc.h b/include/hw/net/npcm7xx_emc.h
index eac7f29816..b789007160 100644
--- a/include/hw/net/npcm7xx_emc.h
+++ b/include/hw/net/npcm7xx_emc.h
@@ -277,10 +277,7 @@ struct NPCM7xxEMCState {
bool rx_active;
};
-typedef struct NPCM7xxEMCState NPCM7xxEMCState;
-
#define TYPE_NPCM7XX_EMC "npcm7xx-emc"
-#define NPCM7XX_EMC(obj) \
- OBJECT_CHECK(NPCM7xxEMCState, (obj), TYPE_NPCM7XX_EMC)
+OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxEMCState, NPCM7XX_EMC)
#endif /* NPCM7XX_EMC_H */
diff --git a/include/hw/sd/npcm7xx_sdhci.h b/include/hw/sd/npcm7xx_sdhci.h
index d728f0a40d..ad8002f766 100644
--- a/include/hw/sd/npcm7xx_sdhci.h
+++ b/include/hw/sd/npcm7xx_sdhci.h
@@ -51,7 +51,7 @@ typedef struct NPCM7xxRegs {
uint32_t boottoctrl;
} NPCM7xxRegisters;
-typedef struct NPCM7xxSDHCIState {
+struct NPCM7xxSDHCIState {
SysBusDevice parent;
MemoryRegion container;
@@ -60,6 +60,6 @@ typedef struct NPCM7xxSDHCIState {
NPCM7xxRegisters regs;
SDHCIState sdhci;
-} NPCM7xxSDHCIState;
+};
#endif /* NPCM7XX_SDHCI_H */
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 11/14] hw/misc/sbsa_ec: Rename TYPE_SBSA_EC -> TYPE_SBSA_SECURE_EC
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2023-01-09 14:03 ` [PATCH 10/14] hw/arm/npcm7xx: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() Philippe Mathieu-Daudé
@ 2023-01-09 14:03 ` Philippe Mathieu-Daudé
2023-01-09 14:03 ` [PATCH 12/14] hw/misc/sbsa_ec: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() Philippe Mathieu-Daudé
` (4 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
The structure is named SECUREECState. Rename the type accordingly.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/misc/sbsa_ec.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw/misc/sbsa_ec.c b/hw/misc/sbsa_ec.c
index 8d939fe31b..6f19c21195 100644
--- a/hw/misc/sbsa_ec.c
+++ b/hw/misc/sbsa_ec.c
@@ -15,13 +15,14 @@
#include "hw/sysbus.h"
#include "sysemu/runstate.h"
-typedef struct {
+typedef struct SECUREECState {
SysBusDevice parent_obj;
MemoryRegion iomem;
} SECUREECState;
-#define TYPE_SBSA_EC "sbsa-ec"
-#define SECURE_EC(obj) OBJECT_CHECK(SECUREECState, (obj), TYPE_SBSA_EC)
+#define TYPE_SBSA_SECURE_EC "sbsa-ec"
+#define SBSA_SECURE_EC(obj) \
+ OBJECT_CHECK(SECUREECState, (obj), TYPE_SBSA_SECURE_EC)
enum sbsa_ec_powerstates {
SBSA_EC_CMD_POWEROFF = 0x01,
@@ -36,7 +37,7 @@ static uint64_t sbsa_ec_read(void *opaque, hwaddr offset, unsigned size)
}
static void sbsa_ec_write(void *opaque, hwaddr offset,
- uint64_t value, unsigned size)
+ uint64_t value, unsigned size)
{
if (offset == 0) { /* PSCI machine power command register */
switch (value) {
@@ -65,7 +66,7 @@ static const MemoryRegionOps sbsa_ec_ops = {
static void sbsa_ec_init(Object *obj)
{
- SECUREECState *s = SECURE_EC(obj);
+ SECUREECState *s = SBSA_SECURE_EC(obj);
SysBusDevice *dev = SYS_BUS_DEVICE(obj);
memory_region_init_io(&s->iomem, obj, &sbsa_ec_ops, s, "sbsa-ec",
@@ -82,7 +83,7 @@ static void sbsa_ec_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo sbsa_ec_info = {
- .name = TYPE_SBSA_EC,
+ .name = TYPE_SBSA_SECURE_EC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(SECUREECState),
.instance_init = sbsa_ec_init,
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 12/14] hw/misc/sbsa_ec: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2023-01-09 14:03 ` [PATCH 11/14] hw/misc/sbsa_ec: Rename TYPE_SBSA_EC -> TYPE_SBSA_SECURE_EC Philippe Mathieu-Daudé
@ 2023-01-09 14:03 ` Philippe Mathieu-Daudé
2023-01-09 14:03 ` [PATCH 13/14] hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic' Philippe Mathieu-Daudé
` (3 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
This model was merged few days before the QOM cleanup from
commit 8063396bf3 ("Use OBJECT_DECLARE_SIMPLE_TYPE when possible")
was pulled and merged. Manually adapt.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/misc/sbsa_ec.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/misc/sbsa_ec.c b/hw/misc/sbsa_ec.c
index 6f19c21195..86b23a5372 100644
--- a/hw/misc/sbsa_ec.c
+++ b/hw/misc/sbsa_ec.c
@@ -21,8 +21,7 @@ typedef struct SECUREECState {
} SECUREECState;
#define TYPE_SBSA_SECURE_EC "sbsa-ec"
-#define SBSA_SECURE_EC(obj) \
- OBJECT_CHECK(SECUREECState, (obj), TYPE_SBSA_SECURE_EC)
+OBJECT_DECLARE_SIMPLE_TYPE(SECUREECState, SBSA_SECURE_EC)
enum sbsa_ec_powerstates {
SBSA_EC_CMD_POWEROFF = 0x01,
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 13/14] hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic'
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2023-01-09 14:03 ` [PATCH 12/14] hw/misc/sbsa_ec: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() Philippe Mathieu-Daudé
@ 2023-01-09 14:03 ` Philippe Mathieu-Daudé
2023-01-10 11:59 ` Edgar E. Iglesias
2023-01-09 14:03 ` [PATCH 14/14] hw/timer/xilinx_timer: Use XpsTimerState instead of 'struct timerblock' Philippe Mathieu-Daudé
` (2 subsequent siblings)
15 siblings, 1 reply; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
This remove a use of 'struct' in the DECLARE_INSTANCE_CHECKER()
macro call, to avoid after a QOM refactor:
hw/intc/xilinx_intc.c:45:1: error: declaration of anonymous struct must be a definition
DECLARE_INSTANCE_CHECKER(struct xlx_pic, XILINX_INTC,
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/intc/xilinx_intc.c | 28 +++++++++++++---------------
1 file changed, 13 insertions(+), 15 deletions(-)
diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
index 4c4397b3d2..6e5012e66e 100644
--- a/hw/intc/xilinx_intc.c
+++ b/hw/intc/xilinx_intc.c
@@ -42,10 +42,10 @@
#define R_MAX 8
#define TYPE_XILINX_INTC "xlnx.xps-intc"
-DECLARE_INSTANCE_CHECKER(struct xlx_pic, XILINX_INTC,
- TYPE_XILINX_INTC)
+typedef struct XpsIntc XpsIntc;
+DECLARE_INSTANCE_CHECKER(XpsIntc, XILINX_INTC, TYPE_XILINX_INTC)
-struct xlx_pic
+struct XpsIntc
{
SysBusDevice parent_obj;
@@ -62,7 +62,7 @@ struct xlx_pic
uint32_t irq_pin_state;
};
-static void update_irq(struct xlx_pic *p)
+static void update_irq(XpsIntc *p)
{
uint32_t i;
@@ -87,10 +87,9 @@ static void update_irq(struct xlx_pic *p)
qemu_set_irq(p->parent_irq, (p->regs[R_MER] & 1) && p->regs[R_IPR]);
}
-static uint64_t
-pic_read(void *opaque, hwaddr addr, unsigned int size)
+static uint64_t pic_read(void *opaque, hwaddr addr, unsigned int size)
{
- struct xlx_pic *p = opaque;
+ XpsIntc *p = opaque;
uint32_t r = 0;
addr >>= 2;
@@ -106,11 +105,10 @@ pic_read(void *opaque, hwaddr addr, unsigned int size)
return r;
}
-static void
-pic_write(void *opaque, hwaddr addr,
- uint64_t val64, unsigned int size)
+static void pic_write(void *opaque, hwaddr addr,
+ uint64_t val64, unsigned int size)
{
- struct xlx_pic *p = opaque;
+ XpsIntc *p = opaque;
uint32_t value = val64;
addr >>= 2;
@@ -154,7 +152,7 @@ static const MemoryRegionOps pic_ops = {
static void irq_handler(void *opaque, int irq, int level)
{
- struct xlx_pic *p = opaque;
+ XpsIntc *p = opaque;
/* edge triggered interrupt */
if (p->c_kind_of_intr & (1 << irq) && p->regs[R_MER] & 2) {
@@ -168,7 +166,7 @@ static void irq_handler(void *opaque, int irq, int level)
static void xilinx_intc_init(Object *obj)
{
- struct xlx_pic *p = XILINX_INTC(obj);
+ XpsIntc *p = XILINX_INTC(obj);
qdev_init_gpio_in(DEVICE(obj), irq_handler, 32);
sysbus_init_irq(SYS_BUS_DEVICE(obj), &p->parent_irq);
@@ -179,7 +177,7 @@ static void xilinx_intc_init(Object *obj)
}
static Property xilinx_intc_properties[] = {
- DEFINE_PROP_UINT32("kind-of-intr", struct xlx_pic, c_kind_of_intr, 0),
+ DEFINE_PROP_UINT32("kind-of-intr", XpsIntc, c_kind_of_intr, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -193,7 +191,7 @@ static void xilinx_intc_class_init(ObjectClass *klass, void *data)
static const TypeInfo xilinx_intc_info = {
.name = TYPE_XILINX_INTC,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(struct xlx_pic),
+ .instance_size = sizeof(XpsIntc),
.instance_init = xilinx_intc_init,
.class_init = xilinx_intc_class_init,
};
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH 13/14] hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic'
2023-01-09 14:03 ` [PATCH 13/14] hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic' Philippe Mathieu-Daudé
@ 2023-01-10 11:59 ` Edgar E. Iglesias
0 siblings, 0 replies; 19+ messages in thread
From: Edgar E. Iglesias @ 2023-01-10 11:59 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, qemu-arm, Havard Skinnemoen, Alistair Francis,
Peter Maydell, Eduardo Habkost, Tyrone Ting
On Mon, Jan 09, 2023 at 03:03:05PM +0100, Philippe Mathieu-Daudé wrote:
> This remove a use of 'struct' in the DECLARE_INSTANCE_CHECKER()
> macro call, to avoid after a QOM refactor:
>
> hw/intc/xilinx_intc.c:45:1: error: declaration of anonymous struct must be a definition
> DECLARE_INSTANCE_CHECKER(struct xlx_pic, XILINX_INTC,
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
> ^
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/intc/xilinx_intc.c | 28 +++++++++++++---------------
> 1 file changed, 13 insertions(+), 15 deletions(-)
>
> diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
> index 4c4397b3d2..6e5012e66e 100644
> --- a/hw/intc/xilinx_intc.c
> +++ b/hw/intc/xilinx_intc.c
> @@ -42,10 +42,10 @@
> #define R_MAX 8
>
> #define TYPE_XILINX_INTC "xlnx.xps-intc"
> -DECLARE_INSTANCE_CHECKER(struct xlx_pic, XILINX_INTC,
> - TYPE_XILINX_INTC)
> +typedef struct XpsIntc XpsIntc;
> +DECLARE_INSTANCE_CHECKER(XpsIntc, XILINX_INTC, TYPE_XILINX_INTC)
>
> -struct xlx_pic
> +struct XpsIntc
> {
> SysBusDevice parent_obj;
>
> @@ -62,7 +62,7 @@ struct xlx_pic
> uint32_t irq_pin_state;
> };
>
> -static void update_irq(struct xlx_pic *p)
> +static void update_irq(XpsIntc *p)
> {
> uint32_t i;
>
> @@ -87,10 +87,9 @@ static void update_irq(struct xlx_pic *p)
> qemu_set_irq(p->parent_irq, (p->regs[R_MER] & 1) && p->regs[R_IPR]);
> }
>
> -static uint64_t
> -pic_read(void *opaque, hwaddr addr, unsigned int size)
> +static uint64_t pic_read(void *opaque, hwaddr addr, unsigned int size)
> {
> - struct xlx_pic *p = opaque;
> + XpsIntc *p = opaque;
> uint32_t r = 0;
>
> addr >>= 2;
> @@ -106,11 +105,10 @@ pic_read(void *opaque, hwaddr addr, unsigned int size)
> return r;
> }
>
> -static void
> -pic_write(void *opaque, hwaddr addr,
> - uint64_t val64, unsigned int size)
> +static void pic_write(void *opaque, hwaddr addr,
> + uint64_t val64, unsigned int size)
> {
> - struct xlx_pic *p = opaque;
> + XpsIntc *p = opaque;
> uint32_t value = val64;
>
> addr >>= 2;
> @@ -154,7 +152,7 @@ static const MemoryRegionOps pic_ops = {
>
> static void irq_handler(void *opaque, int irq, int level)
> {
> - struct xlx_pic *p = opaque;
> + XpsIntc *p = opaque;
>
> /* edge triggered interrupt */
> if (p->c_kind_of_intr & (1 << irq) && p->regs[R_MER] & 2) {
> @@ -168,7 +166,7 @@ static void irq_handler(void *opaque, int irq, int level)
>
> static void xilinx_intc_init(Object *obj)
> {
> - struct xlx_pic *p = XILINX_INTC(obj);
> + XpsIntc *p = XILINX_INTC(obj);
>
> qdev_init_gpio_in(DEVICE(obj), irq_handler, 32);
> sysbus_init_irq(SYS_BUS_DEVICE(obj), &p->parent_irq);
> @@ -179,7 +177,7 @@ static void xilinx_intc_init(Object *obj)
> }
>
> static Property xilinx_intc_properties[] = {
> - DEFINE_PROP_UINT32("kind-of-intr", struct xlx_pic, c_kind_of_intr, 0),
> + DEFINE_PROP_UINT32("kind-of-intr", XpsIntc, c_kind_of_intr, 0),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> @@ -193,7 +191,7 @@ static void xilinx_intc_class_init(ObjectClass *klass, void *data)
> static const TypeInfo xilinx_intc_info = {
> .name = TYPE_XILINX_INTC,
> .parent = TYPE_SYS_BUS_DEVICE,
> - .instance_size = sizeof(struct xlx_pic),
> + .instance_size = sizeof(XpsIntc),
> .instance_init = xilinx_intc_init,
> .class_init = xilinx_intc_class_init,
> };
> --
> 2.38.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 14/14] hw/timer/xilinx_timer: Use XpsTimerState instead of 'struct timerblock'
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (12 preceding siblings ...)
2023-01-09 14:03 ` [PATCH 13/14] hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic' Philippe Mathieu-Daudé
@ 2023-01-09 14:03 ` Philippe Mathieu-Daudé
2023-01-10 12:00 ` Edgar E. Iglesias
2023-01-09 17:59 ` [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Richard Henderson
2023-01-12 17:16 ` Peter Maydell
15 siblings, 1 reply; 19+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-09 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Philippe Mathieu-Daudé,
Peter Maydell, Eduardo Habkost, Tyrone Ting
This remove a use of 'struct' in the DECLARE_INSTANCE_CHECKER()
macro call, to avoid after a QOM refactor:
hw/timer/xilinx_timer.c:65:1: error: declaration of anonymous struct must be a definition
DECLARE_INSTANCE_CHECKER(struct timerblock, XILINX_TIMER,
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/timer/xilinx_timer.c | 27 +++++++++++++--------------
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c
index c7f17cd646..32a9df69e0 100644
--- a/hw/timer/xilinx_timer.c
+++ b/hw/timer/xilinx_timer.c
@@ -62,10 +62,10 @@ struct xlx_timer
};
#define TYPE_XILINX_TIMER "xlnx.xps-timer"
-DECLARE_INSTANCE_CHECKER(struct timerblock, XILINX_TIMER,
- TYPE_XILINX_TIMER)
+typedef struct XpsTimerState XpsTimerState;
+DECLARE_INSTANCE_CHECKER(XpsTimerState, XILINX_TIMER, TYPE_XILINX_TIMER)
-struct timerblock
+struct XpsTimerState
{
SysBusDevice parent_obj;
@@ -76,7 +76,7 @@ struct timerblock
struct xlx_timer *timers;
};
-static inline unsigned int num_timers(struct timerblock *t)
+static inline unsigned int num_timers(XpsTimerState *t)
{
return 2 - t->one_timer_only;
}
@@ -87,7 +87,7 @@ static inline unsigned int timer_from_addr(hwaddr addr)
return addr >> 2;
}
-static void timer_update_irq(struct timerblock *t)
+static void timer_update_irq(XpsTimerState *t)
{
unsigned int i, irq = 0;
uint32_t csr;
@@ -104,7 +104,7 @@ static void timer_update_irq(struct timerblock *t)
static uint64_t
timer_read(void *opaque, hwaddr addr, unsigned int size)
{
- struct timerblock *t = opaque;
+ XpsTimerState *t = opaque;
struct xlx_timer *xt;
uint32_t r = 0;
unsigned int timer;
@@ -155,7 +155,7 @@ static void
timer_write(void *opaque, hwaddr addr,
uint64_t val64, unsigned int size)
{
- struct timerblock *t = opaque;
+ XpsTimerState *t = opaque;
struct xlx_timer *xt;
unsigned int timer;
uint32_t value = val64;
@@ -202,7 +202,7 @@ static const MemoryRegionOps timer_ops = {
static void timer_hit(void *opaque)
{
struct xlx_timer *xt = opaque;
- struct timerblock *t = xt->parent;
+ XpsTimerState *t = xt->parent;
D(fprintf(stderr, "%s %d\n", __func__, xt->nr));
xt->regs[R_TCSR] |= TCSR_TINT;
@@ -213,7 +213,7 @@ static void timer_hit(void *opaque)
static void xilinx_timer_realize(DeviceState *dev, Error **errp)
{
- struct timerblock *t = XILINX_TIMER(dev);
+ XpsTimerState *t = XILINX_TIMER(dev);
unsigned int i;
/* Init all the ptimers. */
@@ -236,16 +236,15 @@ static void xilinx_timer_realize(DeviceState *dev, Error **errp)
static void xilinx_timer_init(Object *obj)
{
- struct timerblock *t = XILINX_TIMER(obj);
+ XpsTimerState *t = XILINX_TIMER(obj);
/* All timers share a single irq line. */
sysbus_init_irq(SYS_BUS_DEVICE(obj), &t->irq);
}
static Property xilinx_timer_properties[] = {
- DEFINE_PROP_UINT32("clock-frequency", struct timerblock, freq_hz,
- 62 * 1000000),
- DEFINE_PROP_UINT8("one-timer-only", struct timerblock, one_timer_only, 0),
+ DEFINE_PROP_UINT32("clock-frequency", XpsTimerState, freq_hz, 62 * 1000000),
+ DEFINE_PROP_UINT8("one-timer-only", XpsTimerState, one_timer_only, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -260,7 +259,7 @@ static void xilinx_timer_class_init(ObjectClass *klass, void *data)
static const TypeInfo xilinx_timer_info = {
.name = TYPE_XILINX_TIMER,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(struct timerblock),
+ .instance_size = sizeof(XpsTimerState),
.instance_init = xilinx_timer_init,
.class_init = xilinx_timer_class_init,
};
--
2.38.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH 14/14] hw/timer/xilinx_timer: Use XpsTimerState instead of 'struct timerblock'
2023-01-09 14:03 ` [PATCH 14/14] hw/timer/xilinx_timer: Use XpsTimerState instead of 'struct timerblock' Philippe Mathieu-Daudé
@ 2023-01-10 12:00 ` Edgar E. Iglesias
0 siblings, 0 replies; 19+ messages in thread
From: Edgar E. Iglesias @ 2023-01-10 12:00 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, qemu-arm, Havard Skinnemoen, Alistair Francis,
Peter Maydell, Eduardo Habkost, Tyrone Ting
On Mon, Jan 09, 2023 at 03:03:06PM +0100, Philippe Mathieu-Daudé wrote:
> This remove a use of 'struct' in the DECLARE_INSTANCE_CHECKER()
> macro call, to avoid after a QOM refactor:
>
> hw/timer/xilinx_timer.c:65:1: error: declaration of anonymous struct must be a definition
> DECLARE_INSTANCE_CHECKER(struct timerblock, XILINX_TIMER,
> ^
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/timer/xilinx_timer.c | 27 +++++++++++++--------------
> 1 file changed, 13 insertions(+), 14 deletions(-)
>
> diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c
> index c7f17cd646..32a9df69e0 100644
> --- a/hw/timer/xilinx_timer.c
> +++ b/hw/timer/xilinx_timer.c
> @@ -62,10 +62,10 @@ struct xlx_timer
> };
>
> #define TYPE_XILINX_TIMER "xlnx.xps-timer"
> -DECLARE_INSTANCE_CHECKER(struct timerblock, XILINX_TIMER,
> - TYPE_XILINX_TIMER)
> +typedef struct XpsTimerState XpsTimerState;
> +DECLARE_INSTANCE_CHECKER(XpsTimerState, XILINX_TIMER, TYPE_XILINX_TIMER)
>
> -struct timerblock
> +struct XpsTimerState
> {
> SysBusDevice parent_obj;
>
> @@ -76,7 +76,7 @@ struct timerblock
> struct xlx_timer *timers;
> };
>
> -static inline unsigned int num_timers(struct timerblock *t)
> +static inline unsigned int num_timers(XpsTimerState *t)
> {
> return 2 - t->one_timer_only;
> }
> @@ -87,7 +87,7 @@ static inline unsigned int timer_from_addr(hwaddr addr)
> return addr >> 2;
> }
>
> -static void timer_update_irq(struct timerblock *t)
> +static void timer_update_irq(XpsTimerState *t)
> {
> unsigned int i, irq = 0;
> uint32_t csr;
> @@ -104,7 +104,7 @@ static void timer_update_irq(struct timerblock *t)
> static uint64_t
> timer_read(void *opaque, hwaddr addr, unsigned int size)
> {
> - struct timerblock *t = opaque;
> + XpsTimerState *t = opaque;
> struct xlx_timer *xt;
> uint32_t r = 0;
> unsigned int timer;
> @@ -155,7 +155,7 @@ static void
> timer_write(void *opaque, hwaddr addr,
> uint64_t val64, unsigned int size)
> {
> - struct timerblock *t = opaque;
> + XpsTimerState *t = opaque;
> struct xlx_timer *xt;
> unsigned int timer;
> uint32_t value = val64;
> @@ -202,7 +202,7 @@ static const MemoryRegionOps timer_ops = {
> static void timer_hit(void *opaque)
> {
> struct xlx_timer *xt = opaque;
> - struct timerblock *t = xt->parent;
> + XpsTimerState *t = xt->parent;
> D(fprintf(stderr, "%s %d\n", __func__, xt->nr));
> xt->regs[R_TCSR] |= TCSR_TINT;
>
> @@ -213,7 +213,7 @@ static void timer_hit(void *opaque)
>
> static void xilinx_timer_realize(DeviceState *dev, Error **errp)
> {
> - struct timerblock *t = XILINX_TIMER(dev);
> + XpsTimerState *t = XILINX_TIMER(dev);
> unsigned int i;
>
> /* Init all the ptimers. */
> @@ -236,16 +236,15 @@ static void xilinx_timer_realize(DeviceState *dev, Error **errp)
>
> static void xilinx_timer_init(Object *obj)
> {
> - struct timerblock *t = XILINX_TIMER(obj);
> + XpsTimerState *t = XILINX_TIMER(obj);
>
> /* All timers share a single irq line. */
> sysbus_init_irq(SYS_BUS_DEVICE(obj), &t->irq);
> }
>
> static Property xilinx_timer_properties[] = {
> - DEFINE_PROP_UINT32("clock-frequency", struct timerblock, freq_hz,
> - 62 * 1000000),
> - DEFINE_PROP_UINT8("one-timer-only", struct timerblock, one_timer_only, 0),
> + DEFINE_PROP_UINT32("clock-frequency", XpsTimerState, freq_hz, 62 * 1000000),
> + DEFINE_PROP_UINT8("one-timer-only", XpsTimerState, one_timer_only, 0),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> @@ -260,7 +259,7 @@ static void xilinx_timer_class_init(ObjectClass *klass, void *data)
> static const TypeInfo xilinx_timer_info = {
> .name = TYPE_XILINX_TIMER,
> .parent = TYPE_SYS_BUS_DEVICE,
> - .instance_size = sizeof(struct timerblock),
> + .instance_size = sizeof(XpsTimerState),
> .instance_init = xilinx_timer_init,
> .class_init = xilinx_timer_class_init,
> };
> --
> 2.38.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (13 preceding siblings ...)
2023-01-09 14:03 ` [PATCH 14/14] hw/timer/xilinx_timer: Use XpsTimerState instead of 'struct timerblock' Philippe Mathieu-Daudé
@ 2023-01-09 17:59 ` Richard Henderson
2023-01-12 17:16 ` Peter Maydell
15 siblings, 0 replies; 19+ messages in thread
From: Richard Henderson @ 2023-01-09 17:59 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: qemu-arm, Havard Skinnemoen, Edgar E. Iglesias, Alistair Francis,
Peter Maydell, Eduardo Habkost, Tyrone Ting
On 1/9/23 06:02, Philippe Mathieu-Daudé wrote:
> Philippe Mathieu-Daudé (14):
> hw/arm/pxa: Avoid forward-declaring PXA2xxI2CState
> hw/gpio/omap_gpio: Add local variable to avoid embedded cast
> hw/arm/omap: Drop useless casts from void * to pointer
> hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP1_GPIO type name
> hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP2_GPIO type name
> hw/intc/omap_intc: Use CamelCase for TYPE_OMAP_INTC type name
> hw/arm/stellaris: Drop useless casts from void * to pointer
> hw/arm/stellaris: Use CamelCase for STELLARIS_ADC type name
> hw/arm/bcm2836: Remove definitions generated by OBJECT_DECLARE_TYPE()
> hw/arm/npcm7xx: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
> hw/misc/sbsa_ec: Rename TYPE_SBSA_EC -> TYPE_SBSA_SECURE_EC
> hw/misc/sbsa_ec: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
> hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic'
> hw/timer/xilinx_timer: Use XpsTimerState instead of 'struct
> timerblock'
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups
2023-01-09 14:02 [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Philippe Mathieu-Daudé
` (14 preceding siblings ...)
2023-01-09 17:59 ` [PATCH 00/14] hw/arm: QOM OBJECT_DECLARE_SIMPLE_TYPE cleanups Richard Henderson
@ 2023-01-12 17:16 ` Peter Maydell
15 siblings, 0 replies; 19+ messages in thread
From: Peter Maydell @ 2023-01-12 17:16 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, qemu-arm, Havard Skinnemoen, Edgar E. Iglesias,
Alistair Francis, Eduardo Habkost, Tyrone Ting
On Mon, 9 Jan 2023 at 14:03, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> These patches certainly look as churn, but they are required to
> be able to update the OBJECT_DECLARE_SIMPLE_TYPE() macro...
>
> Except the OMAP related files, the rest seems to have been
> merged shortly after automatic script conversion from commit
> 8063396bf3 ("Use OBJECT_DECLARE_SIMPLE_TYPE when possible")
> was run, so missed the QOM cleanup.
>
> So here we go with yet another boring cleanup series.
>
Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 19+ messages in thread