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From: Peter Zijlstra <peterz@infradead.org>
To: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Cc: Will Deacon <will@kernel.org>, Ingo Molnar <mingo@redhat.com>,
	linux-kernel@vger.kernel.org,
	Russell King <linux@armlinux.org.uk>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] qspinlock: Ensure writes are pushed out of core write buffer
Date: Thu, 28 Jan 2021 12:24:33 +0100	[thread overview]
Message-ID: <YBKe8SVOqLdu+vEf@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <c932770e-8a19-ab32-7b4e-33fc36981b77@nokia.com>

On Thu, Jan 28, 2021 at 08:36:24AM +0100, Alexander Sverdlin wrote:

> >> diff --git a/kernel/locking/mcs_spinlock.h b/kernel/locking/mcs_spinlock.h
> >> index 5e10153..10e497a 100644
> >> --- a/kernel/locking/mcs_spinlock.h
> >> +++ b/kernel/locking/mcs_spinlock.h
> >> @@ -89,6 +89,11 @@ void mcs_spin_lock(struct mcs_spinlock **lock, struct mcs_spinlock *node)
> >>  		return;
> >>  	}
> >>  	WRITE_ONCE(prev->next, node);
> >> +	/*
> >> +	 * This is necessary to make sure that the corresponding "while" in the
> >> +	 * mcs_spin_unlock() doesn't loop forever
> >> +	 */
> >> +	smp_wmb();
> > If it loops forever, that's broken hardware design; store buffers need to
> > drain. I don't think we should add unconditional barriers to bodge this.
> 
> The comment is a bit exaggerating the situation, but it's undeterministic and you see the
> measurements above. Something is wrong in the qspinlocks code, please consider this patch
> "RFC", but something has to be done here.

The qspinlock code has been TLA+ modelled and has had extensive memory
ordering analysis. It has had lots of runtime on extremely large x86,
arm64, and Power machines. I'm fairly confident there is nothing wrong.

What I do think is more likely is that your platform is broken, it
wouldn't be the first MIPS that's got store-buffers completely wrong,
see commit:

  a30718868915 ("MIPS: Change definition of cpu_relax() for Loongson-3")

Working around micro arch store-buffer issues is not something the
generic code is for.

WARNING: multiple messages have this Message-ID (diff)
From: Peter Zijlstra <peterz@infradead.org>
To: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Cc: Ingo Molnar <mingo@redhat.com>, Will Deacon <will@kernel.org>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Russell King <linux@armlinux.org.uk>
Subject: Re: [PATCH 1/2] qspinlock: Ensure writes are pushed out of core write buffer
Date: Thu, 28 Jan 2021 12:24:33 +0100	[thread overview]
Message-ID: <YBKe8SVOqLdu+vEf@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <c932770e-8a19-ab32-7b4e-33fc36981b77@nokia.com>

On Thu, Jan 28, 2021 at 08:36:24AM +0100, Alexander Sverdlin wrote:

> >> diff --git a/kernel/locking/mcs_spinlock.h b/kernel/locking/mcs_spinlock.h
> >> index 5e10153..10e497a 100644
> >> --- a/kernel/locking/mcs_spinlock.h
> >> +++ b/kernel/locking/mcs_spinlock.h
> >> @@ -89,6 +89,11 @@ void mcs_spin_lock(struct mcs_spinlock **lock, struct mcs_spinlock *node)
> >>  		return;
> >>  	}
> >>  	WRITE_ONCE(prev->next, node);
> >> +	/*
> >> +	 * This is necessary to make sure that the corresponding "while" in the
> >> +	 * mcs_spin_unlock() doesn't loop forever
> >> +	 */
> >> +	smp_wmb();
> > If it loops forever, that's broken hardware design; store buffers need to
> > drain. I don't think we should add unconditional barriers to bodge this.
> 
> The comment is a bit exaggerating the situation, but it's undeterministic and you see the
> measurements above. Something is wrong in the qspinlocks code, please consider this patch
> "RFC", but something has to be done here.

The qspinlock code has been TLA+ modelled and has had extensive memory
ordering analysis. It has had lots of runtime on extremely large x86,
arm64, and Power machines. I'm fairly confident there is nothing wrong.

What I do think is more likely is that your platform is broken, it
wouldn't be the first MIPS that's got store-buffers completely wrong,
see commit:

  a30718868915 ("MIPS: Change definition of cpu_relax() for Loongson-3")

Working around micro arch store-buffer issues is not something the
generic code is for.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-01-28 11:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-27 20:01 [PATCH 1/2] qspinlock: Ensure writes are pushed out of core write buffer Alexander A Sverdlin
2021-01-27 20:01 ` Alexander A Sverdlin
2021-01-27 20:01 ` [PATCH 2/2] ARM: mcs_spinlock: Drop smp_wmb in arch_mcs_spin_lock_contended() Alexander A Sverdlin
2021-01-27 20:01   ` Alexander A Sverdlin
2021-01-27 22:22   ` Will Deacon
2021-01-27 22:22     ` Will Deacon
2021-01-27 22:21 ` [PATCH 1/2] qspinlock: Ensure writes are pushed out of core write buffer Will Deacon
2021-01-27 22:21   ` Will Deacon
2021-01-28  7:36   ` Alexander Sverdlin
2021-01-28  7:36     ` Alexander Sverdlin
2021-01-28 11:24     ` Peter Zijlstra [this message]
2021-01-28 11:24       ` Peter Zijlstra
2021-01-27 22:43 ` Peter Zijlstra
2021-01-27 22:43   ` Peter Zijlstra
2021-01-28  7:42   ` Alexander Sverdlin
2021-01-28  7:42     ` Alexander Sverdlin

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