From: Abel Vesa <abel.vesa@nxp.com> To: Dong Aisheng <aisheng.dong@nxp.com> Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, sboyd@kernel.org, dongas86@gmail.com, shawnguo@kernel.org, kernel@pengutronix.de Subject: Re: [PATCH 03/10] clk: imx: scu: bypass cpu clock save and restore Date: Mon, 14 Jun 2021 11:54:37 +0300 [thread overview] Message-ID: <YMcZTdWMZKEmMSkQ@ryzen.lan> (raw) In-Reply-To: <20210604090943.3519350-4-aisheng.dong@nxp.com> On 21-06-04 17:09:36, Dong Aisheng wrote: > CPU clock is managed by ATF. No need save and restore. > > Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Looks good to me. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> > --- > drivers/clk/imx/clk-scu.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c > index 680b2650fd45..d87a1a1b297e 100644 > --- a/drivers/clk/imx/clk-scu.c > +++ b/drivers/clk/imx/clk-scu.c > @@ -538,6 +538,11 @@ static int imx_clk_scu_probe(struct platform_device *pdev) > static int __maybe_unused imx_clk_scu_suspend(struct device *dev) > { > struct clk_scu *clk = dev_get_drvdata(dev); > + u32 rsrc_id = clk->rsrc_id; > + > + if ((rsrc_id == IMX_SC_R_A35) || (rsrc_id == IMX_SC_R_A53) || > + (rsrc_id == IMX_SC_R_A72)) > + return 0; > > clk->rate = clk_hw_get_rate(&clk->hw); > clk->is_enabled = clk_hw_is_enabled(&clk->hw); > @@ -554,8 +559,13 @@ static int __maybe_unused imx_clk_scu_suspend(struct device *dev) > static int __maybe_unused imx_clk_scu_resume(struct device *dev) > { > struct clk_scu *clk = dev_get_drvdata(dev); > + u32 rsrc_id = clk->rsrc_id; > int ret = 0; > > + if ((rsrc_id == IMX_SC_R_A35) || (rsrc_id == IMX_SC_R_A53) || > + (rsrc_id == IMX_SC_R_A72)) > + return 0; > + > if (clk->rate) { > ret = clk_scu_set_rate(&clk->hw, clk->rate, 0); > dev_dbg(dev, "restore rate %d %s\n", clk->rate, > -- > 2.25.1 >
WARNING: multiple messages have this Message-ID (diff)
From: Abel Vesa <abel.vesa@nxp.com> To: Dong Aisheng <aisheng.dong@nxp.com> Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, sboyd@kernel.org, dongas86@gmail.com, shawnguo@kernel.org, kernel@pengutronix.de Subject: Re: [PATCH 03/10] clk: imx: scu: bypass cpu clock save and restore Date: Mon, 14 Jun 2021 11:54:37 +0300 [thread overview] Message-ID: <YMcZTdWMZKEmMSkQ@ryzen.lan> (raw) In-Reply-To: <20210604090943.3519350-4-aisheng.dong@nxp.com> On 21-06-04 17:09:36, Dong Aisheng wrote: > CPU clock is managed by ATF. No need save and restore. > > Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Looks good to me. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> > --- > drivers/clk/imx/clk-scu.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c > index 680b2650fd45..d87a1a1b297e 100644 > --- a/drivers/clk/imx/clk-scu.c > +++ b/drivers/clk/imx/clk-scu.c > @@ -538,6 +538,11 @@ static int imx_clk_scu_probe(struct platform_device *pdev) > static int __maybe_unused imx_clk_scu_suspend(struct device *dev) > { > struct clk_scu *clk = dev_get_drvdata(dev); > + u32 rsrc_id = clk->rsrc_id; > + > + if ((rsrc_id == IMX_SC_R_A35) || (rsrc_id == IMX_SC_R_A53) || > + (rsrc_id == IMX_SC_R_A72)) > + return 0; > > clk->rate = clk_hw_get_rate(&clk->hw); > clk->is_enabled = clk_hw_is_enabled(&clk->hw); > @@ -554,8 +559,13 @@ static int __maybe_unused imx_clk_scu_suspend(struct device *dev) > static int __maybe_unused imx_clk_scu_resume(struct device *dev) > { > struct clk_scu *clk = dev_get_drvdata(dev); > + u32 rsrc_id = clk->rsrc_id; > int ret = 0; > > + if ((rsrc_id == IMX_SC_R_A35) || (rsrc_id == IMX_SC_R_A53) || > + (rsrc_id == IMX_SC_R_A72)) > + return 0; > + > if (clk->rate) { > ret = clk_scu_set_rate(&clk->hw, clk->rate, 0); > dev_dbg(dev, "restore rate %d %s\n", clk->rate, > -- > 2.25.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-14 8:54 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-04 9:09 [PATCH 00/10] clk: imx: scu: add more scu clock features Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-04 9:09 ` [PATCH 01/10] clk: imx: scu: add more scu clocks Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-14 8:52 ` Abel Vesa 2021-06-14 8:52 ` Abel Vesa 2021-06-04 9:09 ` [PATCH 02/10] clk: imx: scu: add parallel port clock ops Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-14 8:53 ` Abel Vesa 2021-06-14 8:53 ` Abel Vesa 2021-06-04 9:09 ` [PATCH 03/10] clk: imx: scu: bypass cpu clock save and restore Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-14 8:54 ` Abel Vesa [this message] 2021-06-14 8:54 ` Abel Vesa 2021-06-04 9:09 ` [PATCH 04/10] clk: imx: scu: detach pd if can't power up Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-14 8:55 ` Abel Vesa 2021-06-14 8:55 ` Abel Vesa 2021-06-04 9:09 ` [PATCH 05/10] clk: imx: scu: bypass pi_pll enable status restore Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-14 8:57 ` Abel Vesa 2021-06-14 8:57 ` Abel Vesa 2021-06-04 9:09 ` [PATCH 06/10] clk: imx: scu: Add A53 frequency scaling support Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-04 9:09 ` [PATCH 07/10] clk: imx: scu: Add A72 " Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-04 9:09 ` [PATCH 08/10] clk: imx: scu: Only save DC SS clock using non-cached clock rate Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-04 9:09 ` [PATCH 09/10] clk: imx: scu: add parent save and restore Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-04 9:09 ` [PATCH 10/10] clk: imx: scu: Do not enable runtime PM for CPU clks Dong Aisheng 2021-06-04 9:09 ` Dong Aisheng 2021-06-14 9:07 ` [PATCH 00/10] clk: imx: scu: add more scu clock features Abel Vesa 2021-06-14 9:07 ` Abel Vesa 2021-06-14 10:22 ` Abel Vesa 2021-06-14 10:22 ` Abel Vesa
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