* [PATCH v3 0/4] RK3568 GPU
@ 2021-08-05 2:59 ` Ezequiel Garcia
0 siblings, 0 replies; 16+ messages in thread
From: Ezequiel Garcia @ 2021-08-05 2:59 UTC (permalink / raw)
To: devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard,
Peter Geis, Johan Jonker, Ezequiel Garcia
I've decided to split the GPU off previous series:
https://lore.kernel.org/linux-rockchip/2147216.TLkxdtWsSY@diego/
This series now contains only the GPU support, as the VPU
needs a tiny rework.
This is compiled tested only, in this case. Similar patches
have been tested on a v5.10-based kernel, so I'd say it's good
to go.
The mesa side is merged https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10771
and can be tested without a display, using something like weston --backend=headless-backend.so,
which provides an environment for GL to work.
Ezequiel Garcia (4):
dt-bindings: gpu: mali-bifrost: Allow up to two clocks
dt-bindings: gpu: mali-bifrost: Add RK3568 compatible
arm64: dts: rockchip: Add GPU node for rk3568
arm64: dts: rockchip: Enable the GPU on Quartz64 Model A
.../bindings/gpu/arm,mali-bifrost.yaml | 8 ++-
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 5 ++
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 +++++++++++++++++++
3 files changed, 62 insertions(+), 1 deletion(-)
--
2.32.0
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v3 0/4] RK3568 GPU
@ 2021-08-05 2:59 ` Ezequiel Garcia
0 siblings, 0 replies; 16+ messages in thread
From: Ezequiel Garcia @ 2021-08-05 2:59 UTC (permalink / raw)
To: devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard,
Peter Geis, Johan Jonker, Ezequiel Garcia
I've decided to split the GPU off previous series:
https://lore.kernel.org/linux-rockchip/2147216.TLkxdtWsSY@diego/
This series now contains only the GPU support, as the VPU
needs a tiny rework.
This is compiled tested only, in this case. Similar patches
have been tested on a v5.10-based kernel, so I'd say it's good
to go.
The mesa side is merged https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10771
and can be tested without a display, using something like weston --backend=headless-backend.so,
which provides an environment for GL to work.
Ezequiel Garcia (4):
dt-bindings: gpu: mali-bifrost: Allow up to two clocks
dt-bindings: gpu: mali-bifrost: Add RK3568 compatible
arm64: dts: rockchip: Add GPU node for rk3568
arm64: dts: rockchip: Enable the GPU on Quartz64 Model A
.../bindings/gpu/arm,mali-bifrost.yaml | 8 ++-
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 5 ++
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 +++++++++++++++++++
3 files changed, 62 insertions(+), 1 deletion(-)
--
2.32.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v3 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks
2021-08-05 2:59 ` Ezequiel Garcia
@ 2021-08-05 2:59 ` Ezequiel Garcia
-1 siblings, 0 replies; 16+ messages in thread
From: Ezequiel Garcia @ 2021-08-05 2:59 UTC (permalink / raw)
To: devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard,
Peter Geis, Johan Jonker, Ezequiel Garcia
Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
added an optional bus_clock to support Allwinner H6 T-720 GPU.
Increase the max clock items in the dt-binding to reflect this.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 0f73f436bea7..01532140096e 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -38,7 +38,12 @@ properties:
- const: gpu
clocks:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ maxItems: 2
mali-supply: true
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks
@ 2021-08-05 2:59 ` Ezequiel Garcia
0 siblings, 0 replies; 16+ messages in thread
From: Ezequiel Garcia @ 2021-08-05 2:59 UTC (permalink / raw)
To: devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard,
Peter Geis, Johan Jonker, Ezequiel Garcia
Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
added an optional bus_clock to support Allwinner H6 T-720 GPU.
Increase the max clock items in the dt-binding to reflect this.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 0f73f436bea7..01532140096e 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -38,7 +38,12 @@ properties:
- const: gpu
clocks:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ maxItems: 2
mali-supply: true
--
2.32.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 2/4] dt-bindings: gpu: mali-bifrost: Add RK3568 compatible
2021-08-05 2:59 ` Ezequiel Garcia
@ 2021-08-05 2:59 ` Ezequiel Garcia
-1 siblings, 0 replies; 16+ messages in thread
From: Ezequiel Garcia @ 2021-08-05 2:59 UTC (permalink / raw)
To: devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard,
Peter Geis, Johan Jonker, Ezequiel Garcia
The Rockchip RK3568 SoC has a Bifrost Mali-G52 GPU,
add a compatible string for it.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 01532140096e..6afe7030b859 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -20,6 +20,7 @@ properties:
- mediatek,mt8183-mali
- realtek,rtd1619-mali
- rockchip,px30-mali
+ - rockchip,rk3568-mali
- const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
reg:
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 2/4] dt-bindings: gpu: mali-bifrost: Add RK3568 compatible
@ 2021-08-05 2:59 ` Ezequiel Garcia
0 siblings, 0 replies; 16+ messages in thread
From: Ezequiel Garcia @ 2021-08-05 2:59 UTC (permalink / raw)
To: devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard,
Peter Geis, Johan Jonker, Ezequiel Garcia
The Rockchip RK3568 SoC has a Bifrost Mali-G52 GPU,
add a compatible string for it.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 01532140096e..6afe7030b859 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -20,6 +20,7 @@ properties:
- mediatek,mt8183-mali
- realtek,rtd1619-mali
- rockchip,px30-mali
+ - rockchip,rk3568-mali
- const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
reg:
--
2.32.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 3/4] arm64: dts: rockchip: Add GPU node for rk3568
2021-08-05 2:59 ` Ezequiel Garcia
@ 2021-08-05 2:59 ` Ezequiel Garcia
-1 siblings, 0 replies; 16+ messages in thread
From: Ezequiel Garcia @ 2021-08-05 2:59 UTC (permalink / raw)
To: devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard,
Peter Geis, Johan Jonker, Ezequiel Garcia
Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
which is based on the Bifrost architecture. It has
one shader core and two execution engines.
Quoting the datasheet:
Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 ++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index bef747fb1fe2..f8173ba63be0 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -121,6 +121,40 @@ opp-1800000000 {
};
};
+ gpu_opp_table: gpu-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-700000000 {
+ opp-hz = /bits/ 64 <700000000>;
+ opp-microvolt = <900000>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1000000>;
+ };
+ };
+
firmware {
scmi: scmi {
compatible = "arm,scmi-smc";
@@ -332,6 +366,22 @@ power-domain@RK3568_PD_RKVENC {
};
};
+ gpu: gpu@fde60000 {
+ compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
+ reg = <0x0 0xfde60000 0x0 0x4000>;
+
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+ clock-names = "core", "bus";
+ operating-points-v2 = <&gpu_opp_table>;
+ #cooling-cells = <2>;
+ power-domains = <&power RK3568_PD_GPU>;
+ status = "disabled";
+ };
+
sdmmc2: mmc@fe000000 {
compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe000000 0x0 0x4000>;
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 3/4] arm64: dts: rockchip: Add GPU node for rk3568
@ 2021-08-05 2:59 ` Ezequiel Garcia
0 siblings, 0 replies; 16+ messages in thread
From: Ezequiel Garcia @ 2021-08-05 2:59 UTC (permalink / raw)
To: devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard,
Peter Geis, Johan Jonker, Ezequiel Garcia
Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
which is based on the Bifrost architecture. It has
one shader core and two execution engines.
Quoting the datasheet:
Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 ++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index bef747fb1fe2..f8173ba63be0 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -121,6 +121,40 @@ opp-1800000000 {
};
};
+ gpu_opp_table: gpu-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-700000000 {
+ opp-hz = /bits/ 64 <700000000>;
+ opp-microvolt = <900000>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1000000>;
+ };
+ };
+
firmware {
scmi: scmi {
compatible = "arm,scmi-smc";
@@ -332,6 +366,22 @@ power-domain@RK3568_PD_RKVENC {
};
};
+ gpu: gpu@fde60000 {
+ compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
+ reg = <0x0 0xfde60000 0x0 0x4000>;
+
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+ clock-names = "core", "bus";
+ operating-points-v2 = <&gpu_opp_table>;
+ #cooling-cells = <2>;
+ power-domains = <&power RK3568_PD_GPU>;
+ status = "disabled";
+ };
+
sdmmc2: mmc@fe000000 {
compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe000000 0x0 0x4000>;
--
2.32.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 4/4] arm64: dts: rockchip: Enable the GPU on Quartz64 Model A
2021-08-05 2:59 ` Ezequiel Garcia
@ 2021-08-05 2:59 ` Ezequiel Garcia
-1 siblings, 0 replies; 16+ messages in thread
From: Ezequiel Garcia @ 2021-08-05 2:59 UTC (permalink / raw)
To: devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard,
Peter Geis, Johan Jonker, Ezequiel Garcia
Enable the GPU core on the Pine64 Quartz64 Model A.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
index b239f314b38a..2114c7404a07 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -147,6 +147,11 @@ &gmac1m0_clkinout
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 4/4] arm64: dts: rockchip: Enable the GPU on Quartz64 Model A
@ 2021-08-05 2:59 ` Ezequiel Garcia
0 siblings, 0 replies; 16+ messages in thread
From: Ezequiel Garcia @ 2021-08-05 2:59 UTC (permalink / raw)
To: devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard,
Peter Geis, Johan Jonker, Ezequiel Garcia
Enable the GPU core on the Pine64 Quartz64 Model A.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
index b239f314b38a..2114c7404a07 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -147,6 +147,11 @@ &gmac1m0_clkinout
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
--
2.32.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH v3 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks
2021-08-05 2:59 ` Ezequiel Garcia
@ 2021-08-13 17:44 ` Rob Herring
-1 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2021-08-13 17:44 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: devicetree, linux-rockchip, Heiko Stuebner, Kever Yang,
Benjamin Gaignard, Peter Geis, Johan Jonker
On Wed, Aug 04, 2021 at 11:59:45PM -0300, Ezequiel Garcia wrote:
> Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
> added an optional bus_clock to support Allwinner H6 T-720 GPU.
> Increase the max clock items in the dt-binding to reflect this.
>
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
> .../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> index 0f73f436bea7..01532140096e 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> @@ -38,7 +38,12 @@ properties:
> - const: gpu
>
> clocks:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
> +
> + clock-names:
> + minItems: 1
> + maxItems: 2
You have to define what the names are.
>
> mali-supply: true
>
> --
> 2.32.0
>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks
@ 2021-08-13 17:44 ` Rob Herring
0 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2021-08-13 17:44 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: devicetree, linux-rockchip, Heiko Stuebner, Kever Yang,
Benjamin Gaignard, Peter Geis, Johan Jonker
On Wed, Aug 04, 2021 at 11:59:45PM -0300, Ezequiel Garcia wrote:
> Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
> added an optional bus_clock to support Allwinner H6 T-720 GPU.
> Increase the max clock items in the dt-binding to reflect this.
>
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
> .../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> index 0f73f436bea7..01532140096e 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> @@ -38,7 +38,12 @@ properties:
> - const: gpu
>
> clocks:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
> +
> + clock-names:
> + minItems: 1
> + maxItems: 2
You have to define what the names are.
>
> mali-supply: true
>
> --
> 2.32.0
>
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 2/4] dt-bindings: gpu: mali-bifrost: Add RK3568 compatible
2021-08-05 2:59 ` Ezequiel Garcia
@ 2021-08-13 17:45 ` Rob Herring
-1 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2021-08-13 17:45 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: Kever Yang, Rob Herring, linux-rockchip, Peter Geis,
Johan Jonker, Heiko Stuebner, devicetree, Benjamin Gaignard
On Wed, 04 Aug 2021 23:59:46 -0300, Ezequiel Garcia wrote:
> The Rockchip RK3568 SoC has a Bifrost Mali-G52 GPU,
> add a compatible string for it.
>
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Applied, thanks!
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 2/4] dt-bindings: gpu: mali-bifrost: Add RK3568 compatible
@ 2021-08-13 17:45 ` Rob Herring
0 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2021-08-13 17:45 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: Kever Yang, Rob Herring, linux-rockchip, Peter Geis,
Johan Jonker, Heiko Stuebner, devicetree, Benjamin Gaignard
On Wed, 04 Aug 2021 23:59:46 -0300, Ezequiel Garcia wrote:
> The Rockchip RK3568 SoC has a Bifrost Mali-G52 GPU,
> add a compatible string for it.
>
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Applied, thanks!
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 3/4] arm64: dts: rockchip: Add GPU node for rk3568
2021-08-05 2:59 ` Ezequiel Garcia
@ 2021-08-20 15:08 ` Johan Jonker
-1 siblings, 0 replies; 16+ messages in thread
From: Johan Jonker @ 2021-08-20 15:08 UTC (permalink / raw)
To: Ezequiel Garcia, devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard, Peter Geis
Hi Ezequiel,
Some more comments. Have a look if it is useful.
On 8/5/21 4:59 AM, Ezequiel Garcia wrote:
> Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
> which is based on the Bifrost architecture. It has
> one shader core and two execution engines.
>
> Quoting the datasheet:
>
> Mali-G52 1-Core-2EE
> * Support 1600Mpix/s fill rate when 800MHz clock frequency
> * Support 38.4GLOPs when 800MHz clock frequency
>
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
> arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 ++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index bef747fb1fe2..f8173ba63be0 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -121,6 +121,40 @@ opp-1800000000 {
> };
> };
>
> + gpu_opp_table: gpu-opp-table {
gpu_opp_table: opp-table-1 {
Excuse for the inconvenience, but rob+dt just made a patch for opp last
month...
See opp-v2-base.yaml:
'^opp-table(-[a-z0-9]+)?$'
[PATCH v3 3/3] dt-bindings: opp: Convert to DT schema
https://lore.kernel.org/lkml/20210720144121.66713-3-robh@kernel.org/
===
A look in the manufacturer tree we can expect one more opp table in the
number sequence.
npu_opp_table: opp-table-2 {}
https://github.com/rockchip-linux/kernel/blob/develop-4.19/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> + compatible = "operating-points-v2";
> +
> + opp-200000000 {
> + opp-hz = /bits/ 64 <200000000>;
> + opp-microvolt = <825000>;
> + };
> +
> + opp-300000000 {
> + opp-hz = /bits/ 64 <300000000>;
> + opp-microvolt = <825000>;
> + };
> +
> + opp-400000000 {
> + opp-hz = /bits/ 64 <400000000>;
> + opp-microvolt = <825000>;
> + };
> +
> + opp-600000000 {
> + opp-hz = /bits/ 64 <600000000>;
> + opp-microvolt = <825000>;
> + };
> +
> + opp-700000000 {
> + opp-hz = /bits/ 64 <700000000>;
> + opp-microvolt = <900000>;
> + };
> +
> + opp-800000000 {
> + opp-hz = /bits/ 64 <800000000>;
> + opp-microvolt = <1000000>;
> + };
> + };
> +
> firmware {
> scmi: scmi {
> compatible = "arm,scmi-smc";
> @@ -332,6 +366,22 @@ power-domain@RK3568_PD_RKVENC {
> };
> };
>
> + gpu: gpu@fde60000 {
> + compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
> + reg = <0x0 0xfde60000 0x0 0x4000>;
> +
Maybe remove this empty line as well?
> + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "job", "mmu", "gpu";
> + clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
> + clock-names = "core", "bus";
> + operating-points-v2 = <&gpu_opp_table>;
> + #cooling-cells = <2>;
Not a big issue, but things with "#" are only needed for dt
interpretation (not a real property). I try to drop them as far down the
list when not sort alphabetically or connected to a real property.
> + power-domains = <&power RK3568_PD_GPU>;
> + status = "disabled";
> + };
> +
> sdmmc2: mmc@fe000000 {
> compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
> reg = <0x0 0xfe000000 0x0 0x4000>;
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 3/4] arm64: dts: rockchip: Add GPU node for rk3568
@ 2021-08-20 15:08 ` Johan Jonker
0 siblings, 0 replies; 16+ messages in thread
From: Johan Jonker @ 2021-08-20 15:08 UTC (permalink / raw)
To: Ezequiel Garcia, devicetree, linux-rockchip
Cc: Rob Herring, Heiko Stuebner, Kever Yang, Benjamin Gaignard, Peter Geis
Hi Ezequiel,
Some more comments. Have a look if it is useful.
On 8/5/21 4:59 AM, Ezequiel Garcia wrote:
> Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
> which is based on the Bifrost architecture. It has
> one shader core and two execution engines.
>
> Quoting the datasheet:
>
> Mali-G52 1-Core-2EE
> * Support 1600Mpix/s fill rate when 800MHz clock frequency
> * Support 38.4GLOPs when 800MHz clock frequency
>
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
> arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 ++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index bef747fb1fe2..f8173ba63be0 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -121,6 +121,40 @@ opp-1800000000 {
> };
> };
>
> + gpu_opp_table: gpu-opp-table {
gpu_opp_table: opp-table-1 {
Excuse for the inconvenience, but rob+dt just made a patch for opp last
month...
See opp-v2-base.yaml:
'^opp-table(-[a-z0-9]+)?$'
[PATCH v3 3/3] dt-bindings: opp: Convert to DT schema
https://lore.kernel.org/lkml/20210720144121.66713-3-robh@kernel.org/
===
A look in the manufacturer tree we can expect one more opp table in the
number sequence.
npu_opp_table: opp-table-2 {}
https://github.com/rockchip-linux/kernel/blob/develop-4.19/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> + compatible = "operating-points-v2";
> +
> + opp-200000000 {
> + opp-hz = /bits/ 64 <200000000>;
> + opp-microvolt = <825000>;
> + };
> +
> + opp-300000000 {
> + opp-hz = /bits/ 64 <300000000>;
> + opp-microvolt = <825000>;
> + };
> +
> + opp-400000000 {
> + opp-hz = /bits/ 64 <400000000>;
> + opp-microvolt = <825000>;
> + };
> +
> + opp-600000000 {
> + opp-hz = /bits/ 64 <600000000>;
> + opp-microvolt = <825000>;
> + };
> +
> + opp-700000000 {
> + opp-hz = /bits/ 64 <700000000>;
> + opp-microvolt = <900000>;
> + };
> +
> + opp-800000000 {
> + opp-hz = /bits/ 64 <800000000>;
> + opp-microvolt = <1000000>;
> + };
> + };
> +
> firmware {
> scmi: scmi {
> compatible = "arm,scmi-smc";
> @@ -332,6 +366,22 @@ power-domain@RK3568_PD_RKVENC {
> };
> };
>
> + gpu: gpu@fde60000 {
> + compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
> + reg = <0x0 0xfde60000 0x0 0x4000>;
> +
Maybe remove this empty line as well?
> + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "job", "mmu", "gpu";
> + clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
> + clock-names = "core", "bus";
> + operating-points-v2 = <&gpu_opp_table>;
> + #cooling-cells = <2>;
Not a big issue, but things with "#" are only needed for dt
interpretation (not a real property). I try to drop them as far down the
list when not sort alphabetically or connected to a real property.
> + power-domains = <&power RK3568_PD_GPU>;
> + status = "disabled";
> + };
> +
> sdmmc2: mmc@fe000000 {
> compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
> reg = <0x0 0xfe000000 0x0 0x4000>;
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2021-08-20 15:08 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-05 2:59 [PATCH v3 0/4] RK3568 GPU Ezequiel Garcia
2021-08-05 2:59 ` Ezequiel Garcia
2021-08-05 2:59 ` [PATCH v3 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks Ezequiel Garcia
2021-08-05 2:59 ` Ezequiel Garcia
2021-08-13 17:44 ` Rob Herring
2021-08-13 17:44 ` Rob Herring
2021-08-05 2:59 ` [PATCH v3 2/4] dt-bindings: gpu: mali-bifrost: Add RK3568 compatible Ezequiel Garcia
2021-08-05 2:59 ` Ezequiel Garcia
2021-08-13 17:45 ` Rob Herring
2021-08-13 17:45 ` Rob Herring
2021-08-05 2:59 ` [PATCH v3 3/4] arm64: dts: rockchip: Add GPU node for rk3568 Ezequiel Garcia
2021-08-05 2:59 ` Ezequiel Garcia
2021-08-20 15:08 ` Johan Jonker
2021-08-20 15:08 ` Johan Jonker
2021-08-05 2:59 ` [PATCH v3 4/4] arm64: dts: rockchip: Enable the GPU on Quartz64 Model A Ezequiel Garcia
2021-08-05 2:59 ` Ezequiel Garcia
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