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From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Sean Paul <sean@poorly.run>
Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	freedreno@lists.freedesktop.org, swboyd@chromium.org,
	jani.nikula@linux.intel.com, Sean Paul <seanpaul@chromium.org>,
	Rob Herring <robh@kernel.org>, Rob Clark <robdclark@gmail.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Rob Herring <robh+dt@kernel.org>,
	Kuogee Hsieh <khsieh@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
Date: Mon, 4 Oct 2021 15:00:54 -0500	[thread overview]
Message-ID: <YVtddoe6Ty841Kra@builder.lan> (raw)
In-Reply-To: <20211001151145.55916-13-sean@poorly.run>

On Fri 01 Oct 10:11 CDT 2021, Sean Paul wrote:

> From: Sean Paul <seanpaul@chromium.org>
> 
> This patch adds the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/encryption.
> 
> We'll use a new compatible string for this since the fields are optional.
> 
> Cc: Rob Herring <robh@kernel.org>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
> 
> Changes in v2:
> -Drop register range names (Stephen)
> -Fix yaml errors (Rob)
> Changes in v3:
> -Add new compatible string for dp-hdcp
> -Add descriptions to reg
> -Add minItems/maxItems to reg
> -Make reg depend on the new hdcp compatible string
> ---
> 
> Disclaimer: I really don't know if this is the right way to approach
> this. I tried using examples from other bindings, but feedback would be
> very much welcome on how I could add the optional register ranges.
> 
> 
>  .../bindings/display/msm/dp-controller.yaml   | 34 ++++++++++++++++---
>  1 file changed, 30 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> index 64d8d9e5e47a..a176f97b2f4c 100644
> --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> @@ -17,9 +17,10 @@ properties:
>    compatible:
>      enum:
>        - qcom,sc7180-dp
> +      - qcom,sc7180-dp-hdcp
>  
> -  reg:
> -    maxItems: 1
> +  # See compatible-specific constraints below.
> +  reg: true
>  
>    interrupts:
>      maxItems: 1
> @@ -89,6 +90,29 @@ required:
>    - power-domains
>    - ports
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: qcom,sc7180-dp-hdcp
> +    then:
> +      properties:
> +        reg:
> +          minItems: 3
> +          maxItems: 3
> +          items:
> +            - description: Registers for base DP functionality
> +            - description: (Optional) Registers for HDCP device key injection
> +            - description: (Optional) Registers for HDCP TrustZone interaction
> +    else:
> +      properties:
> +        reg:
> +          minItems: 1
> +          maxItems: 1
> +          items:
> +            - description: Registers for base DP functionality
> +
>  additionalProperties: false
>  
>  examples:
> @@ -99,8 +123,10 @@ examples:
>      #include <dt-bindings/power/qcom-rpmpd.h>
>  
>      displayport-controller@ae90000 {
> -        compatible = "qcom,sc7180-dp";
> -        reg = <0xae90000 0x1400>;
> +        compatible = "qcom,sc7180-dp-hdcp";
> +        reg = <0 0x0ae90000 0 0x1400>,
> +              <0 0x0aed1000 0 0x174>,
> +              <0 0x0aee1000 0 0x2c>;

Forgot to mention, #address-cells = #size-cells = <1> in the example
"environment", so you have to omit the lone 0s in the example to make it
pass the tests.

Regards,
Bjorn

>          interrupt-parent = <&mdss>;
>          interrupts = <12>;
>          clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> -- 
> Sean Paul, Software Engineer, Google / Chromium OS
> 

WARNING: multiple messages have this Message-ID (diff)
From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Sean Paul <sean@poorly.run>
Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	freedreno@lists.freedesktop.org, swboyd@chromium.org,
	jani.nikula@linux.intel.com, Sean Paul <seanpaul@chromium.org>,
	Rob Herring <robh@kernel.org>, Rob Clark <robdclark@gmail.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Rob Herring <robh+dt@kernel.org>,
	Kuogee Hsieh <khsieh@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH v3 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
Date: Mon, 4 Oct 2021 15:00:54 -0500	[thread overview]
Message-ID: <YVtddoe6Ty841Kra@builder.lan> (raw)
In-Reply-To: <20211001151145.55916-13-sean@poorly.run>

On Fri 01 Oct 10:11 CDT 2021, Sean Paul wrote:

> From: Sean Paul <seanpaul@chromium.org>
> 
> This patch adds the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/encryption.
> 
> We'll use a new compatible string for this since the fields are optional.
> 
> Cc: Rob Herring <robh@kernel.org>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
> 
> Changes in v2:
> -Drop register range names (Stephen)
> -Fix yaml errors (Rob)
> Changes in v3:
> -Add new compatible string for dp-hdcp
> -Add descriptions to reg
> -Add minItems/maxItems to reg
> -Make reg depend on the new hdcp compatible string
> ---
> 
> Disclaimer: I really don't know if this is the right way to approach
> this. I tried using examples from other bindings, but feedback would be
> very much welcome on how I could add the optional register ranges.
> 
> 
>  .../bindings/display/msm/dp-controller.yaml   | 34 ++++++++++++++++---
>  1 file changed, 30 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> index 64d8d9e5e47a..a176f97b2f4c 100644
> --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> @@ -17,9 +17,10 @@ properties:
>    compatible:
>      enum:
>        - qcom,sc7180-dp
> +      - qcom,sc7180-dp-hdcp
>  
> -  reg:
> -    maxItems: 1
> +  # See compatible-specific constraints below.
> +  reg: true
>  
>    interrupts:
>      maxItems: 1
> @@ -89,6 +90,29 @@ required:
>    - power-domains
>    - ports
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: qcom,sc7180-dp-hdcp
> +    then:
> +      properties:
> +        reg:
> +          minItems: 3
> +          maxItems: 3
> +          items:
> +            - description: Registers for base DP functionality
> +            - description: (Optional) Registers for HDCP device key injection
> +            - description: (Optional) Registers for HDCP TrustZone interaction
> +    else:
> +      properties:
> +        reg:
> +          minItems: 1
> +          maxItems: 1
> +          items:
> +            - description: Registers for base DP functionality
> +
>  additionalProperties: false
>  
>  examples:
> @@ -99,8 +123,10 @@ examples:
>      #include <dt-bindings/power/qcom-rpmpd.h>
>  
>      displayport-controller@ae90000 {
> -        compatible = "qcom,sc7180-dp";
> -        reg = <0xae90000 0x1400>;
> +        compatible = "qcom,sc7180-dp-hdcp";
> +        reg = <0 0x0ae90000 0 0x1400>,
> +              <0 0x0aed1000 0 0x174>,
> +              <0 0x0aee1000 0 0x2c>;

Forgot to mention, #address-cells = #size-cells = <1> in the example
"environment", so you have to omit the lone 0s in the example to make it
pass the tests.

Regards,
Bjorn

>          interrupt-parent = <&mdss>;
>          interrupts = <12>;
>          clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> -- 
> Sean Paul, Software Engineer, Google / Chromium OS
> 

  parent reply	other threads:[~2021-10-04 20:00 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-01 15:11 [PATCH v3 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers Sean Paul
2021-10-01 15:11 ` [Intel-gfx] " Sean Paul
2021-10-01 15:11 ` [PATCH v3 01/14] drm/hdcp: Add drm_hdcp_atomic_check() Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-22 21:08   ` [Freedreno] " abhinavk
2021-10-22 21:08     ` [Intel-gfx] " abhinavk
2021-10-01 15:11 ` [PATCH v3 02/14] drm/hdcp: Avoid changing crtc state in hdcp atomic check Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-01 15:11 ` [PATCH v3 03/14] drm/hdcp: Update property value on content type and user changes Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-05  0:03   ` [Freedreno] " abhinavk
2021-10-05  0:03     ` [Intel-gfx] " abhinavk
2021-10-22 21:08   ` abhinavk
2021-10-22 21:08     ` [Intel-gfx] " abhinavk
2021-10-01 15:11 ` [PATCH v3 04/14] drm/hdcp: Expand HDCP helper library for enable/disable/check Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-22 21:14   ` [Freedreno] " abhinavk
2021-10-22 21:14     ` [Intel-gfx] " abhinavk
2021-10-01 15:11 ` [PATCH v3 05/14] drm/i915/hdcp: Consolidate HDCP setup/state cache Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-01 15:11 ` [PATCH v3 06/14] drm/i915/hdcp: Retain hdcp_capable return codes Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-01 15:11 ` [PATCH v3 07/14] drm/i915/hdcp: Use HDCP helpers for i915 Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-01 15:11 ` [PATCH v3 08/14] drm/msm/dpu_kms: Re-order dpu includes Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-04 22:48   ` Dmitry Baryshkov
2021-10-04 22:48     ` [Intel-gfx] " Dmitry Baryshkov
2021-10-01 15:11 ` [PATCH v3 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-04 22:49   ` Dmitry Baryshkov
2021-10-04 22:49     ` [Intel-gfx] " Dmitry Baryshkov
2021-10-22 21:10   ` [Freedreno] " abhinavk
2021-10-22 21:10     ` [Intel-gfx] " abhinavk
2021-10-01 15:11 ` [PATCH v3 10/14] drm/msm/dpu: Remove encoder->enable() hack Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-04 22:52   ` Dmitry Baryshkov
2021-10-04 22:52     ` [Intel-gfx] " Dmitry Baryshkov
2021-10-22 21:06   ` abhinavk
2021-10-22 21:06     ` [Intel-gfx] " abhinavk
2021-10-01 15:11 ` [PATCH v3 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-04 22:52   ` Dmitry Baryshkov
2021-10-04 22:52     ` [Intel-gfx] " Dmitry Baryshkov
2021-10-01 15:11 ` [PATCH v3 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-01 19:03   ` Rob Herring
2021-10-01 19:03     ` [Intel-gfx] " Rob Herring
2021-10-04 19:58   ` Bjorn Andersson
2021-10-04 19:58     ` [Intel-gfx] " Bjorn Andersson
2021-10-29 14:21     ` Sean Paul
2021-10-29 14:21       ` [Intel-gfx] " Sean Paul
2021-10-04 20:00   ` Bjorn Andersson [this message]
2021-10-04 20:00     ` Bjorn Andersson
2021-10-01 15:11 ` [PATCH v3 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-01 15:11 ` [PATCH v3 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers Sean Paul
2021-10-01 15:11   ` [Intel-gfx] " Sean Paul
2021-10-01 20:58 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev2) Patchwork

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