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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Ser Olmy <ser.olmy@protonmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [regression] commit d298b03506d3 ("x86/fpu: Restore the masking out of reserved MXCSR bits")
Date: Thu, 14 Oct 2021 21:46:50 +0300	[thread overview]
Message-ID: <YWh7GgCgdtwRj3GU@intel.com> (raw)
In-Reply-To: <YWhwdDI5ECoMZQzU@zn.tnic>

On Thu, Oct 14, 2021 at 08:01:24PM +0200, Borislav Petkov wrote:
> On Thu, Oct 14, 2021 at 08:45:33PM +0300, Ville Syrjälä wrote:
> > That ~ was indeed the problem. With it gone the machine is happy again.
> > 
> > I presume you'll turn this into a real patch?
> 
> Actually, you found it and you should be the one to write it and do the
> honors. Unless you don't want to - then I can do it.

I figured you can write a reasonably succinct commit message, instead
of having me ramble on incoherently. ATM I don't even know what mxcsr
is or why clobbering it would cause floating point exceptions with
sse specifically.

But I can certainly ramble, if you prefer that.

> 
> If you do, pls add 
> 
> Ser Olmy <ser.olmy@protonmail.com>
> 
> to Cc so that he can test your patch. I *think* it should work for him
> too but I don't know anything anymore. :-)
> 
> Thx.
> 
> -- 
> Regards/Gruss,
>     Boris.
> 
> https://people.kernel.org/tglx/notes-about-netiquette

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2021-10-14 18:46 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-14 11:44 [regression] commit d298b03506d3 ("x86/fpu: Restore the masking out of reserved MXCSR bits") Ville Syrjälä
2021-10-14 14:27 ` Borislav Petkov
2021-10-14 14:34   ` Ville Syrjälä
2021-10-14 14:43     ` Ville Syrjälä
2021-10-14 14:56       ` Borislav Petkov
2021-10-14 15:03         ` Ville Syrjälä
2021-10-14 17:45           ` Ville Syrjälä
2021-10-14 18:01             ` Borislav Petkov
2021-10-14 18:46               ` Ville Syrjälä [this message]
2021-10-14 19:08                 ` Borislav Petkov
2021-10-15 11:04                   ` Borislav Petkov
2021-10-16  7:26                     ` Ser Olmy
2021-10-16 10:35                       ` Borislav Petkov
2021-10-18  6:55                     ` Ville Syrjälä
2021-10-14 14:44     ` Borislav Petkov
2021-10-16 12:22 ` [tip: x86/urgent] x86/fpu: Mask out the invalid MXCSR bits properly tip-bot2 for Borislav Petkov

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