From: Borislav Petkov <bp@alien8.de>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Ser Olmy <ser.olmy@protonmail.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [regression] commit d298b03506d3 ("x86/fpu: Restore the masking out of reserved MXCSR bits")
Date: Thu, 14 Oct 2021 16:56:56 +0200 [thread overview]
Message-ID: <YWhFOJCF1pxIBANv@zn.tnic> (raw)
In-Reply-To: <YWhCAqDxAuTh1YwE@intel.com>
On Thu, Oct 14, 2021 at 05:43:14PM +0300, Ville Syrjälä wrote:
> Hmm. Actually I just stared at the code a bit more it looks
> a bit funny. Was it supposed to do this instead?
>
> - fpu->state.fxsave.mxcsr &= ~mxcsr_feature_mask;
> + fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;
Whoops, I had it like that in the original patch:
https://lore.kernel.org/all/163354193576.25758.8132624386883258818.tip-bot2@tip-bot2/
I blame tglx. :-)
Does it work if you remove the mask negation "~"?
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2021-10-14 14:58 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-14 11:44 [regression] commit d298b03506d3 ("x86/fpu: Restore the masking out of reserved MXCSR bits") Ville Syrjälä
2021-10-14 14:27 ` Borislav Petkov
2021-10-14 14:34 ` Ville Syrjälä
2021-10-14 14:43 ` Ville Syrjälä
2021-10-14 14:56 ` Borislav Petkov [this message]
2021-10-14 15:03 ` Ville Syrjälä
2021-10-14 17:45 ` Ville Syrjälä
2021-10-14 18:01 ` Borislav Petkov
2021-10-14 18:46 ` Ville Syrjälä
2021-10-14 19:08 ` Borislav Petkov
2021-10-15 11:04 ` Borislav Petkov
2021-10-16 7:26 ` Ser Olmy
2021-10-16 10:35 ` Borislav Petkov
2021-10-18 6:55 ` Ville Syrjälä
2021-10-14 14:44 ` Borislav Petkov
2021-10-16 12:22 ` [tip: x86/urgent] x86/fpu: Mask out the invalid MXCSR bits properly tip-bot2 for Borislav Petkov
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