All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, vkoul@kernel.org,
	linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
	galak@kernel.crashing.org, shawnguo@kernel.org,
	tharvey@gateworks.com, devicetree@vger.kernel.org,
	linux-imx@nxp.com, kishon@ti.com,
	linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de,
	marcel.ziswiler@toradex.com
Subject: Re: [PATCH v5 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name properties
Date: Tue, 2 Nov 2021 11:41:21 -0500	[thread overview]
Message-ID: <YYFqMaByELGuWOCu@robh.at.kernel.org> (raw)
In-Reply-To: <1635820355-27009-4-git-send-email-hongxing.zhu@nxp.com>

On Tue, 02 Nov 2021 10:32:30 +0800, Richard Zhu wrote:
> i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties
> in the binding document.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Reviewed-by: Tim Harvey <tharvey@gateworks.com>
> Tested-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, vkoul@kernel.org,
	linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
	galak@kernel.crashing.org, shawnguo@kernel.org,
	tharvey@gateworks.com, devicetree@vger.kernel.org,
	linux-imx@nxp.com, kishon@ti.com,
	linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de,
	marcel.ziswiler@toradex.com
Subject: Re: [PATCH v5 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name properties
Date: Tue, 2 Nov 2021 11:41:21 -0500	[thread overview]
Message-ID: <YYFqMaByELGuWOCu@robh.at.kernel.org> (raw)
In-Reply-To: <1635820355-27009-4-git-send-email-hongxing.zhu@nxp.com>

On Tue, 02 Nov 2021 10:32:30 +0800, Richard Zhu wrote:
> i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties
> in the binding document.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Reviewed-by: Tim Harvey <tharvey@gateworks.com>
> Tested-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, vkoul@kernel.org,
	linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
	galak@kernel.crashing.org, shawnguo@kernel.org,
	tharvey@gateworks.com, devicetree@vger.kernel.org,
	linux-imx@nxp.com, kishon@ti.com,
	linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de,
	marcel.ziswiler@toradex.com
Subject: Re: [PATCH v5 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name properties
Date: Tue, 2 Nov 2021 11:41:21 -0500	[thread overview]
Message-ID: <YYFqMaByELGuWOCu@robh.at.kernel.org> (raw)
In-Reply-To: <1635820355-27009-4-git-send-email-hongxing.zhu@nxp.com>

On Tue, 02 Nov 2021 10:32:30 +0800, Richard Zhu wrote:
> i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties
> in the binding document.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Reviewed-by: Tim Harvey <tharvey@gateworks.com>
> Tested-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-11-02 16:41 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-02  2:32 [PATCH v5 0/8] Add the imx8m pcie phy driver and imx8mm pcie support Richard Zhu
2021-11-02  2:32 ` Richard Zhu
2021-11-02  2:32 ` Richard Zhu
2021-11-02  2:32 ` [PATCH v5 1/8] dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02 16:36   ` Rob Herring
2021-11-02 16:36     ` Rob Herring
2021-11-02 16:36     ` Rob Herring
2021-11-02  2:32 ` [PATCH v5 2/8] dt-bindings: phy: Add imx8 pcie phy driver support Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02 16:40   ` Rob Herring
2021-11-02 16:40     ` Rob Herring
2021-11-02 16:40     ` Rob Herring
2021-11-03  2:07     ` Richard Zhu
2021-11-03  2:07       ` Richard Zhu
2021-11-03  2:07       ` Richard Zhu
2021-11-02  2:32 ` [PATCH v5 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name properties Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02 16:41   ` Rob Herring [this message]
2021-11-02 16:41     ` Rob Herring
2021-11-02 16:41     ` Rob Herring
2021-11-02  2:32 ` [PATCH v5 4/8] arm64: dts: imx8mm: Add the pcie phy support Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32 ` [PATCH v5 5/8] phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32 ` [PATCH v5 6/8] arm64: dts: imx8mm: Add the pcie support Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32 ` [PATCH v5 7/8] arm64: dts: imx8mm-evk: Add the pcie support on imx8mm evk board Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32 ` [PATCH v5 8/8] PCI: imx: Add the imx8mm pcie support Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-02  2:32   ` Richard Zhu
2021-11-15 22:56 ` [PATCH v5 0/8] Add the imx8m pcie phy driver and " Tim Harvey
2021-11-15 22:56   ` Tim Harvey
2021-11-15 22:56   ` Tim Harvey
2021-11-16  1:40   ` Hongxing Zhu
2021-11-16  1:40     ` Hongxing Zhu
2021-11-16  1:40     ` Hongxing Zhu
2021-11-17  3:38     ` Hongxing Zhu
2021-11-17  3:38       ` Hongxing Zhu
2021-11-17  3:38       ` Hongxing Zhu
2021-11-17 18:02       ` Tim Harvey
2021-11-17 18:02         ` Tim Harvey
2021-11-17 18:02         ` Tim Harvey
2021-11-18  1:23         ` Hongxing Zhu
2021-11-18  1:23           ` Hongxing Zhu
2021-11-18  1:23           ` Hongxing Zhu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YYFqMaByELGuWOCu@robh.at.kernel.org \
    --to=robh@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=galak@kernel.crashing.org \
    --cc=hongxing.zhu@nxp.com \
    --cc=kernel@pengutronix.de \
    --cc=kishon@ti.com \
    --cc=l.stach@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=marcel.ziswiler@toradex.com \
    --cc=shawnguo@kernel.org \
    --cc=tharvey@gateworks.com \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.