* [PATCH v15 0/4] Add SPMI support for Mediatek SoC IC @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group This series adds support for new SoC MT6873/MT8192/MT8195 to the spmi driver. This series is based on Chun-Jie's patches[1]. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=521655 changes since v14: - rebase to v5.15-rc1. - remove reg property - no combining patch James Lo (4): dt-bindings: spmi: remove the constraint of reg property dt-bindings: spmi: document binding for the Mediatek SPMI controller spmi: mediatek: Add support for MT6873/8192 spmi: mediatek: Add support for MT8195 Henry Chen (1): spmi: mediatek: Add support for MT8195 Hsin-Hsiung Wang (3): dt-bindings: spmi: modify the constraint of reg property dt-bindings: spmi: document binding for the Mediatek SPMI controller spmi: mediatek: Add support for MT6873/8192 .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++ .../devicetree/bindings/spmi/spmi.yaml | 3 - drivers/spmi/Kconfig | 11 + drivers/spmi/Makefile | 1 + drivers/spmi/spmi-mtk-pmif.c | 542 ++++++++++++++++++ 5 files changed, 630 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml create mode 100644 drivers/spmi/spmi-mtk-pmif.c -- 2.18.0 ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v15 0/4] Add SPMI support for Mediatek SoC IC @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group This series adds support for new SoC MT6873/MT8192/MT8195 to the spmi driver. This series is based on Chun-Jie's patches[1]. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=521655 changes since v14: - rebase to v5.15-rc1. - remove reg property - no combining patch James Lo (4): dt-bindings: spmi: remove the constraint of reg property dt-bindings: spmi: document binding for the Mediatek SPMI controller spmi: mediatek: Add support for MT6873/8192 spmi: mediatek: Add support for MT8195 Henry Chen (1): spmi: mediatek: Add support for MT8195 Hsin-Hsiung Wang (3): dt-bindings: spmi: modify the constraint of reg property dt-bindings: spmi: document binding for the Mediatek SPMI controller spmi: mediatek: Add support for MT6873/8192 .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++ .../devicetree/bindings/spmi/spmi.yaml | 3 - drivers/spmi/Kconfig | 11 + drivers/spmi/Makefile | 1 + drivers/spmi/spmi-mtk-pmif.c | 542 ++++++++++++++++++ 5 files changed, 630 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml create mode 100644 drivers/spmi/spmi-mtk-pmif.c -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v15 0/4] Add SPMI support for Mediatek SoC IC @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group This series adds support for new SoC MT6873/MT8192/MT8195 to the spmi driver. This series is based on Chun-Jie's patches[1]. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=521655 changes since v14: - rebase to v5.15-rc1. - remove reg property - no combining patch James Lo (4): dt-bindings: spmi: remove the constraint of reg property dt-bindings: spmi: document binding for the Mediatek SPMI controller spmi: mediatek: Add support for MT6873/8192 spmi: mediatek: Add support for MT8195 Henry Chen (1): spmi: mediatek: Add support for MT8195 Hsin-Hsiung Wang (3): dt-bindings: spmi: modify the constraint of reg property dt-bindings: spmi: document binding for the Mediatek SPMI controller spmi: mediatek: Add support for MT6873/8192 .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++ .../devicetree/bindings/spmi/spmi.yaml | 3 - drivers/spmi/Kconfig | 11 + drivers/spmi/Makefile | 1 + drivers/spmi/spmi-mtk-pmif.c | 542 ++++++++++++++++++ 5 files changed, 630 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml create mode 100644 drivers/spmi/spmi-mtk-pmif.c -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v15 1/4] dt-bindings: spmi: remove the constraint of reg property 2021-11-15 4:20 ` James Lo (?) @ 2021-11-15 4:20 ` James Lo -1 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group 'reg' is controller specific so we shouldn't even be specifying it here. Just remove it. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> --- Documentation/devicetree/bindings/spmi/spmi.yaml | 3 --- 1 file changed, 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml index 1d243faef2f8..c1b06fa5c631 100644 --- a/Documentation/devicetree/bindings/spmi/spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/spmi.yaml @@ -24,9 +24,6 @@ properties: $nodename: pattern: "^spmi@.*" - reg: - maxItems: 1 - "#address-cells": const: 2 -- 2.18.0 ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 1/4] dt-bindings: spmi: remove the constraint of reg property @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group 'reg' is controller specific so we shouldn't even be specifying it here. Just remove it. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> --- Documentation/devicetree/bindings/spmi/spmi.yaml | 3 --- 1 file changed, 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml index 1d243faef2f8..c1b06fa5c631 100644 --- a/Documentation/devicetree/bindings/spmi/spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/spmi.yaml @@ -24,9 +24,6 @@ properties: $nodename: pattern: "^spmi@.*" - reg: - maxItems: 1 - "#address-cells": const: 2 -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 1/4] dt-bindings: spmi: remove the constraint of reg property @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group 'reg' is controller specific so we shouldn't even be specifying it here. Just remove it. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> --- Documentation/devicetree/bindings/spmi/spmi.yaml | 3 --- 1 file changed, 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml index 1d243faef2f8..c1b06fa5c631 100644 --- a/Documentation/devicetree/bindings/spmi/spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/spmi.yaml @@ -24,9 +24,6 @@ properties: $nodename: pattern: "^spmi@.*" - reg: - maxItems: 1 - "#address-cells": const: 2 -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v15 1/4] dt-bindings: spmi: remove the constraint of reg property 2021-11-15 4:20 ` James Lo (?) @ 2021-11-18 22:43 ` Rob Herring -1 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2021-11-18 22:43 UTC (permalink / raw) To: James Lo Cc: Stephen Boyd, Matthias Brugger, Hsin-Hsiung Wang, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group On Mon, Nov 15, 2021 at 12:20:27PM +0800, James Lo wrote: > 'reg' is controller specific so we shouldn't even be specifying it here. > Just remove it. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > Documentation/devicetree/bindings/spmi/spmi.yaml | 3 --- > 1 file changed, 3 deletions(-) Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 1/4] dt-bindings: spmi: remove the constraint of reg property @ 2021-11-18 22:43 ` Rob Herring 0 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2021-11-18 22:43 UTC (permalink / raw) To: James Lo Cc: Stephen Boyd, Matthias Brugger, Hsin-Hsiung Wang, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group On Mon, Nov 15, 2021 at 12:20:27PM +0800, James Lo wrote: > 'reg' is controller specific so we shouldn't even be specifying it here. > Just remove it. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > Documentation/devicetree/bindings/spmi/spmi.yaml | 3 --- > 1 file changed, 3 deletions(-) Reviewed-by: Rob Herring <robh@kernel.org> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 1/4] dt-bindings: spmi: remove the constraint of reg property @ 2021-11-18 22:43 ` Rob Herring 0 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2021-11-18 22:43 UTC (permalink / raw) To: James Lo Cc: Stephen Boyd, Matthias Brugger, Hsin-Hsiung Wang, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group On Mon, Nov 15, 2021 at 12:20:27PM +0800, James Lo wrote: > 'reg' is controller specific so we shouldn't even be specifying it here. > Just remove it. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > Documentation/devicetree/bindings/spmi/spmi.yaml | 3 --- > 1 file changed, 3 deletions(-) Reviewed-by: Rob Herring <robh@kernel.org> _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller 2021-11-15 4:20 ` James Lo (?) @ 2021-11-15 4:20 ` James Lo -1 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group This adds documentation for the SPMI controller found on Mediatek SoCs. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> --- .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml new file mode 100644 index 000000000000..2445c5e0b0ef --- /dev/null +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek SPMI Controller Device Tree Bindings + +maintainers: + - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> + +description: |+ + On MediaTek SoCs the PMIC is connected via SPMI and the controller allows + for multiple SoCs to control a single SPMI master. + +allOf: + - $ref: "spmi.yaml" + +properties: + compatible: + enum: + - mediatek,mt6873-spmi + - mediatek,mt8195-spmi + + reg: + maxItems: 2 + + reg-names: + items: + - const: pmif + - const: spmimst + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + items: + - const: pmif_sys_ck + - const: pmif_tmr_ck + - const: spmimst_clk_mux + + assigned-clocks: + maxItems: 1 + + assigned-clock-parents: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8192-clk.h> + + spmi: spmi@10027000 { + compatible = "mediatek,mt6873-spmi"; + reg = <0x10027000 0xe00>, + <0x10029000 0x100>; + reg-names = "pmif", "spmimst"; + clocks = <&infracfg CLK_INFRA_PMIC_AP>, + <&infracfg CLK_INFRA_PMIC_TMR>, + <&topckgen CLK_TOP_SPMI_MST_SEL>; + clock-names = "pmif_sys_ck", + "pmif_tmr_ck", + "spmimst_clk_mux"; + assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>; + }; +... -- 2.18.0 ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group This adds documentation for the SPMI controller found on Mediatek SoCs. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> --- .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml new file mode 100644 index 000000000000..2445c5e0b0ef --- /dev/null +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek SPMI Controller Device Tree Bindings + +maintainers: + - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> + +description: |+ + On MediaTek SoCs the PMIC is connected via SPMI and the controller allows + for multiple SoCs to control a single SPMI master. + +allOf: + - $ref: "spmi.yaml" + +properties: + compatible: + enum: + - mediatek,mt6873-spmi + - mediatek,mt8195-spmi + + reg: + maxItems: 2 + + reg-names: + items: + - const: pmif + - const: spmimst + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + items: + - const: pmif_sys_ck + - const: pmif_tmr_ck + - const: spmimst_clk_mux + + assigned-clocks: + maxItems: 1 + + assigned-clock-parents: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8192-clk.h> + + spmi: spmi@10027000 { + compatible = "mediatek,mt6873-spmi"; + reg = <0x10027000 0xe00>, + <0x10029000 0x100>; + reg-names = "pmif", "spmimst"; + clocks = <&infracfg CLK_INFRA_PMIC_AP>, + <&infracfg CLK_INFRA_PMIC_TMR>, + <&topckgen CLK_TOP_SPMI_MST_SEL>; + clock-names = "pmif_sys_ck", + "pmif_tmr_ck", + "spmimst_clk_mux"; + assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>; + }; +... -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group This adds documentation for the SPMI controller found on Mediatek SoCs. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> --- .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml new file mode 100644 index 000000000000..2445c5e0b0ef --- /dev/null +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek SPMI Controller Device Tree Bindings + +maintainers: + - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> + +description: |+ + On MediaTek SoCs the PMIC is connected via SPMI and the controller allows + for multiple SoCs to control a single SPMI master. + +allOf: + - $ref: "spmi.yaml" + +properties: + compatible: + enum: + - mediatek,mt6873-spmi + - mediatek,mt8195-spmi + + reg: + maxItems: 2 + + reg-names: + items: + - const: pmif + - const: spmimst + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + items: + - const: pmif_sys_ck + - const: pmif_tmr_ck + - const: spmimst_clk_mux + + assigned-clocks: + maxItems: 1 + + assigned-clock-parents: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8192-clk.h> + + spmi: spmi@10027000 { + compatible = "mediatek,mt6873-spmi"; + reg = <0x10027000 0xe00>, + <0x10029000 0x100>; + reg-names = "pmif", "spmimst"; + clocks = <&infracfg CLK_INFRA_PMIC_AP>, + <&infracfg CLK_INFRA_PMIC_TMR>, + <&topckgen CLK_TOP_SPMI_MST_SEL>; + clock-names = "pmif_sys_ck", + "pmif_tmr_ck", + "spmimst_clk_mux"; + assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>; + }; +... -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller 2021-11-15 4:20 ` James Lo (?) @ 2021-11-15 13:42 ` Rob Herring -1 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2021-11-15 13:42 UTC (permalink / raw) To: James Lo Cc: devicetree, linux-arm-kernel, srv_heupstream, Stephen Boyd, Matthias Brugger, linux-kernel, Project_Global_Chrome_Upstream_Group, Hsin-Hsiung Wang, linux-mediatek, Rob Herring On Mon, 15 Nov 2021 12:20:28 +0800, James Lo wrote: > This adds documentation for the SPMI controller found on Mediatek SoCs. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++++++++++++++++++ > 1 file changed, 76 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], [268603392, 256]] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/spmi.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], [268603392, 256]] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1555114 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller @ 2021-11-15 13:42 ` Rob Herring 0 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2021-11-15 13:42 UTC (permalink / raw) To: James Lo Cc: devicetree, linux-arm-kernel, srv_heupstream, Stephen Boyd, Matthias Brugger, linux-kernel, Project_Global_Chrome_Upstream_Group, Hsin-Hsiung Wang, linux-mediatek, Rob Herring On Mon, 15 Nov 2021 12:20:28 +0800, James Lo wrote: > This adds documentation for the SPMI controller found on Mediatek SoCs. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++++++++++++++++++ > 1 file changed, 76 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], [268603392, 256]] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/spmi.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], [268603392, 256]] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1555114 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller @ 2021-11-15 13:42 ` Rob Herring 0 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2021-11-15 13:42 UTC (permalink / raw) To: James Lo Cc: devicetree, linux-arm-kernel, srv_heupstream, Stephen Boyd, Matthias Brugger, linux-kernel, Project_Global_Chrome_Upstream_Group, Hsin-Hsiung Wang, linux-mediatek, Rob Herring On Mon, 15 Nov 2021 12:20:28 +0800, James Lo wrote: > This adds documentation for the SPMI controller found on Mediatek SoCs. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++++++++++++++++++ > 1 file changed, 76 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], [268603392, 256]] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/spmi.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], [268603392, 256]] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1555114 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller 2021-11-15 13:42 ` Rob Herring (?) @ 2021-11-18 6:27 ` James Lo -1 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-18 6:27 UTC (permalink / raw) To: Rob Herring Cc: devicetree, linux-arm-kernel, srv_heupstream, Stephen Boyd, Matthias Brugger, linux-kernel, Project_Global_Chrome_Upstream_Group, Hsin-Hsiung Wang, linux-mediatek, Rob Herring On Mon, 2021-11-15 at 07:42 -0600, Rob Herring wrote: > On Mon, 15 Nov 2021 12:20:28 +0800, James Lo wrote: > > This adds documentation for the SPMI controller found on Mediatek > > SoCs. > > > > Signed-off-by: James Lo <james.lo@mediatek.com> > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > > --- > > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 > > +++++++++++++++++++ > > 1 file changed, 76 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m > dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk- > pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], > [268603392, 256]] is too long > From schema: /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/spmi.yaml > /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk- > pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], > [268603392, 256]] is too long > From schema: /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > > doc reference errors (make refcheckdocs): > > See > https://urldefense.com/v3/__https://patchwork.ozlabs.org/patch/1555114__;!!CTRNKA9wMg0ARbw!0y2jw2KWA7dbbFP4B9bbycyT0PxWYrQ0KAUovVW46dRLqIfXI2maZrfVt1KSWIC1$ > > > This check can fail if there are any dependencies. The base for a > patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up > to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. > Dear Rob, Due to [2/4] depends on [1/4], Can I only send [1/4] first ? (After [1/4] is approved, and I will send [2/4][3/4][4/4] as V16.) Or, could you please give us other suggestion ? Many thanks ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller @ 2021-11-18 6:27 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-18 6:27 UTC (permalink / raw) To: Rob Herring Cc: devicetree, linux-arm-kernel, srv_heupstream, Stephen Boyd, Matthias Brugger, linux-kernel, Project_Global_Chrome_Upstream_Group, Hsin-Hsiung Wang, linux-mediatek, Rob Herring On Mon, 2021-11-15 at 07:42 -0600, Rob Herring wrote: > On Mon, 15 Nov 2021 12:20:28 +0800, James Lo wrote: > > This adds documentation for the SPMI controller found on Mediatek > > SoCs. > > > > Signed-off-by: James Lo <james.lo@mediatek.com> > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > > --- > > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 > > +++++++++++++++++++ > > 1 file changed, 76 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m > dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk- > pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], > [268603392, 256]] is too long > From schema: /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/spmi.yaml > /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk- > pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], > [268603392, 256]] is too long > From schema: /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > > doc reference errors (make refcheckdocs): > > See > https://urldefense.com/v3/__https://patchwork.ozlabs.org/patch/1555114__;!!CTRNKA9wMg0ARbw!0y2jw2KWA7dbbFP4B9bbycyT0PxWYrQ0KAUovVW46dRLqIfXI2maZrfVt1KSWIC1$ > > > This check can fail if there are any dependencies. The base for a > patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up > to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. > Dear Rob, Due to [2/4] depends on [1/4], Can I only send [1/4] first ? (After [1/4] is approved, and I will send [2/4][3/4][4/4] as V16.) Or, could you please give us other suggestion ? Many thanks _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller @ 2021-11-18 6:27 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-18 6:27 UTC (permalink / raw) To: Rob Herring Cc: devicetree, linux-arm-kernel, srv_heupstream, Stephen Boyd, Matthias Brugger, linux-kernel, Project_Global_Chrome_Upstream_Group, Hsin-Hsiung Wang, linux-mediatek, Rob Herring On Mon, 2021-11-15 at 07:42 -0600, Rob Herring wrote: > On Mon, 15 Nov 2021 12:20:28 +0800, James Lo wrote: > > This adds documentation for the SPMI controller found on Mediatek > > SoCs. > > > > Signed-off-by: James Lo <james.lo@mediatek.com> > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > > --- > > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 > > +++++++++++++++++++ > > 1 file changed, 76 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m > dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk- > pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], > [268603392, 256]] is too long > From schema: /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/spmi.yaml > /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk- > pmif.example.dt.yaml: spmi@10027000: reg: [[268595200, 3584], > [268603392, 256]] is too long > From schema: /builds/robherring/linux-dt- > review/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > > doc reference errors (make refcheckdocs): > > See > https://urldefense.com/v3/__https://patchwork.ozlabs.org/patch/1555114__;!!CTRNKA9wMg0ARbw!0y2jw2KWA7dbbFP4B9bbycyT0PxWYrQ0KAUovVW46dRLqIfXI2maZrfVt1KSWIC1$ > > > This check can fail if there are any dependencies. The base for a > patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up > to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. > Dear Rob, Due to [2/4] depends on [1/4], Can I only send [1/4] first ? (After [1/4] is approved, and I will send [2/4][3/4][4/4] as V16.) Or, could you please give us other suggestion ? Many thanks _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller 2021-11-15 4:20 ` James Lo (?) @ 2021-11-18 22:44 ` Rob Herring -1 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2021-11-18 22:44 UTC (permalink / raw) To: James Lo Cc: linux-mediatek, srv_heupstream, Hsin-Hsiung Wang, Stephen Boyd, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group, Matthias Brugger, Rob Herring, linux-kernel On Mon, 15 Nov 2021 12:20:28 +0800, James Lo wrote: > This adds documentation for the SPMI controller found on Mediatek SoCs. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++++++++++++++++++ > 1 file changed, 76 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller @ 2021-11-18 22:44 ` Rob Herring 0 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2021-11-18 22:44 UTC (permalink / raw) To: James Lo Cc: linux-mediatek, srv_heupstream, Hsin-Hsiung Wang, Stephen Boyd, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group, Matthias Brugger, Rob Herring, linux-kernel On Mon, 15 Nov 2021 12:20:28 +0800, James Lo wrote: > This adds documentation for the SPMI controller found on Mediatek SoCs. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++++++++++++++++++ > 1 file changed, 76 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > Reviewed-by: Rob Herring <robh@kernel.org> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller @ 2021-11-18 22:44 ` Rob Herring 0 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2021-11-18 22:44 UTC (permalink / raw) To: James Lo Cc: linux-mediatek, srv_heupstream, Hsin-Hsiung Wang, Stephen Boyd, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group, Matthias Brugger, Rob Herring, linux-kernel On Mon, 15 Nov 2021 12:20:28 +0800, James Lo wrote: > This adds documentation for the SPMI controller found on Mediatek SoCs. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > --- > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++++++++++++++++++ > 1 file changed, 76 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > Reviewed-by: Rob Herring <robh@kernel.org> _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v15 3/4] spmi: mediatek: Add support for MT6873/8192 2021-11-15 4:20 ` James Lo (?) @ 2021-11-15 4:20 ` James Lo -1 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group Add spmi support for MT6873/8192. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/spmi/Kconfig | 11 + drivers/spmi/Makefile | 1 + drivers/spmi/spmi-mtk-pmif.c | 454 +++++++++++++++++++++++++++++++++++ 3 files changed, 466 insertions(+) create mode 100644 drivers/spmi/spmi-mtk-pmif.c diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig index 2874b6c26028..737802046314 100644 --- a/drivers/spmi/Kconfig +++ b/drivers/spmi/Kconfig @@ -34,4 +34,15 @@ config SPMI_MSM_PMIC_ARB This is required for communicating with Qualcomm PMICs and other devices that have the SPMI interface. +config SPMI_MTK_PMIF + tristate "Mediatek SPMI Controller (PMIC Arbiter)" + depends on ARCH_MEDIATEK || COMPILE_TEST + help + If you say yes to this option, support will be included for the + built-in SPMI PMIC Arbiter interface on Mediatek family + processors. + + This is required for communicating with Mediatek PMICs and + other devices that have the SPMI interface. + endif diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile index 6e092e6f290c..9d974424c8c1 100644 --- a/drivers/spmi/Makefile +++ b/drivers/spmi/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_SPMI) += spmi.o obj-$(CONFIG_SPMI_HISI3670) += hisi-spmi-controller.o obj-$(CONFIG_SPMI_MSM_PMIC_ARB) += spmi-pmic-arb.o +obj-$(CONFIG_SPMI_MTK_PMIF) += spmi-mtk-pmif.o diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c new file mode 100644 index 000000000000..3283d0a5903c --- /dev/null +++ b/drivers/spmi/spmi-mtk-pmif.c @@ -0,0 +1,454 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2021 MediaTek Inc. + +#include <linux/clk.h> +#include <linux/iopoll.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/property.h> +#include <linux/spmi.h> + +#define SWINF_IDLE 0x00 +#define SWINF_WFVLDCLR 0x06 + +#define GET_SWINF(x) (((x) >> 1) & 0x7) + +#define PMIF_CMD_REG_0 0 +#define PMIF_CMD_REG 1 +#define PMIF_CMD_EXT_REG 2 +#define PMIF_CMD_EXT_REG_LONG 3 + +#define PMIF_DELAY_US 10 +#define PMIF_TIMEOUT_US (10 * 1000) + +#define PMIF_CHAN_OFFSET 0x5 + +#define PMIF_MAX_CLKS 3 + +#define SPMI_OP_ST_BUSY 1 + +struct ch_reg { + u32 ch_sta; + u32 wdata; + u32 rdata; + u32 ch_send; + u32 ch_rdy; +}; + +struct pmif_data { + const u32 *regs; + const u32 *spmimst_regs; + u32 soc_chan; +}; + +struct pmif { + void __iomem *base; + void __iomem *spmimst_base; + struct ch_reg chan; + struct clk_bulk_data clks[PMIF_MAX_CLKS]; + size_t nclks; + const struct pmif_data *data; +}; + +static const char * const pmif_clock_names[] = { + "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux", +}; + +enum pmif_regs { + PMIF_INIT_DONE, + PMIF_INF_EN, + PMIF_ARB_EN, + PMIF_CMDISSUE_EN, + PMIF_TIMER_CTRL, + PMIF_SPI_MODE_CTRL, + PMIF_IRQ_EVENT_EN_0, + PMIF_IRQ_FLAG_0, + PMIF_IRQ_CLR_0, + PMIF_IRQ_EVENT_EN_1, + PMIF_IRQ_FLAG_1, + PMIF_IRQ_CLR_1, + PMIF_IRQ_EVENT_EN_2, + PMIF_IRQ_FLAG_2, + PMIF_IRQ_CLR_2, + PMIF_IRQ_EVENT_EN_3, + PMIF_IRQ_FLAG_3, + PMIF_IRQ_CLR_3, + PMIF_IRQ_EVENT_EN_4, + PMIF_IRQ_FLAG_4, + PMIF_IRQ_CLR_4, + PMIF_WDT_EVENT_EN_0, + PMIF_WDT_FLAG_0, + PMIF_WDT_EVENT_EN_1, + PMIF_WDT_FLAG_1, + PMIF_SWINF_0_STA, + PMIF_SWINF_0_WDATA_31_0, + PMIF_SWINF_0_RDATA_31_0, + PMIF_SWINF_0_ACC, + PMIF_SWINF_0_VLD_CLR, + PMIF_SWINF_1_STA, + PMIF_SWINF_1_WDATA_31_0, + PMIF_SWINF_1_RDATA_31_0, + PMIF_SWINF_1_ACC, + PMIF_SWINF_1_VLD_CLR, + PMIF_SWINF_2_STA, + PMIF_SWINF_2_WDATA_31_0, + PMIF_SWINF_2_RDATA_31_0, + PMIF_SWINF_2_ACC, + PMIF_SWINF_2_VLD_CLR, + PMIF_SWINF_3_STA, + PMIF_SWINF_3_WDATA_31_0, + PMIF_SWINF_3_RDATA_31_0, + PMIF_SWINF_3_ACC, + PMIF_SWINF_3_VLD_CLR, +}; + +static const u32 mt6873_regs[] = { + [PMIF_INIT_DONE] = 0x0000, + [PMIF_INF_EN] = 0x0024, + [PMIF_ARB_EN] = 0x0150, + [PMIF_CMDISSUE_EN] = 0x03B4, + [PMIF_TIMER_CTRL] = 0x03E0, + [PMIF_SPI_MODE_CTRL] = 0x0400, + [PMIF_IRQ_EVENT_EN_0] = 0x0418, + [PMIF_IRQ_FLAG_0] = 0x0420, + [PMIF_IRQ_CLR_0] = 0x0424, + [PMIF_IRQ_EVENT_EN_1] = 0x0428, + [PMIF_IRQ_FLAG_1] = 0x0430, + [PMIF_IRQ_CLR_1] = 0x0434, + [PMIF_IRQ_EVENT_EN_2] = 0x0438, + [PMIF_IRQ_FLAG_2] = 0x0440, + [PMIF_IRQ_CLR_2] = 0x0444, + [PMIF_IRQ_EVENT_EN_3] = 0x0448, + [PMIF_IRQ_FLAG_3] = 0x0450, + [PMIF_IRQ_CLR_3] = 0x0454, + [PMIF_IRQ_EVENT_EN_4] = 0x0458, + [PMIF_IRQ_FLAG_4] = 0x0460, + [PMIF_IRQ_CLR_4] = 0x0464, + [PMIF_WDT_EVENT_EN_0] = 0x046C, + [PMIF_WDT_FLAG_0] = 0x0470, + [PMIF_WDT_EVENT_EN_1] = 0x0474, + [PMIF_WDT_FLAG_1] = 0x0478, + [PMIF_SWINF_0_ACC] = 0x0C00, + [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, + [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, + [PMIF_SWINF_0_VLD_CLR] = 0x0C24, + [PMIF_SWINF_0_STA] = 0x0C28, + [PMIF_SWINF_1_ACC] = 0x0C40, + [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, + [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, + [PMIF_SWINF_1_VLD_CLR] = 0x0C64, + [PMIF_SWINF_1_STA] = 0x0C68, + [PMIF_SWINF_2_ACC] = 0x0C80, + [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, + [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, + [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, + [PMIF_SWINF_2_STA] = 0x0CA8, + [PMIF_SWINF_3_ACC] = 0x0CC0, + [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, + [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, + [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, + [PMIF_SWINF_3_STA] = 0x0CE8, +}; + +enum spmi_regs { + SPMI_OP_ST_CTRL, + SPMI_GRP_ID_EN, + SPMI_OP_ST_STA, + SPMI_MST_SAMPL, + SPMI_MST_REQ_EN, + SPMI_REC_CTRL, + SPMI_REC0, + SPMI_REC1, + SPMI_REC2, + SPMI_REC3, + SPMI_REC4, + SPMI_MST_DBG, +}; + +static const u32 mt6873_spmi_regs[] = { + [SPMI_OP_ST_CTRL] = 0x0000, + [SPMI_GRP_ID_EN] = 0x0004, + [SPMI_OP_ST_STA] = 0x0008, + [SPMI_MST_SAMPL] = 0x000c, + [SPMI_MST_REQ_EN] = 0x0010, + [SPMI_REC_CTRL] = 0x0040, + [SPMI_REC0] = 0x0044, + [SPMI_REC1] = 0x0048, + [SPMI_REC2] = 0x004c, + [SPMI_REC3] = 0x0050, + [SPMI_REC4] = 0x0054, + [SPMI_MST_DBG] = 0x00fc, +}; + +static u32 pmif_readl(struct pmif *arb, enum pmif_regs reg) +{ + return readl(arb->base + arb->data->regs[reg]); +} + +static void pmif_writel(struct pmif *arb, u32 val, enum pmif_regs reg) +{ + writel(val, arb->base + arb->data->regs[reg]); +} + +static void mtk_spmi_writel(struct pmif *arb, u32 val, enum spmi_regs reg) +{ + writel(val, arb->spmimst_base + arb->data->spmimst_regs[reg]); +} + +static bool pmif_is_fsm_vldclr(struct pmif *arb) +{ + u32 reg_rdata; + + reg_rdata = pmif_readl(arb, arb->chan.ch_sta); + + return GET_SWINF(reg_rdata) == SWINF_WFVLDCLR; +} + +static int pmif_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid) +{ + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + u32 rdata, cmd; + int ret; + + /* Check the opcode */ + if (opc < SPMI_CMD_RESET || opc > SPMI_CMD_WAKEUP) + return -EINVAL; + + cmd = opc - SPMI_CMD_RESET; + + mtk_spmi_writel(arb, (cmd << 0x4) | sid, SPMI_OP_ST_CTRL); + ret = readl_poll_timeout_atomic(arb->spmimst_base + arb->data->spmimst_regs[SPMI_OP_ST_STA], + rdata, (rdata & SPMI_OP_ST_BUSY) == SPMI_OP_ST_BUSY, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) + dev_err(&ctrl->dev, "timeout, err = %d\n", ret); + + return ret; +} + +static int pmif_spmi_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, + u16 addr, u8 *buf, size_t len) +{ + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + struct ch_reg *inf_reg; + int ret; + u32 data, cmd; + + /* Check for argument validation. */ + if (sid & ~0xf) { + dev_err(&ctrl->dev, "exceed the max slv id\n"); + return -EINVAL; + } + + if (len > 4) { + dev_err(&ctrl->dev, "pmif supports 1..4 bytes per trans, but:%zu requested", len); + + return -EINVAL; + } + + if (opc >= 0x60 && opc <= 0x7f) + opc = PMIF_CMD_REG; + else if ((opc >= 0x20 && opc <= 0x2f) || (opc >= 0x38 && opc <= 0x3f)) + opc = PMIF_CMD_EXT_REG_LONG; + else + return -EINVAL; + + /* Wait for Software Interface FSM state to be IDLE. */ + inf_reg = &arb->chan; + ret = readl_poll_timeout_atomic(arb->base + arb->data->regs[inf_reg->ch_sta], + data, GET_SWINF(data) == SWINF_IDLE, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) { + /* set channel ready if the data has transferred */ + if (pmif_is_fsm_vldclr(arb)) + pmif_writel(arb, 1, inf_reg->ch_rdy); + dev_err(&ctrl->dev, "failed to wait for SWINF_IDLE\n"); + return ret; + } + + /* Send the command. */ + cmd = (opc << 30) | (sid << 24) | ((len - 1) << 16) | addr; + pmif_writel(arb, cmd, inf_reg->ch_send); + + /* + * Wait for Software Interface FSM state to be WFVLDCLR, + * read the data and clear the valid flag. + */ + ret = readl_poll_timeout_atomic(arb->base + arb->data->regs[inf_reg->ch_sta], + data, GET_SWINF(data) == SWINF_WFVLDCLR, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) { + dev_err(&ctrl->dev, "failed to wait for SWINF_WFVLDCLR\n"); + return ret; + } + + data = pmif_readl(arb, inf_reg->rdata); + memcpy(buf, &data, len); + pmif_writel(arb, 1, inf_reg->ch_rdy); + + return 0; +} + +static int pmif_spmi_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, + u16 addr, const u8 *buf, size_t len) +{ + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + struct ch_reg *inf_reg; + int ret; + u32 data, cmd; + + if (len > 4) { + dev_err(&ctrl->dev, "pmif supports 1..4 bytes per trans, but:%zu requested", len); + + return -EINVAL; + } + + /* Check the opcode */ + if (opc >= 0x40 && opc <= 0x5F) + opc = PMIF_CMD_REG; + else if ((opc <= 0xF) || (opc >= 0x30 && opc <= 0x37)) + opc = PMIF_CMD_EXT_REG_LONG; + else if (opc >= 0x80) + opc = PMIF_CMD_REG_0; + else + return -EINVAL; + + /* Wait for Software Interface FSM state to be IDLE. */ + inf_reg = &arb->chan; + ret = readl_poll_timeout_atomic(arb->base + arb->data->regs[inf_reg->ch_sta], + data, GET_SWINF(data) == SWINF_IDLE, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) { + /* set channel ready if the data has transferred */ + if (pmif_is_fsm_vldclr(arb)) + pmif_writel(arb, 1, inf_reg->ch_rdy); + dev_err(&ctrl->dev, "failed to wait for SWINF_IDLE\n"); + return ret; + } + + /* Set the write data. */ + memcpy(&data, buf, len); + pmif_writel(arb, data, inf_reg->wdata); + + /* Send the command. */ + cmd = (opc << 30) | BIT(29) | (sid << 24) | ((len - 1) << 16) | addr; + pmif_writel(arb, cmd, inf_reg->ch_send); + + return 0; +} + +static const struct pmif_data mt6873_pmif_arb = { + .regs = mt6873_regs, + .spmimst_regs = mt6873_spmi_regs, + .soc_chan = 2, +}; + +static int mtk_spmi_probe(struct platform_device *pdev) +{ + struct pmif *arb; + struct spmi_controller *ctrl; + int err, i; + u32 chan_offset; + + ctrl = spmi_controller_alloc(&pdev->dev, sizeof(*arb)); + if (!ctrl) + return -ENOMEM; + + arb = spmi_controller_get_drvdata(ctrl); + arb->data = device_get_match_data(&pdev->dev); + if (!arb->data) { + err = -EINVAL; + dev_err(&pdev->dev, "Cannot get drv_data\n"); + goto err_put_ctrl; + } + + arb->base = devm_platform_ioremap_resource_byname(pdev, "pmif"); + if (IS_ERR(arb->base)) { + err = PTR_ERR(arb->base); + goto err_put_ctrl; + } + + arb->spmimst_base = devm_platform_ioremap_resource_byname(pdev, "spmimst"); + if (IS_ERR(arb->spmimst_base)) { + err = PTR_ERR(arb->spmimst_base); + goto err_put_ctrl; + } + + arb->nclks = ARRAY_SIZE(pmif_clock_names); + for (i = 0; i < arb->nclks; i++) + arb->clks[i].id = pmif_clock_names[i]; + + err = devm_clk_bulk_get(&pdev->dev, arb->nclks, arb->clks); + if (err) { + dev_err(&pdev->dev, "Failed to get clocks: %d\n", err); + goto err_put_ctrl; + } + + err = clk_bulk_prepare_enable(arb->nclks, arb->clks); + if (err) { + dev_err(&pdev->dev, "Failed to enable clocks: %d\n", err); + goto err_put_ctrl; + } + + ctrl->cmd = pmif_arb_cmd; + ctrl->read_cmd = pmif_spmi_read_cmd; + ctrl->write_cmd = pmif_spmi_write_cmd; + + chan_offset = PMIF_CHAN_OFFSET * arb->data->soc_chan; + arb->chan.ch_sta = PMIF_SWINF_0_STA + chan_offset; + arb->chan.wdata = PMIF_SWINF_0_WDATA_31_0 + chan_offset; + arb->chan.rdata = PMIF_SWINF_0_RDATA_31_0 + chan_offset; + arb->chan.ch_send = PMIF_SWINF_0_ACC + chan_offset; + arb->chan.ch_rdy = PMIF_SWINF_0_VLD_CLR + chan_offset; + + platform_set_drvdata(pdev, ctrl); + + err = spmi_controller_add(ctrl); + if (err) + goto err_domain_remove; + + return 0; + +err_domain_remove: + clk_bulk_disable_unprepare(arb->nclks, arb->clks); +err_put_ctrl: + spmi_controller_put(ctrl); + return err; +} + +static int mtk_spmi_remove(struct platform_device *pdev) +{ + struct spmi_controller *ctrl = platform_get_drvdata(pdev); + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + + clk_bulk_disable_unprepare(arb->nclks, arb->clks); + spmi_controller_remove(ctrl); + spmi_controller_put(ctrl); + return 0; +} + +static const struct of_device_id mtk_spmi_match_table[] = { + { + .compatible = "mediatek,mt6873-spmi", + .data = &mt6873_pmif_arb, + }, { + /* sentinel */ + }, +}; +MODULE_DEVICE_TABLE(of, mtk_spmi_match_table); + +static struct platform_driver mtk_spmi_driver = { + .driver = { + .name = "spmi-mtk", + .of_match_table = of_match_ptr(mtk_spmi_match_table), + }, + .probe = mtk_spmi_probe, + .remove = mtk_spmi_remove, +}; +module_platform_driver(mtk_spmi_driver); + +MODULE_AUTHOR("Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>"); +MODULE_DESCRIPTION("MediaTek SPMI Driver"); +MODULE_LICENSE("GPL"); -- 2.18.0 ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 3/4] spmi: mediatek: Add support for MT6873/8192 @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group Add spmi support for MT6873/8192. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/spmi/Kconfig | 11 + drivers/spmi/Makefile | 1 + drivers/spmi/spmi-mtk-pmif.c | 454 +++++++++++++++++++++++++++++++++++ 3 files changed, 466 insertions(+) create mode 100644 drivers/spmi/spmi-mtk-pmif.c diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig index 2874b6c26028..737802046314 100644 --- a/drivers/spmi/Kconfig +++ b/drivers/spmi/Kconfig @@ -34,4 +34,15 @@ config SPMI_MSM_PMIC_ARB This is required for communicating with Qualcomm PMICs and other devices that have the SPMI interface. +config SPMI_MTK_PMIF + tristate "Mediatek SPMI Controller (PMIC Arbiter)" + depends on ARCH_MEDIATEK || COMPILE_TEST + help + If you say yes to this option, support will be included for the + built-in SPMI PMIC Arbiter interface on Mediatek family + processors. + + This is required for communicating with Mediatek PMICs and + other devices that have the SPMI interface. + endif diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile index 6e092e6f290c..9d974424c8c1 100644 --- a/drivers/spmi/Makefile +++ b/drivers/spmi/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_SPMI) += spmi.o obj-$(CONFIG_SPMI_HISI3670) += hisi-spmi-controller.o obj-$(CONFIG_SPMI_MSM_PMIC_ARB) += spmi-pmic-arb.o +obj-$(CONFIG_SPMI_MTK_PMIF) += spmi-mtk-pmif.o diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c new file mode 100644 index 000000000000..3283d0a5903c --- /dev/null +++ b/drivers/spmi/spmi-mtk-pmif.c @@ -0,0 +1,454 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2021 MediaTek Inc. + +#include <linux/clk.h> +#include <linux/iopoll.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/property.h> +#include <linux/spmi.h> + +#define SWINF_IDLE 0x00 +#define SWINF_WFVLDCLR 0x06 + +#define GET_SWINF(x) (((x) >> 1) & 0x7) + +#define PMIF_CMD_REG_0 0 +#define PMIF_CMD_REG 1 +#define PMIF_CMD_EXT_REG 2 +#define PMIF_CMD_EXT_REG_LONG 3 + +#define PMIF_DELAY_US 10 +#define PMIF_TIMEOUT_US (10 * 1000) + +#define PMIF_CHAN_OFFSET 0x5 + +#define PMIF_MAX_CLKS 3 + +#define SPMI_OP_ST_BUSY 1 + +struct ch_reg { + u32 ch_sta; + u32 wdata; + u32 rdata; + u32 ch_send; + u32 ch_rdy; +}; + +struct pmif_data { + const u32 *regs; + const u32 *spmimst_regs; + u32 soc_chan; +}; + +struct pmif { + void __iomem *base; + void __iomem *spmimst_base; + struct ch_reg chan; + struct clk_bulk_data clks[PMIF_MAX_CLKS]; + size_t nclks; + const struct pmif_data *data; +}; + +static const char * const pmif_clock_names[] = { + "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux", +}; + +enum pmif_regs { + PMIF_INIT_DONE, + PMIF_INF_EN, + PMIF_ARB_EN, + PMIF_CMDISSUE_EN, + PMIF_TIMER_CTRL, + PMIF_SPI_MODE_CTRL, + PMIF_IRQ_EVENT_EN_0, + PMIF_IRQ_FLAG_0, + PMIF_IRQ_CLR_0, + PMIF_IRQ_EVENT_EN_1, + PMIF_IRQ_FLAG_1, + PMIF_IRQ_CLR_1, + PMIF_IRQ_EVENT_EN_2, + PMIF_IRQ_FLAG_2, + PMIF_IRQ_CLR_2, + PMIF_IRQ_EVENT_EN_3, + PMIF_IRQ_FLAG_3, + PMIF_IRQ_CLR_3, + PMIF_IRQ_EVENT_EN_4, + PMIF_IRQ_FLAG_4, + PMIF_IRQ_CLR_4, + PMIF_WDT_EVENT_EN_0, + PMIF_WDT_FLAG_0, + PMIF_WDT_EVENT_EN_1, + PMIF_WDT_FLAG_1, + PMIF_SWINF_0_STA, + PMIF_SWINF_0_WDATA_31_0, + PMIF_SWINF_0_RDATA_31_0, + PMIF_SWINF_0_ACC, + PMIF_SWINF_0_VLD_CLR, + PMIF_SWINF_1_STA, + PMIF_SWINF_1_WDATA_31_0, + PMIF_SWINF_1_RDATA_31_0, + PMIF_SWINF_1_ACC, + PMIF_SWINF_1_VLD_CLR, + PMIF_SWINF_2_STA, + PMIF_SWINF_2_WDATA_31_0, + PMIF_SWINF_2_RDATA_31_0, + PMIF_SWINF_2_ACC, + PMIF_SWINF_2_VLD_CLR, + PMIF_SWINF_3_STA, + PMIF_SWINF_3_WDATA_31_0, + PMIF_SWINF_3_RDATA_31_0, + PMIF_SWINF_3_ACC, + PMIF_SWINF_3_VLD_CLR, +}; + +static const u32 mt6873_regs[] = { + [PMIF_INIT_DONE] = 0x0000, + [PMIF_INF_EN] = 0x0024, + [PMIF_ARB_EN] = 0x0150, + [PMIF_CMDISSUE_EN] = 0x03B4, + [PMIF_TIMER_CTRL] = 0x03E0, + [PMIF_SPI_MODE_CTRL] = 0x0400, + [PMIF_IRQ_EVENT_EN_0] = 0x0418, + [PMIF_IRQ_FLAG_0] = 0x0420, + [PMIF_IRQ_CLR_0] = 0x0424, + [PMIF_IRQ_EVENT_EN_1] = 0x0428, + [PMIF_IRQ_FLAG_1] = 0x0430, + [PMIF_IRQ_CLR_1] = 0x0434, + [PMIF_IRQ_EVENT_EN_2] = 0x0438, + [PMIF_IRQ_FLAG_2] = 0x0440, + [PMIF_IRQ_CLR_2] = 0x0444, + [PMIF_IRQ_EVENT_EN_3] = 0x0448, + [PMIF_IRQ_FLAG_3] = 0x0450, + [PMIF_IRQ_CLR_3] = 0x0454, + [PMIF_IRQ_EVENT_EN_4] = 0x0458, + [PMIF_IRQ_FLAG_4] = 0x0460, + [PMIF_IRQ_CLR_4] = 0x0464, + [PMIF_WDT_EVENT_EN_0] = 0x046C, + [PMIF_WDT_FLAG_0] = 0x0470, + [PMIF_WDT_EVENT_EN_1] = 0x0474, + [PMIF_WDT_FLAG_1] = 0x0478, + [PMIF_SWINF_0_ACC] = 0x0C00, + [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, + [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, + [PMIF_SWINF_0_VLD_CLR] = 0x0C24, + [PMIF_SWINF_0_STA] = 0x0C28, + [PMIF_SWINF_1_ACC] = 0x0C40, + [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, + [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, + [PMIF_SWINF_1_VLD_CLR] = 0x0C64, + [PMIF_SWINF_1_STA] = 0x0C68, + [PMIF_SWINF_2_ACC] = 0x0C80, + [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, + [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, + [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, + [PMIF_SWINF_2_STA] = 0x0CA8, + [PMIF_SWINF_3_ACC] = 0x0CC0, + [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, + [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, + [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, + [PMIF_SWINF_3_STA] = 0x0CE8, +}; + +enum spmi_regs { + SPMI_OP_ST_CTRL, + SPMI_GRP_ID_EN, + SPMI_OP_ST_STA, + SPMI_MST_SAMPL, + SPMI_MST_REQ_EN, + SPMI_REC_CTRL, + SPMI_REC0, + SPMI_REC1, + SPMI_REC2, + SPMI_REC3, + SPMI_REC4, + SPMI_MST_DBG, +}; + +static const u32 mt6873_spmi_regs[] = { + [SPMI_OP_ST_CTRL] = 0x0000, + [SPMI_GRP_ID_EN] = 0x0004, + [SPMI_OP_ST_STA] = 0x0008, + [SPMI_MST_SAMPL] = 0x000c, + [SPMI_MST_REQ_EN] = 0x0010, + [SPMI_REC_CTRL] = 0x0040, + [SPMI_REC0] = 0x0044, + [SPMI_REC1] = 0x0048, + [SPMI_REC2] = 0x004c, + [SPMI_REC3] = 0x0050, + [SPMI_REC4] = 0x0054, + [SPMI_MST_DBG] = 0x00fc, +}; + +static u32 pmif_readl(struct pmif *arb, enum pmif_regs reg) +{ + return readl(arb->base + arb->data->regs[reg]); +} + +static void pmif_writel(struct pmif *arb, u32 val, enum pmif_regs reg) +{ + writel(val, arb->base + arb->data->regs[reg]); +} + +static void mtk_spmi_writel(struct pmif *arb, u32 val, enum spmi_regs reg) +{ + writel(val, arb->spmimst_base + arb->data->spmimst_regs[reg]); +} + +static bool pmif_is_fsm_vldclr(struct pmif *arb) +{ + u32 reg_rdata; + + reg_rdata = pmif_readl(arb, arb->chan.ch_sta); + + return GET_SWINF(reg_rdata) == SWINF_WFVLDCLR; +} + +static int pmif_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid) +{ + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + u32 rdata, cmd; + int ret; + + /* Check the opcode */ + if (opc < SPMI_CMD_RESET || opc > SPMI_CMD_WAKEUP) + return -EINVAL; + + cmd = opc - SPMI_CMD_RESET; + + mtk_spmi_writel(arb, (cmd << 0x4) | sid, SPMI_OP_ST_CTRL); + ret = readl_poll_timeout_atomic(arb->spmimst_base + arb->data->spmimst_regs[SPMI_OP_ST_STA], + rdata, (rdata & SPMI_OP_ST_BUSY) == SPMI_OP_ST_BUSY, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) + dev_err(&ctrl->dev, "timeout, err = %d\n", ret); + + return ret; +} + +static int pmif_spmi_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, + u16 addr, u8 *buf, size_t len) +{ + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + struct ch_reg *inf_reg; + int ret; + u32 data, cmd; + + /* Check for argument validation. */ + if (sid & ~0xf) { + dev_err(&ctrl->dev, "exceed the max slv id\n"); + return -EINVAL; + } + + if (len > 4) { + dev_err(&ctrl->dev, "pmif supports 1..4 bytes per trans, but:%zu requested", len); + + return -EINVAL; + } + + if (opc >= 0x60 && opc <= 0x7f) + opc = PMIF_CMD_REG; + else if ((opc >= 0x20 && opc <= 0x2f) || (opc >= 0x38 && opc <= 0x3f)) + opc = PMIF_CMD_EXT_REG_LONG; + else + return -EINVAL; + + /* Wait for Software Interface FSM state to be IDLE. */ + inf_reg = &arb->chan; + ret = readl_poll_timeout_atomic(arb->base + arb->data->regs[inf_reg->ch_sta], + data, GET_SWINF(data) == SWINF_IDLE, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) { + /* set channel ready if the data has transferred */ + if (pmif_is_fsm_vldclr(arb)) + pmif_writel(arb, 1, inf_reg->ch_rdy); + dev_err(&ctrl->dev, "failed to wait for SWINF_IDLE\n"); + return ret; + } + + /* Send the command. */ + cmd = (opc << 30) | (sid << 24) | ((len - 1) << 16) | addr; + pmif_writel(arb, cmd, inf_reg->ch_send); + + /* + * Wait for Software Interface FSM state to be WFVLDCLR, + * read the data and clear the valid flag. + */ + ret = readl_poll_timeout_atomic(arb->base + arb->data->regs[inf_reg->ch_sta], + data, GET_SWINF(data) == SWINF_WFVLDCLR, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) { + dev_err(&ctrl->dev, "failed to wait for SWINF_WFVLDCLR\n"); + return ret; + } + + data = pmif_readl(arb, inf_reg->rdata); + memcpy(buf, &data, len); + pmif_writel(arb, 1, inf_reg->ch_rdy); + + return 0; +} + +static int pmif_spmi_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, + u16 addr, const u8 *buf, size_t len) +{ + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + struct ch_reg *inf_reg; + int ret; + u32 data, cmd; + + if (len > 4) { + dev_err(&ctrl->dev, "pmif supports 1..4 bytes per trans, but:%zu requested", len); + + return -EINVAL; + } + + /* Check the opcode */ + if (opc >= 0x40 && opc <= 0x5F) + opc = PMIF_CMD_REG; + else if ((opc <= 0xF) || (opc >= 0x30 && opc <= 0x37)) + opc = PMIF_CMD_EXT_REG_LONG; + else if (opc >= 0x80) + opc = PMIF_CMD_REG_0; + else + return -EINVAL; + + /* Wait for Software Interface FSM state to be IDLE. */ + inf_reg = &arb->chan; + ret = readl_poll_timeout_atomic(arb->base + arb->data->regs[inf_reg->ch_sta], + data, GET_SWINF(data) == SWINF_IDLE, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) { + /* set channel ready if the data has transferred */ + if (pmif_is_fsm_vldclr(arb)) + pmif_writel(arb, 1, inf_reg->ch_rdy); + dev_err(&ctrl->dev, "failed to wait for SWINF_IDLE\n"); + return ret; + } + + /* Set the write data. */ + memcpy(&data, buf, len); + pmif_writel(arb, data, inf_reg->wdata); + + /* Send the command. */ + cmd = (opc << 30) | BIT(29) | (sid << 24) | ((len - 1) << 16) | addr; + pmif_writel(arb, cmd, inf_reg->ch_send); + + return 0; +} + +static const struct pmif_data mt6873_pmif_arb = { + .regs = mt6873_regs, + .spmimst_regs = mt6873_spmi_regs, + .soc_chan = 2, +}; + +static int mtk_spmi_probe(struct platform_device *pdev) +{ + struct pmif *arb; + struct spmi_controller *ctrl; + int err, i; + u32 chan_offset; + + ctrl = spmi_controller_alloc(&pdev->dev, sizeof(*arb)); + if (!ctrl) + return -ENOMEM; + + arb = spmi_controller_get_drvdata(ctrl); + arb->data = device_get_match_data(&pdev->dev); + if (!arb->data) { + err = -EINVAL; + dev_err(&pdev->dev, "Cannot get drv_data\n"); + goto err_put_ctrl; + } + + arb->base = devm_platform_ioremap_resource_byname(pdev, "pmif"); + if (IS_ERR(arb->base)) { + err = PTR_ERR(arb->base); + goto err_put_ctrl; + } + + arb->spmimst_base = devm_platform_ioremap_resource_byname(pdev, "spmimst"); + if (IS_ERR(arb->spmimst_base)) { + err = PTR_ERR(arb->spmimst_base); + goto err_put_ctrl; + } + + arb->nclks = ARRAY_SIZE(pmif_clock_names); + for (i = 0; i < arb->nclks; i++) + arb->clks[i].id = pmif_clock_names[i]; + + err = devm_clk_bulk_get(&pdev->dev, arb->nclks, arb->clks); + if (err) { + dev_err(&pdev->dev, "Failed to get clocks: %d\n", err); + goto err_put_ctrl; + } + + err = clk_bulk_prepare_enable(arb->nclks, arb->clks); + if (err) { + dev_err(&pdev->dev, "Failed to enable clocks: %d\n", err); + goto err_put_ctrl; + } + + ctrl->cmd = pmif_arb_cmd; + ctrl->read_cmd = pmif_spmi_read_cmd; + ctrl->write_cmd = pmif_spmi_write_cmd; + + chan_offset = PMIF_CHAN_OFFSET * arb->data->soc_chan; + arb->chan.ch_sta = PMIF_SWINF_0_STA + chan_offset; + arb->chan.wdata = PMIF_SWINF_0_WDATA_31_0 + chan_offset; + arb->chan.rdata = PMIF_SWINF_0_RDATA_31_0 + chan_offset; + arb->chan.ch_send = PMIF_SWINF_0_ACC + chan_offset; + arb->chan.ch_rdy = PMIF_SWINF_0_VLD_CLR + chan_offset; + + platform_set_drvdata(pdev, ctrl); + + err = spmi_controller_add(ctrl); + if (err) + goto err_domain_remove; + + return 0; + +err_domain_remove: + clk_bulk_disable_unprepare(arb->nclks, arb->clks); +err_put_ctrl: + spmi_controller_put(ctrl); + return err; +} + +static int mtk_spmi_remove(struct platform_device *pdev) +{ + struct spmi_controller *ctrl = platform_get_drvdata(pdev); + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + + clk_bulk_disable_unprepare(arb->nclks, arb->clks); + spmi_controller_remove(ctrl); + spmi_controller_put(ctrl); + return 0; +} + +static const struct of_device_id mtk_spmi_match_table[] = { + { + .compatible = "mediatek,mt6873-spmi", + .data = &mt6873_pmif_arb, + }, { + /* sentinel */ + }, +}; +MODULE_DEVICE_TABLE(of, mtk_spmi_match_table); + +static struct platform_driver mtk_spmi_driver = { + .driver = { + .name = "spmi-mtk", + .of_match_table = of_match_ptr(mtk_spmi_match_table), + }, + .probe = mtk_spmi_probe, + .remove = mtk_spmi_remove, +}; +module_platform_driver(mtk_spmi_driver); + +MODULE_AUTHOR("Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>"); +MODULE_DESCRIPTION("MediaTek SPMI Driver"); +MODULE_LICENSE("GPL"); -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 3/4] spmi: mediatek: Add support for MT6873/8192 @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group Add spmi support for MT6873/8192. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/spmi/Kconfig | 11 + drivers/spmi/Makefile | 1 + drivers/spmi/spmi-mtk-pmif.c | 454 +++++++++++++++++++++++++++++++++++ 3 files changed, 466 insertions(+) create mode 100644 drivers/spmi/spmi-mtk-pmif.c diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig index 2874b6c26028..737802046314 100644 --- a/drivers/spmi/Kconfig +++ b/drivers/spmi/Kconfig @@ -34,4 +34,15 @@ config SPMI_MSM_PMIC_ARB This is required for communicating with Qualcomm PMICs and other devices that have the SPMI interface. +config SPMI_MTK_PMIF + tristate "Mediatek SPMI Controller (PMIC Arbiter)" + depends on ARCH_MEDIATEK || COMPILE_TEST + help + If you say yes to this option, support will be included for the + built-in SPMI PMIC Arbiter interface on Mediatek family + processors. + + This is required for communicating with Mediatek PMICs and + other devices that have the SPMI interface. + endif diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile index 6e092e6f290c..9d974424c8c1 100644 --- a/drivers/spmi/Makefile +++ b/drivers/spmi/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_SPMI) += spmi.o obj-$(CONFIG_SPMI_HISI3670) += hisi-spmi-controller.o obj-$(CONFIG_SPMI_MSM_PMIC_ARB) += spmi-pmic-arb.o +obj-$(CONFIG_SPMI_MTK_PMIF) += spmi-mtk-pmif.o diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c new file mode 100644 index 000000000000..3283d0a5903c --- /dev/null +++ b/drivers/spmi/spmi-mtk-pmif.c @@ -0,0 +1,454 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2021 MediaTek Inc. + +#include <linux/clk.h> +#include <linux/iopoll.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/property.h> +#include <linux/spmi.h> + +#define SWINF_IDLE 0x00 +#define SWINF_WFVLDCLR 0x06 + +#define GET_SWINF(x) (((x) >> 1) & 0x7) + +#define PMIF_CMD_REG_0 0 +#define PMIF_CMD_REG 1 +#define PMIF_CMD_EXT_REG 2 +#define PMIF_CMD_EXT_REG_LONG 3 + +#define PMIF_DELAY_US 10 +#define PMIF_TIMEOUT_US (10 * 1000) + +#define PMIF_CHAN_OFFSET 0x5 + +#define PMIF_MAX_CLKS 3 + +#define SPMI_OP_ST_BUSY 1 + +struct ch_reg { + u32 ch_sta; + u32 wdata; + u32 rdata; + u32 ch_send; + u32 ch_rdy; +}; + +struct pmif_data { + const u32 *regs; + const u32 *spmimst_regs; + u32 soc_chan; +}; + +struct pmif { + void __iomem *base; + void __iomem *spmimst_base; + struct ch_reg chan; + struct clk_bulk_data clks[PMIF_MAX_CLKS]; + size_t nclks; + const struct pmif_data *data; +}; + +static const char * const pmif_clock_names[] = { + "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux", +}; + +enum pmif_regs { + PMIF_INIT_DONE, + PMIF_INF_EN, + PMIF_ARB_EN, + PMIF_CMDISSUE_EN, + PMIF_TIMER_CTRL, + PMIF_SPI_MODE_CTRL, + PMIF_IRQ_EVENT_EN_0, + PMIF_IRQ_FLAG_0, + PMIF_IRQ_CLR_0, + PMIF_IRQ_EVENT_EN_1, + PMIF_IRQ_FLAG_1, + PMIF_IRQ_CLR_1, + PMIF_IRQ_EVENT_EN_2, + PMIF_IRQ_FLAG_2, + PMIF_IRQ_CLR_2, + PMIF_IRQ_EVENT_EN_3, + PMIF_IRQ_FLAG_3, + PMIF_IRQ_CLR_3, + PMIF_IRQ_EVENT_EN_4, + PMIF_IRQ_FLAG_4, + PMIF_IRQ_CLR_4, + PMIF_WDT_EVENT_EN_0, + PMIF_WDT_FLAG_0, + PMIF_WDT_EVENT_EN_1, + PMIF_WDT_FLAG_1, + PMIF_SWINF_0_STA, + PMIF_SWINF_0_WDATA_31_0, + PMIF_SWINF_0_RDATA_31_0, + PMIF_SWINF_0_ACC, + PMIF_SWINF_0_VLD_CLR, + PMIF_SWINF_1_STA, + PMIF_SWINF_1_WDATA_31_0, + PMIF_SWINF_1_RDATA_31_0, + PMIF_SWINF_1_ACC, + PMIF_SWINF_1_VLD_CLR, + PMIF_SWINF_2_STA, + PMIF_SWINF_2_WDATA_31_0, + PMIF_SWINF_2_RDATA_31_0, + PMIF_SWINF_2_ACC, + PMIF_SWINF_2_VLD_CLR, + PMIF_SWINF_3_STA, + PMIF_SWINF_3_WDATA_31_0, + PMIF_SWINF_3_RDATA_31_0, + PMIF_SWINF_3_ACC, + PMIF_SWINF_3_VLD_CLR, +}; + +static const u32 mt6873_regs[] = { + [PMIF_INIT_DONE] = 0x0000, + [PMIF_INF_EN] = 0x0024, + [PMIF_ARB_EN] = 0x0150, + [PMIF_CMDISSUE_EN] = 0x03B4, + [PMIF_TIMER_CTRL] = 0x03E0, + [PMIF_SPI_MODE_CTRL] = 0x0400, + [PMIF_IRQ_EVENT_EN_0] = 0x0418, + [PMIF_IRQ_FLAG_0] = 0x0420, + [PMIF_IRQ_CLR_0] = 0x0424, + [PMIF_IRQ_EVENT_EN_1] = 0x0428, + [PMIF_IRQ_FLAG_1] = 0x0430, + [PMIF_IRQ_CLR_1] = 0x0434, + [PMIF_IRQ_EVENT_EN_2] = 0x0438, + [PMIF_IRQ_FLAG_2] = 0x0440, + [PMIF_IRQ_CLR_2] = 0x0444, + [PMIF_IRQ_EVENT_EN_3] = 0x0448, + [PMIF_IRQ_FLAG_3] = 0x0450, + [PMIF_IRQ_CLR_3] = 0x0454, + [PMIF_IRQ_EVENT_EN_4] = 0x0458, + [PMIF_IRQ_FLAG_4] = 0x0460, + [PMIF_IRQ_CLR_4] = 0x0464, + [PMIF_WDT_EVENT_EN_0] = 0x046C, + [PMIF_WDT_FLAG_0] = 0x0470, + [PMIF_WDT_EVENT_EN_1] = 0x0474, + [PMIF_WDT_FLAG_1] = 0x0478, + [PMIF_SWINF_0_ACC] = 0x0C00, + [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, + [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, + [PMIF_SWINF_0_VLD_CLR] = 0x0C24, + [PMIF_SWINF_0_STA] = 0x0C28, + [PMIF_SWINF_1_ACC] = 0x0C40, + [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, + [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, + [PMIF_SWINF_1_VLD_CLR] = 0x0C64, + [PMIF_SWINF_1_STA] = 0x0C68, + [PMIF_SWINF_2_ACC] = 0x0C80, + [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, + [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, + [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, + [PMIF_SWINF_2_STA] = 0x0CA8, + [PMIF_SWINF_3_ACC] = 0x0CC0, + [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, + [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, + [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, + [PMIF_SWINF_3_STA] = 0x0CE8, +}; + +enum spmi_regs { + SPMI_OP_ST_CTRL, + SPMI_GRP_ID_EN, + SPMI_OP_ST_STA, + SPMI_MST_SAMPL, + SPMI_MST_REQ_EN, + SPMI_REC_CTRL, + SPMI_REC0, + SPMI_REC1, + SPMI_REC2, + SPMI_REC3, + SPMI_REC4, + SPMI_MST_DBG, +}; + +static const u32 mt6873_spmi_regs[] = { + [SPMI_OP_ST_CTRL] = 0x0000, + [SPMI_GRP_ID_EN] = 0x0004, + [SPMI_OP_ST_STA] = 0x0008, + [SPMI_MST_SAMPL] = 0x000c, + [SPMI_MST_REQ_EN] = 0x0010, + [SPMI_REC_CTRL] = 0x0040, + [SPMI_REC0] = 0x0044, + [SPMI_REC1] = 0x0048, + [SPMI_REC2] = 0x004c, + [SPMI_REC3] = 0x0050, + [SPMI_REC4] = 0x0054, + [SPMI_MST_DBG] = 0x00fc, +}; + +static u32 pmif_readl(struct pmif *arb, enum pmif_regs reg) +{ + return readl(arb->base + arb->data->regs[reg]); +} + +static void pmif_writel(struct pmif *arb, u32 val, enum pmif_regs reg) +{ + writel(val, arb->base + arb->data->regs[reg]); +} + +static void mtk_spmi_writel(struct pmif *arb, u32 val, enum spmi_regs reg) +{ + writel(val, arb->spmimst_base + arb->data->spmimst_regs[reg]); +} + +static bool pmif_is_fsm_vldclr(struct pmif *arb) +{ + u32 reg_rdata; + + reg_rdata = pmif_readl(arb, arb->chan.ch_sta); + + return GET_SWINF(reg_rdata) == SWINF_WFVLDCLR; +} + +static int pmif_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid) +{ + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + u32 rdata, cmd; + int ret; + + /* Check the opcode */ + if (opc < SPMI_CMD_RESET || opc > SPMI_CMD_WAKEUP) + return -EINVAL; + + cmd = opc - SPMI_CMD_RESET; + + mtk_spmi_writel(arb, (cmd << 0x4) | sid, SPMI_OP_ST_CTRL); + ret = readl_poll_timeout_atomic(arb->spmimst_base + arb->data->spmimst_regs[SPMI_OP_ST_STA], + rdata, (rdata & SPMI_OP_ST_BUSY) == SPMI_OP_ST_BUSY, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) + dev_err(&ctrl->dev, "timeout, err = %d\n", ret); + + return ret; +} + +static int pmif_spmi_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, + u16 addr, u8 *buf, size_t len) +{ + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + struct ch_reg *inf_reg; + int ret; + u32 data, cmd; + + /* Check for argument validation. */ + if (sid & ~0xf) { + dev_err(&ctrl->dev, "exceed the max slv id\n"); + return -EINVAL; + } + + if (len > 4) { + dev_err(&ctrl->dev, "pmif supports 1..4 bytes per trans, but:%zu requested", len); + + return -EINVAL; + } + + if (opc >= 0x60 && opc <= 0x7f) + opc = PMIF_CMD_REG; + else if ((opc >= 0x20 && opc <= 0x2f) || (opc >= 0x38 && opc <= 0x3f)) + opc = PMIF_CMD_EXT_REG_LONG; + else + return -EINVAL; + + /* Wait for Software Interface FSM state to be IDLE. */ + inf_reg = &arb->chan; + ret = readl_poll_timeout_atomic(arb->base + arb->data->regs[inf_reg->ch_sta], + data, GET_SWINF(data) == SWINF_IDLE, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) { + /* set channel ready if the data has transferred */ + if (pmif_is_fsm_vldclr(arb)) + pmif_writel(arb, 1, inf_reg->ch_rdy); + dev_err(&ctrl->dev, "failed to wait for SWINF_IDLE\n"); + return ret; + } + + /* Send the command. */ + cmd = (opc << 30) | (sid << 24) | ((len - 1) << 16) | addr; + pmif_writel(arb, cmd, inf_reg->ch_send); + + /* + * Wait for Software Interface FSM state to be WFVLDCLR, + * read the data and clear the valid flag. + */ + ret = readl_poll_timeout_atomic(arb->base + arb->data->regs[inf_reg->ch_sta], + data, GET_SWINF(data) == SWINF_WFVLDCLR, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) { + dev_err(&ctrl->dev, "failed to wait for SWINF_WFVLDCLR\n"); + return ret; + } + + data = pmif_readl(arb, inf_reg->rdata); + memcpy(buf, &data, len); + pmif_writel(arb, 1, inf_reg->ch_rdy); + + return 0; +} + +static int pmif_spmi_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, + u16 addr, const u8 *buf, size_t len) +{ + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + struct ch_reg *inf_reg; + int ret; + u32 data, cmd; + + if (len > 4) { + dev_err(&ctrl->dev, "pmif supports 1..4 bytes per trans, but:%zu requested", len); + + return -EINVAL; + } + + /* Check the opcode */ + if (opc >= 0x40 && opc <= 0x5F) + opc = PMIF_CMD_REG; + else if ((opc <= 0xF) || (opc >= 0x30 && opc <= 0x37)) + opc = PMIF_CMD_EXT_REG_LONG; + else if (opc >= 0x80) + opc = PMIF_CMD_REG_0; + else + return -EINVAL; + + /* Wait for Software Interface FSM state to be IDLE. */ + inf_reg = &arb->chan; + ret = readl_poll_timeout_atomic(arb->base + arb->data->regs[inf_reg->ch_sta], + data, GET_SWINF(data) == SWINF_IDLE, + PMIF_DELAY_US, PMIF_TIMEOUT_US); + if (ret < 0) { + /* set channel ready if the data has transferred */ + if (pmif_is_fsm_vldclr(arb)) + pmif_writel(arb, 1, inf_reg->ch_rdy); + dev_err(&ctrl->dev, "failed to wait for SWINF_IDLE\n"); + return ret; + } + + /* Set the write data. */ + memcpy(&data, buf, len); + pmif_writel(arb, data, inf_reg->wdata); + + /* Send the command. */ + cmd = (opc << 30) | BIT(29) | (sid << 24) | ((len - 1) << 16) | addr; + pmif_writel(arb, cmd, inf_reg->ch_send); + + return 0; +} + +static const struct pmif_data mt6873_pmif_arb = { + .regs = mt6873_regs, + .spmimst_regs = mt6873_spmi_regs, + .soc_chan = 2, +}; + +static int mtk_spmi_probe(struct platform_device *pdev) +{ + struct pmif *arb; + struct spmi_controller *ctrl; + int err, i; + u32 chan_offset; + + ctrl = spmi_controller_alloc(&pdev->dev, sizeof(*arb)); + if (!ctrl) + return -ENOMEM; + + arb = spmi_controller_get_drvdata(ctrl); + arb->data = device_get_match_data(&pdev->dev); + if (!arb->data) { + err = -EINVAL; + dev_err(&pdev->dev, "Cannot get drv_data\n"); + goto err_put_ctrl; + } + + arb->base = devm_platform_ioremap_resource_byname(pdev, "pmif"); + if (IS_ERR(arb->base)) { + err = PTR_ERR(arb->base); + goto err_put_ctrl; + } + + arb->spmimst_base = devm_platform_ioremap_resource_byname(pdev, "spmimst"); + if (IS_ERR(arb->spmimst_base)) { + err = PTR_ERR(arb->spmimst_base); + goto err_put_ctrl; + } + + arb->nclks = ARRAY_SIZE(pmif_clock_names); + for (i = 0; i < arb->nclks; i++) + arb->clks[i].id = pmif_clock_names[i]; + + err = devm_clk_bulk_get(&pdev->dev, arb->nclks, arb->clks); + if (err) { + dev_err(&pdev->dev, "Failed to get clocks: %d\n", err); + goto err_put_ctrl; + } + + err = clk_bulk_prepare_enable(arb->nclks, arb->clks); + if (err) { + dev_err(&pdev->dev, "Failed to enable clocks: %d\n", err); + goto err_put_ctrl; + } + + ctrl->cmd = pmif_arb_cmd; + ctrl->read_cmd = pmif_spmi_read_cmd; + ctrl->write_cmd = pmif_spmi_write_cmd; + + chan_offset = PMIF_CHAN_OFFSET * arb->data->soc_chan; + arb->chan.ch_sta = PMIF_SWINF_0_STA + chan_offset; + arb->chan.wdata = PMIF_SWINF_0_WDATA_31_0 + chan_offset; + arb->chan.rdata = PMIF_SWINF_0_RDATA_31_0 + chan_offset; + arb->chan.ch_send = PMIF_SWINF_0_ACC + chan_offset; + arb->chan.ch_rdy = PMIF_SWINF_0_VLD_CLR + chan_offset; + + platform_set_drvdata(pdev, ctrl); + + err = spmi_controller_add(ctrl); + if (err) + goto err_domain_remove; + + return 0; + +err_domain_remove: + clk_bulk_disable_unprepare(arb->nclks, arb->clks); +err_put_ctrl: + spmi_controller_put(ctrl); + return err; +} + +static int mtk_spmi_remove(struct platform_device *pdev) +{ + struct spmi_controller *ctrl = platform_get_drvdata(pdev); + struct pmif *arb = spmi_controller_get_drvdata(ctrl); + + clk_bulk_disable_unprepare(arb->nclks, arb->clks); + spmi_controller_remove(ctrl); + spmi_controller_put(ctrl); + return 0; +} + +static const struct of_device_id mtk_spmi_match_table[] = { + { + .compatible = "mediatek,mt6873-spmi", + .data = &mt6873_pmif_arb, + }, { + /* sentinel */ + }, +}; +MODULE_DEVICE_TABLE(of, mtk_spmi_match_table); + +static struct platform_driver mtk_spmi_driver = { + .driver = { + .name = "spmi-mtk", + .of_match_table = of_match_ptr(mtk_spmi_match_table), + }, + .probe = mtk_spmi_probe, + .remove = mtk_spmi_remove, +}; +module_platform_driver(mtk_spmi_driver); + +MODULE_AUTHOR("Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>"); +MODULE_DESCRIPTION("MediaTek SPMI Driver"); +MODULE_LICENSE("GPL"); -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 4/4] spmi: mediatek: Add support for MT8195 2021-11-15 4:20 ` James Lo (?) @ 2021-11-15 4:20 ` James Lo -1 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group, Henry Chen Add spmi support for MT8195. Refine indent in spmi-mtk-pmif.c. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/spmi/spmi-mtk-pmif.c | 202 +++++++++++++++++++++++++---------- 1 file changed, 145 insertions(+), 57 deletions(-) diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c index 3283d0a5903c..ad511f2c3324 100644 --- a/drivers/spmi/spmi-mtk-pmif.c +++ b/drivers/spmi/spmi-mtk-pmif.c @@ -105,51 +105,99 @@ enum pmif_regs { }; static const u32 mt6873_regs[] = { - [PMIF_INIT_DONE] = 0x0000, - [PMIF_INF_EN] = 0x0024, - [PMIF_ARB_EN] = 0x0150, - [PMIF_CMDISSUE_EN] = 0x03B4, - [PMIF_TIMER_CTRL] = 0x03E0, - [PMIF_SPI_MODE_CTRL] = 0x0400, - [PMIF_IRQ_EVENT_EN_0] = 0x0418, - [PMIF_IRQ_FLAG_0] = 0x0420, - [PMIF_IRQ_CLR_0] = 0x0424, - [PMIF_IRQ_EVENT_EN_1] = 0x0428, - [PMIF_IRQ_FLAG_1] = 0x0430, - [PMIF_IRQ_CLR_1] = 0x0434, - [PMIF_IRQ_EVENT_EN_2] = 0x0438, - [PMIF_IRQ_FLAG_2] = 0x0440, - [PMIF_IRQ_CLR_2] = 0x0444, - [PMIF_IRQ_EVENT_EN_3] = 0x0448, - [PMIF_IRQ_FLAG_3] = 0x0450, - [PMIF_IRQ_CLR_3] = 0x0454, - [PMIF_IRQ_EVENT_EN_4] = 0x0458, - [PMIF_IRQ_FLAG_4] = 0x0460, - [PMIF_IRQ_CLR_4] = 0x0464, - [PMIF_WDT_EVENT_EN_0] = 0x046C, - [PMIF_WDT_FLAG_0] = 0x0470, - [PMIF_WDT_EVENT_EN_1] = 0x0474, - [PMIF_WDT_FLAG_1] = 0x0478, - [PMIF_SWINF_0_ACC] = 0x0C00, - [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, - [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, - [PMIF_SWINF_0_VLD_CLR] = 0x0C24, - [PMIF_SWINF_0_STA] = 0x0C28, - [PMIF_SWINF_1_ACC] = 0x0C40, - [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, - [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, - [PMIF_SWINF_1_VLD_CLR] = 0x0C64, - [PMIF_SWINF_1_STA] = 0x0C68, - [PMIF_SWINF_2_ACC] = 0x0C80, - [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, - [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, - [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, - [PMIF_SWINF_2_STA] = 0x0CA8, - [PMIF_SWINF_3_ACC] = 0x0CC0, - [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, - [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, - [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, - [PMIF_SWINF_3_STA] = 0x0CE8, + [PMIF_INIT_DONE] = 0x0000, + [PMIF_INF_EN] = 0x0024, + [PMIF_ARB_EN] = 0x0150, + [PMIF_CMDISSUE_EN] = 0x03B4, + [PMIF_TIMER_CTRL] = 0x03E0, + [PMIF_SPI_MODE_CTRL] = 0x0400, + [PMIF_IRQ_EVENT_EN_0] = 0x0418, + [PMIF_IRQ_FLAG_0] = 0x0420, + [PMIF_IRQ_CLR_0] = 0x0424, + [PMIF_IRQ_EVENT_EN_1] = 0x0428, + [PMIF_IRQ_FLAG_1] = 0x0430, + [PMIF_IRQ_CLR_1] = 0x0434, + [PMIF_IRQ_EVENT_EN_2] = 0x0438, + [PMIF_IRQ_FLAG_2] = 0x0440, + [PMIF_IRQ_CLR_2] = 0x0444, + [PMIF_IRQ_EVENT_EN_3] = 0x0448, + [PMIF_IRQ_FLAG_3] = 0x0450, + [PMIF_IRQ_CLR_3] = 0x0454, + [PMIF_IRQ_EVENT_EN_4] = 0x0458, + [PMIF_IRQ_FLAG_4] = 0x0460, + [PMIF_IRQ_CLR_4] = 0x0464, + [PMIF_WDT_EVENT_EN_0] = 0x046C, + [PMIF_WDT_FLAG_0] = 0x0470, + [PMIF_WDT_EVENT_EN_1] = 0x0474, + [PMIF_WDT_FLAG_1] = 0x0478, + [PMIF_SWINF_0_ACC] = 0x0C00, + [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, + [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, + [PMIF_SWINF_0_VLD_CLR] = 0x0C24, + [PMIF_SWINF_0_STA] = 0x0C28, + [PMIF_SWINF_1_ACC] = 0x0C40, + [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, + [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, + [PMIF_SWINF_1_VLD_CLR] = 0x0C64, + [PMIF_SWINF_1_STA] = 0x0C68, + [PMIF_SWINF_2_ACC] = 0x0C80, + [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, + [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, + [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, + [PMIF_SWINF_2_STA] = 0x0CA8, + [PMIF_SWINF_3_ACC] = 0x0CC0, + [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, + [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, + [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, + [PMIF_SWINF_3_STA] = 0x0CE8, +}; + +static const u32 mt8195_regs[] = { + [PMIF_INIT_DONE] = 0x0000, + [PMIF_INF_EN] = 0x0024, + [PMIF_ARB_EN] = 0x0150, + [PMIF_CMDISSUE_EN] = 0x03B8, + [PMIF_TIMER_CTRL] = 0x03E4, + [PMIF_SPI_MODE_CTRL] = 0x0408, + [PMIF_IRQ_EVENT_EN_0] = 0x0420, + [PMIF_IRQ_FLAG_0] = 0x0428, + [PMIF_IRQ_CLR_0] = 0x042C, + [PMIF_IRQ_EVENT_EN_1] = 0x0430, + [PMIF_IRQ_FLAG_1] = 0x0438, + [PMIF_IRQ_CLR_1] = 0x043C, + [PMIF_IRQ_EVENT_EN_2] = 0x0440, + [PMIF_IRQ_FLAG_2] = 0x0448, + [PMIF_IRQ_CLR_2] = 0x044C, + [PMIF_IRQ_EVENT_EN_3] = 0x0450, + [PMIF_IRQ_FLAG_3] = 0x0458, + [PMIF_IRQ_CLR_3] = 0x045C, + [PMIF_IRQ_EVENT_EN_4] = 0x0460, + [PMIF_IRQ_FLAG_4] = 0x0468, + [PMIF_IRQ_CLR_4] = 0x046C, + [PMIF_WDT_EVENT_EN_0] = 0x0474, + [PMIF_WDT_FLAG_0] = 0x0478, + [PMIF_WDT_EVENT_EN_1] = 0x047C, + [PMIF_WDT_FLAG_1] = 0x0480, + [PMIF_SWINF_0_ACC] = 0x0800, + [PMIF_SWINF_0_WDATA_31_0] = 0x0804, + [PMIF_SWINF_0_RDATA_31_0] = 0x0814, + [PMIF_SWINF_0_VLD_CLR] = 0x0824, + [PMIF_SWINF_0_STA] = 0x0828, + [PMIF_SWINF_1_ACC] = 0x0840, + [PMIF_SWINF_1_WDATA_31_0] = 0x0844, + [PMIF_SWINF_1_RDATA_31_0] = 0x0854, + [PMIF_SWINF_1_VLD_CLR] = 0x0864, + [PMIF_SWINF_1_STA] = 0x0868, + [PMIF_SWINF_2_ACC] = 0x0880, + [PMIF_SWINF_2_WDATA_31_0] = 0x0884, + [PMIF_SWINF_2_RDATA_31_0] = 0x0894, + [PMIF_SWINF_2_VLD_CLR] = 0x08A4, + [PMIF_SWINF_2_STA] = 0x08A8, + [PMIF_SWINF_3_ACC] = 0x08C0, + [PMIF_SWINF_3_WDATA_31_0] = 0x08C4, + [PMIF_SWINF_3_RDATA_31_0] = 0x08D4, + [PMIF_SWINF_3_VLD_CLR] = 0x08E4, + [PMIF_SWINF_3_STA] = 0x08E8, }; enum spmi_regs { @@ -165,21 +213,52 @@ enum spmi_regs { SPMI_REC3, SPMI_REC4, SPMI_MST_DBG, + + /* MT8195 spmi regs */ + SPMI_MST_RCS_CTRL, + SPMI_SLV_3_0_EINT, + SPMI_SLV_7_4_EINT, + SPMI_SLV_B_8_EINT, + SPMI_SLV_F_C_EINT, + SPMI_REC_CMD_DEC, + SPMI_DEC_DBG, }; static const u32 mt6873_spmi_regs[] = { - [SPMI_OP_ST_CTRL] = 0x0000, - [SPMI_GRP_ID_EN] = 0x0004, - [SPMI_OP_ST_STA] = 0x0008, - [SPMI_MST_SAMPL] = 0x000c, - [SPMI_MST_REQ_EN] = 0x0010, - [SPMI_REC_CTRL] = 0x0040, - [SPMI_REC0] = 0x0044, - [SPMI_REC1] = 0x0048, - [SPMI_REC2] = 0x004c, - [SPMI_REC3] = 0x0050, - [SPMI_REC4] = 0x0054, - [SPMI_MST_DBG] = 0x00fc, + [SPMI_OP_ST_CTRL] = 0x0000, + [SPMI_GRP_ID_EN] = 0x0004, + [SPMI_OP_ST_STA] = 0x0008, + [SPMI_MST_SAMPL] = 0x000c, + [SPMI_MST_REQ_EN] = 0x0010, + [SPMI_REC_CTRL] = 0x0040, + [SPMI_REC0] = 0x0044, + [SPMI_REC1] = 0x0048, + [SPMI_REC2] = 0x004c, + [SPMI_REC3] = 0x0050, + [SPMI_REC4] = 0x0054, + [SPMI_MST_DBG] = 0x00fc, +}; + +static const u32 mt8195_spmi_regs[] = { + [SPMI_OP_ST_CTRL] = 0x0000, + [SPMI_GRP_ID_EN] = 0x0004, + [SPMI_OP_ST_STA] = 0x0008, + [SPMI_MST_SAMPL] = 0x000C, + [SPMI_MST_REQ_EN] = 0x0010, + [SPMI_MST_RCS_CTRL] = 0x0014, + [SPMI_SLV_3_0_EINT] = 0x0020, + [SPMI_SLV_7_4_EINT] = 0x0024, + [SPMI_SLV_B_8_EINT] = 0x0028, + [SPMI_SLV_F_C_EINT] = 0x002C, + [SPMI_REC_CTRL] = 0x0040, + [SPMI_REC0] = 0x0044, + [SPMI_REC1] = 0x0048, + [SPMI_REC2] = 0x004C, + [SPMI_REC3] = 0x0050, + [SPMI_REC4] = 0x0054, + [SPMI_REC_CMD_DEC] = 0x005C, + [SPMI_DEC_DBG] = 0x00F8, + [SPMI_MST_DBG] = 0x00FC, }; static u32 pmif_readl(struct pmif *arb, enum pmif_regs reg) @@ -345,6 +424,12 @@ static const struct pmif_data mt6873_pmif_arb = { .soc_chan = 2, }; +static const struct pmif_data mt8195_pmif_arb = { + .regs = mt8195_regs, + .spmimst_regs = mt8195_spmi_regs, + .soc_chan = 2, +}; + static int mtk_spmi_probe(struct platform_device *pdev) { struct pmif *arb; @@ -433,6 +518,9 @@ static const struct of_device_id mtk_spmi_match_table[] = { { .compatible = "mediatek,mt6873-spmi", .data = &mt6873_pmif_arb, + }, { + .compatible = "mediatek,mt8195-spmi", + .data = &mt8195_pmif_arb, }, { /* sentinel */ }, -- 2.18.0 ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 4/4] spmi: mediatek: Add support for MT8195 @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group, Henry Chen Add spmi support for MT8195. Refine indent in spmi-mtk-pmif.c. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/spmi/spmi-mtk-pmif.c | 202 +++++++++++++++++++++++++---------- 1 file changed, 145 insertions(+), 57 deletions(-) diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c index 3283d0a5903c..ad511f2c3324 100644 --- a/drivers/spmi/spmi-mtk-pmif.c +++ b/drivers/spmi/spmi-mtk-pmif.c @@ -105,51 +105,99 @@ enum pmif_regs { }; static const u32 mt6873_regs[] = { - [PMIF_INIT_DONE] = 0x0000, - [PMIF_INF_EN] = 0x0024, - [PMIF_ARB_EN] = 0x0150, - [PMIF_CMDISSUE_EN] = 0x03B4, - [PMIF_TIMER_CTRL] = 0x03E0, - [PMIF_SPI_MODE_CTRL] = 0x0400, - [PMIF_IRQ_EVENT_EN_0] = 0x0418, - [PMIF_IRQ_FLAG_0] = 0x0420, - [PMIF_IRQ_CLR_0] = 0x0424, - [PMIF_IRQ_EVENT_EN_1] = 0x0428, - [PMIF_IRQ_FLAG_1] = 0x0430, - [PMIF_IRQ_CLR_1] = 0x0434, - [PMIF_IRQ_EVENT_EN_2] = 0x0438, - [PMIF_IRQ_FLAG_2] = 0x0440, - [PMIF_IRQ_CLR_2] = 0x0444, - [PMIF_IRQ_EVENT_EN_3] = 0x0448, - [PMIF_IRQ_FLAG_3] = 0x0450, - [PMIF_IRQ_CLR_3] = 0x0454, - [PMIF_IRQ_EVENT_EN_4] = 0x0458, - [PMIF_IRQ_FLAG_4] = 0x0460, - [PMIF_IRQ_CLR_4] = 0x0464, - [PMIF_WDT_EVENT_EN_0] = 0x046C, - [PMIF_WDT_FLAG_0] = 0x0470, - [PMIF_WDT_EVENT_EN_1] = 0x0474, - [PMIF_WDT_FLAG_1] = 0x0478, - [PMIF_SWINF_0_ACC] = 0x0C00, - [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, - [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, - [PMIF_SWINF_0_VLD_CLR] = 0x0C24, - [PMIF_SWINF_0_STA] = 0x0C28, - [PMIF_SWINF_1_ACC] = 0x0C40, - [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, - [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, - [PMIF_SWINF_1_VLD_CLR] = 0x0C64, - [PMIF_SWINF_1_STA] = 0x0C68, - [PMIF_SWINF_2_ACC] = 0x0C80, - [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, - [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, - [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, - [PMIF_SWINF_2_STA] = 0x0CA8, - [PMIF_SWINF_3_ACC] = 0x0CC0, - [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, - [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, - [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, - [PMIF_SWINF_3_STA] = 0x0CE8, + [PMIF_INIT_DONE] = 0x0000, + [PMIF_INF_EN] = 0x0024, + [PMIF_ARB_EN] = 0x0150, + [PMIF_CMDISSUE_EN] = 0x03B4, + [PMIF_TIMER_CTRL] = 0x03E0, + [PMIF_SPI_MODE_CTRL] = 0x0400, + [PMIF_IRQ_EVENT_EN_0] = 0x0418, + [PMIF_IRQ_FLAG_0] = 0x0420, + [PMIF_IRQ_CLR_0] = 0x0424, + [PMIF_IRQ_EVENT_EN_1] = 0x0428, + [PMIF_IRQ_FLAG_1] = 0x0430, + [PMIF_IRQ_CLR_1] = 0x0434, + [PMIF_IRQ_EVENT_EN_2] = 0x0438, + [PMIF_IRQ_FLAG_2] = 0x0440, + [PMIF_IRQ_CLR_2] = 0x0444, + [PMIF_IRQ_EVENT_EN_3] = 0x0448, + [PMIF_IRQ_FLAG_3] = 0x0450, + [PMIF_IRQ_CLR_3] = 0x0454, + [PMIF_IRQ_EVENT_EN_4] = 0x0458, + [PMIF_IRQ_FLAG_4] = 0x0460, + [PMIF_IRQ_CLR_4] = 0x0464, + [PMIF_WDT_EVENT_EN_0] = 0x046C, + [PMIF_WDT_FLAG_0] = 0x0470, + [PMIF_WDT_EVENT_EN_1] = 0x0474, + [PMIF_WDT_FLAG_1] = 0x0478, + [PMIF_SWINF_0_ACC] = 0x0C00, + [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, + [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, + [PMIF_SWINF_0_VLD_CLR] = 0x0C24, + [PMIF_SWINF_0_STA] = 0x0C28, + [PMIF_SWINF_1_ACC] = 0x0C40, + [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, + [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, + [PMIF_SWINF_1_VLD_CLR] = 0x0C64, + [PMIF_SWINF_1_STA] = 0x0C68, + [PMIF_SWINF_2_ACC] = 0x0C80, + [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, + [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, + [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, + [PMIF_SWINF_2_STA] = 0x0CA8, + [PMIF_SWINF_3_ACC] = 0x0CC0, + [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, + [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, + [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, + [PMIF_SWINF_3_STA] = 0x0CE8, +}; + +static const u32 mt8195_regs[] = { + [PMIF_INIT_DONE] = 0x0000, + [PMIF_INF_EN] = 0x0024, + [PMIF_ARB_EN] = 0x0150, + [PMIF_CMDISSUE_EN] = 0x03B8, + [PMIF_TIMER_CTRL] = 0x03E4, + [PMIF_SPI_MODE_CTRL] = 0x0408, + [PMIF_IRQ_EVENT_EN_0] = 0x0420, + [PMIF_IRQ_FLAG_0] = 0x0428, + [PMIF_IRQ_CLR_0] = 0x042C, + [PMIF_IRQ_EVENT_EN_1] = 0x0430, + [PMIF_IRQ_FLAG_1] = 0x0438, + [PMIF_IRQ_CLR_1] = 0x043C, + [PMIF_IRQ_EVENT_EN_2] = 0x0440, + [PMIF_IRQ_FLAG_2] = 0x0448, + [PMIF_IRQ_CLR_2] = 0x044C, + [PMIF_IRQ_EVENT_EN_3] = 0x0450, + [PMIF_IRQ_FLAG_3] = 0x0458, + [PMIF_IRQ_CLR_3] = 0x045C, + [PMIF_IRQ_EVENT_EN_4] = 0x0460, + [PMIF_IRQ_FLAG_4] = 0x0468, + [PMIF_IRQ_CLR_4] = 0x046C, + [PMIF_WDT_EVENT_EN_0] = 0x0474, + [PMIF_WDT_FLAG_0] = 0x0478, + [PMIF_WDT_EVENT_EN_1] = 0x047C, + [PMIF_WDT_FLAG_1] = 0x0480, + [PMIF_SWINF_0_ACC] = 0x0800, + [PMIF_SWINF_0_WDATA_31_0] = 0x0804, + [PMIF_SWINF_0_RDATA_31_0] = 0x0814, + [PMIF_SWINF_0_VLD_CLR] = 0x0824, + [PMIF_SWINF_0_STA] = 0x0828, + [PMIF_SWINF_1_ACC] = 0x0840, + [PMIF_SWINF_1_WDATA_31_0] = 0x0844, + [PMIF_SWINF_1_RDATA_31_0] = 0x0854, + [PMIF_SWINF_1_VLD_CLR] = 0x0864, + [PMIF_SWINF_1_STA] = 0x0868, + [PMIF_SWINF_2_ACC] = 0x0880, + [PMIF_SWINF_2_WDATA_31_0] = 0x0884, + [PMIF_SWINF_2_RDATA_31_0] = 0x0894, + [PMIF_SWINF_2_VLD_CLR] = 0x08A4, + [PMIF_SWINF_2_STA] = 0x08A8, + [PMIF_SWINF_3_ACC] = 0x08C0, + [PMIF_SWINF_3_WDATA_31_0] = 0x08C4, + [PMIF_SWINF_3_RDATA_31_0] = 0x08D4, + [PMIF_SWINF_3_VLD_CLR] = 0x08E4, + [PMIF_SWINF_3_STA] = 0x08E8, }; enum spmi_regs { @@ -165,21 +213,52 @@ enum spmi_regs { SPMI_REC3, SPMI_REC4, SPMI_MST_DBG, + + /* MT8195 spmi regs */ + SPMI_MST_RCS_CTRL, + SPMI_SLV_3_0_EINT, + SPMI_SLV_7_4_EINT, + SPMI_SLV_B_8_EINT, + SPMI_SLV_F_C_EINT, + SPMI_REC_CMD_DEC, + SPMI_DEC_DBG, }; static const u32 mt6873_spmi_regs[] = { - [SPMI_OP_ST_CTRL] = 0x0000, - [SPMI_GRP_ID_EN] = 0x0004, - [SPMI_OP_ST_STA] = 0x0008, - [SPMI_MST_SAMPL] = 0x000c, - [SPMI_MST_REQ_EN] = 0x0010, - [SPMI_REC_CTRL] = 0x0040, - [SPMI_REC0] = 0x0044, - [SPMI_REC1] = 0x0048, - [SPMI_REC2] = 0x004c, - [SPMI_REC3] = 0x0050, - [SPMI_REC4] = 0x0054, - [SPMI_MST_DBG] = 0x00fc, + [SPMI_OP_ST_CTRL] = 0x0000, + [SPMI_GRP_ID_EN] = 0x0004, + [SPMI_OP_ST_STA] = 0x0008, + [SPMI_MST_SAMPL] = 0x000c, + [SPMI_MST_REQ_EN] = 0x0010, + [SPMI_REC_CTRL] = 0x0040, + [SPMI_REC0] = 0x0044, + [SPMI_REC1] = 0x0048, + [SPMI_REC2] = 0x004c, + [SPMI_REC3] = 0x0050, + [SPMI_REC4] = 0x0054, + [SPMI_MST_DBG] = 0x00fc, +}; + +static const u32 mt8195_spmi_regs[] = { + [SPMI_OP_ST_CTRL] = 0x0000, + [SPMI_GRP_ID_EN] = 0x0004, + [SPMI_OP_ST_STA] = 0x0008, + [SPMI_MST_SAMPL] = 0x000C, + [SPMI_MST_REQ_EN] = 0x0010, + [SPMI_MST_RCS_CTRL] = 0x0014, + [SPMI_SLV_3_0_EINT] = 0x0020, + [SPMI_SLV_7_4_EINT] = 0x0024, + [SPMI_SLV_B_8_EINT] = 0x0028, + [SPMI_SLV_F_C_EINT] = 0x002C, + [SPMI_REC_CTRL] = 0x0040, + [SPMI_REC0] = 0x0044, + [SPMI_REC1] = 0x0048, + [SPMI_REC2] = 0x004C, + [SPMI_REC3] = 0x0050, + [SPMI_REC4] = 0x0054, + [SPMI_REC_CMD_DEC] = 0x005C, + [SPMI_DEC_DBG] = 0x00F8, + [SPMI_MST_DBG] = 0x00FC, }; static u32 pmif_readl(struct pmif *arb, enum pmif_regs reg) @@ -345,6 +424,12 @@ static const struct pmif_data mt6873_pmif_arb = { .soc_chan = 2, }; +static const struct pmif_data mt8195_pmif_arb = { + .regs = mt8195_regs, + .spmimst_regs = mt8195_spmi_regs, + .soc_chan = 2, +}; + static int mtk_spmi_probe(struct platform_device *pdev) { struct pmif *arb; @@ -433,6 +518,9 @@ static const struct of_device_id mtk_spmi_match_table[] = { { .compatible = "mediatek,mt6873-spmi", .data = &mt6873_pmif_arb, + }, { + .compatible = "mediatek,mt8195-spmi", + .data = &mt8195_pmif_arb, }, { /* sentinel */ }, -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 4/4] spmi: mediatek: Add support for MT8195 @ 2021-11-15 4:20 ` James Lo 0 siblings, 0 replies; 30+ messages in thread From: James Lo @ 2021-11-15 4:20 UTC (permalink / raw) To: Stephen Boyd, Rob Herring, Matthias Brugger Cc: Hsin-Hsiung Wang, James Lo, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group, Henry Chen Add spmi support for MT8195. Refine indent in spmi-mtk-pmif.c. Signed-off-by: James Lo <james.lo@mediatek.com> Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/spmi/spmi-mtk-pmif.c | 202 +++++++++++++++++++++++++---------- 1 file changed, 145 insertions(+), 57 deletions(-) diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c index 3283d0a5903c..ad511f2c3324 100644 --- a/drivers/spmi/spmi-mtk-pmif.c +++ b/drivers/spmi/spmi-mtk-pmif.c @@ -105,51 +105,99 @@ enum pmif_regs { }; static const u32 mt6873_regs[] = { - [PMIF_INIT_DONE] = 0x0000, - [PMIF_INF_EN] = 0x0024, - [PMIF_ARB_EN] = 0x0150, - [PMIF_CMDISSUE_EN] = 0x03B4, - [PMIF_TIMER_CTRL] = 0x03E0, - [PMIF_SPI_MODE_CTRL] = 0x0400, - [PMIF_IRQ_EVENT_EN_0] = 0x0418, - [PMIF_IRQ_FLAG_0] = 0x0420, - [PMIF_IRQ_CLR_0] = 0x0424, - [PMIF_IRQ_EVENT_EN_1] = 0x0428, - [PMIF_IRQ_FLAG_1] = 0x0430, - [PMIF_IRQ_CLR_1] = 0x0434, - [PMIF_IRQ_EVENT_EN_2] = 0x0438, - [PMIF_IRQ_FLAG_2] = 0x0440, - [PMIF_IRQ_CLR_2] = 0x0444, - [PMIF_IRQ_EVENT_EN_3] = 0x0448, - [PMIF_IRQ_FLAG_3] = 0x0450, - [PMIF_IRQ_CLR_3] = 0x0454, - [PMIF_IRQ_EVENT_EN_4] = 0x0458, - [PMIF_IRQ_FLAG_4] = 0x0460, - [PMIF_IRQ_CLR_4] = 0x0464, - [PMIF_WDT_EVENT_EN_0] = 0x046C, - [PMIF_WDT_FLAG_0] = 0x0470, - [PMIF_WDT_EVENT_EN_1] = 0x0474, - [PMIF_WDT_FLAG_1] = 0x0478, - [PMIF_SWINF_0_ACC] = 0x0C00, - [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, - [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, - [PMIF_SWINF_0_VLD_CLR] = 0x0C24, - [PMIF_SWINF_0_STA] = 0x0C28, - [PMIF_SWINF_1_ACC] = 0x0C40, - [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, - [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, - [PMIF_SWINF_1_VLD_CLR] = 0x0C64, - [PMIF_SWINF_1_STA] = 0x0C68, - [PMIF_SWINF_2_ACC] = 0x0C80, - [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, - [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, - [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, - [PMIF_SWINF_2_STA] = 0x0CA8, - [PMIF_SWINF_3_ACC] = 0x0CC0, - [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, - [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, - [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, - [PMIF_SWINF_3_STA] = 0x0CE8, + [PMIF_INIT_DONE] = 0x0000, + [PMIF_INF_EN] = 0x0024, + [PMIF_ARB_EN] = 0x0150, + [PMIF_CMDISSUE_EN] = 0x03B4, + [PMIF_TIMER_CTRL] = 0x03E0, + [PMIF_SPI_MODE_CTRL] = 0x0400, + [PMIF_IRQ_EVENT_EN_0] = 0x0418, + [PMIF_IRQ_FLAG_0] = 0x0420, + [PMIF_IRQ_CLR_0] = 0x0424, + [PMIF_IRQ_EVENT_EN_1] = 0x0428, + [PMIF_IRQ_FLAG_1] = 0x0430, + [PMIF_IRQ_CLR_1] = 0x0434, + [PMIF_IRQ_EVENT_EN_2] = 0x0438, + [PMIF_IRQ_FLAG_2] = 0x0440, + [PMIF_IRQ_CLR_2] = 0x0444, + [PMIF_IRQ_EVENT_EN_3] = 0x0448, + [PMIF_IRQ_FLAG_3] = 0x0450, + [PMIF_IRQ_CLR_3] = 0x0454, + [PMIF_IRQ_EVENT_EN_4] = 0x0458, + [PMIF_IRQ_FLAG_4] = 0x0460, + [PMIF_IRQ_CLR_4] = 0x0464, + [PMIF_WDT_EVENT_EN_0] = 0x046C, + [PMIF_WDT_FLAG_0] = 0x0470, + [PMIF_WDT_EVENT_EN_1] = 0x0474, + [PMIF_WDT_FLAG_1] = 0x0478, + [PMIF_SWINF_0_ACC] = 0x0C00, + [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, + [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, + [PMIF_SWINF_0_VLD_CLR] = 0x0C24, + [PMIF_SWINF_0_STA] = 0x0C28, + [PMIF_SWINF_1_ACC] = 0x0C40, + [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, + [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, + [PMIF_SWINF_1_VLD_CLR] = 0x0C64, + [PMIF_SWINF_1_STA] = 0x0C68, + [PMIF_SWINF_2_ACC] = 0x0C80, + [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, + [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, + [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, + [PMIF_SWINF_2_STA] = 0x0CA8, + [PMIF_SWINF_3_ACC] = 0x0CC0, + [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, + [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, + [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, + [PMIF_SWINF_3_STA] = 0x0CE8, +}; + +static const u32 mt8195_regs[] = { + [PMIF_INIT_DONE] = 0x0000, + [PMIF_INF_EN] = 0x0024, + [PMIF_ARB_EN] = 0x0150, + [PMIF_CMDISSUE_EN] = 0x03B8, + [PMIF_TIMER_CTRL] = 0x03E4, + [PMIF_SPI_MODE_CTRL] = 0x0408, + [PMIF_IRQ_EVENT_EN_0] = 0x0420, + [PMIF_IRQ_FLAG_0] = 0x0428, + [PMIF_IRQ_CLR_0] = 0x042C, + [PMIF_IRQ_EVENT_EN_1] = 0x0430, + [PMIF_IRQ_FLAG_1] = 0x0438, + [PMIF_IRQ_CLR_1] = 0x043C, + [PMIF_IRQ_EVENT_EN_2] = 0x0440, + [PMIF_IRQ_FLAG_2] = 0x0448, + [PMIF_IRQ_CLR_2] = 0x044C, + [PMIF_IRQ_EVENT_EN_3] = 0x0450, + [PMIF_IRQ_FLAG_3] = 0x0458, + [PMIF_IRQ_CLR_3] = 0x045C, + [PMIF_IRQ_EVENT_EN_4] = 0x0460, + [PMIF_IRQ_FLAG_4] = 0x0468, + [PMIF_IRQ_CLR_4] = 0x046C, + [PMIF_WDT_EVENT_EN_0] = 0x0474, + [PMIF_WDT_FLAG_0] = 0x0478, + [PMIF_WDT_EVENT_EN_1] = 0x047C, + [PMIF_WDT_FLAG_1] = 0x0480, + [PMIF_SWINF_0_ACC] = 0x0800, + [PMIF_SWINF_0_WDATA_31_0] = 0x0804, + [PMIF_SWINF_0_RDATA_31_0] = 0x0814, + [PMIF_SWINF_0_VLD_CLR] = 0x0824, + [PMIF_SWINF_0_STA] = 0x0828, + [PMIF_SWINF_1_ACC] = 0x0840, + [PMIF_SWINF_1_WDATA_31_0] = 0x0844, + [PMIF_SWINF_1_RDATA_31_0] = 0x0854, + [PMIF_SWINF_1_VLD_CLR] = 0x0864, + [PMIF_SWINF_1_STA] = 0x0868, + [PMIF_SWINF_2_ACC] = 0x0880, + [PMIF_SWINF_2_WDATA_31_0] = 0x0884, + [PMIF_SWINF_2_RDATA_31_0] = 0x0894, + [PMIF_SWINF_2_VLD_CLR] = 0x08A4, + [PMIF_SWINF_2_STA] = 0x08A8, + [PMIF_SWINF_3_ACC] = 0x08C0, + [PMIF_SWINF_3_WDATA_31_0] = 0x08C4, + [PMIF_SWINF_3_RDATA_31_0] = 0x08D4, + [PMIF_SWINF_3_VLD_CLR] = 0x08E4, + [PMIF_SWINF_3_STA] = 0x08E8, }; enum spmi_regs { @@ -165,21 +213,52 @@ enum spmi_regs { SPMI_REC3, SPMI_REC4, SPMI_MST_DBG, + + /* MT8195 spmi regs */ + SPMI_MST_RCS_CTRL, + SPMI_SLV_3_0_EINT, + SPMI_SLV_7_4_EINT, + SPMI_SLV_B_8_EINT, + SPMI_SLV_F_C_EINT, + SPMI_REC_CMD_DEC, + SPMI_DEC_DBG, }; static const u32 mt6873_spmi_regs[] = { - [SPMI_OP_ST_CTRL] = 0x0000, - [SPMI_GRP_ID_EN] = 0x0004, - [SPMI_OP_ST_STA] = 0x0008, - [SPMI_MST_SAMPL] = 0x000c, - [SPMI_MST_REQ_EN] = 0x0010, - [SPMI_REC_CTRL] = 0x0040, - [SPMI_REC0] = 0x0044, - [SPMI_REC1] = 0x0048, - [SPMI_REC2] = 0x004c, - [SPMI_REC3] = 0x0050, - [SPMI_REC4] = 0x0054, - [SPMI_MST_DBG] = 0x00fc, + [SPMI_OP_ST_CTRL] = 0x0000, + [SPMI_GRP_ID_EN] = 0x0004, + [SPMI_OP_ST_STA] = 0x0008, + [SPMI_MST_SAMPL] = 0x000c, + [SPMI_MST_REQ_EN] = 0x0010, + [SPMI_REC_CTRL] = 0x0040, + [SPMI_REC0] = 0x0044, + [SPMI_REC1] = 0x0048, + [SPMI_REC2] = 0x004c, + [SPMI_REC3] = 0x0050, + [SPMI_REC4] = 0x0054, + [SPMI_MST_DBG] = 0x00fc, +}; + +static const u32 mt8195_spmi_regs[] = { + [SPMI_OP_ST_CTRL] = 0x0000, + [SPMI_GRP_ID_EN] = 0x0004, + [SPMI_OP_ST_STA] = 0x0008, + [SPMI_MST_SAMPL] = 0x000C, + [SPMI_MST_REQ_EN] = 0x0010, + [SPMI_MST_RCS_CTRL] = 0x0014, + [SPMI_SLV_3_0_EINT] = 0x0020, + [SPMI_SLV_7_4_EINT] = 0x0024, + [SPMI_SLV_B_8_EINT] = 0x0028, + [SPMI_SLV_F_C_EINT] = 0x002C, + [SPMI_REC_CTRL] = 0x0040, + [SPMI_REC0] = 0x0044, + [SPMI_REC1] = 0x0048, + [SPMI_REC2] = 0x004C, + [SPMI_REC3] = 0x0050, + [SPMI_REC4] = 0x0054, + [SPMI_REC_CMD_DEC] = 0x005C, + [SPMI_DEC_DBG] = 0x00F8, + [SPMI_MST_DBG] = 0x00FC, }; static u32 pmif_readl(struct pmif *arb, enum pmif_regs reg) @@ -345,6 +424,12 @@ static const struct pmif_data mt6873_pmif_arb = { .soc_chan = 2, }; +static const struct pmif_data mt8195_pmif_arb = { + .regs = mt8195_regs, + .spmimst_regs = mt8195_spmi_regs, + .soc_chan = 2, +}; + static int mtk_spmi_probe(struct platform_device *pdev) { struct pmif *arb; @@ -433,6 +518,9 @@ static const struct of_device_id mtk_spmi_match_table[] = { { .compatible = "mediatek,mt6873-spmi", .data = &mt6873_pmif_arb, + }, { + .compatible = "mediatek,mt8195-spmi", + .data = &mt8195_pmif_arb, }, { /* sentinel */ }, -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v15 4/4] spmi: mediatek: Add support for MT8195 2021-11-15 4:20 ` James Lo (?) @ 2021-11-17 13:50 ` Matthias Brugger -1 siblings, 0 replies; 30+ messages in thread From: Matthias Brugger @ 2021-11-17 13:50 UTC (permalink / raw) To: James Lo, Stephen Boyd, Rob Herring Cc: Hsin-Hsiung Wang, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group, Henry Chen On 15/11/2021 05:20, James Lo wrote: > Add spmi support for MT8195. > Refine indent in spmi-mtk-pmif.c. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Henry Chen <henryc.chen@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > drivers/spmi/spmi-mtk-pmif.c | 202 +++++++++++++++++++++++++---------- > 1 file changed, 145 insertions(+), 57 deletions(-) > > diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c > index 3283d0a5903c..ad511f2c3324 100644 > --- a/drivers/spmi/spmi-mtk-pmif.c > +++ b/drivers/spmi/spmi-mtk-pmif.c > @@ -105,51 +105,99 @@ enum pmif_regs { > }; > > static const u32 mt6873_regs[] = { > - [PMIF_INIT_DONE] = 0x0000, > - [PMIF_INF_EN] = 0x0024, > - [PMIF_ARB_EN] = 0x0150, > - [PMIF_CMDISSUE_EN] = 0x03B4, > - [PMIF_TIMER_CTRL] = 0x03E0, > - [PMIF_SPI_MODE_CTRL] = 0x0400, > - [PMIF_IRQ_EVENT_EN_0] = 0x0418, > - [PMIF_IRQ_FLAG_0] = 0x0420, > - [PMIF_IRQ_CLR_0] = 0x0424, > - [PMIF_IRQ_EVENT_EN_1] = 0x0428, > - [PMIF_IRQ_FLAG_1] = 0x0430, > - [PMIF_IRQ_CLR_1] = 0x0434, > - [PMIF_IRQ_EVENT_EN_2] = 0x0438, > - [PMIF_IRQ_FLAG_2] = 0x0440, > - [PMIF_IRQ_CLR_2] = 0x0444, > - [PMIF_IRQ_EVENT_EN_3] = 0x0448, > - [PMIF_IRQ_FLAG_3] = 0x0450, > - [PMIF_IRQ_CLR_3] = 0x0454, > - [PMIF_IRQ_EVENT_EN_4] = 0x0458, > - [PMIF_IRQ_FLAG_4] = 0x0460, > - [PMIF_IRQ_CLR_4] = 0x0464, > - [PMIF_WDT_EVENT_EN_0] = 0x046C, > - [PMIF_WDT_FLAG_0] = 0x0470, > - [PMIF_WDT_EVENT_EN_1] = 0x0474, > - [PMIF_WDT_FLAG_1] = 0x0478, > - [PMIF_SWINF_0_ACC] = 0x0C00, > - [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, > - [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, > - [PMIF_SWINF_0_VLD_CLR] = 0x0C24, > - [PMIF_SWINF_0_STA] = 0x0C28, > - [PMIF_SWINF_1_ACC] = 0x0C40, > - [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, > - [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, > - [PMIF_SWINF_1_VLD_CLR] = 0x0C64, > - [PMIF_SWINF_1_STA] = 0x0C68, > - [PMIF_SWINF_2_ACC] = 0x0C80, > - [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, > - [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, > - [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, > - [PMIF_SWINF_2_STA] = 0x0CA8, > - [PMIF_SWINF_3_ACC] = 0x0CC0, > - [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, > - [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, > - [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, > - [PMIF_SWINF_3_STA] = 0x0CE8, Please fix format in patch 3/4. > + [PMIF_INIT_DONE] = 0x0000, > + [PMIF_INF_EN] = 0x0024, > + [PMIF_ARB_EN] = 0x0150, > + [PMIF_CMDISSUE_EN] = 0x03B4, > + [PMIF_TIMER_CTRL] = 0x03E0, > + [PMIF_SPI_MODE_CTRL] = 0x0400, > + [PMIF_IRQ_EVENT_EN_0] = 0x0418, > + [PMIF_IRQ_FLAG_0] = 0x0420, > + [PMIF_IRQ_CLR_0] = 0x0424, > + [PMIF_IRQ_EVENT_EN_1] = 0x0428, > + [PMIF_IRQ_FLAG_1] = 0x0430, > + [PMIF_IRQ_CLR_1] = 0x0434, > + [PMIF_IRQ_EVENT_EN_2] = 0x0438, > + [PMIF_IRQ_FLAG_2] = 0x0440, > + [PMIF_IRQ_CLR_2] = 0x0444, > + [PMIF_IRQ_EVENT_EN_3] = 0x0448, > + [PMIF_IRQ_FLAG_3] = 0x0450, > + [PMIF_IRQ_CLR_3] = 0x0454, > + [PMIF_IRQ_EVENT_EN_4] = 0x0458, > + [PMIF_IRQ_FLAG_4] = 0x0460, > + [PMIF_IRQ_CLR_4] = 0x0464, > + [PMIF_WDT_EVENT_EN_0] = 0x046C, > + [PMIF_WDT_FLAG_0] = 0x0470, > + [PMIF_WDT_EVENT_EN_1] = 0x0474, > + [PMIF_WDT_FLAG_1] = 0x0478, > + [PMIF_SWINF_0_ACC] = 0x0C00, > + [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, > + [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, > + [PMIF_SWINF_0_VLD_CLR] = 0x0C24, > + [PMIF_SWINF_0_STA] = 0x0C28, > + [PMIF_SWINF_1_ACC] = 0x0C40, > + [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, > + [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, > + [PMIF_SWINF_1_VLD_CLR] = 0x0C64, > + [PMIF_SWINF_1_STA] = 0x0C68, > + [PMIF_SWINF_2_ACC] = 0x0C80, > + [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, > + [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, > + [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, > + [PMIF_SWINF_2_STA] = 0x0CA8, > + [PMIF_SWINF_3_ACC] = 0x0CC0, > + [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, > + [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, > + [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, > + [PMIF_SWINF_3_STA] = 0x0CE8, > +}; > + > +static const u32 mt8195_regs[] = { > + [PMIF_INIT_DONE] = 0x0000, > + [PMIF_INF_EN] = 0x0024, > + [PMIF_ARB_EN] = 0x0150, > + [PMIF_CMDISSUE_EN] = 0x03B8, > + [PMIF_TIMER_CTRL] = 0x03E4, > + [PMIF_SPI_MODE_CTRL] = 0x0408, > + [PMIF_IRQ_EVENT_EN_0] = 0x0420, > + [PMIF_IRQ_FLAG_0] = 0x0428, > + [PMIF_IRQ_CLR_0] = 0x042C, > + [PMIF_IRQ_EVENT_EN_1] = 0x0430, > + [PMIF_IRQ_FLAG_1] = 0x0438, > + [PMIF_IRQ_CLR_1] = 0x043C, > + [PMIF_IRQ_EVENT_EN_2] = 0x0440, > + [PMIF_IRQ_FLAG_2] = 0x0448, > + [PMIF_IRQ_CLR_2] = 0x044C, > + [PMIF_IRQ_EVENT_EN_3] = 0x0450, > + [PMIF_IRQ_FLAG_3] = 0x0458, > + [PMIF_IRQ_CLR_3] = 0x045C, > + [PMIF_IRQ_EVENT_EN_4] = 0x0460, > + [PMIF_IRQ_FLAG_4] = 0x0468, > + [PMIF_IRQ_CLR_4] = 0x046C, > + [PMIF_WDT_EVENT_EN_0] = 0x0474, > + [PMIF_WDT_FLAG_0] = 0x0478, > + [PMIF_WDT_EVENT_EN_1] = 0x047C, > + [PMIF_WDT_FLAG_1] = 0x0480, > + [PMIF_SWINF_0_ACC] = 0x0800, > + [PMIF_SWINF_0_WDATA_31_0] = 0x0804, > + [PMIF_SWINF_0_RDATA_31_0] = 0x0814, > + [PMIF_SWINF_0_VLD_CLR] = 0x0824, > + [PMIF_SWINF_0_STA] = 0x0828, > + [PMIF_SWINF_1_ACC] = 0x0840, > + [PMIF_SWINF_1_WDATA_31_0] = 0x0844, > + [PMIF_SWINF_1_RDATA_31_0] = 0x0854, > + [PMIF_SWINF_1_VLD_CLR] = 0x0864, > + [PMIF_SWINF_1_STA] = 0x0868, > + [PMIF_SWINF_2_ACC] = 0x0880, > + [PMIF_SWINF_2_WDATA_31_0] = 0x0884, > + [PMIF_SWINF_2_RDATA_31_0] = 0x0894, > + [PMIF_SWINF_2_VLD_CLR] = 0x08A4, > + [PMIF_SWINF_2_STA] = 0x08A8, > + [PMIF_SWINF_3_ACC] = 0x08C0, > + [PMIF_SWINF_3_WDATA_31_0] = 0x08C4, > + [PMIF_SWINF_3_RDATA_31_0] = 0x08D4, > + [PMIF_SWINF_3_VLD_CLR] = 0x08E4, > + [PMIF_SWINF_3_STA] = 0x08E8, > }; > > enum spmi_regs { > @@ -165,21 +213,52 @@ enum spmi_regs { > SPMI_REC3, > SPMI_REC4, > SPMI_MST_DBG, > + > + /* MT8195 spmi regs */ > + SPMI_MST_RCS_CTRL, > + SPMI_SLV_3_0_EINT, > + SPMI_SLV_7_4_EINT, > + SPMI_SLV_B_8_EINT, > + SPMI_SLV_F_C_EINT, > + SPMI_REC_CMD_DEC, > + SPMI_DEC_DBG, > }; > > static const u32 mt6873_spmi_regs[] = { > - [SPMI_OP_ST_CTRL] = 0x0000, > - [SPMI_GRP_ID_EN] = 0x0004, > - [SPMI_OP_ST_STA] = 0x0008, > - [SPMI_MST_SAMPL] = 0x000c, > - [SPMI_MST_REQ_EN] = 0x0010, > - [SPMI_REC_CTRL] = 0x0040, > - [SPMI_REC0] = 0x0044, > - [SPMI_REC1] = 0x0048, > - [SPMI_REC2] = 0x004c, > - [SPMI_REC3] = 0x0050, > - [SPMI_REC4] = 0x0054, > - [SPMI_MST_DBG] = 0x00fc, Same here. Regards, Matthias ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 4/4] spmi: mediatek: Add support for MT8195 @ 2021-11-17 13:50 ` Matthias Brugger 0 siblings, 0 replies; 30+ messages in thread From: Matthias Brugger @ 2021-11-17 13:50 UTC (permalink / raw) To: James Lo, Stephen Boyd, Rob Herring Cc: Hsin-Hsiung Wang, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group, Henry Chen On 15/11/2021 05:20, James Lo wrote: > Add spmi support for MT8195. > Refine indent in spmi-mtk-pmif.c. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Henry Chen <henryc.chen@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > drivers/spmi/spmi-mtk-pmif.c | 202 +++++++++++++++++++++++++---------- > 1 file changed, 145 insertions(+), 57 deletions(-) > > diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c > index 3283d0a5903c..ad511f2c3324 100644 > --- a/drivers/spmi/spmi-mtk-pmif.c > +++ b/drivers/spmi/spmi-mtk-pmif.c > @@ -105,51 +105,99 @@ enum pmif_regs { > }; > > static const u32 mt6873_regs[] = { > - [PMIF_INIT_DONE] = 0x0000, > - [PMIF_INF_EN] = 0x0024, > - [PMIF_ARB_EN] = 0x0150, > - [PMIF_CMDISSUE_EN] = 0x03B4, > - [PMIF_TIMER_CTRL] = 0x03E0, > - [PMIF_SPI_MODE_CTRL] = 0x0400, > - [PMIF_IRQ_EVENT_EN_0] = 0x0418, > - [PMIF_IRQ_FLAG_0] = 0x0420, > - [PMIF_IRQ_CLR_0] = 0x0424, > - [PMIF_IRQ_EVENT_EN_1] = 0x0428, > - [PMIF_IRQ_FLAG_1] = 0x0430, > - [PMIF_IRQ_CLR_1] = 0x0434, > - [PMIF_IRQ_EVENT_EN_2] = 0x0438, > - [PMIF_IRQ_FLAG_2] = 0x0440, > - [PMIF_IRQ_CLR_2] = 0x0444, > - [PMIF_IRQ_EVENT_EN_3] = 0x0448, > - [PMIF_IRQ_FLAG_3] = 0x0450, > - [PMIF_IRQ_CLR_3] = 0x0454, > - [PMIF_IRQ_EVENT_EN_4] = 0x0458, > - [PMIF_IRQ_FLAG_4] = 0x0460, > - [PMIF_IRQ_CLR_4] = 0x0464, > - [PMIF_WDT_EVENT_EN_0] = 0x046C, > - [PMIF_WDT_FLAG_0] = 0x0470, > - [PMIF_WDT_EVENT_EN_1] = 0x0474, > - [PMIF_WDT_FLAG_1] = 0x0478, > - [PMIF_SWINF_0_ACC] = 0x0C00, > - [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, > - [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, > - [PMIF_SWINF_0_VLD_CLR] = 0x0C24, > - [PMIF_SWINF_0_STA] = 0x0C28, > - [PMIF_SWINF_1_ACC] = 0x0C40, > - [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, > - [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, > - [PMIF_SWINF_1_VLD_CLR] = 0x0C64, > - [PMIF_SWINF_1_STA] = 0x0C68, > - [PMIF_SWINF_2_ACC] = 0x0C80, > - [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, > - [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, > - [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, > - [PMIF_SWINF_2_STA] = 0x0CA8, > - [PMIF_SWINF_3_ACC] = 0x0CC0, > - [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, > - [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, > - [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, > - [PMIF_SWINF_3_STA] = 0x0CE8, Please fix format in patch 3/4. > + [PMIF_INIT_DONE] = 0x0000, > + [PMIF_INF_EN] = 0x0024, > + [PMIF_ARB_EN] = 0x0150, > + [PMIF_CMDISSUE_EN] = 0x03B4, > + [PMIF_TIMER_CTRL] = 0x03E0, > + [PMIF_SPI_MODE_CTRL] = 0x0400, > + [PMIF_IRQ_EVENT_EN_0] = 0x0418, > + [PMIF_IRQ_FLAG_0] = 0x0420, > + [PMIF_IRQ_CLR_0] = 0x0424, > + [PMIF_IRQ_EVENT_EN_1] = 0x0428, > + [PMIF_IRQ_FLAG_1] = 0x0430, > + [PMIF_IRQ_CLR_1] = 0x0434, > + [PMIF_IRQ_EVENT_EN_2] = 0x0438, > + [PMIF_IRQ_FLAG_2] = 0x0440, > + [PMIF_IRQ_CLR_2] = 0x0444, > + [PMIF_IRQ_EVENT_EN_3] = 0x0448, > + [PMIF_IRQ_FLAG_3] = 0x0450, > + [PMIF_IRQ_CLR_3] = 0x0454, > + [PMIF_IRQ_EVENT_EN_4] = 0x0458, > + [PMIF_IRQ_FLAG_4] = 0x0460, > + [PMIF_IRQ_CLR_4] = 0x0464, > + [PMIF_WDT_EVENT_EN_0] = 0x046C, > + [PMIF_WDT_FLAG_0] = 0x0470, > + [PMIF_WDT_EVENT_EN_1] = 0x0474, > + [PMIF_WDT_FLAG_1] = 0x0478, > + [PMIF_SWINF_0_ACC] = 0x0C00, > + [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, > + [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, > + [PMIF_SWINF_0_VLD_CLR] = 0x0C24, > + [PMIF_SWINF_0_STA] = 0x0C28, > + [PMIF_SWINF_1_ACC] = 0x0C40, > + [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, > + [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, > + [PMIF_SWINF_1_VLD_CLR] = 0x0C64, > + [PMIF_SWINF_1_STA] = 0x0C68, > + [PMIF_SWINF_2_ACC] = 0x0C80, > + [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, > + [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, > + [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, > + [PMIF_SWINF_2_STA] = 0x0CA8, > + [PMIF_SWINF_3_ACC] = 0x0CC0, > + [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, > + [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, > + [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, > + [PMIF_SWINF_3_STA] = 0x0CE8, > +}; > + > +static const u32 mt8195_regs[] = { > + [PMIF_INIT_DONE] = 0x0000, > + [PMIF_INF_EN] = 0x0024, > + [PMIF_ARB_EN] = 0x0150, > + [PMIF_CMDISSUE_EN] = 0x03B8, > + [PMIF_TIMER_CTRL] = 0x03E4, > + [PMIF_SPI_MODE_CTRL] = 0x0408, > + [PMIF_IRQ_EVENT_EN_0] = 0x0420, > + [PMIF_IRQ_FLAG_0] = 0x0428, > + [PMIF_IRQ_CLR_0] = 0x042C, > + [PMIF_IRQ_EVENT_EN_1] = 0x0430, > + [PMIF_IRQ_FLAG_1] = 0x0438, > + [PMIF_IRQ_CLR_1] = 0x043C, > + [PMIF_IRQ_EVENT_EN_2] = 0x0440, > + [PMIF_IRQ_FLAG_2] = 0x0448, > + [PMIF_IRQ_CLR_2] = 0x044C, > + [PMIF_IRQ_EVENT_EN_3] = 0x0450, > + [PMIF_IRQ_FLAG_3] = 0x0458, > + [PMIF_IRQ_CLR_3] = 0x045C, > + [PMIF_IRQ_EVENT_EN_4] = 0x0460, > + [PMIF_IRQ_FLAG_4] = 0x0468, > + [PMIF_IRQ_CLR_4] = 0x046C, > + [PMIF_WDT_EVENT_EN_0] = 0x0474, > + [PMIF_WDT_FLAG_0] = 0x0478, > + [PMIF_WDT_EVENT_EN_1] = 0x047C, > + [PMIF_WDT_FLAG_1] = 0x0480, > + [PMIF_SWINF_0_ACC] = 0x0800, > + [PMIF_SWINF_0_WDATA_31_0] = 0x0804, > + [PMIF_SWINF_0_RDATA_31_0] = 0x0814, > + [PMIF_SWINF_0_VLD_CLR] = 0x0824, > + [PMIF_SWINF_0_STA] = 0x0828, > + [PMIF_SWINF_1_ACC] = 0x0840, > + [PMIF_SWINF_1_WDATA_31_0] = 0x0844, > + [PMIF_SWINF_1_RDATA_31_0] = 0x0854, > + [PMIF_SWINF_1_VLD_CLR] = 0x0864, > + [PMIF_SWINF_1_STA] = 0x0868, > + [PMIF_SWINF_2_ACC] = 0x0880, > + [PMIF_SWINF_2_WDATA_31_0] = 0x0884, > + [PMIF_SWINF_2_RDATA_31_0] = 0x0894, > + [PMIF_SWINF_2_VLD_CLR] = 0x08A4, > + [PMIF_SWINF_2_STA] = 0x08A8, > + [PMIF_SWINF_3_ACC] = 0x08C0, > + [PMIF_SWINF_3_WDATA_31_0] = 0x08C4, > + [PMIF_SWINF_3_RDATA_31_0] = 0x08D4, > + [PMIF_SWINF_3_VLD_CLR] = 0x08E4, > + [PMIF_SWINF_3_STA] = 0x08E8, > }; > > enum spmi_regs { > @@ -165,21 +213,52 @@ enum spmi_regs { > SPMI_REC3, > SPMI_REC4, > SPMI_MST_DBG, > + > + /* MT8195 spmi regs */ > + SPMI_MST_RCS_CTRL, > + SPMI_SLV_3_0_EINT, > + SPMI_SLV_7_4_EINT, > + SPMI_SLV_B_8_EINT, > + SPMI_SLV_F_C_EINT, > + SPMI_REC_CMD_DEC, > + SPMI_DEC_DBG, > }; > > static const u32 mt6873_spmi_regs[] = { > - [SPMI_OP_ST_CTRL] = 0x0000, > - [SPMI_GRP_ID_EN] = 0x0004, > - [SPMI_OP_ST_STA] = 0x0008, > - [SPMI_MST_SAMPL] = 0x000c, > - [SPMI_MST_REQ_EN] = 0x0010, > - [SPMI_REC_CTRL] = 0x0040, > - [SPMI_REC0] = 0x0044, > - [SPMI_REC1] = 0x0048, > - [SPMI_REC2] = 0x004c, > - [SPMI_REC3] = 0x0050, > - [SPMI_REC4] = 0x0054, > - [SPMI_MST_DBG] = 0x00fc, Same here. Regards, Matthias _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 4/4] spmi: mediatek: Add support for MT8195 @ 2021-11-17 13:50 ` Matthias Brugger 0 siblings, 0 replies; 30+ messages in thread From: Matthias Brugger @ 2021-11-17 13:50 UTC (permalink / raw) To: James Lo, Stephen Boyd, Rob Herring Cc: Hsin-Hsiung Wang, linux-kernel, devicetree, linux-arm-kernel, linux-mediatek, srv_heupstream, Project_Global_Chrome_Upstream_Group, Henry Chen On 15/11/2021 05:20, James Lo wrote: > Add spmi support for MT8195. > Refine indent in spmi-mtk-pmif.c. > > Signed-off-by: James Lo <james.lo@mediatek.com> > Signed-off-by: Henry Chen <henryc.chen@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > Acked-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > drivers/spmi/spmi-mtk-pmif.c | 202 +++++++++++++++++++++++++---------- > 1 file changed, 145 insertions(+), 57 deletions(-) > > diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c > index 3283d0a5903c..ad511f2c3324 100644 > --- a/drivers/spmi/spmi-mtk-pmif.c > +++ b/drivers/spmi/spmi-mtk-pmif.c > @@ -105,51 +105,99 @@ enum pmif_regs { > }; > > static const u32 mt6873_regs[] = { > - [PMIF_INIT_DONE] = 0x0000, > - [PMIF_INF_EN] = 0x0024, > - [PMIF_ARB_EN] = 0x0150, > - [PMIF_CMDISSUE_EN] = 0x03B4, > - [PMIF_TIMER_CTRL] = 0x03E0, > - [PMIF_SPI_MODE_CTRL] = 0x0400, > - [PMIF_IRQ_EVENT_EN_0] = 0x0418, > - [PMIF_IRQ_FLAG_0] = 0x0420, > - [PMIF_IRQ_CLR_0] = 0x0424, > - [PMIF_IRQ_EVENT_EN_1] = 0x0428, > - [PMIF_IRQ_FLAG_1] = 0x0430, > - [PMIF_IRQ_CLR_1] = 0x0434, > - [PMIF_IRQ_EVENT_EN_2] = 0x0438, > - [PMIF_IRQ_FLAG_2] = 0x0440, > - [PMIF_IRQ_CLR_2] = 0x0444, > - [PMIF_IRQ_EVENT_EN_3] = 0x0448, > - [PMIF_IRQ_FLAG_3] = 0x0450, > - [PMIF_IRQ_CLR_3] = 0x0454, > - [PMIF_IRQ_EVENT_EN_4] = 0x0458, > - [PMIF_IRQ_FLAG_4] = 0x0460, > - [PMIF_IRQ_CLR_4] = 0x0464, > - [PMIF_WDT_EVENT_EN_0] = 0x046C, > - [PMIF_WDT_FLAG_0] = 0x0470, > - [PMIF_WDT_EVENT_EN_1] = 0x0474, > - [PMIF_WDT_FLAG_1] = 0x0478, > - [PMIF_SWINF_0_ACC] = 0x0C00, > - [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, > - [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, > - [PMIF_SWINF_0_VLD_CLR] = 0x0C24, > - [PMIF_SWINF_0_STA] = 0x0C28, > - [PMIF_SWINF_1_ACC] = 0x0C40, > - [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, > - [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, > - [PMIF_SWINF_1_VLD_CLR] = 0x0C64, > - [PMIF_SWINF_1_STA] = 0x0C68, > - [PMIF_SWINF_2_ACC] = 0x0C80, > - [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, > - [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, > - [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, > - [PMIF_SWINF_2_STA] = 0x0CA8, > - [PMIF_SWINF_3_ACC] = 0x0CC0, > - [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, > - [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, > - [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, > - [PMIF_SWINF_3_STA] = 0x0CE8, Please fix format in patch 3/4. > + [PMIF_INIT_DONE] = 0x0000, > + [PMIF_INF_EN] = 0x0024, > + [PMIF_ARB_EN] = 0x0150, > + [PMIF_CMDISSUE_EN] = 0x03B4, > + [PMIF_TIMER_CTRL] = 0x03E0, > + [PMIF_SPI_MODE_CTRL] = 0x0400, > + [PMIF_IRQ_EVENT_EN_0] = 0x0418, > + [PMIF_IRQ_FLAG_0] = 0x0420, > + [PMIF_IRQ_CLR_0] = 0x0424, > + [PMIF_IRQ_EVENT_EN_1] = 0x0428, > + [PMIF_IRQ_FLAG_1] = 0x0430, > + [PMIF_IRQ_CLR_1] = 0x0434, > + [PMIF_IRQ_EVENT_EN_2] = 0x0438, > + [PMIF_IRQ_FLAG_2] = 0x0440, > + [PMIF_IRQ_CLR_2] = 0x0444, > + [PMIF_IRQ_EVENT_EN_3] = 0x0448, > + [PMIF_IRQ_FLAG_3] = 0x0450, > + [PMIF_IRQ_CLR_3] = 0x0454, > + [PMIF_IRQ_EVENT_EN_4] = 0x0458, > + [PMIF_IRQ_FLAG_4] = 0x0460, > + [PMIF_IRQ_CLR_4] = 0x0464, > + [PMIF_WDT_EVENT_EN_0] = 0x046C, > + [PMIF_WDT_FLAG_0] = 0x0470, > + [PMIF_WDT_EVENT_EN_1] = 0x0474, > + [PMIF_WDT_FLAG_1] = 0x0478, > + [PMIF_SWINF_0_ACC] = 0x0C00, > + [PMIF_SWINF_0_WDATA_31_0] = 0x0C04, > + [PMIF_SWINF_0_RDATA_31_0] = 0x0C14, > + [PMIF_SWINF_0_VLD_CLR] = 0x0C24, > + [PMIF_SWINF_0_STA] = 0x0C28, > + [PMIF_SWINF_1_ACC] = 0x0C40, > + [PMIF_SWINF_1_WDATA_31_0] = 0x0C44, > + [PMIF_SWINF_1_RDATA_31_0] = 0x0C54, > + [PMIF_SWINF_1_VLD_CLR] = 0x0C64, > + [PMIF_SWINF_1_STA] = 0x0C68, > + [PMIF_SWINF_2_ACC] = 0x0C80, > + [PMIF_SWINF_2_WDATA_31_0] = 0x0C84, > + [PMIF_SWINF_2_RDATA_31_0] = 0x0C94, > + [PMIF_SWINF_2_VLD_CLR] = 0x0CA4, > + [PMIF_SWINF_2_STA] = 0x0CA8, > + [PMIF_SWINF_3_ACC] = 0x0CC0, > + [PMIF_SWINF_3_WDATA_31_0] = 0x0CC4, > + [PMIF_SWINF_3_RDATA_31_0] = 0x0CD4, > + [PMIF_SWINF_3_VLD_CLR] = 0x0CE4, > + [PMIF_SWINF_3_STA] = 0x0CE8, > +}; > + > +static const u32 mt8195_regs[] = { > + [PMIF_INIT_DONE] = 0x0000, > + [PMIF_INF_EN] = 0x0024, > + [PMIF_ARB_EN] = 0x0150, > + [PMIF_CMDISSUE_EN] = 0x03B8, > + [PMIF_TIMER_CTRL] = 0x03E4, > + [PMIF_SPI_MODE_CTRL] = 0x0408, > + [PMIF_IRQ_EVENT_EN_0] = 0x0420, > + [PMIF_IRQ_FLAG_0] = 0x0428, > + [PMIF_IRQ_CLR_0] = 0x042C, > + [PMIF_IRQ_EVENT_EN_1] = 0x0430, > + [PMIF_IRQ_FLAG_1] = 0x0438, > + [PMIF_IRQ_CLR_1] = 0x043C, > + [PMIF_IRQ_EVENT_EN_2] = 0x0440, > + [PMIF_IRQ_FLAG_2] = 0x0448, > + [PMIF_IRQ_CLR_2] = 0x044C, > + [PMIF_IRQ_EVENT_EN_3] = 0x0450, > + [PMIF_IRQ_FLAG_3] = 0x0458, > + [PMIF_IRQ_CLR_3] = 0x045C, > + [PMIF_IRQ_EVENT_EN_4] = 0x0460, > + [PMIF_IRQ_FLAG_4] = 0x0468, > + [PMIF_IRQ_CLR_4] = 0x046C, > + [PMIF_WDT_EVENT_EN_0] = 0x0474, > + [PMIF_WDT_FLAG_0] = 0x0478, > + [PMIF_WDT_EVENT_EN_1] = 0x047C, > + [PMIF_WDT_FLAG_1] = 0x0480, > + [PMIF_SWINF_0_ACC] = 0x0800, > + [PMIF_SWINF_0_WDATA_31_0] = 0x0804, > + [PMIF_SWINF_0_RDATA_31_0] = 0x0814, > + [PMIF_SWINF_0_VLD_CLR] = 0x0824, > + [PMIF_SWINF_0_STA] = 0x0828, > + [PMIF_SWINF_1_ACC] = 0x0840, > + [PMIF_SWINF_1_WDATA_31_0] = 0x0844, > + [PMIF_SWINF_1_RDATA_31_0] = 0x0854, > + [PMIF_SWINF_1_VLD_CLR] = 0x0864, > + [PMIF_SWINF_1_STA] = 0x0868, > + [PMIF_SWINF_2_ACC] = 0x0880, > + [PMIF_SWINF_2_WDATA_31_0] = 0x0884, > + [PMIF_SWINF_2_RDATA_31_0] = 0x0894, > + [PMIF_SWINF_2_VLD_CLR] = 0x08A4, > + [PMIF_SWINF_2_STA] = 0x08A8, > + [PMIF_SWINF_3_ACC] = 0x08C0, > + [PMIF_SWINF_3_WDATA_31_0] = 0x08C4, > + [PMIF_SWINF_3_RDATA_31_0] = 0x08D4, > + [PMIF_SWINF_3_VLD_CLR] = 0x08E4, > + [PMIF_SWINF_3_STA] = 0x08E8, > }; > > enum spmi_regs { > @@ -165,21 +213,52 @@ enum spmi_regs { > SPMI_REC3, > SPMI_REC4, > SPMI_MST_DBG, > + > + /* MT8195 spmi regs */ > + SPMI_MST_RCS_CTRL, > + SPMI_SLV_3_0_EINT, > + SPMI_SLV_7_4_EINT, > + SPMI_SLV_B_8_EINT, > + SPMI_SLV_F_C_EINT, > + SPMI_REC_CMD_DEC, > + SPMI_DEC_DBG, > }; > > static const u32 mt6873_spmi_regs[] = { > - [SPMI_OP_ST_CTRL] = 0x0000, > - [SPMI_GRP_ID_EN] = 0x0004, > - [SPMI_OP_ST_STA] = 0x0008, > - [SPMI_MST_SAMPL] = 0x000c, > - [SPMI_MST_REQ_EN] = 0x0010, > - [SPMI_REC_CTRL] = 0x0040, > - [SPMI_REC0] = 0x0044, > - [SPMI_REC1] = 0x0048, > - [SPMI_REC2] = 0x004c, > - [SPMI_REC3] = 0x0050, > - [SPMI_REC4] = 0x0054, > - [SPMI_MST_DBG] = 0x00fc, Same here. Regards, Matthias _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 30+ messages in thread
end of thread, other threads:[~2021-11-18 22:45 UTC | newest] Thread overview: 30+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-11-15 4:20 [PATCH v15 0/4] Add SPMI support for Mediatek SoC IC James Lo 2021-11-15 4:20 ` James Lo 2021-11-15 4:20 ` James Lo 2021-11-15 4:20 ` [PATCH v15 1/4] dt-bindings: spmi: remove the constraint of reg property James Lo 2021-11-15 4:20 ` James Lo 2021-11-15 4:20 ` James Lo 2021-11-18 22:43 ` Rob Herring 2021-11-18 22:43 ` Rob Herring 2021-11-18 22:43 ` Rob Herring 2021-11-15 4:20 ` [PATCH v15 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller James Lo 2021-11-15 4:20 ` James Lo 2021-11-15 4:20 ` James Lo 2021-11-15 13:42 ` Rob Herring 2021-11-15 13:42 ` Rob Herring 2021-11-15 13:42 ` Rob Herring 2021-11-18 6:27 ` James Lo 2021-11-18 6:27 ` James Lo 2021-11-18 6:27 ` James Lo 2021-11-18 22:44 ` Rob Herring 2021-11-18 22:44 ` Rob Herring 2021-11-18 22:44 ` Rob Herring 2021-11-15 4:20 ` [PATCH v15 3/4] spmi: mediatek: Add support for MT6873/8192 James Lo 2021-11-15 4:20 ` James Lo 2021-11-15 4:20 ` James Lo 2021-11-15 4:20 ` [PATCH v15 4/4] spmi: mediatek: Add support for MT8195 James Lo 2021-11-15 4:20 ` James Lo 2021-11-15 4:20 ` James Lo 2021-11-17 13:50 ` Matthias Brugger 2021-11-17 13:50 ` Matthias Brugger 2021-11-17 13:50 ` Matthias Brugger
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