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From: Matt Roper <matthew.d.roper@intel.com>
To: Andi Shyti <andi.shyti@linux.intel.com>
Cc: "Sujaritha Sundaresan" <sujaritha.sundaresan@intel.com>,
	"Intel GFX" <intel-gfx@lists.freedesktop.org>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"DRI Devel" <dri-devel@lists.freedesktop.org>,
	"Chris Wilson" <chris@chris-wilson.co.uk>,
	"Andi Shyti" <andi@etezian.org>,
	"Michał Winiarski" <michal.winiarski@intel.com>
Subject: Re: [PATCH v9 1/6] drm/i915/gt: Use to_gt() helper for GGTT accesses
Date: Tue, 21 Dec 2021 08:47:50 -0800	[thread overview]
Message-ID: <YcIEwK4jzyyCdsAi@mdroper-desk1.amr.corp.intel.com> (raw)
In-Reply-To: <20211219212500.61432-2-andi.shyti@linux.intel.com>

On Sun, Dec 19, 2021 at 11:24:55PM +0200, Andi Shyti wrote:
> From: Michał Winiarski <michal.winiarski@intel.com>
> 
> GGTT is currently available both through i915->ggtt and gt->ggtt, and we
> eventually want to get rid of the i915->ggtt one.
> Use to_gt() for all i915->ggtt accesses to help with the future
> refactoring.
> 
> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
> Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_ggtt.c         | 14 +++++++-------
>  drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c |  6 +++---
>  drivers/gpu/drm/i915/gt/intel_region_lmem.c  |  4 ++--
>  drivers/gpu/drm/i915/gt/selftest_reset.c     |  2 +-
>  drivers/gpu/drm/i915/i915_driver.c           |  4 ++--
>  5 files changed, 15 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 971e737b37b2..ec3b998392ff 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -89,7 +89,7 @@ int i915_ggtt_init_hw(struct drm_i915_private *i915)
>  	 * beyond the end of the batch buffer, across the page boundary,
>  	 * and beyond the end of the GTT if we do not provide a guard.
>  	 */
> -	ret = ggtt_init_hw(&i915->ggtt);
> +	ret = ggtt_init_hw(to_gt(i915)->ggtt);
>  	if (ret)
>  		return ret;
>  
> @@ -725,14 +725,14 @@ int i915_init_ggtt(struct drm_i915_private *i915)
>  {
>  	int ret;
>  
> -	ret = init_ggtt(&i915->ggtt);
> +	ret = init_ggtt(to_gt(i915)->ggtt);
>  	if (ret)
>  		return ret;
>  
>  	if (INTEL_PPGTT(i915) == INTEL_PPGTT_ALIASING) {
> -		ret = init_aliasing_ppgtt(&i915->ggtt);
> +		ret = init_aliasing_ppgtt(to_gt(i915)->ggtt);
>  		if (ret)
> -			cleanup_init_ggtt(&i915->ggtt);
> +			cleanup_init_ggtt(to_gt(i915)->ggtt);
>  	}
>  
>  	return 0;
> @@ -775,7 +775,7 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
>   */
>  void i915_ggtt_driver_release(struct drm_i915_private *i915)
>  {
> -	struct i915_ggtt *ggtt = &i915->ggtt;
> +	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
>  
>  	fini_aliasing_ppgtt(ggtt);
>  
> @@ -790,7 +790,7 @@ void i915_ggtt_driver_release(struct drm_i915_private *i915)
>   */
>  void i915_ggtt_driver_late_release(struct drm_i915_private *i915)
>  {
> -	struct i915_ggtt *ggtt = &i915->ggtt;
> +	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
>  
>  	GEM_WARN_ON(kref_read(&ggtt->vm.resv_ref) != 1);
>  	dma_resv_fini(&ggtt->vm._resv);
> @@ -1232,7 +1232,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *i915)
>  {
>  	int ret;
>  
> -	ret = ggtt_probe_hw(&i915->ggtt, to_gt(i915));
> +	ret = ggtt_probe_hw(to_gt(i915)->ggtt, to_gt(i915));
>  	if (ret)
>  		return ret;
>  
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> index f8948de72036..beabf3bc9b75 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> @@ -728,8 +728,8 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
>  		swizzle_y = I915_BIT_6_SWIZZLE_NONE;
>  	}
>  
> -	i915->ggtt.bit_6_swizzle_x = swizzle_x;
> -	i915->ggtt.bit_6_swizzle_y = swizzle_y;
> +	to_gt(i915)->ggtt->bit_6_swizzle_x = swizzle_x;
> +	to_gt(i915)->ggtt->bit_6_swizzle_y = swizzle_y;
>  }
>  
>  /*
> @@ -896,7 +896,7 @@ void intel_gt_init_swizzling(struct intel_gt *gt)
>  	struct intel_uncore *uncore = gt->uncore;
>  
>  	if (GRAPHICS_VER(i915) < 5 ||
> -	    i915->ggtt.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
> +	    to_gt(i915)->ggtt->bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
>  		return;
>  
>  	intel_uncore_rmw(uncore, DISP_ARB_CTL, 0, DISP_TILE_SURFACE_SWIZZLING);
> diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> index fde2dcb59809..21215a080088 100644
> --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> @@ -15,7 +15,7 @@
>  static int init_fake_lmem_bar(struct intel_memory_region *mem)
>  {
>  	struct drm_i915_private *i915 = mem->i915;
> -	struct i915_ggtt *ggtt = &i915->ggtt;
> +	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
>  	unsigned long n;
>  	int ret;
>  
> @@ -131,7 +131,7 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
>  	if (!i915->params.fake_lmem_start)
>  		return ERR_PTR(-ENODEV);
>  
> -	GEM_BUG_ON(i915_ggtt_has_aperture(&i915->ggtt));
> +	GEM_BUG_ON(i915_ggtt_has_aperture(to_gt(i915)->ggtt));
>  
>  	/* Your mappable aperture belongs to me now! */
>  	mappable_end = pci_resource_len(pdev, 2);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
> index 8a873f6bda7f..37c38bdd5f47 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_reset.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
> @@ -19,7 +19,7 @@ __igt_reset_stolen(struct intel_gt *gt,
>  		   intel_engine_mask_t mask,
>  		   const char *msg)
>  {
> -	struct i915_ggtt *ggtt = &gt->i915->ggtt;
> +	struct i915_ggtt *ggtt = gt->ggtt;
>  	const struct resource *dsm = &gt->i915->dsm;
>  	resource_size_t num_pages, page;
>  	struct intel_engine_cs *engine;
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 95174938b160..60f8cbf24de7 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -571,6 +571,8 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
>  
>  	i915_perf_init(dev_priv);
>  
> +	intel_gt_init_hw_early(to_gt(dev_priv), &dev_priv->ggtt);
> +

Now that this function call has moved to this patch, you'll probably
want to mention/explain it in the commit message since it's different
from the rest of the changes in this patch.


Matt


>  	ret = i915_ggtt_probe_hw(dev_priv);
>  	if (ret)
>  		goto err_perf;
> @@ -587,8 +589,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
>  	if (ret)
>  		goto err_ggtt;
>  
> -	intel_gt_init_hw_early(to_gt(dev_priv), &dev_priv->ggtt);
> -
>  	ret = intel_gt_probe_lmem(to_gt(dev_priv));
>  	if (ret)
>  		goto err_mem_regions;
> -- 
> 2.34.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

WARNING: multiple messages have this Message-ID (diff)
From: Matt Roper <matthew.d.roper@intel.com>
To: Andi Shyti <andi.shyti@linux.intel.com>
Cc: "Intel GFX" <intel-gfx@lists.freedesktop.org>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"DRI Devel" <dri-devel@lists.freedesktop.org>,
	"Chris Wilson" <chris@chris-wilson.co.uk>,
	"Michał Winiarski" <michal.winiarski@intel.com>
Subject: Re: [Intel-gfx] [PATCH v9 1/6] drm/i915/gt: Use to_gt() helper for GGTT accesses
Date: Tue, 21 Dec 2021 08:47:50 -0800	[thread overview]
Message-ID: <YcIEwK4jzyyCdsAi@mdroper-desk1.amr.corp.intel.com> (raw)
In-Reply-To: <20211219212500.61432-2-andi.shyti@linux.intel.com>

On Sun, Dec 19, 2021 at 11:24:55PM +0200, Andi Shyti wrote:
> From: Michał Winiarski <michal.winiarski@intel.com>
> 
> GGTT is currently available both through i915->ggtt and gt->ggtt, and we
> eventually want to get rid of the i915->ggtt one.
> Use to_gt() for all i915->ggtt accesses to help with the future
> refactoring.
> 
> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
> Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_ggtt.c         | 14 +++++++-------
>  drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c |  6 +++---
>  drivers/gpu/drm/i915/gt/intel_region_lmem.c  |  4 ++--
>  drivers/gpu/drm/i915/gt/selftest_reset.c     |  2 +-
>  drivers/gpu/drm/i915/i915_driver.c           |  4 ++--
>  5 files changed, 15 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 971e737b37b2..ec3b998392ff 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -89,7 +89,7 @@ int i915_ggtt_init_hw(struct drm_i915_private *i915)
>  	 * beyond the end of the batch buffer, across the page boundary,
>  	 * and beyond the end of the GTT if we do not provide a guard.
>  	 */
> -	ret = ggtt_init_hw(&i915->ggtt);
> +	ret = ggtt_init_hw(to_gt(i915)->ggtt);
>  	if (ret)
>  		return ret;
>  
> @@ -725,14 +725,14 @@ int i915_init_ggtt(struct drm_i915_private *i915)
>  {
>  	int ret;
>  
> -	ret = init_ggtt(&i915->ggtt);
> +	ret = init_ggtt(to_gt(i915)->ggtt);
>  	if (ret)
>  		return ret;
>  
>  	if (INTEL_PPGTT(i915) == INTEL_PPGTT_ALIASING) {
> -		ret = init_aliasing_ppgtt(&i915->ggtt);
> +		ret = init_aliasing_ppgtt(to_gt(i915)->ggtt);
>  		if (ret)
> -			cleanup_init_ggtt(&i915->ggtt);
> +			cleanup_init_ggtt(to_gt(i915)->ggtt);
>  	}
>  
>  	return 0;
> @@ -775,7 +775,7 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
>   */
>  void i915_ggtt_driver_release(struct drm_i915_private *i915)
>  {
> -	struct i915_ggtt *ggtt = &i915->ggtt;
> +	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
>  
>  	fini_aliasing_ppgtt(ggtt);
>  
> @@ -790,7 +790,7 @@ void i915_ggtt_driver_release(struct drm_i915_private *i915)
>   */
>  void i915_ggtt_driver_late_release(struct drm_i915_private *i915)
>  {
> -	struct i915_ggtt *ggtt = &i915->ggtt;
> +	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
>  
>  	GEM_WARN_ON(kref_read(&ggtt->vm.resv_ref) != 1);
>  	dma_resv_fini(&ggtt->vm._resv);
> @@ -1232,7 +1232,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *i915)
>  {
>  	int ret;
>  
> -	ret = ggtt_probe_hw(&i915->ggtt, to_gt(i915));
> +	ret = ggtt_probe_hw(to_gt(i915)->ggtt, to_gt(i915));
>  	if (ret)
>  		return ret;
>  
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> index f8948de72036..beabf3bc9b75 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> @@ -728,8 +728,8 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
>  		swizzle_y = I915_BIT_6_SWIZZLE_NONE;
>  	}
>  
> -	i915->ggtt.bit_6_swizzle_x = swizzle_x;
> -	i915->ggtt.bit_6_swizzle_y = swizzle_y;
> +	to_gt(i915)->ggtt->bit_6_swizzle_x = swizzle_x;
> +	to_gt(i915)->ggtt->bit_6_swizzle_y = swizzle_y;
>  }
>  
>  /*
> @@ -896,7 +896,7 @@ void intel_gt_init_swizzling(struct intel_gt *gt)
>  	struct intel_uncore *uncore = gt->uncore;
>  
>  	if (GRAPHICS_VER(i915) < 5 ||
> -	    i915->ggtt.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
> +	    to_gt(i915)->ggtt->bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
>  		return;
>  
>  	intel_uncore_rmw(uncore, DISP_ARB_CTL, 0, DISP_TILE_SURFACE_SWIZZLING);
> diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> index fde2dcb59809..21215a080088 100644
> --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> @@ -15,7 +15,7 @@
>  static int init_fake_lmem_bar(struct intel_memory_region *mem)
>  {
>  	struct drm_i915_private *i915 = mem->i915;
> -	struct i915_ggtt *ggtt = &i915->ggtt;
> +	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
>  	unsigned long n;
>  	int ret;
>  
> @@ -131,7 +131,7 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
>  	if (!i915->params.fake_lmem_start)
>  		return ERR_PTR(-ENODEV);
>  
> -	GEM_BUG_ON(i915_ggtt_has_aperture(&i915->ggtt));
> +	GEM_BUG_ON(i915_ggtt_has_aperture(to_gt(i915)->ggtt));
>  
>  	/* Your mappable aperture belongs to me now! */
>  	mappable_end = pci_resource_len(pdev, 2);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
> index 8a873f6bda7f..37c38bdd5f47 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_reset.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
> @@ -19,7 +19,7 @@ __igt_reset_stolen(struct intel_gt *gt,
>  		   intel_engine_mask_t mask,
>  		   const char *msg)
>  {
> -	struct i915_ggtt *ggtt = &gt->i915->ggtt;
> +	struct i915_ggtt *ggtt = gt->ggtt;
>  	const struct resource *dsm = &gt->i915->dsm;
>  	resource_size_t num_pages, page;
>  	struct intel_engine_cs *engine;
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 95174938b160..60f8cbf24de7 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -571,6 +571,8 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
>  
>  	i915_perf_init(dev_priv);
>  
> +	intel_gt_init_hw_early(to_gt(dev_priv), &dev_priv->ggtt);
> +

Now that this function call has moved to this patch, you'll probably
want to mention/explain it in the commit message since it's different
from the rest of the changes in this patch.


Matt


>  	ret = i915_ggtt_probe_hw(dev_priv);
>  	if (ret)
>  		goto err_perf;
> @@ -587,8 +589,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
>  	if (ret)
>  		goto err_ggtt;
>  
> -	intel_gt_init_hw_early(to_gt(dev_priv), &dev_priv->ggtt);
> -
>  	ret = intel_gt_probe_lmem(to_gt(dev_priv));
>  	if (ret)
>  		goto err_mem_regions;
> -- 
> 2.34.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

  reply	other threads:[~2021-12-21 16:47 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-19 21:24 [PATCH v9 0/6] More preparation for multi gt patches Andi Shyti
2021-12-19 21:24 ` [Intel-gfx] " Andi Shyti
2021-12-19 21:24 ` [PATCH v9 1/6] drm/i915/gt: Use to_gt() helper for GGTT accesses Andi Shyti
2021-12-19 21:24   ` [Intel-gfx] " Andi Shyti
2021-12-21 16:47   ` Matt Roper [this message]
2021-12-21 16:47     ` Matt Roper
2021-12-21 19:59     ` [PATCH v10 " Andi Shyti
2021-12-21 19:59       ` [Intel-gfx] " Andi Shyti
2021-12-19 21:24 ` [PATCH v9 2/6] drm/i915: " Andi Shyti
2021-12-19 21:24   ` [Intel-gfx] " Andi Shyti
2021-12-21 17:01   ` Matt Roper
2021-12-21 17:01     ` [Intel-gfx] " Matt Roper
2021-12-21 19:46     ` Andi Shyti
2021-12-21 19:46       ` [Intel-gfx] " Andi Shyti
2022-01-03 21:17       ` Matt Roper
2022-01-03 21:17         ` [Intel-gfx] " Matt Roper
2022-01-04 17:52         ` Umesh Nerlige Ramappa
2022-01-04 17:52           ` [Intel-gfx] " Umesh Nerlige Ramappa
2022-01-04 22:27           ` Andi Shyti
2022-01-04 22:27             ` [Intel-gfx] " Andi Shyti
2022-01-04 22:35     ` [PATCH v10 " Andi Shyti
2022-01-04 22:35       ` [Intel-gfx] " Andi Shyti
2022-01-05  5:31       ` Matt Roper
2022-01-05  5:31         ` [Intel-gfx] " Matt Roper
2021-12-19 21:24 ` [PATCH v9 3/6] drm/i915/gem: " Andi Shyti
2021-12-19 21:24   ` [Intel-gfx] " Andi Shyti
2021-12-19 21:24 ` [PATCH v9 4/6] drm/i915/display: " Andi Shyti
2021-12-19 21:24   ` [Intel-gfx] " Andi Shyti
2021-12-19 21:24 ` [PATCH v9 5/6] drm/i915/selftests: " Andi Shyti
2021-12-19 21:24   ` [Intel-gfx] " Andi Shyti
2021-12-19 21:25 ` [PATCH v9 6/6] drm/i915: Remove unused i915->ggtt Andi Shyti
2021-12-19 21:25   ` [Intel-gfx] " Andi Shyti
2021-12-19 21:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More preparation for multi gt patches Patchwork
2021-12-19 21:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-12-19 22:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-19 23:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-12-21 22:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More preparation for multi gt patches (rev2) Patchwork
2021-12-21 22:10 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-12-21 22:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-22  2:47 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-01-04 23:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More preparation for multi gt patches (rev3) Patchwork
2022-01-04 23:08 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-01-04 23:34 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-01-05  5:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More preparation for multi gt patches (rev4) Patchwork
2022-01-05  5:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-01-05  6:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-01-05  7:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-01-05 19:08   ` Matt Roper

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