* [PATCH 0/2] Add toprgu reset-controller support for MT7986 @ 2022-01-05 10:04 ` Sam Shih 0 siblings, 0 replies; 21+ messages in thread From: Sam Shih @ 2022-01-05 10:04 UTC (permalink / raw) To: Wim Van Sebroeck, Guenter Roeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin, Sam Shih These patches aim to add watchdog toprgu reset-controller support for MT7986. Sam Shih (2): dt-bindings: reset: mt7986: Add reset-controller header file watchdog: mtk_wdt: mt7986: Add toprgu reset controller support drivers/watchdog/mtk_wdt.c | 6 +++ include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 include/dt-bindings/reset/mt7986-resets.h -- 2.29.2 ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 0/2] Add toprgu reset-controller support for MT7986 @ 2022-01-05 10:04 ` Sam Shih 0 siblings, 0 replies; 21+ messages in thread From: Sam Shih @ 2022-01-05 10:04 UTC (permalink / raw) To: Wim Van Sebroeck, Guenter Roeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin, Sam Shih These patches aim to add watchdog toprgu reset-controller support for MT7986. Sam Shih (2): dt-bindings: reset: mt7986: Add reset-controller header file watchdog: mtk_wdt: mt7986: Add toprgu reset controller support drivers/watchdog/mtk_wdt.c | 6 +++ include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 include/dt-bindings/reset/mt7986-resets.h -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 0/2] Add toprgu reset-controller support for MT7986 @ 2022-01-05 10:04 ` Sam Shih 0 siblings, 0 replies; 21+ messages in thread From: Sam Shih @ 2022-01-05 10:04 UTC (permalink / raw) To: Wim Van Sebroeck, Guenter Roeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin, Sam Shih These patches aim to add watchdog toprgu reset-controller support for MT7986. Sam Shih (2): dt-bindings: reset: mt7986: Add reset-controller header file watchdog: mtk_wdt: mt7986: Add toprgu reset controller support drivers/watchdog/mtk_wdt.c | 6 +++ include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 include/dt-bindings/reset/mt7986-resets.h -- 2.29.2 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 1/2] dt-bindings: reset: mt7986: Add reset-controller header file 2022-01-05 10:04 ` Sam Shih (?) @ 2022-01-05 10:04 ` Sam Shih -1 siblings, 0 replies; 21+ messages in thread From: Sam Shih @ 2022-01-05 10:04 UTC (permalink / raw) To: Wim Van Sebroeck, Guenter Roeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin, Sam Shih Add infracfg, toprgu, and ethsys reset-controller header file for MT7986 platform. Signed-off-by: Sam Shih <sam.shih@mediatek.com> --- include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 include/dt-bindings/reset/mt7986-resets.h diff --git a/include/dt-bindings/reset/mt7986-resets.h b/include/dt-bindings/reset/mt7986-resets.h new file mode 100644 index 000000000000..af3d16c81192 --- /dev/null +++ b/include/dt-bindings/reset/mt7986-resets.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ +/* + * Copyright (c) 2022 MediaTek Inc. + * Author: Sam Shih <sam.shih@mediatek.com> + */ + +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT7986 +#define _DT_BINDINGS_RESET_CONTROLLER_MT7986 + +/* INFRACFG resets */ +#define MT7986_INFRACFG_PEXTP_MAC_SW_RST 6 +#define MT7986_INFRACFG_SSUSB_SW_RST 7 +#define MT7986_INFRACFG_EIP97_SW_RST 8 +#define MT7986_INFRACFG_AUDIO_SW_RST 13 +#define MT7986_INFRACFG_CQ_DMA_SW_RST 14 + +#define MT7986_INFRACFG_TRNG_SW_RST 17 +#define MT7986_INFRACFG_AP_DMA_SW_RST 32 +#define MT7986_INFRACFG_I2C_SW_RST 33 +#define MT7986_INFRACFG_NFI_SW_RST 34 +#define MT7986_INFRACFG_SPI0_SW_RST 35 +#define MT7986_INFRACFG_SPI1_SW_RST 36 +#define MT7986_INFRACFG_UART0_SW_RST 37 +#define MT7986_INFRACFG_UART1_SW_RST 38 +#define MT7986_INFRACFG_UART2_SW_RST 39 +#define MT7986_INFRACFG_AUXADC_SW_RST 43 + +#define MT7986_INFRACFG_APXGPT_SW_RST 66 +#define MT7986_INFRACFG_PWM_SW_RST 68 + +#define MT7986_INFRACFG_SW_RST_NUM 69 + +/* TOPRGU resets */ +#define MT7986_TOPRGU_APMIXEDSYS_SW_RST 0 +#define MT7986_TOPRGU_SGMII0_SW_RST 1 +#define MT7986_TOPRGU_SGMII1_SW_RST 2 +#define MT7986_TOPRGU_INFRA_SW_RST 3 +#define MT7986_TOPRGU_U2PHY_SW_RST 5 +#define MT7986_TOPRGU_PCIE_SW_RST 6 +#define MT7986_TOPRGU_SSUSB_SW_RST 7 +#define MT7986_TOPRGU_ETHDMA_SW_RST 20 +#define MT7986_TOPRGU_CONSYS_SW_RST 23 + +#define MT7986_TOPRGU_SW_RST_NUM 24 + +/* ETHSYS Subsystem resets */ +#define MT7986_ETHSYS_FE_SW_RST 6 +#define MT7986_ETHSYS_PMTR_SW_RST 8 +#define MT7986_ETHSYS_GMAC_SW_RST 23 +#define MT7986_ETHSYS_PPE0_SW_RST 30 +#define MT7986_ETHSYS_PPE1_SW_RST 31 + +#define MT7986_ETHSYS_SW_RST_NUM 32 + +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7986 */ -- 2.29.2 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 1/2] dt-bindings: reset: mt7986: Add reset-controller header file @ 2022-01-05 10:04 ` Sam Shih 0 siblings, 0 replies; 21+ messages in thread From: Sam Shih @ 2022-01-05 10:04 UTC (permalink / raw) To: Wim Van Sebroeck, Guenter Roeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin, Sam Shih Add infracfg, toprgu, and ethsys reset-controller header file for MT7986 platform. Signed-off-by: Sam Shih <sam.shih@mediatek.com> --- include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 include/dt-bindings/reset/mt7986-resets.h diff --git a/include/dt-bindings/reset/mt7986-resets.h b/include/dt-bindings/reset/mt7986-resets.h new file mode 100644 index 000000000000..af3d16c81192 --- /dev/null +++ b/include/dt-bindings/reset/mt7986-resets.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ +/* + * Copyright (c) 2022 MediaTek Inc. + * Author: Sam Shih <sam.shih@mediatek.com> + */ + +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT7986 +#define _DT_BINDINGS_RESET_CONTROLLER_MT7986 + +/* INFRACFG resets */ +#define MT7986_INFRACFG_PEXTP_MAC_SW_RST 6 +#define MT7986_INFRACFG_SSUSB_SW_RST 7 +#define MT7986_INFRACFG_EIP97_SW_RST 8 +#define MT7986_INFRACFG_AUDIO_SW_RST 13 +#define MT7986_INFRACFG_CQ_DMA_SW_RST 14 + +#define MT7986_INFRACFG_TRNG_SW_RST 17 +#define MT7986_INFRACFG_AP_DMA_SW_RST 32 +#define MT7986_INFRACFG_I2C_SW_RST 33 +#define MT7986_INFRACFG_NFI_SW_RST 34 +#define MT7986_INFRACFG_SPI0_SW_RST 35 +#define MT7986_INFRACFG_SPI1_SW_RST 36 +#define MT7986_INFRACFG_UART0_SW_RST 37 +#define MT7986_INFRACFG_UART1_SW_RST 38 +#define MT7986_INFRACFG_UART2_SW_RST 39 +#define MT7986_INFRACFG_AUXADC_SW_RST 43 + +#define MT7986_INFRACFG_APXGPT_SW_RST 66 +#define MT7986_INFRACFG_PWM_SW_RST 68 + +#define MT7986_INFRACFG_SW_RST_NUM 69 + +/* TOPRGU resets */ +#define MT7986_TOPRGU_APMIXEDSYS_SW_RST 0 +#define MT7986_TOPRGU_SGMII0_SW_RST 1 +#define MT7986_TOPRGU_SGMII1_SW_RST 2 +#define MT7986_TOPRGU_INFRA_SW_RST 3 +#define MT7986_TOPRGU_U2PHY_SW_RST 5 +#define MT7986_TOPRGU_PCIE_SW_RST 6 +#define MT7986_TOPRGU_SSUSB_SW_RST 7 +#define MT7986_TOPRGU_ETHDMA_SW_RST 20 +#define MT7986_TOPRGU_CONSYS_SW_RST 23 + +#define MT7986_TOPRGU_SW_RST_NUM 24 + +/* ETHSYS Subsystem resets */ +#define MT7986_ETHSYS_FE_SW_RST 6 +#define MT7986_ETHSYS_PMTR_SW_RST 8 +#define MT7986_ETHSYS_GMAC_SW_RST 23 +#define MT7986_ETHSYS_PPE0_SW_RST 30 +#define MT7986_ETHSYS_PPE1_SW_RST 31 + +#define MT7986_ETHSYS_SW_RST_NUM 32 + +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7986 */ -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 1/2] dt-bindings: reset: mt7986: Add reset-controller header file @ 2022-01-05 10:04 ` Sam Shih 0 siblings, 0 replies; 21+ messages in thread From: Sam Shih @ 2022-01-05 10:04 UTC (permalink / raw) To: Wim Van Sebroeck, Guenter Roeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin, Sam Shih Add infracfg, toprgu, and ethsys reset-controller header file for MT7986 platform. Signed-off-by: Sam Shih <sam.shih@mediatek.com> --- include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 include/dt-bindings/reset/mt7986-resets.h diff --git a/include/dt-bindings/reset/mt7986-resets.h b/include/dt-bindings/reset/mt7986-resets.h new file mode 100644 index 000000000000..af3d16c81192 --- /dev/null +++ b/include/dt-bindings/reset/mt7986-resets.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ +/* + * Copyright (c) 2022 MediaTek Inc. + * Author: Sam Shih <sam.shih@mediatek.com> + */ + +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT7986 +#define _DT_BINDINGS_RESET_CONTROLLER_MT7986 + +/* INFRACFG resets */ +#define MT7986_INFRACFG_PEXTP_MAC_SW_RST 6 +#define MT7986_INFRACFG_SSUSB_SW_RST 7 +#define MT7986_INFRACFG_EIP97_SW_RST 8 +#define MT7986_INFRACFG_AUDIO_SW_RST 13 +#define MT7986_INFRACFG_CQ_DMA_SW_RST 14 + +#define MT7986_INFRACFG_TRNG_SW_RST 17 +#define MT7986_INFRACFG_AP_DMA_SW_RST 32 +#define MT7986_INFRACFG_I2C_SW_RST 33 +#define MT7986_INFRACFG_NFI_SW_RST 34 +#define MT7986_INFRACFG_SPI0_SW_RST 35 +#define MT7986_INFRACFG_SPI1_SW_RST 36 +#define MT7986_INFRACFG_UART0_SW_RST 37 +#define MT7986_INFRACFG_UART1_SW_RST 38 +#define MT7986_INFRACFG_UART2_SW_RST 39 +#define MT7986_INFRACFG_AUXADC_SW_RST 43 + +#define MT7986_INFRACFG_APXGPT_SW_RST 66 +#define MT7986_INFRACFG_PWM_SW_RST 68 + +#define MT7986_INFRACFG_SW_RST_NUM 69 + +/* TOPRGU resets */ +#define MT7986_TOPRGU_APMIXEDSYS_SW_RST 0 +#define MT7986_TOPRGU_SGMII0_SW_RST 1 +#define MT7986_TOPRGU_SGMII1_SW_RST 2 +#define MT7986_TOPRGU_INFRA_SW_RST 3 +#define MT7986_TOPRGU_U2PHY_SW_RST 5 +#define MT7986_TOPRGU_PCIE_SW_RST 6 +#define MT7986_TOPRGU_SSUSB_SW_RST 7 +#define MT7986_TOPRGU_ETHDMA_SW_RST 20 +#define MT7986_TOPRGU_CONSYS_SW_RST 23 + +#define MT7986_TOPRGU_SW_RST_NUM 24 + +/* ETHSYS Subsystem resets */ +#define MT7986_ETHSYS_FE_SW_RST 6 +#define MT7986_ETHSYS_PMTR_SW_RST 8 +#define MT7986_ETHSYS_GMAC_SW_RST 23 +#define MT7986_ETHSYS_PPE0_SW_RST 30 +#define MT7986_ETHSYS_PPE1_SW_RST 31 + +#define MT7986_ETHSYS_SW_RST_NUM 32 + +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7986 */ -- 2.29.2 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 1/2] dt-bindings: reset: mt7986: Add reset-controller header file 2022-01-05 10:04 ` Sam Shih (?) @ 2022-01-12 1:28 ` Rob Herring -1 siblings, 0 replies; 21+ messages in thread From: Rob Herring @ 2022-01-12 1:28 UTC (permalink / raw) To: Sam Shih Cc: Ryder Lee, linux-watchdog, linux-mediatek, John Crispin, Guenter Roeck, Philipp Zabel, linux-kernel, linux-arm-kernel, Rob Herring, devicetree, Wim Van Sebroeck, Matthias Brugger On Wed, 05 Jan 2022 18:04:55 +0800, Sam Shih wrote: > Add infracfg, toprgu, and ethsys reset-controller header file > for MT7986 platform. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > --- > include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 include/dt-bindings/reset/mt7986-resets.h > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/2] dt-bindings: reset: mt7986: Add reset-controller header file @ 2022-01-12 1:28 ` Rob Herring 0 siblings, 0 replies; 21+ messages in thread From: Rob Herring @ 2022-01-12 1:28 UTC (permalink / raw) To: Sam Shih Cc: Ryder Lee, linux-watchdog, linux-mediatek, John Crispin, Guenter Roeck, Philipp Zabel, linux-kernel, linux-arm-kernel, Rob Herring, devicetree, Wim Van Sebroeck, Matthias Brugger On Wed, 05 Jan 2022 18:04:55 +0800, Sam Shih wrote: > Add infracfg, toprgu, and ethsys reset-controller header file > for MT7986 platform. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > --- > include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 include/dt-bindings/reset/mt7986-resets.h > Acked-by: Rob Herring <robh@kernel.org> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/2] dt-bindings: reset: mt7986: Add reset-controller header file @ 2022-01-12 1:28 ` Rob Herring 0 siblings, 0 replies; 21+ messages in thread From: Rob Herring @ 2022-01-12 1:28 UTC (permalink / raw) To: Sam Shih Cc: Ryder Lee, linux-watchdog, linux-mediatek, John Crispin, Guenter Roeck, Philipp Zabel, linux-kernel, linux-arm-kernel, Rob Herring, devicetree, Wim Van Sebroeck, Matthias Brugger On Wed, 05 Jan 2022 18:04:55 +0800, Sam Shih wrote: > Add infracfg, toprgu, and ethsys reset-controller header file > for MT7986 platform. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > --- > include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 include/dt-bindings/reset/mt7986-resets.h > Acked-by: Rob Herring <robh@kernel.org> _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/2] dt-bindings: reset: mt7986: Add reset-controller header file 2022-01-05 10:04 ` Sam Shih (?) @ 2022-03-09 23:25 ` Guenter Roeck -1 siblings, 0 replies; 21+ messages in thread From: Guenter Roeck @ 2022-03-09 23:25 UTC (permalink / raw) To: Sam Shih Cc: Wim Van Sebroeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree, John Crispin On Wed, Jan 05, 2022 at 06:04:55PM +0800, Sam Shih wrote: > Add infracfg, toprgu, and ethsys reset-controller header file > for MT7986 platform. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > Acked-by: Rob Herring <robh@kernel.org> Acked-by: Guenter Roeck <linux@roeck-us.net> > --- > include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 include/dt-bindings/reset/mt7986-resets.h > > diff --git a/include/dt-bindings/reset/mt7986-resets.h b/include/dt-bindings/reset/mt7986-resets.h > new file mode 100644 > index 000000000000..af3d16c81192 > --- /dev/null > +++ b/include/dt-bindings/reset/mt7986-resets.h > @@ -0,0 +1,55 @@ > +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ > +/* > + * Copyright (c) 2022 MediaTek Inc. > + * Author: Sam Shih <sam.shih@mediatek.com> > + */ > + > +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT7986 > +#define _DT_BINDINGS_RESET_CONTROLLER_MT7986 > + > +/* INFRACFG resets */ > +#define MT7986_INFRACFG_PEXTP_MAC_SW_RST 6 > +#define MT7986_INFRACFG_SSUSB_SW_RST 7 > +#define MT7986_INFRACFG_EIP97_SW_RST 8 > +#define MT7986_INFRACFG_AUDIO_SW_RST 13 > +#define MT7986_INFRACFG_CQ_DMA_SW_RST 14 > + > +#define MT7986_INFRACFG_TRNG_SW_RST 17 > +#define MT7986_INFRACFG_AP_DMA_SW_RST 32 > +#define MT7986_INFRACFG_I2C_SW_RST 33 > +#define MT7986_INFRACFG_NFI_SW_RST 34 > +#define MT7986_INFRACFG_SPI0_SW_RST 35 > +#define MT7986_INFRACFG_SPI1_SW_RST 36 > +#define MT7986_INFRACFG_UART0_SW_RST 37 > +#define MT7986_INFRACFG_UART1_SW_RST 38 > +#define MT7986_INFRACFG_UART2_SW_RST 39 > +#define MT7986_INFRACFG_AUXADC_SW_RST 43 > + > +#define MT7986_INFRACFG_APXGPT_SW_RST 66 > +#define MT7986_INFRACFG_PWM_SW_RST 68 > + > +#define MT7986_INFRACFG_SW_RST_NUM 69 > + > +/* TOPRGU resets */ > +#define MT7986_TOPRGU_APMIXEDSYS_SW_RST 0 > +#define MT7986_TOPRGU_SGMII0_SW_RST 1 > +#define MT7986_TOPRGU_SGMII1_SW_RST 2 > +#define MT7986_TOPRGU_INFRA_SW_RST 3 > +#define MT7986_TOPRGU_U2PHY_SW_RST 5 > +#define MT7986_TOPRGU_PCIE_SW_RST 6 > +#define MT7986_TOPRGU_SSUSB_SW_RST 7 > +#define MT7986_TOPRGU_ETHDMA_SW_RST 20 > +#define MT7986_TOPRGU_CONSYS_SW_RST 23 > + > +#define MT7986_TOPRGU_SW_RST_NUM 24 > + > +/* ETHSYS Subsystem resets */ > +#define MT7986_ETHSYS_FE_SW_RST 6 > +#define MT7986_ETHSYS_PMTR_SW_RST 8 > +#define MT7986_ETHSYS_GMAC_SW_RST 23 > +#define MT7986_ETHSYS_PPE0_SW_RST 30 > +#define MT7986_ETHSYS_PPE1_SW_RST 31 > + > +#define MT7986_ETHSYS_SW_RST_NUM 32 > + > +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7986 */ _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/2] dt-bindings: reset: mt7986: Add reset-controller header file @ 2022-03-09 23:25 ` Guenter Roeck 0 siblings, 0 replies; 21+ messages in thread From: Guenter Roeck @ 2022-03-09 23:25 UTC (permalink / raw) To: Sam Shih Cc: Wim Van Sebroeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree, John Crispin On Wed, Jan 05, 2022 at 06:04:55PM +0800, Sam Shih wrote: > Add infracfg, toprgu, and ethsys reset-controller header file > for MT7986 platform. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > Acked-by: Rob Herring <robh@kernel.org> Acked-by: Guenter Roeck <linux@roeck-us.net> > --- > include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 include/dt-bindings/reset/mt7986-resets.h > > diff --git a/include/dt-bindings/reset/mt7986-resets.h b/include/dt-bindings/reset/mt7986-resets.h > new file mode 100644 > index 000000000000..af3d16c81192 > --- /dev/null > +++ b/include/dt-bindings/reset/mt7986-resets.h > @@ -0,0 +1,55 @@ > +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ > +/* > + * Copyright (c) 2022 MediaTek Inc. > + * Author: Sam Shih <sam.shih@mediatek.com> > + */ > + > +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT7986 > +#define _DT_BINDINGS_RESET_CONTROLLER_MT7986 > + > +/* INFRACFG resets */ > +#define MT7986_INFRACFG_PEXTP_MAC_SW_RST 6 > +#define MT7986_INFRACFG_SSUSB_SW_RST 7 > +#define MT7986_INFRACFG_EIP97_SW_RST 8 > +#define MT7986_INFRACFG_AUDIO_SW_RST 13 > +#define MT7986_INFRACFG_CQ_DMA_SW_RST 14 > + > +#define MT7986_INFRACFG_TRNG_SW_RST 17 > +#define MT7986_INFRACFG_AP_DMA_SW_RST 32 > +#define MT7986_INFRACFG_I2C_SW_RST 33 > +#define MT7986_INFRACFG_NFI_SW_RST 34 > +#define MT7986_INFRACFG_SPI0_SW_RST 35 > +#define MT7986_INFRACFG_SPI1_SW_RST 36 > +#define MT7986_INFRACFG_UART0_SW_RST 37 > +#define MT7986_INFRACFG_UART1_SW_RST 38 > +#define MT7986_INFRACFG_UART2_SW_RST 39 > +#define MT7986_INFRACFG_AUXADC_SW_RST 43 > + > +#define MT7986_INFRACFG_APXGPT_SW_RST 66 > +#define MT7986_INFRACFG_PWM_SW_RST 68 > + > +#define MT7986_INFRACFG_SW_RST_NUM 69 > + > +/* TOPRGU resets */ > +#define MT7986_TOPRGU_APMIXEDSYS_SW_RST 0 > +#define MT7986_TOPRGU_SGMII0_SW_RST 1 > +#define MT7986_TOPRGU_SGMII1_SW_RST 2 > +#define MT7986_TOPRGU_INFRA_SW_RST 3 > +#define MT7986_TOPRGU_U2PHY_SW_RST 5 > +#define MT7986_TOPRGU_PCIE_SW_RST 6 > +#define MT7986_TOPRGU_SSUSB_SW_RST 7 > +#define MT7986_TOPRGU_ETHDMA_SW_RST 20 > +#define MT7986_TOPRGU_CONSYS_SW_RST 23 > + > +#define MT7986_TOPRGU_SW_RST_NUM 24 > + > +/* ETHSYS Subsystem resets */ > +#define MT7986_ETHSYS_FE_SW_RST 6 > +#define MT7986_ETHSYS_PMTR_SW_RST 8 > +#define MT7986_ETHSYS_GMAC_SW_RST 23 > +#define MT7986_ETHSYS_PPE0_SW_RST 30 > +#define MT7986_ETHSYS_PPE1_SW_RST 31 > + > +#define MT7986_ETHSYS_SW_RST_NUM 32 > + > +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7986 */ ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/2] dt-bindings: reset: mt7986: Add reset-controller header file @ 2022-03-09 23:25 ` Guenter Roeck 0 siblings, 0 replies; 21+ messages in thread From: Guenter Roeck @ 2022-03-09 23:25 UTC (permalink / raw) To: Sam Shih Cc: Wim Van Sebroeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree, John Crispin On Wed, Jan 05, 2022 at 06:04:55PM +0800, Sam Shih wrote: > Add infracfg, toprgu, and ethsys reset-controller header file > for MT7986 platform. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > Acked-by: Rob Herring <robh@kernel.org> Acked-by: Guenter Roeck <linux@roeck-us.net> > --- > include/dt-bindings/reset/mt7986-resets.h | 55 +++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 include/dt-bindings/reset/mt7986-resets.h > > diff --git a/include/dt-bindings/reset/mt7986-resets.h b/include/dt-bindings/reset/mt7986-resets.h > new file mode 100644 > index 000000000000..af3d16c81192 > --- /dev/null > +++ b/include/dt-bindings/reset/mt7986-resets.h > @@ -0,0 +1,55 @@ > +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ > +/* > + * Copyright (c) 2022 MediaTek Inc. > + * Author: Sam Shih <sam.shih@mediatek.com> > + */ > + > +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT7986 > +#define _DT_BINDINGS_RESET_CONTROLLER_MT7986 > + > +/* INFRACFG resets */ > +#define MT7986_INFRACFG_PEXTP_MAC_SW_RST 6 > +#define MT7986_INFRACFG_SSUSB_SW_RST 7 > +#define MT7986_INFRACFG_EIP97_SW_RST 8 > +#define MT7986_INFRACFG_AUDIO_SW_RST 13 > +#define MT7986_INFRACFG_CQ_DMA_SW_RST 14 > + > +#define MT7986_INFRACFG_TRNG_SW_RST 17 > +#define MT7986_INFRACFG_AP_DMA_SW_RST 32 > +#define MT7986_INFRACFG_I2C_SW_RST 33 > +#define MT7986_INFRACFG_NFI_SW_RST 34 > +#define MT7986_INFRACFG_SPI0_SW_RST 35 > +#define MT7986_INFRACFG_SPI1_SW_RST 36 > +#define MT7986_INFRACFG_UART0_SW_RST 37 > +#define MT7986_INFRACFG_UART1_SW_RST 38 > +#define MT7986_INFRACFG_UART2_SW_RST 39 > +#define MT7986_INFRACFG_AUXADC_SW_RST 43 > + > +#define MT7986_INFRACFG_APXGPT_SW_RST 66 > +#define MT7986_INFRACFG_PWM_SW_RST 68 > + > +#define MT7986_INFRACFG_SW_RST_NUM 69 > + > +/* TOPRGU resets */ > +#define MT7986_TOPRGU_APMIXEDSYS_SW_RST 0 > +#define MT7986_TOPRGU_SGMII0_SW_RST 1 > +#define MT7986_TOPRGU_SGMII1_SW_RST 2 > +#define MT7986_TOPRGU_INFRA_SW_RST 3 > +#define MT7986_TOPRGU_U2PHY_SW_RST 5 > +#define MT7986_TOPRGU_PCIE_SW_RST 6 > +#define MT7986_TOPRGU_SSUSB_SW_RST 7 > +#define MT7986_TOPRGU_ETHDMA_SW_RST 20 > +#define MT7986_TOPRGU_CONSYS_SW_RST 23 > + > +#define MT7986_TOPRGU_SW_RST_NUM 24 > + > +/* ETHSYS Subsystem resets */ > +#define MT7986_ETHSYS_FE_SW_RST 6 > +#define MT7986_ETHSYS_PMTR_SW_RST 8 > +#define MT7986_ETHSYS_GMAC_SW_RST 23 > +#define MT7986_ETHSYS_PPE0_SW_RST 30 > +#define MT7986_ETHSYS_PPE1_SW_RST 31 > + > +#define MT7986_ETHSYS_SW_RST_NUM 32 > + > +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7986 */ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 2/2] watchdog: mtk_wdt: mt7986: Add toprgu reset controller support 2022-01-05 10:04 ` Sam Shih (?) @ 2022-01-05 10:04 ` Sam Shih -1 siblings, 0 replies; 21+ messages in thread From: Sam Shih @ 2022-01-05 10:04 UTC (permalink / raw) To: Wim Van Sebroeck, Guenter Roeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin, Sam Shih Besides watchdog, the mt7986 toprgu module also provides software reset functionality for various peripheral subsystems (eg, ethernet, pcie, and connectivity) Signed-off-by: Sam Shih <sam.shih@mediatek.com> --- drivers/watchdog/mtk_wdt.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c index 543cf38bd04e..c6437fe1f4c0 100644 --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c @@ -10,6 +10,7 @@ */ #include <dt-bindings/reset/mt2712-resets.h> +#include <dt-bindings/reset/mt7986-resets.h> #include <dt-bindings/reset/mt8183-resets.h> #include <dt-bindings/reset/mt8192-resets.h> #include <dt-bindings/reset/mt8195-resets.h> @@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_data = { .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM, }; +static const struct mtk_wdt_data mt7986_data = { + .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM, +}; + static const struct mtk_wdt_data mt8183_data = { .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, }; @@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device *dev) static const struct of_device_id mtk_wdt_dt_ids[] = { { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, { .compatible = "mediatek,mt6589-wdt" }, + { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data }, -- 2.29.2 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 2/2] watchdog: mtk_wdt: mt7986: Add toprgu reset controller support @ 2022-01-05 10:04 ` Sam Shih 0 siblings, 0 replies; 21+ messages in thread From: Sam Shih @ 2022-01-05 10:04 UTC (permalink / raw) To: Wim Van Sebroeck, Guenter Roeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin, Sam Shih Besides watchdog, the mt7986 toprgu module also provides software reset functionality for various peripheral subsystems (eg, ethernet, pcie, and connectivity) Signed-off-by: Sam Shih <sam.shih@mediatek.com> --- drivers/watchdog/mtk_wdt.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c index 543cf38bd04e..c6437fe1f4c0 100644 --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c @@ -10,6 +10,7 @@ */ #include <dt-bindings/reset/mt2712-resets.h> +#include <dt-bindings/reset/mt7986-resets.h> #include <dt-bindings/reset/mt8183-resets.h> #include <dt-bindings/reset/mt8192-resets.h> #include <dt-bindings/reset/mt8195-resets.h> @@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_data = { .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM, }; +static const struct mtk_wdt_data mt7986_data = { + .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM, +}; + static const struct mtk_wdt_data mt8183_data = { .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, }; @@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device *dev) static const struct of_device_id mtk_wdt_dt_ids[] = { { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, { .compatible = "mediatek,mt6589-wdt" }, + { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data }, -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 2/2] watchdog: mtk_wdt: mt7986: Add toprgu reset controller support @ 2022-01-05 10:04 ` Sam Shih 0 siblings, 0 replies; 21+ messages in thread From: Sam Shih @ 2022-01-05 10:04 UTC (permalink / raw) To: Wim Van Sebroeck, Guenter Roeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin, Sam Shih Besides watchdog, the mt7986 toprgu module also provides software reset functionality for various peripheral subsystems (eg, ethernet, pcie, and connectivity) Signed-off-by: Sam Shih <sam.shih@mediatek.com> --- drivers/watchdog/mtk_wdt.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c index 543cf38bd04e..c6437fe1f4c0 100644 --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c @@ -10,6 +10,7 @@ */ #include <dt-bindings/reset/mt2712-resets.h> +#include <dt-bindings/reset/mt7986-resets.h> #include <dt-bindings/reset/mt8183-resets.h> #include <dt-bindings/reset/mt8192-resets.h> #include <dt-bindings/reset/mt8195-resets.h> @@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_data = { .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM, }; +static const struct mtk_wdt_data mt7986_data = { + .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM, +}; + static const struct mtk_wdt_data mt8183_data = { .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, }; @@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device *dev) static const struct of_device_id mtk_wdt_dt_ids[] = { { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, { .compatible = "mediatek,mt6589-wdt" }, + { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data }, -- 2.29.2 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 2/2] watchdog: mtk_wdt: mt7986: Add toprgu reset controller support 2022-01-05 10:04 ` Sam Shih (?) @ 2022-01-14 12:56 ` Matthias Brugger -1 siblings, 0 replies; 21+ messages in thread From: Matthias Brugger @ 2022-01-14 12:56 UTC (permalink / raw) To: Sam Shih, Wim Van Sebroeck, Guenter Roeck, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin On 05/01/2022 11:04, Sam Shih wrote: > Besides watchdog, the mt7986 toprgu module also provides software reset > functionality for various peripheral subsystems > (eg, ethernet, pcie, and connectivity) > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- > drivers/watchdog/mtk_wdt.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c > index 543cf38bd04e..c6437fe1f4c0 100644 > --- a/drivers/watchdog/mtk_wdt.c > +++ b/drivers/watchdog/mtk_wdt.c > @@ -10,6 +10,7 @@ > */ > > #include <dt-bindings/reset/mt2712-resets.h> > +#include <dt-bindings/reset/mt7986-resets.h> > #include <dt-bindings/reset/mt8183-resets.h> > #include <dt-bindings/reset/mt8192-resets.h> > #include <dt-bindings/reset/mt8195-resets.h> > @@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_data = { > .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM, > }; > > +static const struct mtk_wdt_data mt7986_data = { > + .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM, > +}; > + > static const struct mtk_wdt_data mt8183_data = { > .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, > }; > @@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device *dev) > static const struct of_device_id mtk_wdt_dt_ids[] = { > { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, > { .compatible = "mediatek,mt6589-wdt" }, > + { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, > { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, > { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, > { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data }, > ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/2] watchdog: mtk_wdt: mt7986: Add toprgu reset controller support @ 2022-01-14 12:56 ` Matthias Brugger 0 siblings, 0 replies; 21+ messages in thread From: Matthias Brugger @ 2022-01-14 12:56 UTC (permalink / raw) To: Sam Shih, Wim Van Sebroeck, Guenter Roeck, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin On 05/01/2022 11:04, Sam Shih wrote: > Besides watchdog, the mt7986 toprgu module also provides software reset > functionality for various peripheral subsystems > (eg, ethernet, pcie, and connectivity) > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- > drivers/watchdog/mtk_wdt.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c > index 543cf38bd04e..c6437fe1f4c0 100644 > --- a/drivers/watchdog/mtk_wdt.c > +++ b/drivers/watchdog/mtk_wdt.c > @@ -10,6 +10,7 @@ > */ > > #include <dt-bindings/reset/mt2712-resets.h> > +#include <dt-bindings/reset/mt7986-resets.h> > #include <dt-bindings/reset/mt8183-resets.h> > #include <dt-bindings/reset/mt8192-resets.h> > #include <dt-bindings/reset/mt8195-resets.h> > @@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_data = { > .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM, > }; > > +static const struct mtk_wdt_data mt7986_data = { > + .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM, > +}; > + > static const struct mtk_wdt_data mt8183_data = { > .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, > }; > @@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device *dev) > static const struct of_device_id mtk_wdt_dt_ids[] = { > { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, > { .compatible = "mediatek,mt6589-wdt" }, > + { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, > { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, > { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, > { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data }, > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/2] watchdog: mtk_wdt: mt7986: Add toprgu reset controller support @ 2022-01-14 12:56 ` Matthias Brugger 0 siblings, 0 replies; 21+ messages in thread From: Matthias Brugger @ 2022-01-14 12:56 UTC (permalink / raw) To: Sam Shih, Wim Van Sebroeck, Guenter Roeck, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin On 05/01/2022 11:04, Sam Shih wrote: > Besides watchdog, the mt7986 toprgu module also provides software reset > functionality for various peripheral subsystems > (eg, ethernet, pcie, and connectivity) > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- > drivers/watchdog/mtk_wdt.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c > index 543cf38bd04e..c6437fe1f4c0 100644 > --- a/drivers/watchdog/mtk_wdt.c > +++ b/drivers/watchdog/mtk_wdt.c > @@ -10,6 +10,7 @@ > */ > > #include <dt-bindings/reset/mt2712-resets.h> > +#include <dt-bindings/reset/mt7986-resets.h> > #include <dt-bindings/reset/mt8183-resets.h> > #include <dt-bindings/reset/mt8192-resets.h> > #include <dt-bindings/reset/mt8195-resets.h> > @@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_data = { > .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM, > }; > > +static const struct mtk_wdt_data mt7986_data = { > + .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM, > +}; > + > static const struct mtk_wdt_data mt8183_data = { > .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, > }; > @@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device *dev) > static const struct of_device_id mtk_wdt_dt_ids[] = { > { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, > { .compatible = "mediatek,mt6589-wdt" }, > + { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, > { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, > { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, > { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data }, > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/2] watchdog: mtk_wdt: mt7986: Add toprgu reset controller support 2022-01-05 10:04 ` Sam Shih (?) @ 2022-01-14 14:35 ` Guenter Roeck -1 siblings, 0 replies; 21+ messages in thread From: Guenter Roeck @ 2022-01-14 14:35 UTC (permalink / raw) To: Sam Shih, Wim Van Sebroeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin On 1/5/22 2:04 AM, Sam Shih wrote: > Besides watchdog, the mt7986 toprgu module also provides software reset > functionality for various peripheral subsystems > (eg, ethernet, pcie, and connectivity) > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > drivers/watchdog/mtk_wdt.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c > index 543cf38bd04e..c6437fe1f4c0 100644 > --- a/drivers/watchdog/mtk_wdt.c > +++ b/drivers/watchdog/mtk_wdt.c > @@ -10,6 +10,7 @@ > */ > > #include <dt-bindings/reset/mt2712-resets.h> > +#include <dt-bindings/reset/mt7986-resets.h> > #include <dt-bindings/reset/mt8183-resets.h> > #include <dt-bindings/reset/mt8192-resets.h> > #include <dt-bindings/reset/mt8195-resets.h> > @@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_data = { > .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM, > }; > > +static const struct mtk_wdt_data mt7986_data = { > + .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM, > +}; > + > static const struct mtk_wdt_data mt8183_data = { > .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, > }; > @@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device *dev) > static const struct of_device_id mtk_wdt_dt_ids[] = { > { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, > { .compatible = "mediatek,mt6589-wdt" }, > + { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, > { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, > { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, > { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data }, > ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/2] watchdog: mtk_wdt: mt7986: Add toprgu reset controller support @ 2022-01-14 14:35 ` Guenter Roeck 0 siblings, 0 replies; 21+ messages in thread From: Guenter Roeck @ 2022-01-14 14:35 UTC (permalink / raw) To: Sam Shih, Wim Van Sebroeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin On 1/5/22 2:04 AM, Sam Shih wrote: > Besides watchdog, the mt7986 toprgu module also provides software reset > functionality for various peripheral subsystems > (eg, ethernet, pcie, and connectivity) > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > drivers/watchdog/mtk_wdt.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c > index 543cf38bd04e..c6437fe1f4c0 100644 > --- a/drivers/watchdog/mtk_wdt.c > +++ b/drivers/watchdog/mtk_wdt.c > @@ -10,6 +10,7 @@ > */ > > #include <dt-bindings/reset/mt2712-resets.h> > +#include <dt-bindings/reset/mt7986-resets.h> > #include <dt-bindings/reset/mt8183-resets.h> > #include <dt-bindings/reset/mt8192-resets.h> > #include <dt-bindings/reset/mt8195-resets.h> > @@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_data = { > .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM, > }; > > +static const struct mtk_wdt_data mt7986_data = { > + .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM, > +}; > + > static const struct mtk_wdt_data mt8183_data = { > .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, > }; > @@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device *dev) > static const struct of_device_id mtk_wdt_dt_ids[] = { > { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, > { .compatible = "mediatek,mt6589-wdt" }, > + { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, > { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, > { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, > { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data }, > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/2] watchdog: mtk_wdt: mt7986: Add toprgu reset controller support @ 2022-01-14 14:35 ` Guenter Roeck 0 siblings, 0 replies; 21+ messages in thread From: Guenter Roeck @ 2022-01-14 14:35 UTC (permalink / raw) To: Sam Shih, Wim Van Sebroeck, Matthias Brugger, Philipp Zabel, Rob Herring, Ryder Lee, linux-kernel, linux-watchdog, linux-arm-kernel, linux-mediatek, devicetree Cc: John Crispin On 1/5/22 2:04 AM, Sam Shih wrote: > Besides watchdog, the mt7986 toprgu module also provides software reset > functionality for various peripheral subsystems > (eg, ethernet, pcie, and connectivity) > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > drivers/watchdog/mtk_wdt.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c > index 543cf38bd04e..c6437fe1f4c0 100644 > --- a/drivers/watchdog/mtk_wdt.c > +++ b/drivers/watchdog/mtk_wdt.c > @@ -10,6 +10,7 @@ > */ > > #include <dt-bindings/reset/mt2712-resets.h> > +#include <dt-bindings/reset/mt7986-resets.h> > #include <dt-bindings/reset/mt8183-resets.h> > #include <dt-bindings/reset/mt8192-resets.h> > #include <dt-bindings/reset/mt8195-resets.h> > @@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_data = { > .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM, > }; > > +static const struct mtk_wdt_data mt7986_data = { > + .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM, > +}; > + > static const struct mtk_wdt_data mt8183_data = { > .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, > }; > @@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device *dev) > static const struct of_device_id mtk_wdt_dt_ids[] = { > { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, > { .compatible = "mediatek,mt6589-wdt" }, > + { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, > { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, > { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, > { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data }, > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2022-03-09 23:53 UTC | newest] Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-01-05 10:04 [PATCH 0/2] Add toprgu reset-controller support for MT7986 Sam Shih 2022-01-05 10:04 ` Sam Shih 2022-01-05 10:04 ` Sam Shih 2022-01-05 10:04 ` [PATCH 1/2] dt-bindings: reset: mt7986: Add reset-controller header file Sam Shih 2022-01-05 10:04 ` Sam Shih 2022-01-05 10:04 ` Sam Shih 2022-01-12 1:28 ` Rob Herring 2022-01-12 1:28 ` Rob Herring 2022-01-12 1:28 ` Rob Herring 2022-03-09 23:25 ` Guenter Roeck 2022-03-09 23:25 ` Guenter Roeck 2022-03-09 23:25 ` Guenter Roeck 2022-01-05 10:04 ` [PATCH 2/2] watchdog: mtk_wdt: mt7986: Add toprgu reset controller support Sam Shih 2022-01-05 10:04 ` Sam Shih 2022-01-05 10:04 ` Sam Shih 2022-01-14 12:56 ` Matthias Brugger 2022-01-14 12:56 ` Matthias Brugger 2022-01-14 12:56 ` Matthias Brugger 2022-01-14 14:35 ` Guenter Roeck 2022-01-14 14:35 ` Guenter Roeck 2022-01-14 14:35 ` Guenter Roeck
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