* [PATCH v3 0/3] Add initial support for exynos5420-chagall-wifi
@ 2022-01-16 16:50 ` Henrik Grimler
0 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-16 16:50 UTC (permalink / raw)
To: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, alim.akhtar, krzysztof.kozlowski, robh+dt,
devicetree, linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
Cc: Henrik Grimler
Samsung's tablet Galaxy Tab S 10.5" (wifi) has codename Chagall WiFi
and is one of several tablets released in 2014 based on Exynos 5420.
This initial devicetree adds support for accessing device over USB or
UART, and allows using a rootfs in either the internal eMMC or an
external sdcard. 4 out of 8 CPUs are brought up when device boots,
which is the same as on the somewhat similar board
exynos5420-arndale-octa.
Patch 2 is necessary after a secure-firmware node is added, otherwise
device hangs during the CPU1BOOT secure monitor call. Without the
secure-firmware node we are not able to bring up any secondary CPUs.
Changes since v2
================
Addressing Krzysztof's feedback:
* chagallwifi -> chagall-wifi and Chagall WiFi in messages and comments
* Re-write commit message for patch 3, use commit hash and ("subject"),
move hint about bootloader issue to galaxy-tab-common.dtsi
* Fix s2mps11 regulator nodes, use &ldoXX_reg handle for device customisation
* Re-add usbdrd supplies (works after fixing regulator nodes)
* Remove unnecessary, duplicate, compatible in galaxy-tab-common.dtsi
* Remove extra clocks xxti and xusbxti
* Prefix key- to gpio-keys
* Add pinctrl pins to mmc_2. card-detect pin is different than for other
Exynos 5420 devices, so define and use mmc2_cd node under pinctrl_0
Additional changes:
* Add/fix supplies of mmc_0 and mmc_2 (vmmc-supply for mmc0 is unknown)
* Sort mmc_X properties alphabetically
* Fix IRQ pin for s2mps11, it was wrong (gpx3-2 -> gpx3-0)
* Mark LDO31 as varying between devices as well, it differs between WiFi
and LTE tablet versions
* Fix typo for LDO5 (regulato-name -> regulator-name)
* Remove regulator-ramp-delay from buck regulators, based on
exynos5420-arndale-octa there should be no need to set it
Changes since v1
================
Fix mmc_0 and usbdrd in patch 3:
* Remove extra, non supported, options from mmc_0 node
* Do not set usbdrd supplies. Usb networking does not work with them
specified, but it works fine with dummy regulators
Henrik Grimler (3):
dt-bindings: arm: samsung: document Chagall WiFi board binding
ARM: exynos: only do SMC_CMD_CPU1BOOT call on Exynos4
ARM: dts: Add support for Samsung Chagall WiFi
.../bindings/arm/samsung/samsung-boards.yaml | 1 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/exynos5420-chagall-wifi.dts | 65 ++
.../dts/exynos5420-galaxy-tab-common.dtsi | 666 ++++++++++++++++++
arch/arm/mach-exynos/firmware.c | 4 +-
5 files changed, 736 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/exynos5420-chagall-wifi.dts
create mode 100644 arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
--
2.34.1
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v3 0/3] Add initial support for exynos5420-chagall-wifi
@ 2022-01-16 16:50 ` Henrik Grimler
0 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-16 16:50 UTC (permalink / raw)
To: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, alim.akhtar, krzysztof.kozlowski, robh+dt,
devicetree, linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
Cc: Henrik Grimler
Samsung's tablet Galaxy Tab S 10.5" (wifi) has codename Chagall WiFi
and is one of several tablets released in 2014 based on Exynos 5420.
This initial devicetree adds support for accessing device over USB or
UART, and allows using a rootfs in either the internal eMMC or an
external sdcard. 4 out of 8 CPUs are brought up when device boots,
which is the same as on the somewhat similar board
exynos5420-arndale-octa.
Patch 2 is necessary after a secure-firmware node is added, otherwise
device hangs during the CPU1BOOT secure monitor call. Without the
secure-firmware node we are not able to bring up any secondary CPUs.
Changes since v2
================
Addressing Krzysztof's feedback:
* chagallwifi -> chagall-wifi and Chagall WiFi in messages and comments
* Re-write commit message for patch 3, use commit hash and ("subject"),
move hint about bootloader issue to galaxy-tab-common.dtsi
* Fix s2mps11 regulator nodes, use &ldoXX_reg handle for device customisation
* Re-add usbdrd supplies (works after fixing regulator nodes)
* Remove unnecessary, duplicate, compatible in galaxy-tab-common.dtsi
* Remove extra clocks xxti and xusbxti
* Prefix key- to gpio-keys
* Add pinctrl pins to mmc_2. card-detect pin is different than for other
Exynos 5420 devices, so define and use mmc2_cd node under pinctrl_0
Additional changes:
* Add/fix supplies of mmc_0 and mmc_2 (vmmc-supply for mmc0 is unknown)
* Sort mmc_X properties alphabetically
* Fix IRQ pin for s2mps11, it was wrong (gpx3-2 -> gpx3-0)
* Mark LDO31 as varying between devices as well, it differs between WiFi
and LTE tablet versions
* Fix typo for LDO5 (regulato-name -> regulator-name)
* Remove regulator-ramp-delay from buck regulators, based on
exynos5420-arndale-octa there should be no need to set it
Changes since v1
================
Fix mmc_0 and usbdrd in patch 3:
* Remove extra, non supported, options from mmc_0 node
* Do not set usbdrd supplies. Usb networking does not work with them
specified, but it works fine with dummy regulators
Henrik Grimler (3):
dt-bindings: arm: samsung: document Chagall WiFi board binding
ARM: exynos: only do SMC_CMD_CPU1BOOT call on Exynos4
ARM: dts: Add support for Samsung Chagall WiFi
.../bindings/arm/samsung/samsung-boards.yaml | 1 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/exynos5420-chagall-wifi.dts | 65 ++
.../dts/exynos5420-galaxy-tab-common.dtsi | 666 ++++++++++++++++++
arch/arm/mach-exynos/firmware.c | 4 +-
5 files changed, 736 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/exynos5420-chagall-wifi.dts
create mode 100644 arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v3 1/3] dt-bindings: arm: samsung: document Chagall WiFi board binding
2022-01-16 16:50 ` Henrik Grimler
@ 2022-01-16 16:50 ` Henrik Grimler
-1 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-16 16:50 UTC (permalink / raw)
To: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, alim.akhtar, krzysztof.kozlowski, robh+dt,
devicetree, linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
Cc: Henrik Grimler
Add binding for Samsung Galaxy Tab S 10.5", based on Exynos 5420 with
codename chagall-wifi. It was released in 2014 and has several siblings
with similar hardware.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
---
.../devicetree/bindings/arm/samsung/samsung-boards.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
index 052cd94113d4..a2a8bf44fe9b 100644
--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
@@ -140,6 +140,7 @@ properties:
items:
- enum:
- insignal,arndale-octa # Insignal Arndale Octa
+ - samsung,chagall-wifi # Samsung SM-T800
- samsung,smdk5420 # Samsung SMDK5420 eval
- const: samsung,exynos5420
- const: samsung,exynos5
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 1/3] dt-bindings: arm: samsung: document Chagall WiFi board binding
@ 2022-01-16 16:50 ` Henrik Grimler
0 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-16 16:50 UTC (permalink / raw)
To: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, alim.akhtar, krzysztof.kozlowski, robh+dt,
devicetree, linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
Cc: Henrik Grimler
Add binding for Samsung Galaxy Tab S 10.5", based on Exynos 5420 with
codename chagall-wifi. It was released in 2014 and has several siblings
with similar hardware.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
---
.../devicetree/bindings/arm/samsung/samsung-boards.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
index 052cd94113d4..a2a8bf44fe9b 100644
--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
@@ -140,6 +140,7 @@ properties:
items:
- enum:
- insignal,arndale-octa # Insignal Arndale Octa
+ - samsung,chagall-wifi # Samsung SM-T800
- samsung,smdk5420 # Samsung SMDK5420 eval
- const: samsung,exynos5420
- const: samsung,exynos5
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 2/3] ARM: exynos: only do SMC_CMD_CPU1BOOT call on Exynos4
2022-01-16 16:50 ` Henrik Grimler
@ 2022-01-16 16:50 ` Henrik Grimler
-1 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-16 16:50 UTC (permalink / raw)
To: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, alim.akhtar, krzysztof.kozlowski, robh+dt,
devicetree, linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
Cc: Henrik Grimler
On Exynos5 the call is simply ignored by most variants of the
trustzone firmware. However, on some devices it instead causes the
device to hang, so let's avoid the call for the SoCs where it should
not be needed.
To see that the call is ignored, we can look into sboot/tzsw. On most
of the Exynos{4,5} devices the part of sboot/tzsw that seem to handle
the secure monitor calls is quite easy to recognise, the SMC number is
compared to known ones, and if equal it branches to the relevant
function. In assembly this looks something like:
;-- handle_smc:
0x00000514 650070e3 cmn r0, 0x65
0x00000518 0a00000a beq loc.smc_cmd_reg
0x0000051c 010070e3 cmn r0, 1
0x00000520 6c00000a beq loc.smc_cmd_init
0x00000524 020070e3 cmn r0, 2
0x00000528 6b00000a beq loc.smc_cmd_info
0x0000052c 030070e3 cmn r0, 3
0x00000530 6e00000a beq loc.smc_cmd_sleep
0x00000534 060070e3 cmn r0, 6
0x00000538 ae00000a beq loc.smc_cmd_save_state
0x0000053c 070070e3 cmn r0, 7
0x00000540 b400000a beq loc.smc_cmd_standby
0x00000544 2b01001a bne loc.smc_return_minus1
where above example is from exynos5420-arndale-octa. As can be seen
the case where r0 is 4 (i.e. SMC_CMD_CPU1BOOT) is not handled. The
annotations are taken from github.com/hsnaves/exynos5410-firmware,
where a large part of the exynos5410 trustzone firmware has been
reverse-engineered.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
Sent previously as RFC
---
arch/arm/mach-exynos/firmware.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 2eaf2dbb8e81..2da5b60b59e2 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -60,8 +60,10 @@ static int exynos_cpu_boot(int cpu)
/*
* Exynos3250 doesn't need to send smc command for secondary CPU boot
* because Exynos3250 removes WFE in secure mode.
+ *
+ * On Exynos5 devices the call is ignored by trustzone firmware.
*/
- if (soc_is_exynos3250())
+ if (!soc_is_exynos4210() && !soc_is_exynos4412())
return 0;
/*
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 2/3] ARM: exynos: only do SMC_CMD_CPU1BOOT call on Exynos4
@ 2022-01-16 16:50 ` Henrik Grimler
0 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-16 16:50 UTC (permalink / raw)
To: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, alim.akhtar, krzysztof.kozlowski, robh+dt,
devicetree, linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
Cc: Henrik Grimler
On Exynos5 the call is simply ignored by most variants of the
trustzone firmware. However, on some devices it instead causes the
device to hang, so let's avoid the call for the SoCs where it should
not be needed.
To see that the call is ignored, we can look into sboot/tzsw. On most
of the Exynos{4,5} devices the part of sboot/tzsw that seem to handle
the secure monitor calls is quite easy to recognise, the SMC number is
compared to known ones, and if equal it branches to the relevant
function. In assembly this looks something like:
;-- handle_smc:
0x00000514 650070e3 cmn r0, 0x65
0x00000518 0a00000a beq loc.smc_cmd_reg
0x0000051c 010070e3 cmn r0, 1
0x00000520 6c00000a beq loc.smc_cmd_init
0x00000524 020070e3 cmn r0, 2
0x00000528 6b00000a beq loc.smc_cmd_info
0x0000052c 030070e3 cmn r0, 3
0x00000530 6e00000a beq loc.smc_cmd_sleep
0x00000534 060070e3 cmn r0, 6
0x00000538 ae00000a beq loc.smc_cmd_save_state
0x0000053c 070070e3 cmn r0, 7
0x00000540 b400000a beq loc.smc_cmd_standby
0x00000544 2b01001a bne loc.smc_return_minus1
where above example is from exynos5420-arndale-octa. As can be seen
the case where r0 is 4 (i.e. SMC_CMD_CPU1BOOT) is not handled. The
annotations are taken from github.com/hsnaves/exynos5410-firmware,
where a large part of the exynos5410 trustzone firmware has been
reverse-engineered.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
Sent previously as RFC
---
arch/arm/mach-exynos/firmware.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 2eaf2dbb8e81..2da5b60b59e2 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -60,8 +60,10 @@ static int exynos_cpu_boot(int cpu)
/*
* Exynos3250 doesn't need to send smc command for secondary CPU boot
* because Exynos3250 removes WFE in secure mode.
+ *
+ * On Exynos5 devices the call is ignored by trustzone firmware.
*/
- if (soc_is_exynos3250())
+ if (!soc_is_exynos4210() && !soc_is_exynos4412())
return 0;
/*
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
2022-01-16 16:50 ` Henrik Grimler
@ 2022-01-16 16:50 ` Henrik Grimler
-1 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-16 16:50 UTC (permalink / raw)
To: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, alim.akhtar, krzysztof.kozlowski, robh+dt,
devicetree, linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
Cc: Henrik Grimler
Chagall WiFi, with product name Samsung Galaxy Tab S 10.5", is based
on Exynos 5420. This device is one of several tablet models released
in 2014 based on Exynos 5420.
The device tree added here contains support for:
- UART
- eMMC
- SD card
- USB
CCI has been disabled in the hardware, enabling it would require
(de-)soldering a resistor on the board. Trying to boot with it
enabled in kernel makes the device hang when CCI is probed.
Exynos5420-arndale-octa also has had CCI disabled due to issues, see
commit 25217fef3551 ("ARM: dts: disable CCI on exynos5420 based
arndale-octa").
Signed-off-by: Henrik Grimler <henrik@grimler.se>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/exynos5420-chagall-wifi.dts | 65 ++
.../dts/exynos5420-galaxy-tab-common.dtsi | 666 ++++++++++++++++++
3 files changed, 732 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos5420-chagall-wifi.dts
create mode 100644 arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0de64f237cd8..088fcedb3212 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -220,6 +220,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5420-arndale-octa.dtb \
exynos5420-peach-pit.dtb \
exynos5420-smdk5420.dtb \
+ exynos5420-chagall-wifi.dtb \
exynos5422-odroidhc1.dtb \
exynos5422-odroidxu3.dtb \
exynos5422-odroidxu3-lite.dtb \
diff --git a/arch/arm/boot/dts/exynos5420-chagall-wifi.dts b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
new file mode 100644
index 000000000000..2cc5cd01e8c6
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's Exynos5420 Chagall WiFi board device tree source
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2022 Henrik Grimler
+ */
+
+/dts-v1/;
+#include "exynos5420-galaxy-tab-common.dtsi"
+
+/ {
+ model = "Samsung Chagall WiFi based on Exynos5420";
+ compatible = "samsung,chagall-wifi", "samsung,exynos5420", \
+ "samsung,exynos5";
+};
+
+&ldo15_reg {
+ /* Unused */
+ regulator-name = "VDD_LDO15";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
+
+&ldo17_reg {
+ regulator-name = "VDD_IRLED_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3350000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+};
+
+&ldo28_reg {
+ /* Unused */
+ regulator-name = "VDD_LDO28";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
+
+&ldo29_reg {
+ regulator-name = "VDD_TCON_1V8";
+ regulator-min-microvolt = <1900000>;
+ regulator-max-microvolt = <1900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+};
+
+&ldo31_reg {
+ regulator-name = "VDD_GRIP_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+};
diff --git a/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
new file mode 100644
index 000000000000..119e4e7a8328
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
@@ -0,0 +1,666 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Base DT for Samsung's family of tablets based on Exynos5420.
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2022 Henrik Grimler
+ */
+
+/dts-v1/;
+#include "exynos5420.dtsi"
+#include "exynos5420-cpus.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/samsung,s2mps11.h>
+
+/ {
+ chassis-type = "tablet";
+
+ /*
+ * To successfully boot the mainline kernel with the stock
+ * bootloader (SBOOT), the tlb needs to be flushed after the
+ * page table pointer has been updated in __common_mmu_cache_on.
+ * The same hack is also needed to boot exynos4412-i9300 with
+ * stock bootloader, and probably other Samsung devices of
+ * similar age. See
+ * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com
+ * for more details.
+ */
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory@20000000 {
+ device_type = "memory";
+ reg = <0x20000000 0xc0000000>;
+ };
+
+ firmware@2073000 {
+ compatible = "samsung,secure-firmware";
+ reg = <0x02073000 0x1000>;
+ };
+
+ fixed-rate-clocks {
+ oscclk {
+ compatible = "samsung,exynos5420-oscclk";
+ clock-frequency = <24000000>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+
+ key-power {
+ debounce-interval = <10>;
+ gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
+ label = "Power";
+ linux,code = <KEY_POWER>;
+ wakeup-source;
+ };
+
+ key-home {
+ debounce-interval = <10>;
+ gpios = <&gpx0 5 GPIO_ACTIVE_LOW>;
+ label = "Home";
+ linux,code = <KEY_HOME>;
+ wakeup-source;
+ };
+
+ key-volume-up {
+ debounce-interval = <10>;
+ gpios = <&gpx0 2 GPIO_ACTIVE_LOW>;
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ };
+
+ key-volume-down {
+ debounce-interval = <10>;
+ gpios = <&gpx0 3 GPIO_ACTIVE_LOW>;
+ label = "Volume Down";
+ linux,code = <KEY_VOLUMEDOWN>;
+ };
+ };
+};
+
+&cci {
+ /* CCI is disabled in hardware */
+ status = "disabled";
+};
+
+&cpu0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck6_reg>;
+};
+
+&gpu {
+ status = "okay";
+ mali-supply = <&buck4_reg>;
+};
+
+&hsi2c_7 {
+ status = "okay";
+
+ pmic@66 {
+ compatible = "samsung,s2mps11-pmic";
+ reg = <0x66>;
+
+ interrupt-parent = <&gpx3>;
+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&s2mps11_irq>;
+
+ s2mps11_osc: clocks {
+ compatible = "samsung,s2mps11-clk";
+ #clock-cells = <1>;
+ clock-output-names = "s2mps11_ap", "s2mps11_cp",
+ "s2mps11_bt";
+ };
+
+ regulators {
+ buck1_reg: BUCK1 {
+ regulator-name = "VDD_MIF_1V1";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = "VDD_ARM_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck3_reg: BUCK3 {
+ regulator-name = "VDD_INT_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = "VDD_G3D_1V0";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck5_reg: BUCK5 {
+ regulator-name = "VDD_MEM_1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck6_reg: BUCK6 {
+ regulator-name = "VDD_KFC_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck7_reg: BUCK7 {
+ regulator-name = "VIN_LLDO_1V4";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+
+ buck8_reg: BUCK8 {
+ regulator-name = "VIN_MLDO_2V0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2100000>;
+ regulator-always-on;
+ };
+
+ buck9_reg: BUCK9 {
+ regulator-name = "VIN_HLDO_3V5";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3500000>;
+ regulator-always-on;
+ };
+
+ buck10_reg: BUCK10 {
+ regulator-name = "VDD_CAM_ISP_1V0";
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <3550000>;
+ };
+
+ ldo1_reg: LDO1 {
+ regulator-name = "VDD_ALIVE_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ ldo2_reg: LDO2 {
+ regulator-name = "VDD_APIO_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo3_reg: LDO3 {
+ regulator-name = "VDD_APIO_MMC01_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo4_reg: LDO4 {
+ regulator-name = "VDD_ADC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo5_reg: LDO5 {
+ /* Unused */
+ regulator-name = "VDD_LDO5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo6_reg: LDO6 {
+ regulator-name = "VDD_MIPI_1V0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo7_reg: LDO7 {
+ regulator-name = "VDD_MIPI_PLL_ABB1_18V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo8_reg: LDO8 {
+ /* Unused */
+ regulator-name = "VDD_LDO8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo9_reg: LDO9 {
+ regulator-name = "VDD_UOTG_3V0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo10_reg: LDO10 {
+ regulator-name = "VDDQ_PRE_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo11_reg: LDO11 {
+ regulator-name = "VDD_HSIC_1V0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo12_reg: LDO12 {
+ regulator-name = "VDD_HSIC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo13_reg: LDO13 {
+ regulator-name = "VDD_APIO_MMC2_2V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo14_reg: LDO14 {
+ regulator-name = "VDD_MOTOR_3V0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo15_reg: LDO15 {
+ regulator-name = "LDO15";
+ /*
+ * LDO15 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo16_reg: LDO16 {
+ regulator-name = "VDD_AP_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo17_reg: LDO17 {
+ regulator-name = "LDO17";
+ /*
+ * LDO17 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo18_reg: LDO18 {
+ /* Unused */
+ regulator-name = "VDD_LDO18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+
+ ldo19_reg: LDO19 {
+ regulator-name = "VDD_VTF_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo20_reg: LDO20 {
+ regulator-name = "VDD_CAM1_CAM_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo21_reg: LDO21 {
+ regulator-name = "VDD_CAM_IO_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo22_reg: LDO22 {
+ regulator-name = "VDD_CAM0_S_CORE_1V1";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo23_reg: LDO23 {
+ regulator-name = "VDD_MIFS_1V1";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo24_reg: LDO24 {
+ regulator-name = "VDD_TSP_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo25_reg: LDO25 {
+ /* Unused */
+ regulator-name = "VDD_LDO25";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3950000>;
+ };
+
+ ldo26_reg: LDO26 {
+ regulator-name = "VDD_CAM0_AF_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo27_reg: LDO27 {
+ regulator-name = "VDD_G3DS_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo28_reg: LDO28 {
+ regulator-name = "LDO28";
+ /*
+ * LDO28 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo29_reg: LDO29 {
+ regulator-name = "LDO29";
+ /*
+ * LDO29 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo30_reg: LDO30 {
+ regulator-name = "VDD_TOUCH_1V8";
+ regulator-min-microvolt = <1900000>;
+ regulator-max-microvolt = <1900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo31_reg: LDO31 {
+ regulator-name = "LDO31";
+ /*
+ * LDO31 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo32_reg: LDO32 {
+ regulator-name = "VDD_TSP_1V8";
+ regulator-min-microvolt = <1900000>;
+ regulator-max-microvolt = <1900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo33_reg: LDO33 {
+ regulator-name = "VDD_MHL_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo34_reg: LDO34 {
+ regulator-name = "VDD_MHL_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo35_reg: LDO35 {
+ regulator-name = "VDD_SIL_1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo36_reg: LDO36 {
+ /* Unused */
+ regulator-name = "VDD_LDO36";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3950000>;
+ };
+
+ ldo37_reg: LDO37 {
+ /* Unused */
+ regulator-name = "VDD_LDO37";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3950000>;
+ };
+
+ ldo38_reg: LDO38 {
+ regulator-name = "VDD_KEY_LED_3V3";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&mixer {
+ status = "okay";
+};
+
+/* Internal storage */
+&mmc_0 {
+ status = "okay";
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ card-detect-delay = <200>;
+ mmc-hs200-1_8v;
+ non-removable;
+ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+ pinctrl-names = "default";
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+ samsung,dw-mshc-sdr-timing = <0 4>;
+ vqmmc-supply = <&ldo3_reg>;
+};
+
+/* External sdcard */
+&mmc_2 {
+ status = "okay";
+ bus-width = <4>;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
+ pinctrl-names = "default";
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+ samsung,dw-mshc-sdr-timing = <0 4>;
+ sd-uhs-sdr50;
+ vmmc-supply = <&ldo19_reg>;
+ vqmmc-supply = <&ldo13_reg>;
+};
+
+&pinctrl_0 {
+ mmc2_cd: sd2-cd-pins {
+ samsung,pins = "gpx2-4";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
+ };
+
+ s2mps11_irq: s2mps11-irq-pins {
+ samsung,pins = "gpx3-0";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
+ };
+};
+
+&rtc {
+ status = "okay";
+ clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
+ clock-names = "rtc", "rtc_src";
+};
+
+&tmu_cpu0 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_cpu1 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_cpu2 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_cpu3 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_gpu {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&usbdrd_dwc3_0 {
+ dr_mode = "peripheral";
+};
+
+&usbdrd_dwc3_1 {
+ dr_mode = "peripheral";
+};
+
+&usbdrd3_0 {
+ vdd33-supply = <&ldo9_reg>;
+ vdd10-supply = <&ldo11_reg>;
+};
+
+&usbdrd3_1 {
+ vdd33-supply = <&ldo9_reg>;
+ vdd10-supply = <&ldo11_reg>;
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
@ 2022-01-16 16:50 ` Henrik Grimler
0 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-16 16:50 UTC (permalink / raw)
To: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, alim.akhtar, krzysztof.kozlowski, robh+dt,
devicetree, linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
Cc: Henrik Grimler
Chagall WiFi, with product name Samsung Galaxy Tab S 10.5", is based
on Exynos 5420. This device is one of several tablet models released
in 2014 based on Exynos 5420.
The device tree added here contains support for:
- UART
- eMMC
- SD card
- USB
CCI has been disabled in the hardware, enabling it would require
(de-)soldering a resistor on the board. Trying to boot with it
enabled in kernel makes the device hang when CCI is probed.
Exynos5420-arndale-octa also has had CCI disabled due to issues, see
commit 25217fef3551 ("ARM: dts: disable CCI on exynos5420 based
arndale-octa").
Signed-off-by: Henrik Grimler <henrik@grimler.se>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/exynos5420-chagall-wifi.dts | 65 ++
.../dts/exynos5420-galaxy-tab-common.dtsi | 666 ++++++++++++++++++
3 files changed, 732 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos5420-chagall-wifi.dts
create mode 100644 arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0de64f237cd8..088fcedb3212 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -220,6 +220,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5420-arndale-octa.dtb \
exynos5420-peach-pit.dtb \
exynos5420-smdk5420.dtb \
+ exynos5420-chagall-wifi.dtb \
exynos5422-odroidhc1.dtb \
exynos5422-odroidxu3.dtb \
exynos5422-odroidxu3-lite.dtb \
diff --git a/arch/arm/boot/dts/exynos5420-chagall-wifi.dts b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
new file mode 100644
index 000000000000..2cc5cd01e8c6
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's Exynos5420 Chagall WiFi board device tree source
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2022 Henrik Grimler
+ */
+
+/dts-v1/;
+#include "exynos5420-galaxy-tab-common.dtsi"
+
+/ {
+ model = "Samsung Chagall WiFi based on Exynos5420";
+ compatible = "samsung,chagall-wifi", "samsung,exynos5420", \
+ "samsung,exynos5";
+};
+
+&ldo15_reg {
+ /* Unused */
+ regulator-name = "VDD_LDO15";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
+
+&ldo17_reg {
+ regulator-name = "VDD_IRLED_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3350000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+};
+
+&ldo28_reg {
+ /* Unused */
+ regulator-name = "VDD_LDO28";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
+
+&ldo29_reg {
+ regulator-name = "VDD_TCON_1V8";
+ regulator-min-microvolt = <1900000>;
+ regulator-max-microvolt = <1900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+};
+
+&ldo31_reg {
+ regulator-name = "VDD_GRIP_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+};
diff --git a/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
new file mode 100644
index 000000000000..119e4e7a8328
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
@@ -0,0 +1,666 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Base DT for Samsung's family of tablets based on Exynos5420.
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2022 Henrik Grimler
+ */
+
+/dts-v1/;
+#include "exynos5420.dtsi"
+#include "exynos5420-cpus.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/samsung,s2mps11.h>
+
+/ {
+ chassis-type = "tablet";
+
+ /*
+ * To successfully boot the mainline kernel with the stock
+ * bootloader (SBOOT), the tlb needs to be flushed after the
+ * page table pointer has been updated in __common_mmu_cache_on.
+ * The same hack is also needed to boot exynos4412-i9300 with
+ * stock bootloader, and probably other Samsung devices of
+ * similar age. See
+ * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com
+ * for more details.
+ */
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory@20000000 {
+ device_type = "memory";
+ reg = <0x20000000 0xc0000000>;
+ };
+
+ firmware@2073000 {
+ compatible = "samsung,secure-firmware";
+ reg = <0x02073000 0x1000>;
+ };
+
+ fixed-rate-clocks {
+ oscclk {
+ compatible = "samsung,exynos5420-oscclk";
+ clock-frequency = <24000000>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+
+ key-power {
+ debounce-interval = <10>;
+ gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
+ label = "Power";
+ linux,code = <KEY_POWER>;
+ wakeup-source;
+ };
+
+ key-home {
+ debounce-interval = <10>;
+ gpios = <&gpx0 5 GPIO_ACTIVE_LOW>;
+ label = "Home";
+ linux,code = <KEY_HOME>;
+ wakeup-source;
+ };
+
+ key-volume-up {
+ debounce-interval = <10>;
+ gpios = <&gpx0 2 GPIO_ACTIVE_LOW>;
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ };
+
+ key-volume-down {
+ debounce-interval = <10>;
+ gpios = <&gpx0 3 GPIO_ACTIVE_LOW>;
+ label = "Volume Down";
+ linux,code = <KEY_VOLUMEDOWN>;
+ };
+ };
+};
+
+&cci {
+ /* CCI is disabled in hardware */
+ status = "disabled";
+};
+
+&cpu0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck6_reg>;
+};
+
+&gpu {
+ status = "okay";
+ mali-supply = <&buck4_reg>;
+};
+
+&hsi2c_7 {
+ status = "okay";
+
+ pmic@66 {
+ compatible = "samsung,s2mps11-pmic";
+ reg = <0x66>;
+
+ interrupt-parent = <&gpx3>;
+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&s2mps11_irq>;
+
+ s2mps11_osc: clocks {
+ compatible = "samsung,s2mps11-clk";
+ #clock-cells = <1>;
+ clock-output-names = "s2mps11_ap", "s2mps11_cp",
+ "s2mps11_bt";
+ };
+
+ regulators {
+ buck1_reg: BUCK1 {
+ regulator-name = "VDD_MIF_1V1";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = "VDD_ARM_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck3_reg: BUCK3 {
+ regulator-name = "VDD_INT_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = "VDD_G3D_1V0";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck5_reg: BUCK5 {
+ regulator-name = "VDD_MEM_1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck6_reg: BUCK6 {
+ regulator-name = "VDD_KFC_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck7_reg: BUCK7 {
+ regulator-name = "VIN_LLDO_1V4";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+
+ buck8_reg: BUCK8 {
+ regulator-name = "VIN_MLDO_2V0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2100000>;
+ regulator-always-on;
+ };
+
+ buck9_reg: BUCK9 {
+ regulator-name = "VIN_HLDO_3V5";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3500000>;
+ regulator-always-on;
+ };
+
+ buck10_reg: BUCK10 {
+ regulator-name = "VDD_CAM_ISP_1V0";
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <3550000>;
+ };
+
+ ldo1_reg: LDO1 {
+ regulator-name = "VDD_ALIVE_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ ldo2_reg: LDO2 {
+ regulator-name = "VDD_APIO_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo3_reg: LDO3 {
+ regulator-name = "VDD_APIO_MMC01_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo4_reg: LDO4 {
+ regulator-name = "VDD_ADC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo5_reg: LDO5 {
+ /* Unused */
+ regulator-name = "VDD_LDO5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo6_reg: LDO6 {
+ regulator-name = "VDD_MIPI_1V0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo7_reg: LDO7 {
+ regulator-name = "VDD_MIPI_PLL_ABB1_18V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo8_reg: LDO8 {
+ /* Unused */
+ regulator-name = "VDD_LDO8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo9_reg: LDO9 {
+ regulator-name = "VDD_UOTG_3V0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo10_reg: LDO10 {
+ regulator-name = "VDDQ_PRE_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo11_reg: LDO11 {
+ regulator-name = "VDD_HSIC_1V0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo12_reg: LDO12 {
+ regulator-name = "VDD_HSIC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo13_reg: LDO13 {
+ regulator-name = "VDD_APIO_MMC2_2V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo14_reg: LDO14 {
+ regulator-name = "VDD_MOTOR_3V0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo15_reg: LDO15 {
+ regulator-name = "LDO15";
+ /*
+ * LDO15 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo16_reg: LDO16 {
+ regulator-name = "VDD_AP_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo17_reg: LDO17 {
+ regulator-name = "LDO17";
+ /*
+ * LDO17 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo18_reg: LDO18 {
+ /* Unused */
+ regulator-name = "VDD_LDO18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+
+ ldo19_reg: LDO19 {
+ regulator-name = "VDD_VTF_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo20_reg: LDO20 {
+ regulator-name = "VDD_CAM1_CAM_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo21_reg: LDO21 {
+ regulator-name = "VDD_CAM_IO_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo22_reg: LDO22 {
+ regulator-name = "VDD_CAM0_S_CORE_1V1";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo23_reg: LDO23 {
+ regulator-name = "VDD_MIFS_1V1";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo24_reg: LDO24 {
+ regulator-name = "VDD_TSP_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo25_reg: LDO25 {
+ /* Unused */
+ regulator-name = "VDD_LDO25";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3950000>;
+ };
+
+ ldo26_reg: LDO26 {
+ regulator-name = "VDD_CAM0_AF_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo27_reg: LDO27 {
+ regulator-name = "VDD_G3DS_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo28_reg: LDO28 {
+ regulator-name = "LDO28";
+ /*
+ * LDO28 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo29_reg: LDO29 {
+ regulator-name = "LDO29";
+ /*
+ * LDO29 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo30_reg: LDO30 {
+ regulator-name = "VDD_TOUCH_1V8";
+ regulator-min-microvolt = <1900000>;
+ regulator-max-microvolt = <1900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo31_reg: LDO31 {
+ regulator-name = "LDO31";
+ /*
+ * LDO31 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo32_reg: LDO32 {
+ regulator-name = "VDD_TSP_1V8";
+ regulator-min-microvolt = <1900000>;
+ regulator-max-microvolt = <1900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo33_reg: LDO33 {
+ regulator-name = "VDD_MHL_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo34_reg: LDO34 {
+ regulator-name = "VDD_MHL_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo35_reg: LDO35 {
+ regulator-name = "VDD_SIL_1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo36_reg: LDO36 {
+ /* Unused */
+ regulator-name = "VDD_LDO36";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3950000>;
+ };
+
+ ldo37_reg: LDO37 {
+ /* Unused */
+ regulator-name = "VDD_LDO37";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3950000>;
+ };
+
+ ldo38_reg: LDO38 {
+ regulator-name = "VDD_KEY_LED_3V3";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&mixer {
+ status = "okay";
+};
+
+/* Internal storage */
+&mmc_0 {
+ status = "okay";
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ card-detect-delay = <200>;
+ mmc-hs200-1_8v;
+ non-removable;
+ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+ pinctrl-names = "default";
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+ samsung,dw-mshc-sdr-timing = <0 4>;
+ vqmmc-supply = <&ldo3_reg>;
+};
+
+/* External sdcard */
+&mmc_2 {
+ status = "okay";
+ bus-width = <4>;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
+ pinctrl-names = "default";
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+ samsung,dw-mshc-sdr-timing = <0 4>;
+ sd-uhs-sdr50;
+ vmmc-supply = <&ldo19_reg>;
+ vqmmc-supply = <&ldo13_reg>;
+};
+
+&pinctrl_0 {
+ mmc2_cd: sd2-cd-pins {
+ samsung,pins = "gpx2-4";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
+ };
+
+ s2mps11_irq: s2mps11-irq-pins {
+ samsung,pins = "gpx3-0";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
+ };
+};
+
+&rtc {
+ status = "okay";
+ clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
+ clock-names = "rtc", "rtc_src";
+};
+
+&tmu_cpu0 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_cpu1 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_cpu2 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_cpu3 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_gpu {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&usbdrd_dwc3_0 {
+ dr_mode = "peripheral";
+};
+
+&usbdrd_dwc3_1 {
+ dr_mode = "peripheral";
+};
+
+&usbdrd3_0 {
+ vdd33-supply = <&ldo9_reg>;
+ vdd10-supply = <&ldo11_reg>;
+};
+
+&usbdrd3_1 {
+ vdd33-supply = <&ldo9_reg>;
+ vdd10-supply = <&ldo11_reg>;
+};
--
2.34.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
2022-01-16 16:50 ` Henrik Grimler
@ 2022-01-16 17:37 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 18+ messages in thread
From: Krzysztof Kozlowski @ 2022-01-16 17:37 UTC (permalink / raw)
To: Henrik Grimler, semen.protsenko, virag.david003, martin.juecker,
cw00.choi, m.szyprowski, alim.akhtar, robh+dt, devicetree,
linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
On 16/01/2022 17:50, Henrik Grimler wrote:
> Chagall WiFi, with product name Samsung Galaxy Tab S 10.5", is based
> on Exynos 5420. This device is one of several tablet models released
> in 2014 based on Exynos 5420.
>
> The device tree added here contains support for:
>
> - UART
> - eMMC
> - SD card
> - USB
>
> CCI has been disabled in the hardware, enabling it would require
> (de-)soldering a resistor on the board. Trying to boot with it
> enabled in kernel makes the device hang when CCI is probed.
> Exynos5420-arndale-octa also has had CCI disabled due to issues, see
> commit 25217fef3551 ("ARM: dts: disable CCI on exynos5420 based
> arndale-octa").
>
> Signed-off-by: Henrik Grimler <henrik@grimler.se>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/exynos5420-chagall-wifi.dts | 65 ++
> .../dts/exynos5420-galaxy-tab-common.dtsi | 666 ++++++++++++++++++
> 3 files changed, 732 insertions(+)
> create mode 100644 arch/arm/boot/dts/exynos5420-chagall-wifi.dts
> create mode 100644 arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 0de64f237cd8..088fcedb3212 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -220,6 +220,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
> exynos5420-arndale-octa.dtb \
> exynos5420-peach-pit.dtb \
> exynos5420-smdk5420.dtb \
> + exynos5420-chagall-wifi.dtb \
> exynos5422-odroidhc1.dtb \
> exynos5422-odroidxu3.dtb \
> exynos5422-odroidxu3-lite.dtb \
> diff --git a/arch/arm/boot/dts/exynos5420-chagall-wifi.dts b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
> new file mode 100644
> index 000000000000..2cc5cd01e8c6
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
> @@ -0,0 +1,65 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung's Exynos5420 Chagall WiFi board device tree source
> + *
> + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + * Copyright (c) 2022 Henrik Grimler
> + */
> +
> +/dts-v1/;
> +#include "exynos5420-galaxy-tab-common.dtsi"
> +
> +/ {
> + model = "Samsung Chagall WiFi based on Exynos5420";
> + compatible = "samsung,chagall-wifi", "samsung,exynos5420", \
> + "samsung,exynos5";
> +};
> +
> +&ldo15_reg {
> + /* Unused */
> + regulator-name = "VDD_LDO15";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +};
> +
> +&ldo17_reg {
> + regulator-name = "VDD_IRLED_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3350000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> +};
> +
> +&ldo28_reg {
> + /* Unused */
> + regulator-name = "VDD_LDO28";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +};
> +
> +&ldo29_reg {
> + regulator-name = "VDD_TCON_1V8";
> + regulator-min-microvolt = <1900000>;
> + regulator-max-microvolt = <1900000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> +};
> +
> +&ldo31_reg {
> + regulator-name = "VDD_GRIP_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> +};
> diff --git a/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
> new file mode 100644
> index 000000000000..119e4e7a8328
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
> @@ -0,0 +1,666 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Base DT for Samsung's family of tablets based on Exynos5420.
> + *
> + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + * Copyright (c) 2022 Henrik Grimler
> + */
> +
> +/dts-v1/;
> +#include "exynos5420.dtsi"
> +#include "exynos5420-cpus.dtsi"
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/samsung,s2mps11.h>
> +
> +/ {
> + chassis-type = "tablet";
> +
> + /*
> + * To successfully boot the mainline kernel with the stock
> + * bootloader (SBOOT), the tlb needs to be flushed after the
> + * page table pointer has been updated in __common_mmu_cache_on.
> + * The same hack is also needed to boot exynos4412-i9300 with
> + * stock bootloader, and probably other Samsung devices of
> + * similar age. See
> + * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com
> + * for more details.
> + */
> +
> + chosen {
> + stdout-path = "serial2:115200n8";
> + };
> +
> + memory@20000000 {
> + device_type = "memory";
> + reg = <0x20000000 0xc0000000>;
> + };
> +
> + firmware@2073000 {
> + compatible = "samsung,secure-firmware";
> + reg = <0x02073000 0x1000>;
> + };
> +
> + fixed-rate-clocks {
> + oscclk {
> + compatible = "samsung,exynos5420-oscclk";
> + clock-frequency = <24000000>;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> +
> + key-power {
> + debounce-interval = <10>;
> + gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
> + label = "Power";
> + linux,code = <KEY_POWER>;
> + wakeup-source;
> + };
> +
> + key-home {
> + debounce-interval = <10>;
> + gpios = <&gpx0 5 GPIO_ACTIVE_LOW>;
> + label = "Home";
> + linux,code = <KEY_HOME>;
> + wakeup-source;
> + };
> +
> + key-volume-up {
> + debounce-interval = <10>;
> + gpios = <&gpx0 2 GPIO_ACTIVE_LOW>;
> + label = "Volume Up";
> + linux,code = <KEY_VOLUMEUP>;
> + };
> +
> + key-volume-down {
> + debounce-interval = <10>;
> + gpios = <&gpx0 3 GPIO_ACTIVE_LOW>;
> + label = "Volume Down";
> + linux,code = <KEY_VOLUMEDOWN>;
> + };
> + };
> +};
> +
> +&cci {
> + /* CCI is disabled in hardware */
> + status = "disabled";
> +};
> +
> +&cpu0 {
> + cpu-supply = <&buck2_reg>;
> +};
> +
> +&cpu4 {
> + cpu-supply = <&buck6_reg>;
> +};
> +
> +&gpu {
> + status = "okay";
> + mali-supply = <&buck4_reg>;
> +};
> +
> +&hsi2c_7 {
> + status = "okay";
> +
> + pmic@66 {
> + compatible = "samsung,s2mps11-pmic";
> + reg = <0x66>;
> +
> + interrupt-parent = <&gpx3>;
> + interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&s2mps11_irq>;
> +
> + s2mps11_osc: clocks {
> + compatible = "samsung,s2mps11-clk";
> + #clock-cells = <1>;
> + clock-output-names = "s2mps11_ap", "s2mps11_cp",
> + "s2mps11_bt";
> + };
> +
> + regulators {
> + buck1_reg: BUCK1 {
> + regulator-name = "VDD_MIF_1V1";
> + regulator-min-microvolt = <700000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck2_reg: BUCK2 {
> + regulator-name = "VDD_ARM_1V0";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck3_reg: BUCK3 {
> + regulator-name = "VDD_INT_1V0";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1400000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck4_reg: BUCK4 {
> + regulator-name = "VDD_G3D_1V0";
> + regulator-min-microvolt = <700000>;
> + regulator-max-microvolt = <1400000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck5_reg: BUCK5 {
> + regulator-name = "VDD_MEM_1V2";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + buck6_reg: BUCK6 {
> + regulator-name = "VDD_KFC_1V0";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck7_reg: BUCK7 {
> + regulator-name = "VIN_LLDO_1V4";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + };
> +
> + buck8_reg: BUCK8 {
> + regulator-name = "VIN_MLDO_2V0";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2100000>;
> + regulator-always-on;
> + };
> +
> + buck9_reg: BUCK9 {
> + regulator-name = "VIN_HLDO_3V5";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3500000>;
> + regulator-always-on;
> + };
> +
> + buck10_reg: BUCK10 {
> + regulator-name = "VDD_CAM_ISP_1V0";
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <3550000>;
> + };
> +
> + ldo1_reg: LDO1 {
> + regulator-name = "VDD_ALIVE_1.0V";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + };
> +
> + ldo2_reg: LDO2 {
> + regulator-name = "VDD_APIO_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo3_reg: LDO3 {
> + regulator-name = "VDD_APIO_MMC01_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo4_reg: LDO4 {
> + regulator-name = "VDD_ADC_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo5_reg: LDO5 {
> + /* Unused */
> + regulator-name = "VDD_LDO5";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo6_reg: LDO6 {
> + regulator-name = "VDD_MIPI_1V0";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo7_reg: LDO7 {
> + regulator-name = "VDD_MIPI_PLL_ABB1_18V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo8_reg: LDO8 {
> + /* Unused */
> + regulator-name = "VDD_LDO8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo9_reg: LDO9 {
> + regulator-name = "VDD_UOTG_3V0";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo10_reg: LDO10 {
> + regulator-name = "VDDQ_PRE_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo11_reg: LDO11 {
> + regulator-name = "VDD_HSIC_1V0";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo12_reg: LDO12 {
> + regulator-name = "VDD_HSIC_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo13_reg: LDO13 {
> + regulator-name = "VDD_APIO_MMC2_2V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo14_reg: LDO14 {
> + regulator-name = "VDD_MOTOR_3V0";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo15_reg: LDO15 {
> + regulator-name = "LDO15";
> + /*
> + * LDO15 varies between devices and is
> + * specified in the device dts
> + */
> + };
> +
> + ldo16_reg: LDO16 {
> + regulator-name = "VDD_AP_2V8";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + ldo17_reg: LDO17 {
> + regulator-name = "LDO17";
> + /*
> + * LDO17 varies between devices and is
> + * specified in the device dts
> + */
> + };
> +
> + ldo18_reg: LDO18 {
> + /* Unused */
> + regulator-name = "VDD_LDO18";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> +
> + ldo19_reg: LDO19 {
> + regulator-name = "VDD_VTF_2V8";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo20_reg: LDO20 {
> + regulator-name = "VDD_CAM1_CAM_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo21_reg: LDO21 {
> + regulator-name = "VDD_CAM_IO_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo22_reg: LDO22 {
> + regulator-name = "VDD_CAM0_S_CORE_1V1";
> + regulator-min-microvolt = <1050000>;
> + regulator-max-microvolt = <1200000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo23_reg: LDO23 {
> + regulator-name = "VDD_MIFS_1V1";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1100000>;
> + regulator-always-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + ldo24_reg: LDO24 {
> + regulator-name = "VDD_TSP_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo25_reg: LDO25 {
> + /* Unused */
> + regulator-name = "VDD_LDO25";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3950000>;
> + };
> +
> + ldo26_reg: LDO26 {
> + regulator-name = "VDD_CAM0_AF_2V8";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo27_reg: LDO27 {
> + regulator-name = "VDD_G3DS_1V0";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + ldo28_reg: LDO28 {
> + regulator-name = "LDO28";
> + /*
> + * LDO28 varies between devices and is
> + * specified in the device dts
> + */
> + };
> +
> + ldo29_reg: LDO29 {
> + regulator-name = "LDO29";
> + /*
> + * LDO29 varies between devices and is
> + * specified in the device dts
> + */
> + };
> +
> + ldo30_reg: LDO30 {
> + regulator-name = "VDD_TOUCH_1V8";
> + regulator-min-microvolt = <1900000>;
> + regulator-max-microvolt = <1900000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo31_reg: LDO31 {
> + regulator-name = "LDO31";
> + /*
> + * LDO31 varies between devices and is
> + * specified in the device dts
> + */
> + };
> +
> + ldo32_reg: LDO32 {
> + regulator-name = "VDD_TSP_1V8";
> + regulator-min-microvolt = <1900000>;
> + regulator-max-microvolt = <1900000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo33_reg: LDO33 {
> + regulator-name = "VDD_MHL_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo34_reg: LDO34 {
> + regulator-name = "VDD_MHL_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo35_reg: LDO35 {
> + regulator-name = "VDD_SIL_1V2";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo36_reg: LDO36 {
> + /* Unused */
> + regulator-name = "VDD_LDO36";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3950000>;
> + };
> +
> + ldo37_reg: LDO37 {
> + /* Unused */
> + regulator-name = "VDD_LDO37";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3950000>;
> + };
> +
> + ldo38_reg: LDO38 {
> + regulator-name = "VDD_KEY_LED_3V3";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> + };
> + };
> +};
> +
> +&mixer {
> + status = "okay";
> +};
> +
> +/* Internal storage */
> +&mmc_0 {
> + status = "okay";
> + bus-width = <8>;
> + cap-mmc-highspeed;
> + card-detect-delay = <200>;
> + mmc-hs200-1_8v;
> + non-removable;
> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
> + pinctrl-names = "default";
> + samsung,dw-mshc-ciu-div = <3>;
> + samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-sdr-timing = <0 4>;
> + vqmmc-supply = <&ldo3_reg>;
> +};
> +
> +/* External sdcard */
> +&mmc_2 {
> + status = "okay";
> + bus-width = <4>;
> + cap-sd-highspeed;
> + card-detect-delay = <200>;
> + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
> + pinctrl-names = "default";
> + samsung,dw-mshc-ciu-div = <3>;
> + samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-sdr-timing = <0 4>;
> + sd-uhs-sdr50;
> + vmmc-supply = <&ldo19_reg>;
> + vqmmc-supply = <&ldo13_reg>;
> +};
> +
> +&pinctrl_0 {
> + mmc2_cd: sd2-cd-pins {
> + samsung,pins = "gpx2-4";
Interesting... I looked at vendor sources to board-chagall and standard
pin gpc2-2 is mentioned as PULL down and not-connected comment.
gpx2-4 seems not mentioned at all, unless other board files are actually
used.
Anyway, if it works for you, it's good.
Rest looks ok, I'll apply after the merge window.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
@ 2022-01-16 17:37 ` Krzysztof Kozlowski
0 siblings, 0 replies; 18+ messages in thread
From: Krzysztof Kozlowski @ 2022-01-16 17:37 UTC (permalink / raw)
To: Henrik Grimler, semen.protsenko, virag.david003, martin.juecker,
cw00.choi, m.szyprowski, alim.akhtar, robh+dt, devicetree,
linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
On 16/01/2022 17:50, Henrik Grimler wrote:
> Chagall WiFi, with product name Samsung Galaxy Tab S 10.5", is based
> on Exynos 5420. This device is one of several tablet models released
> in 2014 based on Exynos 5420.
>
> The device tree added here contains support for:
>
> - UART
> - eMMC
> - SD card
> - USB
>
> CCI has been disabled in the hardware, enabling it would require
> (de-)soldering a resistor on the board. Trying to boot with it
> enabled in kernel makes the device hang when CCI is probed.
> Exynos5420-arndale-octa also has had CCI disabled due to issues, see
> commit 25217fef3551 ("ARM: dts: disable CCI on exynos5420 based
> arndale-octa").
>
> Signed-off-by: Henrik Grimler <henrik@grimler.se>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/exynos5420-chagall-wifi.dts | 65 ++
> .../dts/exynos5420-galaxy-tab-common.dtsi | 666 ++++++++++++++++++
> 3 files changed, 732 insertions(+)
> create mode 100644 arch/arm/boot/dts/exynos5420-chagall-wifi.dts
> create mode 100644 arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 0de64f237cd8..088fcedb3212 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -220,6 +220,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
> exynos5420-arndale-octa.dtb \
> exynos5420-peach-pit.dtb \
> exynos5420-smdk5420.dtb \
> + exynos5420-chagall-wifi.dtb \
> exynos5422-odroidhc1.dtb \
> exynos5422-odroidxu3.dtb \
> exynos5422-odroidxu3-lite.dtb \
> diff --git a/arch/arm/boot/dts/exynos5420-chagall-wifi.dts b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
> new file mode 100644
> index 000000000000..2cc5cd01e8c6
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
> @@ -0,0 +1,65 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung's Exynos5420 Chagall WiFi board device tree source
> + *
> + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + * Copyright (c) 2022 Henrik Grimler
> + */
> +
> +/dts-v1/;
> +#include "exynos5420-galaxy-tab-common.dtsi"
> +
> +/ {
> + model = "Samsung Chagall WiFi based on Exynos5420";
> + compatible = "samsung,chagall-wifi", "samsung,exynos5420", \
> + "samsung,exynos5";
> +};
> +
> +&ldo15_reg {
> + /* Unused */
> + regulator-name = "VDD_LDO15";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +};
> +
> +&ldo17_reg {
> + regulator-name = "VDD_IRLED_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3350000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> +};
> +
> +&ldo28_reg {
> + /* Unused */
> + regulator-name = "VDD_LDO28";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +};
> +
> +&ldo29_reg {
> + regulator-name = "VDD_TCON_1V8";
> + regulator-min-microvolt = <1900000>;
> + regulator-max-microvolt = <1900000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> +};
> +
> +&ldo31_reg {
> + regulator-name = "VDD_GRIP_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> +};
> diff --git a/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
> new file mode 100644
> index 000000000000..119e4e7a8328
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
> @@ -0,0 +1,666 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Base DT for Samsung's family of tablets based on Exynos5420.
> + *
> + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + * Copyright (c) 2022 Henrik Grimler
> + */
> +
> +/dts-v1/;
> +#include "exynos5420.dtsi"
> +#include "exynos5420-cpus.dtsi"
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/samsung,s2mps11.h>
> +
> +/ {
> + chassis-type = "tablet";
> +
> + /*
> + * To successfully boot the mainline kernel with the stock
> + * bootloader (SBOOT), the tlb needs to be flushed after the
> + * page table pointer has been updated in __common_mmu_cache_on.
> + * The same hack is also needed to boot exynos4412-i9300 with
> + * stock bootloader, and probably other Samsung devices of
> + * similar age. See
> + * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com
> + * for more details.
> + */
> +
> + chosen {
> + stdout-path = "serial2:115200n8";
> + };
> +
> + memory@20000000 {
> + device_type = "memory";
> + reg = <0x20000000 0xc0000000>;
> + };
> +
> + firmware@2073000 {
> + compatible = "samsung,secure-firmware";
> + reg = <0x02073000 0x1000>;
> + };
> +
> + fixed-rate-clocks {
> + oscclk {
> + compatible = "samsung,exynos5420-oscclk";
> + clock-frequency = <24000000>;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> +
> + key-power {
> + debounce-interval = <10>;
> + gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
> + label = "Power";
> + linux,code = <KEY_POWER>;
> + wakeup-source;
> + };
> +
> + key-home {
> + debounce-interval = <10>;
> + gpios = <&gpx0 5 GPIO_ACTIVE_LOW>;
> + label = "Home";
> + linux,code = <KEY_HOME>;
> + wakeup-source;
> + };
> +
> + key-volume-up {
> + debounce-interval = <10>;
> + gpios = <&gpx0 2 GPIO_ACTIVE_LOW>;
> + label = "Volume Up";
> + linux,code = <KEY_VOLUMEUP>;
> + };
> +
> + key-volume-down {
> + debounce-interval = <10>;
> + gpios = <&gpx0 3 GPIO_ACTIVE_LOW>;
> + label = "Volume Down";
> + linux,code = <KEY_VOLUMEDOWN>;
> + };
> + };
> +};
> +
> +&cci {
> + /* CCI is disabled in hardware */
> + status = "disabled";
> +};
> +
> +&cpu0 {
> + cpu-supply = <&buck2_reg>;
> +};
> +
> +&cpu4 {
> + cpu-supply = <&buck6_reg>;
> +};
> +
> +&gpu {
> + status = "okay";
> + mali-supply = <&buck4_reg>;
> +};
> +
> +&hsi2c_7 {
> + status = "okay";
> +
> + pmic@66 {
> + compatible = "samsung,s2mps11-pmic";
> + reg = <0x66>;
> +
> + interrupt-parent = <&gpx3>;
> + interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&s2mps11_irq>;
> +
> + s2mps11_osc: clocks {
> + compatible = "samsung,s2mps11-clk";
> + #clock-cells = <1>;
> + clock-output-names = "s2mps11_ap", "s2mps11_cp",
> + "s2mps11_bt";
> + };
> +
> + regulators {
> + buck1_reg: BUCK1 {
> + regulator-name = "VDD_MIF_1V1";
> + regulator-min-microvolt = <700000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck2_reg: BUCK2 {
> + regulator-name = "VDD_ARM_1V0";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck3_reg: BUCK3 {
> + regulator-name = "VDD_INT_1V0";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1400000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck4_reg: BUCK4 {
> + regulator-name = "VDD_G3D_1V0";
> + regulator-min-microvolt = <700000>;
> + regulator-max-microvolt = <1400000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck5_reg: BUCK5 {
> + regulator-name = "VDD_MEM_1V2";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + buck6_reg: BUCK6 {
> + regulator-name = "VDD_KFC_1V0";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck7_reg: BUCK7 {
> + regulator-name = "VIN_LLDO_1V4";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + };
> +
> + buck8_reg: BUCK8 {
> + regulator-name = "VIN_MLDO_2V0";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2100000>;
> + regulator-always-on;
> + };
> +
> + buck9_reg: BUCK9 {
> + regulator-name = "VIN_HLDO_3V5";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3500000>;
> + regulator-always-on;
> + };
> +
> + buck10_reg: BUCK10 {
> + regulator-name = "VDD_CAM_ISP_1V0";
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <3550000>;
> + };
> +
> + ldo1_reg: LDO1 {
> + regulator-name = "VDD_ALIVE_1.0V";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + };
> +
> + ldo2_reg: LDO2 {
> + regulator-name = "VDD_APIO_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo3_reg: LDO3 {
> + regulator-name = "VDD_APIO_MMC01_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo4_reg: LDO4 {
> + regulator-name = "VDD_ADC_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo5_reg: LDO5 {
> + /* Unused */
> + regulator-name = "VDD_LDO5";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo6_reg: LDO6 {
> + regulator-name = "VDD_MIPI_1V0";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo7_reg: LDO7 {
> + regulator-name = "VDD_MIPI_PLL_ABB1_18V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo8_reg: LDO8 {
> + /* Unused */
> + regulator-name = "VDD_LDO8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo9_reg: LDO9 {
> + regulator-name = "VDD_UOTG_3V0";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo10_reg: LDO10 {
> + regulator-name = "VDDQ_PRE_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo11_reg: LDO11 {
> + regulator-name = "VDD_HSIC_1V0";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo12_reg: LDO12 {
> + regulator-name = "VDD_HSIC_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo13_reg: LDO13 {
> + regulator-name = "VDD_APIO_MMC2_2V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo14_reg: LDO14 {
> + regulator-name = "VDD_MOTOR_3V0";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo15_reg: LDO15 {
> + regulator-name = "LDO15";
> + /*
> + * LDO15 varies between devices and is
> + * specified in the device dts
> + */
> + };
> +
> + ldo16_reg: LDO16 {
> + regulator-name = "VDD_AP_2V8";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + ldo17_reg: LDO17 {
> + regulator-name = "LDO17";
> + /*
> + * LDO17 varies between devices and is
> + * specified in the device dts
> + */
> + };
> +
> + ldo18_reg: LDO18 {
> + /* Unused */
> + regulator-name = "VDD_LDO18";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> +
> + ldo19_reg: LDO19 {
> + regulator-name = "VDD_VTF_2V8";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo20_reg: LDO20 {
> + regulator-name = "VDD_CAM1_CAM_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo21_reg: LDO21 {
> + regulator-name = "VDD_CAM_IO_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo22_reg: LDO22 {
> + regulator-name = "VDD_CAM0_S_CORE_1V1";
> + regulator-min-microvolt = <1050000>;
> + regulator-max-microvolt = <1200000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo23_reg: LDO23 {
> + regulator-name = "VDD_MIFS_1V1";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1100000>;
> + regulator-always-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + ldo24_reg: LDO24 {
> + regulator-name = "VDD_TSP_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo25_reg: LDO25 {
> + /* Unused */
> + regulator-name = "VDD_LDO25";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3950000>;
> + };
> +
> + ldo26_reg: LDO26 {
> + regulator-name = "VDD_CAM0_AF_2V8";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo27_reg: LDO27 {
> + regulator-name = "VDD_G3DS_1V0";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + ldo28_reg: LDO28 {
> + regulator-name = "LDO28";
> + /*
> + * LDO28 varies between devices and is
> + * specified in the device dts
> + */
> + };
> +
> + ldo29_reg: LDO29 {
> + regulator-name = "LDO29";
> + /*
> + * LDO29 varies between devices and is
> + * specified in the device dts
> + */
> + };
> +
> + ldo30_reg: LDO30 {
> + regulator-name = "VDD_TOUCH_1V8";
> + regulator-min-microvolt = <1900000>;
> + regulator-max-microvolt = <1900000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo31_reg: LDO31 {
> + regulator-name = "LDO31";
> + /*
> + * LDO31 varies between devices and is
> + * specified in the device dts
> + */
> + };
> +
> + ldo32_reg: LDO32 {
> + regulator-name = "VDD_TSP_1V8";
> + regulator-min-microvolt = <1900000>;
> + regulator-max-microvolt = <1900000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo33_reg: LDO33 {
> + regulator-name = "VDD_MHL_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo34_reg: LDO34 {
> + regulator-name = "VDD_MHL_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo35_reg: LDO35 {
> + regulator-name = "VDD_SIL_1V2";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo36_reg: LDO36 {
> + /* Unused */
> + regulator-name = "VDD_LDO36";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3950000>;
> + };
> +
> + ldo37_reg: LDO37 {
> + /* Unused */
> + regulator-name = "VDD_LDO37";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3950000>;
> + };
> +
> + ldo38_reg: LDO38 {
> + regulator-name = "VDD_KEY_LED_3V3";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> + };
> + };
> +};
> +
> +&mixer {
> + status = "okay";
> +};
> +
> +/* Internal storage */
> +&mmc_0 {
> + status = "okay";
> + bus-width = <8>;
> + cap-mmc-highspeed;
> + card-detect-delay = <200>;
> + mmc-hs200-1_8v;
> + non-removable;
> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
> + pinctrl-names = "default";
> + samsung,dw-mshc-ciu-div = <3>;
> + samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-sdr-timing = <0 4>;
> + vqmmc-supply = <&ldo3_reg>;
> +};
> +
> +/* External sdcard */
> +&mmc_2 {
> + status = "okay";
> + bus-width = <4>;
> + cap-sd-highspeed;
> + card-detect-delay = <200>;
> + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
> + pinctrl-names = "default";
> + samsung,dw-mshc-ciu-div = <3>;
> + samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-sdr-timing = <0 4>;
> + sd-uhs-sdr50;
> + vmmc-supply = <&ldo19_reg>;
> + vqmmc-supply = <&ldo13_reg>;
> +};
> +
> +&pinctrl_0 {
> + mmc2_cd: sd2-cd-pins {
> + samsung,pins = "gpx2-4";
Interesting... I looked at vendor sources to board-chagall and standard
pin gpc2-2 is mentioned as PULL down and not-connected comment.
gpx2-4 seems not mentioned at all, unless other board files are actually
used.
Anyway, if it works for you, it's good.
Rest looks ok, I'll apply after the merge window.
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
2022-01-16 17:37 ` Krzysztof Kozlowski
@ 2022-01-16 20:59 ` Henrik Grimler
-1 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-16 20:59 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, alim.akhtar, robh+dt, devicetree,
linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
Hi Krzysztof,
> > +/* External sdcard */
> > +&mmc_2 {
> > + status = "okay";
> > + bus-width = <4>;
> > + cap-sd-highspeed;
> > + card-detect-delay = <200>;
> > + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
> > + pinctrl-names = "default";
> > + samsung,dw-mshc-ciu-div = <3>;
> > + samsung,dw-mshc-ddr-timing = <0 2>;
> > + samsung,dw-mshc-sdr-timing = <0 4>;
> > + sd-uhs-sdr50;
> > + vmmc-supply = <&ldo19_reg>;
> > + vqmmc-supply = <&ldo13_reg>;
> > +};
> > +
> > +&pinctrl_0 {
> > + mmc2_cd: sd2-cd-pins {
> > + samsung,pins = "gpx2-4";
>
> Interesting... I looked at vendor sources to board-chagall and standard
> pin gpc2-2 is mentioned as PULL down and not-connected comment.
>
> gpx2-4 seems not mentioned at all, unless other board files are actually
> used.
Gpio seems to be spread out. GPIO_T_FLASH_DETECT is defined as gpx2-4
in board-universal5420-mmc.c, and then used for card detection.
(Looking at it now again I see that write protection through sd2_wp
should also be supported for mmc_2, can add that in next patch set.)
> Anyway, if it works for you, it's good.
>
> Rest looks ok, I'll apply after the merge window.
Thanks!
> Best regards,
> Krzysztof
Best regards,
Henrik Grimler
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
@ 2022-01-16 20:59 ` Henrik Grimler
0 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-16 20:59 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, alim.akhtar, robh+dt, devicetree,
linux-samsung-soc, linux-arm-kernel, linux-kernel,
~postmarketos/upstreaming
Hi Krzysztof,
> > +/* External sdcard */
> > +&mmc_2 {
> > + status = "okay";
> > + bus-width = <4>;
> > + cap-sd-highspeed;
> > + card-detect-delay = <200>;
> > + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
> > + pinctrl-names = "default";
> > + samsung,dw-mshc-ciu-div = <3>;
> > + samsung,dw-mshc-ddr-timing = <0 2>;
> > + samsung,dw-mshc-sdr-timing = <0 4>;
> > + sd-uhs-sdr50;
> > + vmmc-supply = <&ldo19_reg>;
> > + vqmmc-supply = <&ldo13_reg>;
> > +};
> > +
> > +&pinctrl_0 {
> > + mmc2_cd: sd2-cd-pins {
> > + samsung,pins = "gpx2-4";
>
> Interesting... I looked at vendor sources to board-chagall and standard
> pin gpc2-2 is mentioned as PULL down and not-connected comment.
>
> gpx2-4 seems not mentioned at all, unless other board files are actually
> used.
Gpio seems to be spread out. GPIO_T_FLASH_DETECT is defined as gpx2-4
in board-universal5420-mmc.c, and then used for card detection.
(Looking at it now again I see that write protection through sd2_wp
should also be supported for mmc_2, can add that in next patch set.)
> Anyway, if it works for you, it's good.
>
> Rest looks ok, I'll apply after the merge window.
Thanks!
> Best regards,
> Krzysztof
Best regards,
Henrik Grimler
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
2022-01-16 20:59 ` Henrik Grimler
@ 2022-01-17 5:50 ` Alim Akhtar
-1 siblings, 0 replies; 18+ messages in thread
From: Alim Akhtar @ 2022-01-17 5:50 UTC (permalink / raw)
To: 'Henrik Grimler', 'Krzysztof Kozlowski'
Cc: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, robh+dt, devicetree, linux-samsung-soc,
linux-arm-kernel, linux-kernel, ~postmarketos/upstreaming
Hi Henrik,
>-----Original Message-----
>From: Henrik Grimler [mailto:henrik@grimler.se]
>Sent: Monday, January 17, 2022 2:30 AM
>To: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>Cc: semen.protsenko@linaro.org; virag.david003@gmail.com;
>martin.juecker@gmail.com; cw00.choi@samsung.com;
>m.szyprowski@samsung.com; alim.akhtar@samsung.com;
>robh+dt@kernel.org; devicetree@vger.kernel.org; linux-samsung-
>soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
>kernel@vger.kernel.org; ~postmarketos/upstreaming@lists.sr.ht
>Subject: Re: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
>
>Hi Krzysztof,
>
>> > +/* External sdcard */
>> > +&mmc_2 {
>> > + status = "okay";
>> > + bus-width = <4>;
>> > + cap-sd-highspeed;
>> > + card-detect-delay = <200>;
>> > + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
>> > + pinctrl-names = "default";
>> > + samsung,dw-mshc-ciu-div = <3>;
>> > + samsung,dw-mshc-ddr-timing = <0 2>;
>> > + samsung,dw-mshc-sdr-timing = <0 4>;
>> > + sd-uhs-sdr50;
>> > + vmmc-supply = <&ldo19_reg>;
>> > + vqmmc-supply = <&ldo13_reg>;
>> > +};
>> > +
>> > +&pinctrl_0 {
>> > + mmc2_cd: sd2-cd-pins {
>> > + samsung,pins = "gpx2-4";
>>
>> Interesting... I looked at vendor sources to board-chagall and
>> standard pin gpc2-2 is mentioned as PULL down and not-connected
>comment.
>>
>> gpx2-4 seems not mentioned at all, unless other board files are
>> actually used.
>
>Gpio seems to be spread out. GPIO_T_FLASH_DETECT is defined as gpx2-4 in
>board-universal5420-mmc.c, and then used for card detection.
>(Looking at it now again I see that write protection through sd2_wp should
>also be supported for mmc_2, can add that in next patch set.)
>
Card detect pin is generally a special function (dedicated pin) pin,
directly connected from SoC to card external slot.
And for exynos5420 it is gpc2-2 as pointed by Krzysztof.
Also PIN_FUNC_2 for gpx2-4 indicate that it is wakeup_int2 function.
Do you get a card detect interrupt when removing and inserting the card to
the card slot?
Also to avoid confusion, probably you can change the node name as "mmc2_cd:
mmc2-cd-pins"
(as sd2-cd-pins is gpc2-2 for this SoC)
>> Anyway, if it works for you, it's good.
>>
>> Rest looks ok, I'll apply after the merge window.
>
>Thanks!
>
>> Best regards,
>> Krzysztof
>
>Best regards,
>Henrik Grimler
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
@ 2022-01-17 5:50 ` Alim Akhtar
0 siblings, 0 replies; 18+ messages in thread
From: Alim Akhtar @ 2022-01-17 5:50 UTC (permalink / raw)
To: 'Henrik Grimler', 'Krzysztof Kozlowski'
Cc: semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, robh+dt, devicetree, linux-samsung-soc,
linux-arm-kernel, linux-kernel, ~postmarketos/upstreaming
Hi Henrik,
>-----Original Message-----
>From: Henrik Grimler [mailto:henrik@grimler.se]
>Sent: Monday, January 17, 2022 2:30 AM
>To: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>Cc: semen.protsenko@linaro.org; virag.david003@gmail.com;
>martin.juecker@gmail.com; cw00.choi@samsung.com;
>m.szyprowski@samsung.com; alim.akhtar@samsung.com;
>robh+dt@kernel.org; devicetree@vger.kernel.org; linux-samsung-
>soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
>kernel@vger.kernel.org; ~postmarketos/upstreaming@lists.sr.ht
>Subject: Re: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
>
>Hi Krzysztof,
>
>> > +/* External sdcard */
>> > +&mmc_2 {
>> > + status = "okay";
>> > + bus-width = <4>;
>> > + cap-sd-highspeed;
>> > + card-detect-delay = <200>;
>> > + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
>> > + pinctrl-names = "default";
>> > + samsung,dw-mshc-ciu-div = <3>;
>> > + samsung,dw-mshc-ddr-timing = <0 2>;
>> > + samsung,dw-mshc-sdr-timing = <0 4>;
>> > + sd-uhs-sdr50;
>> > + vmmc-supply = <&ldo19_reg>;
>> > + vqmmc-supply = <&ldo13_reg>;
>> > +};
>> > +
>> > +&pinctrl_0 {
>> > + mmc2_cd: sd2-cd-pins {
>> > + samsung,pins = "gpx2-4";
>>
>> Interesting... I looked at vendor sources to board-chagall and
>> standard pin gpc2-2 is mentioned as PULL down and not-connected
>comment.
>>
>> gpx2-4 seems not mentioned at all, unless other board files are
>> actually used.
>
>Gpio seems to be spread out. GPIO_T_FLASH_DETECT is defined as gpx2-4 in
>board-universal5420-mmc.c, and then used for card detection.
>(Looking at it now again I see that write protection through sd2_wp should
>also be supported for mmc_2, can add that in next patch set.)
>
Card detect pin is generally a special function (dedicated pin) pin,
directly connected from SoC to card external slot.
And for exynos5420 it is gpc2-2 as pointed by Krzysztof.
Also PIN_FUNC_2 for gpx2-4 indicate that it is wakeup_int2 function.
Do you get a card detect interrupt when removing and inserting the card to
the card slot?
Also to avoid confusion, probably you can change the node name as "mmc2_cd:
mmc2-cd-pins"
(as sd2-cd-pins is gpc2-2 for this SoC)
>> Anyway, if it works for you, it's good.
>>
>> Rest looks ok, I'll apply after the merge window.
>
>Thanks!
>
>> Best regards,
>> Krzysztof
>
>Best regards,
>Henrik Grimler
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
2022-01-17 5:50 ` Alim Akhtar
@ 2022-01-17 16:58 ` Henrik Grimler
-1 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-17 16:58 UTC (permalink / raw)
To: Alim Akhtar
Cc: 'Krzysztof Kozlowski',
semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, robh+dt, devicetree, linux-samsung-soc,
linux-arm-kernel, linux-kernel, ~postmarketos/upstreaming
Hi Alim,
> >> > +/* External sdcard */
> >> > +&mmc_2 {
> >> > + status = "okay";
> >> > + bus-width = <4>;
> >> > + cap-sd-highspeed;
> >> > + card-detect-delay = <200>;
> >> > + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
> >> > + pinctrl-names = "default";
> >> > + samsung,dw-mshc-ciu-div = <3>;
> >> > + samsung,dw-mshc-ddr-timing = <0 2>;
> >> > + samsung,dw-mshc-sdr-timing = <0 4>;
> >> > + sd-uhs-sdr50;
> >> > + vmmc-supply = <&ldo19_reg>;
> >> > + vqmmc-supply = <&ldo13_reg>;
> >> > +};
> >> > +
> >> > +&pinctrl_0 {
> >> > + mmc2_cd: sd2-cd-pins {
> >> > + samsung,pins = "gpx2-4";
> >>
> >> Interesting... I looked at vendor sources to board-chagall and
> >> standard pin gpc2-2 is mentioned as PULL down and not-connected
> >comment.
> >>
> >> gpx2-4 seems not mentioned at all, unless other board files are
> >> actually used.
> >
> >Gpio seems to be spread out. GPIO_T_FLASH_DETECT is defined as gpx2-4 in
> >board-universal5420-mmc.c, and then used for card detection.
> >(Looking at it now again I see that write protection through sd2_wp should
> >also be supported for mmc_2, can add that in next patch set.)
> >
> Card detect pin is generally a special function (dedicated pin) pin,
> directly connected from SoC to card external slot.
> And for exynos5420 it is gpc2-2 as pointed by Krzysztof.
gpio/pinctrl is still not my area of expertise so your feedback is
greatly appreciated!
gpc2-2 does not seem to be the card-detect pin for these tablets. If
I add sd2_cd to pinctrl-0 above I am unable to use the sdcard at all,
instead dmesg is filled with repeating messages like:
[ 18.669050] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 300000Hz, actual 297619HZ div = 84)
[ 18.703711] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 200000Hz, actual 200000HZ div = 125)
[ 18.737167] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 100000Hz, actual 100000HZ div = 250)
[ 19.058352] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
[ 19.093037] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 300000Hz, actual 297619HZ div = 84)
[ 19.127701] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 200000Hz, actual 200000HZ div = 125)
[ 19.162380] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 100000Hz, actual 100000HZ div = 250)
gpx2-4 on the other hand switches state when an sdcard is inserted or
removed. After exporting relevant pins I have, with the card
inserted:
# grep -A 2 gpx2 /sys/kernel/debug/gpio
gpiochip3: GPIOs 24-31, parent: platform/13400000.pinctrl, gpx2:
gpio-26 ( |Power ) in hi IRQ ACTIVE LOW
gpio-28 ( |sysfs ) in lo
and when removed gpx2-4 changes to high:
gpiochip3: GPIOs 24-31, parent: platform/13400000.pinctrl, gpx2:
gpio-26 ( |Power ) in hi IRQ ACTIVE LOW
gpio-28 ( |sysfs ) in hi
All the gpc2 pins are low no matter if sdcard is inserted or removed:
gpiochip7: GPIOs 56-62, parent: platform/13410000.pinctrl, gpc2:
gpio-56 ( |sysfs ) in lo
gpio-57 ( |sysfs ) in lo
gpio-58 ( |sysfs ) in lo
gpio-59 ( |sysfs ) in lo
gpio-60 ( |sysfs ) in lo
gpio-61 ( |sysfs ) in lo
gpio-62 ( |sysfs ) in lo
That being said, I am not sure if it is working properly:
> Also PIN_FUNC_2 for gpx2-4 indicate that it is wakeup_int2 function.
> Do you get a card detect interrupt when removing and inserting the card to
> the card slot?
(What is the best way to check this?) I don't get any irq related
messages in dmesg, and I don't see any changes in /proc/interrupts if
tracked with something like `watch -n1 "cat /proc/interrupts"` when
card is removed or inserted, so seems likely that pin config is wrong.
All I can find in vendor kernel for this device is that pull config is
set to S3C_GPIO_PULL_NONE [1]. For some of the sibling tablets the
pin is configured as {S3C_GPIO_INPUT, GPIO_LV_N, S3C_GPIO_PULL_NONE}
[2] though, which I think should correspond to having:
mmc2_cd: mmc2-cd-pins {
samsung,pins = "gpx2-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
};
Changing to that does not seem to change anything though, I don't get
any interrupt, or any messages in dmesg, when inserting or removing
the sdcard.
> Also to avoid confusion, probably you can change the node name as "mmc2_cd:
> mmc2-cd-pins"
> (as sd2-cd-pins is gpc2-2 for this SoC)
Thanks, will fix in a v4 (after discussions here are settled).
[1] https://github.com/exynos5420/android_kernel_samsung_exynos5420/blob/lineage-17.1/arch/arm/mach-exynos/board-universal5420-mmc.c#L388
[2] https://github.com/exynos5420/android_kernel_samsung_exynos5420/blob/lineage-17.1/arch/arm/mach-exynos/board-n1-gpio.c#L119
Best regards,
Henrik Grimler
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
@ 2022-01-17 16:58 ` Henrik Grimler
0 siblings, 0 replies; 18+ messages in thread
From: Henrik Grimler @ 2022-01-17 16:58 UTC (permalink / raw)
To: Alim Akhtar
Cc: 'Krzysztof Kozlowski',
semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, robh+dt, devicetree, linux-samsung-soc,
linux-arm-kernel, linux-kernel, ~postmarketos/upstreaming
Hi Alim,
> >> > +/* External sdcard */
> >> > +&mmc_2 {
> >> > + status = "okay";
> >> > + bus-width = <4>;
> >> > + cap-sd-highspeed;
> >> > + card-detect-delay = <200>;
> >> > + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
> >> > + pinctrl-names = "default";
> >> > + samsung,dw-mshc-ciu-div = <3>;
> >> > + samsung,dw-mshc-ddr-timing = <0 2>;
> >> > + samsung,dw-mshc-sdr-timing = <0 4>;
> >> > + sd-uhs-sdr50;
> >> > + vmmc-supply = <&ldo19_reg>;
> >> > + vqmmc-supply = <&ldo13_reg>;
> >> > +};
> >> > +
> >> > +&pinctrl_0 {
> >> > + mmc2_cd: sd2-cd-pins {
> >> > + samsung,pins = "gpx2-4";
> >>
> >> Interesting... I looked at vendor sources to board-chagall and
> >> standard pin gpc2-2 is mentioned as PULL down and not-connected
> >comment.
> >>
> >> gpx2-4 seems not mentioned at all, unless other board files are
> >> actually used.
> >
> >Gpio seems to be spread out. GPIO_T_FLASH_DETECT is defined as gpx2-4 in
> >board-universal5420-mmc.c, and then used for card detection.
> >(Looking at it now again I see that write protection through sd2_wp should
> >also be supported for mmc_2, can add that in next patch set.)
> >
> Card detect pin is generally a special function (dedicated pin) pin,
> directly connected from SoC to card external slot.
> And for exynos5420 it is gpc2-2 as pointed by Krzysztof.
gpio/pinctrl is still not my area of expertise so your feedback is
greatly appreciated!
gpc2-2 does not seem to be the card-detect pin for these tablets. If
I add sd2_cd to pinctrl-0 above I am unable to use the sdcard at all,
instead dmesg is filled with repeating messages like:
[ 18.669050] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 300000Hz, actual 297619HZ div = 84)
[ 18.703711] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 200000Hz, actual 200000HZ div = 125)
[ 18.737167] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 100000Hz, actual 100000HZ div = 250)
[ 19.058352] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
[ 19.093037] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 300000Hz, actual 297619HZ div = 84)
[ 19.127701] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 200000Hz, actual 200000HZ div = 125)
[ 19.162380] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 100000Hz, actual 100000HZ div = 250)
gpx2-4 on the other hand switches state when an sdcard is inserted or
removed. After exporting relevant pins I have, with the card
inserted:
# grep -A 2 gpx2 /sys/kernel/debug/gpio
gpiochip3: GPIOs 24-31, parent: platform/13400000.pinctrl, gpx2:
gpio-26 ( |Power ) in hi IRQ ACTIVE LOW
gpio-28 ( |sysfs ) in lo
and when removed gpx2-4 changes to high:
gpiochip3: GPIOs 24-31, parent: platform/13400000.pinctrl, gpx2:
gpio-26 ( |Power ) in hi IRQ ACTIVE LOW
gpio-28 ( |sysfs ) in hi
All the gpc2 pins are low no matter if sdcard is inserted or removed:
gpiochip7: GPIOs 56-62, parent: platform/13410000.pinctrl, gpc2:
gpio-56 ( |sysfs ) in lo
gpio-57 ( |sysfs ) in lo
gpio-58 ( |sysfs ) in lo
gpio-59 ( |sysfs ) in lo
gpio-60 ( |sysfs ) in lo
gpio-61 ( |sysfs ) in lo
gpio-62 ( |sysfs ) in lo
That being said, I am not sure if it is working properly:
> Also PIN_FUNC_2 for gpx2-4 indicate that it is wakeup_int2 function.
> Do you get a card detect interrupt when removing and inserting the card to
> the card slot?
(What is the best way to check this?) I don't get any irq related
messages in dmesg, and I don't see any changes in /proc/interrupts if
tracked with something like `watch -n1 "cat /proc/interrupts"` when
card is removed or inserted, so seems likely that pin config is wrong.
All I can find in vendor kernel for this device is that pull config is
set to S3C_GPIO_PULL_NONE [1]. For some of the sibling tablets the
pin is configured as {S3C_GPIO_INPUT, GPIO_LV_N, S3C_GPIO_PULL_NONE}
[2] though, which I think should correspond to having:
mmc2_cd: mmc2-cd-pins {
samsung,pins = "gpx2-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
};
Changing to that does not seem to change anything though, I don't get
any interrupt, or any messages in dmesg, when inserting or removing
the sdcard.
> Also to avoid confusion, probably you can change the node name as "mmc2_cd:
> mmc2-cd-pins"
> (as sd2-cd-pins is gpc2-2 for this SoC)
Thanks, will fix in a v4 (after discussions here are settled).
[1] https://github.com/exynos5420/android_kernel_samsung_exynos5420/blob/lineage-17.1/arch/arm/mach-exynos/board-universal5420-mmc.c#L388
[2] https://github.com/exynos5420/android_kernel_samsung_exynos5420/blob/lineage-17.1/arch/arm/mach-exynos/board-n1-gpio.c#L119
Best regards,
Henrik Grimler
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
2022-01-17 16:58 ` Henrik Grimler
@ 2022-01-18 7:26 ` Alim Akhtar
-1 siblings, 0 replies; 18+ messages in thread
From: Alim Akhtar @ 2022-01-18 7:26 UTC (permalink / raw)
To: 'Henrik Grimler'
Cc: 'Krzysztof Kozlowski',
semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, robh+dt, devicetree, linux-samsung-soc,
linux-arm-kernel, linux-kernel, ~postmarketos/upstreaming
Hi Henrik
>-----Original Message-----
>From: Henrik Grimler [mailto:henrik@grimler.se]
>Sent: Monday, January 17, 2022 10:28 PM
>To: Alim Akhtar <alim.akhtar@samsung.com>
>Cc: 'Krzysztof Kozlowski' <krzysztof.kozlowski@canonical.com>;
>semen.protsenko@linaro.org; virag.david003@gmail.com;
>martin.juecker@gmail.com; cw00.choi@samsung.com;
>m.szyprowski@samsung.com; robh+dt@kernel.org;
>devicetree@vger.kernel.org; linux-samsung-soc@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
>~postmarketos/upstreaming@lists.sr.ht
>Subject: Re: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
>
>Hi Alim,
>
>> >> > +/* External sdcard */
>> >> > +&mmc_2 {
>> >> > + status = "okay";
>> >> > + bus-width = <4>;
>> >> > + cap-sd-highspeed;
>> >> > + card-detect-delay = <200>;
>> >> > + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1
>&sd2_bus4>;
>> >> > + pinctrl-names = "default";
>> >> > + samsung,dw-mshc-ciu-div = <3>;
>> >> > + samsung,dw-mshc-ddr-timing = <0 2>;
>> >> > + samsung,dw-mshc-sdr-timing = <0 4>;
>> >> > + sd-uhs-sdr50;
>> >> > + vmmc-supply = <&ldo19_reg>;
>> >> > + vqmmc-supply = <&ldo13_reg>;
>> >> > +};
>> >> > +
>> >> > +&pinctrl_0 {
>> >> > + mmc2_cd: sd2-cd-pins {
>> >> > + samsung,pins = "gpx2-4";
>> >>
>> >> Interesting... I looked at vendor sources to board-chagall and
>> >> standard pin gpc2-2 is mentioned as PULL down and not-connected
>> >comment.
>> >>
>> >> gpx2-4 seems not mentioned at all, unless other board files are
>> >> actually used.
>> >
>> >Gpio seems to be spread out. GPIO_T_FLASH_DETECT is defined as gpx2-4
>> >in board-universal5420-mmc.c, and then used for card detection.
>> >(Looking at it now again I see that write protection through sd2_wp
>> >should also be supported for mmc_2, can add that in next patch set.)
>> >
>> Card detect pin is generally a special function (dedicated pin) pin,
>> directly connected from SoC to card external slot.
>> And for exynos5420 it is gpc2-2 as pointed by Krzysztof.
>
>gpio/pinctrl is still not my area of expertise so your feedback is greatly
>appreciated!
>
>gpc2-2 does not seem to be the card-detect pin for these tablets. If I add
>sd2_cd to pinctrl-0 above I am unable to use the sdcard at all, instead
dmesg is
>filled with repeating messages like:
>
>[ 18.669050] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req
>300000Hz, actual 297619HZ div = 84) [ 18.703711] mmc_host mmc1: Bus speed
>(slot 0) = 50000000Hz (slot req 200000Hz, actual 200000HZ div = 125) [
>18.737167] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req
>100000Hz, actual 100000HZ div = 250) [ 19.058352] mmc_host mmc1: Bus
>speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63) [
>19.093037] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req
>300000Hz, actual 297619HZ div = 84) [ 19.127701] mmc_host mmc1: Bus speed
>(slot 0) = 50000000Hz (slot req 200000Hz, actual 200000HZ div = 125) [
>19.162380] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req
>100000Hz, actual 100000HZ div = 250)
>
>gpx2-4 on the other hand switches state when an sdcard is inserted or
>removed. After exporting relevant pins I have, with the card
>inserted:
>
># grep -A 2 gpx2 /sys/kernel/debug/gpio
>gpiochip3: GPIOs 24-31, parent: platform/13400000.pinctrl, gpx2:
> gpio-26 ( |Power ) in hi IRQ ACTIVE LOW
> gpio-28 ( |sysfs ) in lo
>
>and when removed gpx2-4 changes to high:
>
>gpiochip3: GPIOs 24-31, parent: platform/13400000.pinctrl, gpx2:
> gpio-26 ( |Power ) in hi IRQ ACTIVE LOW
> gpio-28 ( |sysfs ) in hi
>
>All the gpc2 pins are low no matter if sdcard is inserted or removed:
>
>gpiochip7: GPIOs 56-62, parent: platform/13410000.pinctrl, gpc2:
> gpio-56 ( |sysfs ) in lo
> gpio-57 ( |sysfs ) in lo
> gpio-58 ( |sysfs ) in lo
> gpio-59 ( |sysfs ) in lo
> gpio-60 ( |sysfs ) in lo
> gpio-61 ( |sysfs ) in lo
> gpio-62 ( |sysfs ) in lo
>
>That being said, I am not sure if it is working properly:
>
>> Also PIN_FUNC_2 for gpx2-4 indicate that it is wakeup_int2 function.
>> Do you get a card detect interrupt when removing and inserting the
>> card to the card slot?
>
This is the confirmation that this board does not uses gpc2-2 but gpx2-4.
Thanks for detailed log.
>(What is the best way to check this?) I don't get any irq related messages
in
Probably if you are interested, you can enable few debug in dw-mmc driver to
check a message like "card is present" etc.
>dmesg, and I don't see any changes in /proc/interrupts if tracked with
>something like `watch -n1 "cat /proc/interrupts"` when card is removed or
>inserted, so seems likely that pin config is wrong.
>All I can find in vendor kernel for this device is that pull config is set
to
>S3C_GPIO_PULL_NONE [1]. For some of the sibling tablets the pin is
>configured as {S3C_GPIO_INPUT, GPIO_LV_N, S3C_GPIO_PULL_NONE} [2]
>though, which I think should correspond to having:
>
>mmc2_cd: mmc2-cd-pins {
> samsung,pins = "gpx2-4";
> samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
> samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; };
>
>Changing to that does not seem to change anything though, I don't get any
>interrupt, or any messages in dmesg, when inserting or removing the sdcard.
>
>> Also to avoid confusion, probably you can change the node name as
>"mmc2_cd:
>> mmc2-cd-pins"
>> (as sd2-cd-pins is gpc2-2 for this SoC)
>
>Thanks, will fix in a v4 (after discussions here are settled).
>
I am convinced that gpc2-2 is not used for card detect for this board.
So no other query on this patch.
Thanks
>[1] https://protect2.fireeye.com/v1/url?k=bba823ae-dad5cbe9-bba9a8e1-
>74fe485fff30-b4ccbbe9776f501d&q=1&e=9951c78c-16c8-449e-913b-
>d4d1f1f9bb6b&u=https%3A%2F%2Fgithub.com%2Fexynos5420%2Fandroid_k
>ernel_samsung_exynos5420%2Fblob%2Flineage-
>17.1%2Farch%2Farm%2Fmach-exynos%2Fboard-universal5420-
>mmc.c%23L388
>[2] https://protect2.fireeye.com/v1/url?k=97465c6e-f63bb429-9747d721-
>74fe485fff30-4111389a6d2b68b4&q=1&e=9951c78c-16c8-449e-913b-
>d4d1f1f9bb6b&u=https%3A%2F%2Fgithub.com%2Fexynos5420%2Fandroid_k
>ernel_samsung_exynos5420%2Fblob%2Flineage-
>17.1%2Farch%2Farm%2Fmach-exynos%2Fboard-n1-gpio.c%23L119
>
>Best regards,
>Henrik Grimler
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
@ 2022-01-18 7:26 ` Alim Akhtar
0 siblings, 0 replies; 18+ messages in thread
From: Alim Akhtar @ 2022-01-18 7:26 UTC (permalink / raw)
To: 'Henrik Grimler'
Cc: 'Krzysztof Kozlowski',
semen.protsenko, virag.david003, martin.juecker, cw00.choi,
m.szyprowski, robh+dt, devicetree, linux-samsung-soc,
linux-arm-kernel, linux-kernel, ~postmarketos/upstreaming
Hi Henrik
>-----Original Message-----
>From: Henrik Grimler [mailto:henrik@grimler.se]
>Sent: Monday, January 17, 2022 10:28 PM
>To: Alim Akhtar <alim.akhtar@samsung.com>
>Cc: 'Krzysztof Kozlowski' <krzysztof.kozlowski@canonical.com>;
>semen.protsenko@linaro.org; virag.david003@gmail.com;
>martin.juecker@gmail.com; cw00.choi@samsung.com;
>m.szyprowski@samsung.com; robh+dt@kernel.org;
>devicetree@vger.kernel.org; linux-samsung-soc@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
>~postmarketos/upstreaming@lists.sr.ht
>Subject: Re: [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi
>
>Hi Alim,
>
>> >> > +/* External sdcard */
>> >> > +&mmc_2 {
>> >> > + status = "okay";
>> >> > + bus-width = <4>;
>> >> > + cap-sd-highspeed;
>> >> > + card-detect-delay = <200>;
>> >> > + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1
>&sd2_bus4>;
>> >> > + pinctrl-names = "default";
>> >> > + samsung,dw-mshc-ciu-div = <3>;
>> >> > + samsung,dw-mshc-ddr-timing = <0 2>;
>> >> > + samsung,dw-mshc-sdr-timing = <0 4>;
>> >> > + sd-uhs-sdr50;
>> >> > + vmmc-supply = <&ldo19_reg>;
>> >> > + vqmmc-supply = <&ldo13_reg>;
>> >> > +};
>> >> > +
>> >> > +&pinctrl_0 {
>> >> > + mmc2_cd: sd2-cd-pins {
>> >> > + samsung,pins = "gpx2-4";
>> >>
>> >> Interesting... I looked at vendor sources to board-chagall and
>> >> standard pin gpc2-2 is mentioned as PULL down and not-connected
>> >comment.
>> >>
>> >> gpx2-4 seems not mentioned at all, unless other board files are
>> >> actually used.
>> >
>> >Gpio seems to be spread out. GPIO_T_FLASH_DETECT is defined as gpx2-4
>> >in board-universal5420-mmc.c, and then used for card detection.
>> >(Looking at it now again I see that write protection through sd2_wp
>> >should also be supported for mmc_2, can add that in next patch set.)
>> >
>> Card detect pin is generally a special function (dedicated pin) pin,
>> directly connected from SoC to card external slot.
>> And for exynos5420 it is gpc2-2 as pointed by Krzysztof.
>
>gpio/pinctrl is still not my area of expertise so your feedback is greatly
>appreciated!
>
>gpc2-2 does not seem to be the card-detect pin for these tablets. If I add
>sd2_cd to pinctrl-0 above I am unable to use the sdcard at all, instead
dmesg is
>filled with repeating messages like:
>
>[ 18.669050] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req
>300000Hz, actual 297619HZ div = 84) [ 18.703711] mmc_host mmc1: Bus speed
>(slot 0) = 50000000Hz (slot req 200000Hz, actual 200000HZ div = 125) [
>18.737167] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req
>100000Hz, actual 100000HZ div = 250) [ 19.058352] mmc_host mmc1: Bus
>speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63) [
>19.093037] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req
>300000Hz, actual 297619HZ div = 84) [ 19.127701] mmc_host mmc1: Bus speed
>(slot 0) = 50000000Hz (slot req 200000Hz, actual 200000HZ div = 125) [
>19.162380] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req
>100000Hz, actual 100000HZ div = 250)
>
>gpx2-4 on the other hand switches state when an sdcard is inserted or
>removed. After exporting relevant pins I have, with the card
>inserted:
>
># grep -A 2 gpx2 /sys/kernel/debug/gpio
>gpiochip3: GPIOs 24-31, parent: platform/13400000.pinctrl, gpx2:
> gpio-26 ( |Power ) in hi IRQ ACTIVE LOW
> gpio-28 ( |sysfs ) in lo
>
>and when removed gpx2-4 changes to high:
>
>gpiochip3: GPIOs 24-31, parent: platform/13400000.pinctrl, gpx2:
> gpio-26 ( |Power ) in hi IRQ ACTIVE LOW
> gpio-28 ( |sysfs ) in hi
>
>All the gpc2 pins are low no matter if sdcard is inserted or removed:
>
>gpiochip7: GPIOs 56-62, parent: platform/13410000.pinctrl, gpc2:
> gpio-56 ( |sysfs ) in lo
> gpio-57 ( |sysfs ) in lo
> gpio-58 ( |sysfs ) in lo
> gpio-59 ( |sysfs ) in lo
> gpio-60 ( |sysfs ) in lo
> gpio-61 ( |sysfs ) in lo
> gpio-62 ( |sysfs ) in lo
>
>That being said, I am not sure if it is working properly:
>
>> Also PIN_FUNC_2 for gpx2-4 indicate that it is wakeup_int2 function.
>> Do you get a card detect interrupt when removing and inserting the
>> card to the card slot?
>
This is the confirmation that this board does not uses gpc2-2 but gpx2-4.
Thanks for detailed log.
>(What is the best way to check this?) I don't get any irq related messages
in
Probably if you are interested, you can enable few debug in dw-mmc driver to
check a message like "card is present" etc.
>dmesg, and I don't see any changes in /proc/interrupts if tracked with
>something like `watch -n1 "cat /proc/interrupts"` when card is removed or
>inserted, so seems likely that pin config is wrong.
>All I can find in vendor kernel for this device is that pull config is set
to
>S3C_GPIO_PULL_NONE [1]. For some of the sibling tablets the pin is
>configured as {S3C_GPIO_INPUT, GPIO_LV_N, S3C_GPIO_PULL_NONE} [2]
>though, which I think should correspond to having:
>
>mmc2_cd: mmc2-cd-pins {
> samsung,pins = "gpx2-4";
> samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
> samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; };
>
>Changing to that does not seem to change anything though, I don't get any
>interrupt, or any messages in dmesg, when inserting or removing the sdcard.
>
>> Also to avoid confusion, probably you can change the node name as
>"mmc2_cd:
>> mmc2-cd-pins"
>> (as sd2-cd-pins is gpc2-2 for this SoC)
>
>Thanks, will fix in a v4 (after discussions here are settled).
>
I am convinced that gpc2-2 is not used for card detect for this board.
So no other query on this patch.
Thanks
>[1] https://protect2.fireeye.com/v1/url?k=bba823ae-dad5cbe9-bba9a8e1-
>74fe485fff30-b4ccbbe9776f501d&q=1&e=9951c78c-16c8-449e-913b-
>d4d1f1f9bb6b&u=https%3A%2F%2Fgithub.com%2Fexynos5420%2Fandroid_k
>ernel_samsung_exynos5420%2Fblob%2Flineage-
>17.1%2Farch%2Farm%2Fmach-exynos%2Fboard-universal5420-
>mmc.c%23L388
>[2] https://protect2.fireeye.com/v1/url?k=97465c6e-f63bb429-9747d721-
>74fe485fff30-4111389a6d2b68b4&q=1&e=9951c78c-16c8-449e-913b-
>d4d1f1f9bb6b&u=https%3A%2F%2Fgithub.com%2Fexynos5420%2Fandroid_k
>ernel_samsung_exynos5420%2Fblob%2Flineage-
>17.1%2Farch%2Farm%2Fmach-exynos%2Fboard-n1-gpio.c%23L119
>
>Best regards,
>Henrik Grimler
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2022-01-18 7:28 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-01-16 16:50 [PATCH v3 0/3] Add initial support for exynos5420-chagall-wifi Henrik Grimler
2022-01-16 16:50 ` Henrik Grimler
2022-01-16 16:50 ` [PATCH v3 1/3] dt-bindings: arm: samsung: document Chagall WiFi board binding Henrik Grimler
2022-01-16 16:50 ` Henrik Grimler
2022-01-16 16:50 ` [PATCH v3 2/3] ARM: exynos: only do SMC_CMD_CPU1BOOT call on Exynos4 Henrik Grimler
2022-01-16 16:50 ` Henrik Grimler
2022-01-16 16:50 ` [PATCH v3 3/3] ARM: dts: Add support for Samsung Chagall WiFi Henrik Grimler
2022-01-16 16:50 ` Henrik Grimler
2022-01-16 17:37 ` Krzysztof Kozlowski
2022-01-16 17:37 ` Krzysztof Kozlowski
2022-01-16 20:59 ` Henrik Grimler
2022-01-16 20:59 ` Henrik Grimler
2022-01-17 5:50 ` Alim Akhtar
2022-01-17 5:50 ` Alim Akhtar
2022-01-17 16:58 ` Henrik Grimler
2022-01-17 16:58 ` Henrik Grimler
2022-01-18 7:26 ` Alim Akhtar
2022-01-18 7:26 ` Alim Akhtar
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