[PATCH v3 0/2] platform/chrome: add support for the Framework Laptop

[PATCH v3 0/2] platform/chrome: add support for the Framework Laptop

[Dustin L. Howett]

This series adds support for the Framework Laptop to the cros_ec LPC
driver.

The Framework Laptop is a non-Chromebook laptop that uses the ChromeOS
Embedded Controller. Since the machine was designed to present a more
normal device profile, it does not report all 512 I/O ports that are
typically used by cros_ec_lpcs. Because of this, changes to the driver's
port reservation scheme were required.

Since this EC driver probes the MEC range first, and uses only the MEC
range if that probe succeeds[^1], we can get by without requesting the
entire port range required by non-MEC embedded controllers until
absolutely necessary.

[^1]: this includes "memory mapped" read - where the traditional LPC EC
requires I/O ports 0x900-0x9FF, the MEC EC multiplexes reads/writes
over the same eight ports, 0x800-0x807.

Changes in v2:
  - Cleaned up the commit subjects per request.
Changes in v3:
  - Sync'd cros_ec_commands.h with the EC changelist at
    https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3460548

Dustin L. Howett (2):
  platform/chrome: cros_ec_lpcs: detect the Framework Laptop
  platform/chrome: cros_ec_lpcs: reserve the MEC LPC I/O ports first

 drivers/platform/chrome/cros_ec_lpc.c          | 47 ++++++++++++++-----
 include/linux/platform_data/cros_ec_commands.h | 10 ++--
 2 files changed, 41 insertions(+), 16 deletions(-)

-- 
2.34.1

[PATCH v3 1/2] platform/chrome: cros_ec_lpcs: detect the Framework Laptop

[Dustin L. Howett]

The Framework Laptop identifies itself in DMI with manufacturer
"Framework" and product "Laptop".

Signed-off-by: Dustin L. Howett <dustin@howett.net>
---
 drivers/platform/chrome/cros_ec_lpc.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/platform/chrome/cros_ec_lpc.c b/drivers/platform/chrome/cros_ec_lpc.c
index d6306d2a096f..458eb59db2ff 100644
--- a/drivers/platform/chrome/cros_ec_lpc.c
+++ b/drivers/platform/chrome/cros_ec_lpc.c
@@ -500,6 +500,14 @@ static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = {
 			DMI_MATCH(DMI_PRODUCT_NAME, "Glimmer"),
 		},
 	},
+	/* A small number of non-Chromebook/box machines also use the ChromeOS EC */
+	{
+		/* the Framework Laptop */
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Framework"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Laptop"),
+		},
+	},
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
-- 
2.34.1

[PATCH v3 2/2] platform/chrome: cros_ec_lpcs: reserve the MEC LPC I/O ports first

[Dustin L. Howett]

Some ChromeOS EC devices (such as the Framework Laptop) only map I/O
ports 0x800-0x807. Making the larger reservation required by the non-MEC
LPC (the 0xFF ports for the memory map, and the 0xFF ports for the
parameter region) is non-viable on these devices.

Since we probe the MEC EC first, we can get away with a smaller
reservation that covers the MEC EC ports. If we fall back to classic
LPC, we can grow the reservation to cover the memory map and the
parameter region.

cros_ec_lpc_probe also interacted with I/O ports 0x800-0x807 without a
reservation. Restructuring the code to request the MEC LPC region first
obviates the need to do so.

Signed-off-by: Dustin L. Howett <dustin@howett.net>
---
 drivers/platform/chrome/cros_ec_lpc.c         | 39 ++++++++++++-------
 .../linux/platform_data/cros_ec_commands.h    | 10 +++--
 2 files changed, 33 insertions(+), 16 deletions(-)

diff --git a/drivers/platform/chrome/cros_ec_lpc.c b/drivers/platform/chrome/cros_ec_lpc.c
index 458eb59db2ff..06fdfe365710 100644
--- a/drivers/platform/chrome/cros_ec_lpc.c
+++ b/drivers/platform/chrome/cros_ec_lpc.c
@@ -341,9 +341,14 @@ static int cros_ec_lpc_probe(struct platform_device *pdev)
 	u8 buf[2];
 	int irq, ret;
 
-	if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
-				 dev_name(dev))) {
-		dev_err(dev, "couldn't reserve memmap region\n");
+	/*
+	 * The Framework Laptop (and possibly other non-ChromeOS devices)
+	 * only exposes the eight I/O ports that are required for the Microchip EC.
+	 * Requesting a larger reservation will fail.
+	 */
+	if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
+				 EC_HOST_CMD_MEC_REGION_SIZE, dev_name(dev))) {
+		dev_err(dev, "couldn't reserve MEC region\n");
 		return -EBUSY;
 	}
 
@@ -357,6 +362,12 @@ static int cros_ec_lpc_probe(struct platform_device *pdev)
 	cros_ec_lpc_ops.write = cros_ec_lpc_mec_write_bytes;
 	cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
 	if (buf[0] != 'E' || buf[1] != 'C') {
+		if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
+					 dev_name(dev))) {
+			dev_err(dev, "couldn't reserve memmap region\n");
+			return -EBUSY;
+		}
+
 		/* Re-assign read/write operations for the non MEC variant */
 		cros_ec_lpc_ops.read = cros_ec_lpc_read_bytes;
 		cros_ec_lpc_ops.write = cros_ec_lpc_write_bytes;
@@ -366,17 +377,19 @@ static int cros_ec_lpc_probe(struct platform_device *pdev)
 			dev_err(dev, "EC ID not detected\n");
 			return -ENODEV;
 		}
-	}
 
-	if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
-				 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
-		dev_err(dev, "couldn't reserve region0\n");
-		return -EBUSY;
-	}
-	if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
-				 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
-		dev_err(dev, "couldn't reserve region1\n");
-		return -EBUSY;
+		/* Reserve the remaining I/O ports required by the non-MEC protocol. */
+		if (!devm_request_region(dev, EC_HOST_CMD_REGION0 + EC_HOST_CMD_MEC_REGION_SIZE,
+					 EC_HOST_CMD_REGION_SIZE - EC_HOST_CMD_MEC_REGION_SIZE,
+					 dev_name(dev))) {
+			dev_err(dev, "couldn't reserve remainder of region0\n");
+			return -EBUSY;
+		}
+		if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
+					 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
+			dev_err(dev, "couldn't reserve region1\n");
+			return -EBUSY;
+		}
 	}
 
 	ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h
index 271bd87bff0a..1a9a38ce0d3f 100644
--- a/include/linux/platform_data/cros_ec_commands.h
+++ b/include/linux/platform_data/cros_ec_commands.h
@@ -51,10 +51,14 @@
 /*
  * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
  * and they tell the kernel that so we have to think of it as two parts.
+ *
+ * Other BIOSes report only the I/O port region spanned by the Microchip
+ * MEC series EC; an attempt to address a larger region may fail.
  */
-#define EC_HOST_CMD_REGION0    0x800
-#define EC_HOST_CMD_REGION1    0x880
-#define EC_HOST_CMD_REGION_SIZE 0x80
+#define EC_HOST_CMD_REGION0       0x800
+#define EC_HOST_CMD_REGION1       0x880
+#define EC_HOST_CMD_REGION_SIZE    0x80
+#define EC_HOST_CMD_MEC_REGION_SIZE 0x8
 
 /* EC command register bit functions */
 #define EC_LPC_CMDR_DATA	BIT(0)  /* Data ready for host to read */
-- 
2.34.1

Re: [PATCH v3 0/2] platform/chrome: add support for the Framework Laptop

[Tzung-Bi Shih]

On Thu, Feb 17, 2022 at 10:59:28AM -0600, Dustin L. Howett wrote:
> This series adds support for the Framework Laptop to the cros_ec LPC
> driver.
> 
> The Framework Laptop is a non-Chromebook laptop that uses the ChromeOS
> Embedded Controller. Since the machine was designed to present a more
> normal device profile, it does not report all 512 I/O ports that are
> typically used by cros_ec_lpcs. Because of this, changes to the driver's
> port reservation scheme were required.
> 
> Since this EC driver probes the MEC range first, and uses only the MEC
> range if that probe succeeds[^1], we can get by without requesting the
> entire port range required by non-MEC embedded controllers until
> absolutely necessary.
> 
> [^1]: this includes "memory mapped" read - where the traditional LPC EC
> requires I/O ports 0x900-0x9FF, the MEC EC multiplexes reads/writes
> over the same eight ports, 0x800-0x807.
> 
> Changes in v2:
>   - Cleaned up the commit subjects per request.
> Changes in v3:
>   - Sync'd cros_ec_commands.h with the EC changelist at
>     https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3460548
> 
> Dustin L. Howett (2):
>   platform/chrome: cros_ec_lpcs: detect the Framework Laptop
>   platform/chrome: cros_ec_lpcs: reserve the MEC LPC I/O ports first

For the series,
Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>

Re: [PATCH v3 0/2] platform/chrome: add support for the Framework Laptop

[patchwork-bot+chrome-platform]

Hello:

This series was applied to chrome-platform/linux.git (for-kernelci)
by Tzung-Bi Shih <tzungbi@kernel.org>:

On Thu, 17 Feb 2022 10:59:28 -0600 you wrote:
> This series adds support for the Framework Laptop to the cros_ec LPC
> driver.
> 
> The Framework Laptop is a non-Chromebook laptop that uses the ChromeOS
> Embedded Controller. Since the machine was designed to present a more
> normal device profile, it does not report all 512 I/O ports that are
> typically used by cros_ec_lpcs. Because of this, changes to the driver's
> port reservation scheme were required.
> 
> [...]

Here is the summary with links:
  - [v3,1/2] platform/chrome: cros_ec_lpcs: detect the Framework Laptop
    https://git.kernel.org/chrome-platform/c/6a5d778edaa3
  - [v3,2/2] platform/chrome: cros_ec_lpcs: reserve the MEC LPC I/O ports first
    https://git.kernel.org/chrome-platform/c/c9bc1a0ef9f6

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html

Re: [PATCH v3 0/2] platform/chrome: add support for the Framework Laptop

[patchwork-bot+chrome-platform]

Hello:

This series was applied to chrome-platform/linux.git (for-next)
by Tzung-Bi Shih <tzungbi@kernel.org>:

On Thu, 17 Feb 2022 10:59:28 -0600 you wrote:
> This series adds support for the Framework Laptop to the cros_ec LPC
> driver.
> 
> The Framework Laptop is a non-Chromebook laptop that uses the ChromeOS
> Embedded Controller. Since the machine was designed to present a more
> normal device profile, it does not report all 512 I/O ports that are
> typically used by cros_ec_lpcs. Because of this, changes to the driver's
> port reservation scheme were required.
> 
> [...]

Here is the summary with links:
  - [v3,1/2] platform/chrome: cros_ec_lpcs: detect the Framework Laptop
    https://git.kernel.org/chrome-platform/c/6a5d778edaa3
  - [v3,2/2] platform/chrome: cros_ec_lpcs: reserve the MEC LPC I/O ports first
    https://git.kernel.org/chrome-platform/c/c9bc1a0ef9f6

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html