* [PATCH 00/16] media: rkisp1: Misc bug fixes and cleanups
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
Hello,
This series fixes multiple issues and performs further cleanups for the
rkisp1 driver.
Patches 01/16 to 07/16 fix issues in the error paths at probe time that
lead to kernel crashes in case of errors. The .remove() path is also
improved as a result.
Patches 08/16 and 09/16 then clean up register definitions, and patch
10/16 simplifies access to the resizer registers.
Patches 11/16 to 15/16 move on to improving debugfs support, with code
first moved to a separate file (11/16) that can be conditionally
compiled (12/16), support for collecting statistics on the input
interface (13/16, very useful to check if the ISP actually receives
data) and for dumping core and ISP registers (14/16). Patch 15/16
completes that rework by moving the resizer register dumps support to
debugfs too.
Finally, patch 16/16 simplifies the V4L2 querycap implementation on
video nodes.
More fixes and improvements should follow, so I'd like to merge sooner
than latter if possible, to avoid having to rebase large series.
Laurent Pinchart (15):
media: rkisp1: capture: Initialize entity before video device
media: rkisp1: capture: Fix and simplify (un)registration
media: rkisp1: isp: Fix and simplify (un)registration
media: rkisp1: resizer: Fix and simplify (un)registration
media: rkisp1: params: Fix and simplify (un)registration
media: rkisp1: stats: Simplify (un)registration
media: rkisp1: Simplify rkisp1_entities_register() error path
media: rkisp1: regs: Don't use BIT() macro for multi-bit register
fields
media: rkisp1: regs: Rename CCL, ICCL and IRCL registers with VI_
prefix
media: rkisp1: resizer: Simplify register access
media: rkisp1: Move debugfs code to a separate file
media: rkisp1: Compile debugfs support conditionally
media: rkisp1: debug: Collect input status by sampling ISP_FLAGS_SHD
media: rkisp1: debug: Add debugfs files to dump core and ISP registers
media: rkisp1: debug: Move resizer register dump to debugfs
Paul Elder (1):
media: rkisp1: capture: Bypass the main device for handling querycap
.../media/platform/rockchip/rkisp1/Makefile | 18 +-
.../platform/rockchip/rkisp1/rkisp1-capture.c | 52 ++---
.../platform/rockchip/rkisp1/rkisp1-common.h | 16 ++
.../platform/rockchip/rkisp1/rkisp1-debug.c | 209 ++++++++++++++++++
.../platform/rockchip/rkisp1/rkisp1-dev.c | 73 ++----
.../platform/rockchip/rkisp1/rkisp1-isp.c | 39 ++--
.../platform/rockchip/rkisp1/rkisp1-params.c | 23 +-
.../platform/rockchip/rkisp1/rkisp1-regs.h | 188 ++++++++--------
.../platform/rockchip/rkisp1/rkisp1-resizer.c | 192 ++++------------
.../platform/rockchip/rkisp1/rkisp1-stats.c | 11 +-
10 files changed, 464 insertions(+), 357 deletions(-)
create mode 100644 drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 54+ messages in thread* [PATCH 01/16] media: rkisp1: capture: Initialize entity before video device
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The media_entity embedded in the video_device needs to be initialized
before registering the video_device. Do so.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-capture.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
index c95c00a91180..9c11f2b8e5f5 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
@@ -1372,22 +1372,25 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
vdev->queue = q;
+ ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
+ if (ret)
+ return ret;
+
ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
if (ret) {
dev_err(cap->rkisp1->dev,
"failed to register %s, ret=%d\n", vdev->name, ret);
- return ret;
+ goto error;
}
+
v4l2_info(v4l2_dev, "registered %s as /dev/video%d\n", vdev->name,
vdev->num);
- ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
- if (ret) {
- video_unregister_device(vdev);
- return ret;
- }
-
return 0;
+
+error:
+ media_entity_cleanup(&vdev->entity);
+ return ret;
}
static void
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 01/16] media: rkisp1: capture: Initialize entity before video device
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The media_entity embedded in the video_device needs to be initialized
before registering the video_device. Do so.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-capture.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
index c95c00a91180..9c11f2b8e5f5 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
@@ -1372,22 +1372,25 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
vdev->queue = q;
+ ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
+ if (ret)
+ return ret;
+
ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
if (ret) {
dev_err(cap->rkisp1->dev,
"failed to register %s, ret=%d\n", vdev->name, ret);
- return ret;
+ goto error;
}
+
v4l2_info(v4l2_dev, "registered %s as /dev/video%d\n", vdev->name,
vdev->num);
- ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
- if (ret) {
- video_unregister_device(vdev);
- return ret;
- }
-
return 0;
+
+error:
+ media_entity_cleanup(&vdev->entity);
+ return ret;
}
static void
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread* Re: [PATCH 01/16] media: rkisp1: capture: Initialize entity before video device
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-03-02 14:25 ` Dafna Hirschfeld
-1 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-02 14:25 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:01, Laurent Pinchart wrote:
> The media_entity embedded in the video_device needs to be initialized
> before registering the video_device. Do so.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Dafna Hirschfeld <dafna@fastmail.com>
> ---
> .../platform/rockchip/rkisp1/rkisp1-capture.c | 17 ++++++++++-------
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> index c95c00a91180..9c11f2b8e5f5 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> @@ -1372,22 +1372,25 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
>
> vdev->queue = q;
>
> + ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
> + if (ret)
> + return ret;
> +
> ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
> if (ret) {
> dev_err(cap->rkisp1->dev,
> "failed to register %s, ret=%d\n", vdev->name, ret);
> - return ret;
> + goto error;
> }
> +
> v4l2_info(v4l2_dev, "registered %s as /dev/video%d\n", vdev->name,
> vdev->num);
>
> - ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
> - if (ret) {
> - video_unregister_device(vdev);
> - return ret;
> - }
> -
> return 0;
> +
> +error:
> + media_entity_cleanup(&vdev->entity);
> + return ret;
> }
>
> static void
> --
> Regards,
>
> Laurent Pinchart
>
^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH 01/16] media: rkisp1: capture: Initialize entity before video device
@ 2022-03-02 14:25 ` Dafna Hirschfeld
0 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-02 14:25 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:01, Laurent Pinchart wrote:
> The media_entity embedded in the video_device needs to be initialized
> before registering the video_device. Do so.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Dafna Hirschfeld <dafna@fastmail.com>
> ---
> .../platform/rockchip/rkisp1/rkisp1-capture.c | 17 ++++++++++-------
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> index c95c00a91180..9c11f2b8e5f5 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> @@ -1372,22 +1372,25 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
>
> vdev->queue = q;
>
> + ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
> + if (ret)
> + return ret;
> +
> ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
> if (ret) {
> dev_err(cap->rkisp1->dev,
> "failed to register %s, ret=%d\n", vdev->name, ret);
> - return ret;
> + goto error;
> }
> +
> v4l2_info(v4l2_dev, "registered %s as /dev/video%d\n", vdev->name,
> vdev->num);
>
> - ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
> - if (ret) {
> - video_unregister_device(vdev);
> - return ret;
> - }
> -
> return 0;
> +
> +error:
> + media_entity_cleanup(&vdev->entity);
> + return ret;
> }
>
> static void
> --
> Regards,
>
> Laurent Pinchart
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH 02/16] media: rkisp1: capture: Fix and simplify (un)registration
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The rkisp1_register_capture() and rkisp1_unregister_capture() functions
don't destroy the mutex (in the error path for the former). Fix this and
make rkisp1_unregister_capture() and rkisp1_capture_devs_unregister()
safe to be called on an unregistered capture node to prepare for
simplification of error handling at probe time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-capture.c | 26 ++++++++++---------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
index 9c11f2b8e5f5..18be7c982db7 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
@@ -1312,8 +1312,12 @@ static const struct v4l2_file_operations rkisp1_fops = {
static void rkisp1_unregister_capture(struct rkisp1_capture *cap)
{
+ if (!cap->rkisp1)
+ return;
+
media_entity_cleanup(&cap->vnode.vdev.entity);
vb2_video_unregister_device(&cap->vnode.vdev);
+ mutex_destroy(&cap->vnode.vlock);
}
void rkisp1_capture_devs_unregister(struct rkisp1_device *rkisp1)
@@ -1390,6 +1394,8 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
error:
media_entity_cleanup(&vdev->entity);
+ mutex_destroy(&node->vlock);
+ cap->rkisp1 = NULL;
return ret;
}
@@ -1425,26 +1431,22 @@ rkisp1_capture_init(struct rkisp1_device *rkisp1, enum rkisp1_stream_id id)
int rkisp1_capture_devs_register(struct rkisp1_device *rkisp1)
{
- struct rkisp1_capture *cap;
- unsigned int i, j;
+ unsigned int i;
int ret;
for (i = 0; i < ARRAY_SIZE(rkisp1->capture_devs); i++) {
+ struct rkisp1_capture *cap = &rkisp1->capture_devs[i];
+
rkisp1_capture_init(rkisp1, i);
- cap = &rkisp1->capture_devs[i];
cap->rkisp1 = rkisp1;
+
ret = rkisp1_register_capture(cap);
- if (ret)
- goto err_unreg_capture_devs;
+ if (ret) {
+ rkisp1_capture_devs_unregister(rkisp1);
+ return ret;
+ }
}
return 0;
-err_unreg_capture_devs:
- for (j = 0; j < i; j++) {
- cap = &rkisp1->capture_devs[j];
- rkisp1_unregister_capture(cap);
- }
-
- return ret;
}
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 02/16] media: rkisp1: capture: Fix and simplify (un)registration
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The rkisp1_register_capture() and rkisp1_unregister_capture() functions
don't destroy the mutex (in the error path for the former). Fix this and
make rkisp1_unregister_capture() and rkisp1_capture_devs_unregister()
safe to be called on an unregistered capture node to prepare for
simplification of error handling at probe time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-capture.c | 26 ++++++++++---------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
index 9c11f2b8e5f5..18be7c982db7 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
@@ -1312,8 +1312,12 @@ static const struct v4l2_file_operations rkisp1_fops = {
static void rkisp1_unregister_capture(struct rkisp1_capture *cap)
{
+ if (!cap->rkisp1)
+ return;
+
media_entity_cleanup(&cap->vnode.vdev.entity);
vb2_video_unregister_device(&cap->vnode.vdev);
+ mutex_destroy(&cap->vnode.vlock);
}
void rkisp1_capture_devs_unregister(struct rkisp1_device *rkisp1)
@@ -1390,6 +1394,8 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
error:
media_entity_cleanup(&vdev->entity);
+ mutex_destroy(&node->vlock);
+ cap->rkisp1 = NULL;
return ret;
}
@@ -1425,26 +1431,22 @@ rkisp1_capture_init(struct rkisp1_device *rkisp1, enum rkisp1_stream_id id)
int rkisp1_capture_devs_register(struct rkisp1_device *rkisp1)
{
- struct rkisp1_capture *cap;
- unsigned int i, j;
+ unsigned int i;
int ret;
for (i = 0; i < ARRAY_SIZE(rkisp1->capture_devs); i++) {
+ struct rkisp1_capture *cap = &rkisp1->capture_devs[i];
+
rkisp1_capture_init(rkisp1, i);
- cap = &rkisp1->capture_devs[i];
cap->rkisp1 = rkisp1;
+
ret = rkisp1_register_capture(cap);
- if (ret)
- goto err_unreg_capture_devs;
+ if (ret) {
+ rkisp1_capture_devs_unregister(rkisp1);
+ return ret;
+ }
}
return 0;
-err_unreg_capture_devs:
- for (j = 0; j < i; j++) {
- cap = &rkisp1->capture_devs[j];
- rkisp1_unregister_capture(cap);
- }
-
- return ret;
}
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread* Re: [PATCH 02/16] media: rkisp1: capture: Fix and simplify (un)registration
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-03-02 17:10 ` Dafna Hirschfeld
-1 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-02 17:10 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:01, Laurent Pinchart wrote:
> The rkisp1_register_capture() and rkisp1_unregister_capture() functions
> don't destroy the mutex (in the error path for the former). Fix this and
> make rkisp1_unregister_capture() and rkisp1_capture_devs_unregister()
> safe to be called on an unregistered capture node to prepare for
> simplification of error handling at probe time.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> .../platform/rockchip/rkisp1/rkisp1-capture.c | 26 ++++++++++---------
> 1 file changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> index 9c11f2b8e5f5..18be7c982db7 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> @@ -1312,8 +1312,12 @@ static const struct v4l2_file_operations rkisp1_fops = {
>
> static void rkisp1_unregister_capture(struct rkisp1_capture *cap)
> {
> + if (!cap->rkisp1)
> + return;
> +
> media_entity_cleanup(&cap->vnode.vdev.entity);
> vb2_video_unregister_device(&cap->vnode.vdev);
> + mutex_destroy(&cap->vnode.vlock);
> }
>
> void rkisp1_capture_devs_unregister(struct rkisp1_device *rkisp1)
> @@ -1390,6 +1394,8 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
>
> error:
> media_entity_cleanup(&vdev->entity);
> + mutex_destroy(&node->vlock);
> + cap->rkisp1 = NULL;
> return ret;
> }
>
> @@ -1425,26 +1431,22 @@ rkisp1_capture_init(struct rkisp1_device *rkisp1, enum rkisp1_stream_id id)
>
> int rkisp1_capture_devs_register(struct rkisp1_device *rkisp1)
> {
> - struct rkisp1_capture *cap;
> - unsigned int i, j;
> + unsigned int i;
> int ret;
>
> for (i = 0; i < ARRAY_SIZE(rkisp1->capture_devs); i++) {
> + struct rkisp1_capture *cap = &rkisp1->capture_devs[i];
> +
> rkisp1_capture_init(rkisp1, i);
> - cap = &rkisp1->capture_devs[i];
> cap->rkisp1 = rkisp1;
> +
> ret = rkisp1_register_capture(cap);
> - if (ret)
> - goto err_unreg_capture_devs;
> + if (ret) {
I would set 'cap->rkisp1 = NULL' here instead of in rkisp1_register_capture
so that 'rkisp1l' field is set and unset in the same function
thanks,
Dafna
> + rkisp1_capture_devs_unregister(rkisp1);
> + return ret;
> + }
> }
>
> return 0;
>
> -err_unreg_capture_devs:
> - for (j = 0; j < i; j++) {
> - cap = &rkisp1->capture_devs[j];
> - rkisp1_unregister_capture(cap);
> - }
> -
> - return ret;
> }
> --
> Regards,
>
> Laurent Pinchart
>
^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH 02/16] media: rkisp1: capture: Fix and simplify (un)registration
@ 2022-03-02 17:10 ` Dafna Hirschfeld
0 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-02 17:10 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:01, Laurent Pinchart wrote:
> The rkisp1_register_capture() and rkisp1_unregister_capture() functions
> don't destroy the mutex (in the error path for the former). Fix this and
> make rkisp1_unregister_capture() and rkisp1_capture_devs_unregister()
> safe to be called on an unregistered capture node to prepare for
> simplification of error handling at probe time.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> .../platform/rockchip/rkisp1/rkisp1-capture.c | 26 ++++++++++---------
> 1 file changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> index 9c11f2b8e5f5..18be7c982db7 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> @@ -1312,8 +1312,12 @@ static const struct v4l2_file_operations rkisp1_fops = {
>
> static void rkisp1_unregister_capture(struct rkisp1_capture *cap)
> {
> + if (!cap->rkisp1)
> + return;
> +
> media_entity_cleanup(&cap->vnode.vdev.entity);
> vb2_video_unregister_device(&cap->vnode.vdev);
> + mutex_destroy(&cap->vnode.vlock);
> }
>
> void rkisp1_capture_devs_unregister(struct rkisp1_device *rkisp1)
> @@ -1390,6 +1394,8 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
>
> error:
> media_entity_cleanup(&vdev->entity);
> + mutex_destroy(&node->vlock);
> + cap->rkisp1 = NULL;
> return ret;
> }
>
> @@ -1425,26 +1431,22 @@ rkisp1_capture_init(struct rkisp1_device *rkisp1, enum rkisp1_stream_id id)
>
> int rkisp1_capture_devs_register(struct rkisp1_device *rkisp1)
> {
> - struct rkisp1_capture *cap;
> - unsigned int i, j;
> + unsigned int i;
> int ret;
>
> for (i = 0; i < ARRAY_SIZE(rkisp1->capture_devs); i++) {
> + struct rkisp1_capture *cap = &rkisp1->capture_devs[i];
> +
> rkisp1_capture_init(rkisp1, i);
> - cap = &rkisp1->capture_devs[i];
> cap->rkisp1 = rkisp1;
> +
> ret = rkisp1_register_capture(cap);
> - if (ret)
> - goto err_unreg_capture_devs;
> + if (ret) {
I would set 'cap->rkisp1 = NULL' here instead of in rkisp1_register_capture
so that 'rkisp1l' field is set and unset in the same function
thanks,
Dafna
> + rkisp1_capture_devs_unregister(rkisp1);
> + return ret;
> + }
> }
>
> return 0;
>
> -err_unreg_capture_devs:
> - for (j = 0; j < i; j++) {
> - cap = &rkisp1->capture_devs[j];
> - rkisp1_unregister_capture(cap);
> - }
> -
> - return ret;
> }
> --
> Regards,
>
> Laurent Pinchart
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH 02/16] media: rkisp1: capture: Fix and simplify (un)registration
2022-03-02 17:10 ` Dafna Hirschfeld
@ 2022-03-04 12:21 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-03-04 12:21 UTC (permalink / raw)
To: Dafna Hirschfeld
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
Hi Dafna,
On Wed, Mar 02, 2022 at 07:10:40PM +0200, Dafna Hirschfeld wrote:
> On 27.02.2022 18:01, Laurent Pinchart wrote:
> > The rkisp1_register_capture() and rkisp1_unregister_capture() functions
> > don't destroy the mutex (in the error path for the former). Fix this and
> > make rkisp1_unregister_capture() and rkisp1_capture_devs_unregister()
> > safe to be called on an unregistered capture node to prepare for
> > simplification of error handling at probe time.
> >
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> > .../platform/rockchip/rkisp1/rkisp1-capture.c | 26 ++++++++++---------
> > 1 file changed, 14 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> > index 9c11f2b8e5f5..18be7c982db7 100644
> > --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> > +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> > @@ -1312,8 +1312,12 @@ static const struct v4l2_file_operations rkisp1_fops = {
> >
> > static void rkisp1_unregister_capture(struct rkisp1_capture *cap)
> > {
> > + if (!cap->rkisp1)
> > + return;
> > +
> > media_entity_cleanup(&cap->vnode.vdev.entity);
> > vb2_video_unregister_device(&cap->vnode.vdev);
> > + mutex_destroy(&cap->vnode.vlock);
> > }
> >
> > void rkisp1_capture_devs_unregister(struct rkisp1_device *rkisp1)
> > @@ -1390,6 +1394,8 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
> >
> > error:
> > media_entity_cleanup(&vdev->entity);
> > + mutex_destroy(&node->vlock);
> > + cap->rkisp1 = NULL;
> > return ret;
> > }
> >
> > @@ -1425,26 +1431,22 @@ rkisp1_capture_init(struct rkisp1_device *rkisp1, enum rkisp1_stream_id id)
> >
> > int rkisp1_capture_devs_register(struct rkisp1_device *rkisp1)
> > {
> > - struct rkisp1_capture *cap;
> > - unsigned int i, j;
> > + unsigned int i;
> > int ret;
> >
> > for (i = 0; i < ARRAY_SIZE(rkisp1->capture_devs); i++) {
> > + struct rkisp1_capture *cap = &rkisp1->capture_devs[i];
> > +
> > rkisp1_capture_init(rkisp1, i);
> > - cap = &rkisp1->capture_devs[i];
> > cap->rkisp1 = rkisp1;
> > +
> > ret = rkisp1_register_capture(cap);
> > - if (ret)
> > - goto err_unreg_capture_devs;
> > + if (ret) {
>
> I would set 'cap->rkisp1 = NULL' here instead of in rkisp1_register_capture
> so that 'rkisp1l' field is set and unset in the same function
I'll fix that, and in the resizer patch too.
> > + rkisp1_capture_devs_unregister(rkisp1);
> > + return ret;
> > + }
> > }
> >
> > return 0;
> >
> > -err_unreg_capture_devs:
> > - for (j = 0; j < i; j++) {
> > - cap = &rkisp1->capture_devs[j];
> > - rkisp1_unregister_capture(cap);
> > - }
> > -
> > - return ret;
> > }
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH 02/16] media: rkisp1: capture: Fix and simplify (un)registration
@ 2022-03-04 12:21 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-03-04 12:21 UTC (permalink / raw)
To: Dafna Hirschfeld
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
Hi Dafna,
On Wed, Mar 02, 2022 at 07:10:40PM +0200, Dafna Hirschfeld wrote:
> On 27.02.2022 18:01, Laurent Pinchart wrote:
> > The rkisp1_register_capture() and rkisp1_unregister_capture() functions
> > don't destroy the mutex (in the error path for the former). Fix this and
> > make rkisp1_unregister_capture() and rkisp1_capture_devs_unregister()
> > safe to be called on an unregistered capture node to prepare for
> > simplification of error handling at probe time.
> >
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> > .../platform/rockchip/rkisp1/rkisp1-capture.c | 26 ++++++++++---------
> > 1 file changed, 14 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> > index 9c11f2b8e5f5..18be7c982db7 100644
> > --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> > +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> > @@ -1312,8 +1312,12 @@ static const struct v4l2_file_operations rkisp1_fops = {
> >
> > static void rkisp1_unregister_capture(struct rkisp1_capture *cap)
> > {
> > + if (!cap->rkisp1)
> > + return;
> > +
> > media_entity_cleanup(&cap->vnode.vdev.entity);
> > vb2_video_unregister_device(&cap->vnode.vdev);
> > + mutex_destroy(&cap->vnode.vlock);
> > }
> >
> > void rkisp1_capture_devs_unregister(struct rkisp1_device *rkisp1)
> > @@ -1390,6 +1394,8 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
> >
> > error:
> > media_entity_cleanup(&vdev->entity);
> > + mutex_destroy(&node->vlock);
> > + cap->rkisp1 = NULL;
> > return ret;
> > }
> >
> > @@ -1425,26 +1431,22 @@ rkisp1_capture_init(struct rkisp1_device *rkisp1, enum rkisp1_stream_id id)
> >
> > int rkisp1_capture_devs_register(struct rkisp1_device *rkisp1)
> > {
> > - struct rkisp1_capture *cap;
> > - unsigned int i, j;
> > + unsigned int i;
> > int ret;
> >
> > for (i = 0; i < ARRAY_SIZE(rkisp1->capture_devs); i++) {
> > + struct rkisp1_capture *cap = &rkisp1->capture_devs[i];
> > +
> > rkisp1_capture_init(rkisp1, i);
> > - cap = &rkisp1->capture_devs[i];
> > cap->rkisp1 = rkisp1;
> > +
> > ret = rkisp1_register_capture(cap);
> > - if (ret)
> > - goto err_unreg_capture_devs;
> > + if (ret) {
>
> I would set 'cap->rkisp1 = NULL' here instead of in rkisp1_register_capture
> so that 'rkisp1l' field is set and unset in the same function
I'll fix that, and in the resizer patch too.
> > + rkisp1_capture_devs_unregister(rkisp1);
> > + return ret;
> > + }
> > }
> >
> > return 0;
> >
> > -err_unreg_capture_devs:
> > - for (j = 0; j < i; j++) {
> > - cap = &rkisp1->capture_devs[j];
> > - rkisp1_unregister_capture(cap);
> > - }
> > -
> > - return ret;
> > }
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH 03/16] media: rkisp1: isp: Fix and simplify (un)registration
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The rkisp1_isp_register() and rkisp1_isp_unregister() functions don't
destroy the mutex (in the error path for the former). Fix this, simplify
error handling at registration time as media_entity_cleanup() can be
called on an uninitialized entity, and make rkisp1_isp_unregister() and
safe to be called on an unregistered isp subdev to prepare for
simplification of error handling at probe time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-capture.c | 4 ++--
.../platform/rockchip/rkisp1/rkisp1-isp.c | 20 ++++++++++++-------
2 files changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
index 18be7c982db7..0eccf9eb6a14 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
@@ -1371,14 +1371,14 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
if (ret) {
dev_err(cap->rkisp1->dev,
"vb2 queue init failed (err=%d)\n", ret);
- return ret;
+ goto error;
}
vdev->queue = q;
ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
if (ret)
- return ret;
+ goto error;
ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
if (ret) {
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
index 2a35bf24e54e..f84e53b60ee1 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
@@ -1090,29 +1090,35 @@ int rkisp1_isp_register(struct rkisp1_device *rkisp1)
mutex_init(&isp->ops_lock);
ret = media_entity_pads_init(&sd->entity, RKISP1_ISP_PAD_MAX, pads);
if (ret)
- return ret;
+ goto error;
ret = v4l2_device_register_subdev(&rkisp1->v4l2_dev, sd);
if (ret) {
dev_err(rkisp1->dev, "Failed to register isp subdev\n");
- goto err_cleanup_media_entity;
+ goto error;
}
rkisp1_isp_init_config(sd, &state);
+
return 0;
-err_cleanup_media_entity:
+error:
media_entity_cleanup(&sd->entity);
-
+ mutex_destroy(&isp->ops_lock);
+ isp->sd.flags = 0;
return ret;
}
void rkisp1_isp_unregister(struct rkisp1_device *rkisp1)
{
- struct v4l2_subdev *sd = &rkisp1->isp.sd;
+ struct rkisp1_isp *isp = &rkisp1->isp;
- v4l2_device_unregister_subdev(sd);
- media_entity_cleanup(&sd->entity);
+ if (!isp->sd.flags)
+ return;
+
+ v4l2_device_unregister_subdev(&isp->sd);
+ media_entity_cleanup(&isp->sd.entity);
+ mutex_destroy(&isp->ops_lock);
}
/* ----------------------------------------------------------------------------
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 03/16] media: rkisp1: isp: Fix and simplify (un)registration
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The rkisp1_isp_register() and rkisp1_isp_unregister() functions don't
destroy the mutex (in the error path for the former). Fix this, simplify
error handling at registration time as media_entity_cleanup() can be
called on an uninitialized entity, and make rkisp1_isp_unregister() and
safe to be called on an unregistered isp subdev to prepare for
simplification of error handling at probe time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-capture.c | 4 ++--
.../platform/rockchip/rkisp1/rkisp1-isp.c | 20 ++++++++++++-------
2 files changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
index 18be7c982db7..0eccf9eb6a14 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
@@ -1371,14 +1371,14 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
if (ret) {
dev_err(cap->rkisp1->dev,
"vb2 queue init failed (err=%d)\n", ret);
- return ret;
+ goto error;
}
vdev->queue = q;
ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
if (ret)
- return ret;
+ goto error;
ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
if (ret) {
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
index 2a35bf24e54e..f84e53b60ee1 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
@@ -1090,29 +1090,35 @@ int rkisp1_isp_register(struct rkisp1_device *rkisp1)
mutex_init(&isp->ops_lock);
ret = media_entity_pads_init(&sd->entity, RKISP1_ISP_PAD_MAX, pads);
if (ret)
- return ret;
+ goto error;
ret = v4l2_device_register_subdev(&rkisp1->v4l2_dev, sd);
if (ret) {
dev_err(rkisp1->dev, "Failed to register isp subdev\n");
- goto err_cleanup_media_entity;
+ goto error;
}
rkisp1_isp_init_config(sd, &state);
+
return 0;
-err_cleanup_media_entity:
+error:
media_entity_cleanup(&sd->entity);
-
+ mutex_destroy(&isp->ops_lock);
+ isp->sd.flags = 0;
return ret;
}
void rkisp1_isp_unregister(struct rkisp1_device *rkisp1)
{
- struct v4l2_subdev *sd = &rkisp1->isp.sd;
+ struct rkisp1_isp *isp = &rkisp1->isp;
- v4l2_device_unregister_subdev(sd);
- media_entity_cleanup(&sd->entity);
+ if (!isp->sd.flags)
+ return;
+
+ v4l2_device_unregister_subdev(&isp->sd);
+ media_entity_cleanup(&isp->sd.entity);
+ mutex_destroy(&isp->ops_lock);
}
/* ----------------------------------------------------------------------------
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH 04/16] media: rkisp1: resizer: Fix and simplify (un)registration
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The rkisp1_rsz_register() and rkisp1_rsz_unregister() functions don't
destroy the mutex (in the error path for the former). Fix this, simplify
error handling at registration time as media_entity_cleanup() can be
called on an uninitialized entity, and make rkisp1_rsz_unregister() and
rkisp1_resizer_devs_unregister() safe to be called on an unregistered
resizer subdev to prepare for simplification of error handling at probe
time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-resizer.c | 34 +++++++++----------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
index 2070f4b06705..65ce8d647118 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
@@ -782,8 +782,12 @@ static const struct v4l2_subdev_ops rkisp1_rsz_ops = {
static void rkisp1_rsz_unregister(struct rkisp1_resizer *rsz)
{
+ if (!rsz->rkisp1)
+ return;
+
v4l2_device_unregister_subdev(&rsz->sd);
media_entity_cleanup(&rsz->sd.entity);
+ mutex_destroy(&rsz->ops_lock);
}
static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
@@ -821,47 +825,43 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
mutex_init(&rsz->ops_lock);
ret = media_entity_pads_init(&sd->entity, RKISP1_RSZ_PAD_MAX, pads);
if (ret)
- return ret;
+ goto error;
ret = v4l2_device_register_subdev(&rsz->rkisp1->v4l2_dev, sd);
if (ret) {
dev_err(sd->dev, "Failed to register resizer subdev\n");
- goto err_cleanup_media_entity;
+ goto error;
}
rkisp1_rsz_init_config(sd, &state);
return 0;
-err_cleanup_media_entity:
+error:
media_entity_cleanup(&sd->entity);
-
+ mutex_destroy(&rsz->ops_lock);
+ rsz->rkisp1 = NULL;
return ret;
}
int rkisp1_resizer_devs_register(struct rkisp1_device *rkisp1)
{
- struct rkisp1_resizer *rsz;
- unsigned int i, j;
+ unsigned int i;
int ret;
for (i = 0; i < ARRAY_SIZE(rkisp1->resizer_devs); i++) {
- rsz = &rkisp1->resizer_devs[i];
+ struct rkisp1_resizer *rsz = &rkisp1->resizer_devs[i];
+
rsz->rkisp1 = rkisp1;
rsz->id = i;
+
ret = rkisp1_rsz_register(rsz);
- if (ret)
- goto err_unreg_resizer_devs;
+ if (ret) {
+ rkisp1_resizer_devs_unregister(rkisp1);
+ return ret;
+ }
}
return 0;
-
-err_unreg_resizer_devs:
- for (j = 0; j < i; j++) {
- rsz = &rkisp1->resizer_devs[j];
- rkisp1_rsz_unregister(rsz);
- }
-
- return ret;
}
void rkisp1_resizer_devs_unregister(struct rkisp1_device *rkisp1)
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 04/16] media: rkisp1: resizer: Fix and simplify (un)registration
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The rkisp1_rsz_register() and rkisp1_rsz_unregister() functions don't
destroy the mutex (in the error path for the former). Fix this, simplify
error handling at registration time as media_entity_cleanup() can be
called on an uninitialized entity, and make rkisp1_rsz_unregister() and
rkisp1_resizer_devs_unregister() safe to be called on an unregistered
resizer subdev to prepare for simplification of error handling at probe
time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-resizer.c | 34 +++++++++----------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
index 2070f4b06705..65ce8d647118 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
@@ -782,8 +782,12 @@ static const struct v4l2_subdev_ops rkisp1_rsz_ops = {
static void rkisp1_rsz_unregister(struct rkisp1_resizer *rsz)
{
+ if (!rsz->rkisp1)
+ return;
+
v4l2_device_unregister_subdev(&rsz->sd);
media_entity_cleanup(&rsz->sd.entity);
+ mutex_destroy(&rsz->ops_lock);
}
static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
@@ -821,47 +825,43 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
mutex_init(&rsz->ops_lock);
ret = media_entity_pads_init(&sd->entity, RKISP1_RSZ_PAD_MAX, pads);
if (ret)
- return ret;
+ goto error;
ret = v4l2_device_register_subdev(&rsz->rkisp1->v4l2_dev, sd);
if (ret) {
dev_err(sd->dev, "Failed to register resizer subdev\n");
- goto err_cleanup_media_entity;
+ goto error;
}
rkisp1_rsz_init_config(sd, &state);
return 0;
-err_cleanup_media_entity:
+error:
media_entity_cleanup(&sd->entity);
-
+ mutex_destroy(&rsz->ops_lock);
+ rsz->rkisp1 = NULL;
return ret;
}
int rkisp1_resizer_devs_register(struct rkisp1_device *rkisp1)
{
- struct rkisp1_resizer *rsz;
- unsigned int i, j;
+ unsigned int i;
int ret;
for (i = 0; i < ARRAY_SIZE(rkisp1->resizer_devs); i++) {
- rsz = &rkisp1->resizer_devs[i];
+ struct rkisp1_resizer *rsz = &rkisp1->resizer_devs[i];
+
rsz->rkisp1 = rkisp1;
rsz->id = i;
+
ret = rkisp1_rsz_register(rsz);
- if (ret)
- goto err_unreg_resizer_devs;
+ if (ret) {
+ rkisp1_resizer_devs_unregister(rkisp1);
+ return ret;
+ }
}
return 0;
-
-err_unreg_resizer_devs:
- for (j = 0; j < i; j++) {
- rsz = &rkisp1->resizer_devs[j];
- rkisp1_rsz_unregister(rsz);
- }
-
- return ret;
}
void rkisp1_resizer_devs_unregister(struct rkisp1_device *rkisp1)
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread* Re: [PATCH 04/16] media: rkisp1: resizer: Fix and simplify (un)registration
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-03-02 19:12 ` Dafna Hirschfeld
-1 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-02 19:12 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:01, Laurent Pinchart wrote:
> The rkisp1_rsz_register() and rkisp1_rsz_unregister() functions don't
> destroy the mutex (in the error path for the former). Fix this, simplify
> error handling at registration time as media_entity_cleanup() can be
> called on an uninitialized entity, and make rkisp1_rsz_unregister() and
> rkisp1_resizer_devs_unregister() safe to be called on an unregistered
> resizer subdev to prepare for simplification of error handling at probe
> time.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> .../platform/rockchip/rkisp1/rkisp1-resizer.c | 34 +++++++++----------
> 1 file changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> index 2070f4b06705..65ce8d647118 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> @@ -782,8 +782,12 @@ static const struct v4l2_subdev_ops rkisp1_rsz_ops = {
>
> static void rkisp1_rsz_unregister(struct rkisp1_resizer *rsz)
> {
> + if (!rsz->rkisp1)
> + return;
> +
> v4l2_device_unregister_subdev(&rsz->sd);
> media_entity_cleanup(&rsz->sd.entity);
> + mutex_destroy(&rsz->ops_lock);
> }
>
> static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
> @@ -821,47 +825,43 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
> mutex_init(&rsz->ops_lock);
> ret = media_entity_pads_init(&sd->entity, RKISP1_RSZ_PAD_MAX, pads);
> if (ret)
> - return ret;
> + goto error;
>
> ret = v4l2_device_register_subdev(&rsz->rkisp1->v4l2_dev, sd);
> if (ret) {
> dev_err(sd->dev, "Failed to register resizer subdev\n");
> - goto err_cleanup_media_entity;
> + goto error;
> }
>
> rkisp1_rsz_init_config(sd, &state);
> return 0;
>
> -err_cleanup_media_entity:
> +error:
> media_entity_cleanup(&sd->entity);
> -
> + mutex_destroy(&rsz->ops_lock);
> + rsz->rkisp1 = NULL;
> return ret;
> }
>
> int rkisp1_resizer_devs_register(struct rkisp1_device *rkisp1)
> {
> - struct rkisp1_resizer *rsz;
> - unsigned int i, j;
> + unsigned int i;
> int ret;
>
> for (i = 0; i < ARRAY_SIZE(rkisp1->resizer_devs); i++) {
> - rsz = &rkisp1->resizer_devs[i];
> + struct rkisp1_resizer *rsz = &rkisp1->resizer_devs[i];
> +
> rsz->rkisp1 = rkisp1;
> rsz->id = i;
> +
> ret = rkisp1_rsz_register(rsz);
> - if (ret)
> - goto err_unreg_resizer_devs;
> + if (ret) {
same as previous comment, I think it is nice to set rsz->rkisp1 = NULL
here.
Thanks,
Dafna
> + rkisp1_resizer_devs_unregister(rkisp1);
> + return ret;
> + }
> }
>
> return 0;
> -
> -err_unreg_resizer_devs:
> - for (j = 0; j < i; j++) {
> - rsz = &rkisp1->resizer_devs[j];
> - rkisp1_rsz_unregister(rsz);
> - }
> -
> - return ret;
> }
>
> void rkisp1_resizer_devs_unregister(struct rkisp1_device *rkisp1)
> --
> Regards,
>
> Laurent Pinchart
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH 04/16] media: rkisp1: resizer: Fix and simplify (un)registration
@ 2022-03-02 19:12 ` Dafna Hirschfeld
0 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-02 19:12 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:01, Laurent Pinchart wrote:
> The rkisp1_rsz_register() and rkisp1_rsz_unregister() functions don't
> destroy the mutex (in the error path for the former). Fix this, simplify
> error handling at registration time as media_entity_cleanup() can be
> called on an uninitialized entity, and make rkisp1_rsz_unregister() and
> rkisp1_resizer_devs_unregister() safe to be called on an unregistered
> resizer subdev to prepare for simplification of error handling at probe
> time.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> .../platform/rockchip/rkisp1/rkisp1-resizer.c | 34 +++++++++----------
> 1 file changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> index 2070f4b06705..65ce8d647118 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> @@ -782,8 +782,12 @@ static const struct v4l2_subdev_ops rkisp1_rsz_ops = {
>
> static void rkisp1_rsz_unregister(struct rkisp1_resizer *rsz)
> {
> + if (!rsz->rkisp1)
> + return;
> +
> v4l2_device_unregister_subdev(&rsz->sd);
> media_entity_cleanup(&rsz->sd.entity);
> + mutex_destroy(&rsz->ops_lock);
> }
>
> static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
> @@ -821,47 +825,43 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
> mutex_init(&rsz->ops_lock);
> ret = media_entity_pads_init(&sd->entity, RKISP1_RSZ_PAD_MAX, pads);
> if (ret)
> - return ret;
> + goto error;
>
> ret = v4l2_device_register_subdev(&rsz->rkisp1->v4l2_dev, sd);
> if (ret) {
> dev_err(sd->dev, "Failed to register resizer subdev\n");
> - goto err_cleanup_media_entity;
> + goto error;
> }
>
> rkisp1_rsz_init_config(sd, &state);
> return 0;
>
> -err_cleanup_media_entity:
> +error:
> media_entity_cleanup(&sd->entity);
> -
> + mutex_destroy(&rsz->ops_lock);
> + rsz->rkisp1 = NULL;
> return ret;
> }
>
> int rkisp1_resizer_devs_register(struct rkisp1_device *rkisp1)
> {
> - struct rkisp1_resizer *rsz;
> - unsigned int i, j;
> + unsigned int i;
> int ret;
>
> for (i = 0; i < ARRAY_SIZE(rkisp1->resizer_devs); i++) {
> - rsz = &rkisp1->resizer_devs[i];
> + struct rkisp1_resizer *rsz = &rkisp1->resizer_devs[i];
> +
> rsz->rkisp1 = rkisp1;
> rsz->id = i;
> +
> ret = rkisp1_rsz_register(rsz);
> - if (ret)
> - goto err_unreg_resizer_devs;
> + if (ret) {
same as previous comment, I think it is nice to set rsz->rkisp1 = NULL
here.
Thanks,
Dafna
> + rkisp1_resizer_devs_unregister(rkisp1);
> + return ret;
> + }
> }
>
> return 0;
> -
> -err_unreg_resizer_devs:
> - for (j = 0; j < i; j++) {
> - rsz = &rkisp1->resizer_devs[j];
> - rkisp1_rsz_unregister(rsz);
> - }
> -
> - return ret;
> }
>
> void rkisp1_resizer_devs_unregister(struct rkisp1_device *rkisp1)
> --
> Regards,
>
> Laurent Pinchart
>
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH 05/16] media: rkisp1: params: Fix and simplify (un)registration
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The rkisp1_params_register() and rkisp1_params_unregister() functions
don't destroy the mutex (in the error path for the former). Fix this,
simplify error handling at registration time as media_entity_cleanup()
can be called on an uninitialized entity, and make
rkisp1_params_unregister() safe to be called on an unregistered params
node to prepare for simplification of error handling at probe time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-params.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
index 8f62f09e635f..d41823c861ca 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
@@ -1844,16 +1844,21 @@ int rkisp1_params_register(struct rkisp1_device *rkisp1)
node->pad.flags = MEDIA_PAD_FL_SOURCE;
ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
if (ret)
- return ret;
+ goto error;
+
ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
if (ret) {
dev_err(rkisp1->dev,
"failed to register %s, ret=%d\n", vdev->name, ret);
- goto err_cleanup_media_entity;
+ goto error;
}
+
return 0;
-err_cleanup_media_entity:
+
+error:
media_entity_cleanup(&vdev->entity);
+ mutex_destroy(&node->vlock);
+ params->rkisp1 = NULL;
return ret;
}
@@ -1863,6 +1868,10 @@ void rkisp1_params_unregister(struct rkisp1_device *rkisp1)
struct rkisp1_vdev_node *node = ¶ms->vnode;
struct video_device *vdev = &node->vdev;
+ if (!params->rkisp1)
+ return;
+
vb2_video_unregister_device(vdev);
media_entity_cleanup(&vdev->entity);
+ mutex_destroy(&node->vlock);
}
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 05/16] media: rkisp1: params: Fix and simplify (un)registration
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The rkisp1_params_register() and rkisp1_params_unregister() functions
don't destroy the mutex (in the error path for the former). Fix this,
simplify error handling at registration time as media_entity_cleanup()
can be called on an uninitialized entity, and make
rkisp1_params_unregister() safe to be called on an unregistered params
node to prepare for simplification of error handling at probe time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-params.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
index 8f62f09e635f..d41823c861ca 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
@@ -1844,16 +1844,21 @@ int rkisp1_params_register(struct rkisp1_device *rkisp1)
node->pad.flags = MEDIA_PAD_FL_SOURCE;
ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
if (ret)
- return ret;
+ goto error;
+
ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
if (ret) {
dev_err(rkisp1->dev,
"failed to register %s, ret=%d\n", vdev->name, ret);
- goto err_cleanup_media_entity;
+ goto error;
}
+
return 0;
-err_cleanup_media_entity:
+
+error:
media_entity_cleanup(&vdev->entity);
+ mutex_destroy(&node->vlock);
+ params->rkisp1 = NULL;
return ret;
}
@@ -1863,6 +1868,10 @@ void rkisp1_params_unregister(struct rkisp1_device *rkisp1)
struct rkisp1_vdev_node *node = ¶ms->vnode;
struct video_device *vdev = &node->vdev;
+ if (!params->rkisp1)
+ return;
+
vb2_video_unregister_device(vdev);
media_entity_cleanup(&vdev->entity);
+ mutex_destroy(&node->vlock);
}
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH 06/16] media: rkisp1: stats: Simplify (un)registration
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
Simplify error handling at registration time as media_entity_cleanup()
can be called on an uninitialized entity, and make
rkisp1_stats_unregister() safe to be called on an unregistered stats
node to prepare for simplification of error handling at probe time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
index be5777c65bfb..26ef3bbe43d0 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
@@ -463,21 +463,21 @@ int rkisp1_stats_register(struct rkisp1_device *rkisp1)
node->pad.flags = MEDIA_PAD_FL_SINK;
ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
if (ret)
- goto err_mutex_destroy;
+ goto error;
ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
if (ret) {
dev_err(&vdev->dev,
"failed to register %s, ret=%d\n", vdev->name, ret);
- goto err_cleanup_media_entity;
+ goto error;
}
return 0;
-err_cleanup_media_entity:
+error:
media_entity_cleanup(&vdev->entity);
-err_mutex_destroy:
mutex_destroy(&node->vlock);
+ stats->rkisp1 = NULL;
return ret;
}
@@ -487,6 +487,9 @@ void rkisp1_stats_unregister(struct rkisp1_device *rkisp1)
struct rkisp1_vdev_node *node = &stats->vnode;
struct video_device *vdev = &node->vdev;
+ if (!stats->rkisp1)
+ return;
+
vb2_video_unregister_device(vdev);
media_entity_cleanup(&vdev->entity);
mutex_destroy(&node->vlock);
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 06/16] media: rkisp1: stats: Simplify (un)registration
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
Simplify error handling at registration time as media_entity_cleanup()
can be called on an uninitialized entity, and make
rkisp1_stats_unregister() safe to be called on an unregistered stats
node to prepare for simplification of error handling at probe time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
index be5777c65bfb..26ef3bbe43d0 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
@@ -463,21 +463,21 @@ int rkisp1_stats_register(struct rkisp1_device *rkisp1)
node->pad.flags = MEDIA_PAD_FL_SINK;
ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
if (ret)
- goto err_mutex_destroy;
+ goto error;
ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
if (ret) {
dev_err(&vdev->dev,
"failed to register %s, ret=%d\n", vdev->name, ret);
- goto err_cleanup_media_entity;
+ goto error;
}
return 0;
-err_cleanup_media_entity:
+error:
media_entity_cleanup(&vdev->entity);
-err_mutex_destroy:
mutex_destroy(&node->vlock);
+ stats->rkisp1 = NULL;
return ret;
}
@@ -487,6 +487,9 @@ void rkisp1_stats_unregister(struct rkisp1_device *rkisp1)
struct rkisp1_vdev_node *node = &stats->vnode;
struct video_device *vdev = &node->vdev;
+ if (!stats->rkisp1)
+ return;
+
vb2_video_unregister_device(vdev);
media_entity_cleanup(&vdev->entity);
mutex_destroy(&node->vlock);
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH 07/16] media: rkisp1: Simplify rkisp1_entities_register() error path
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
Now that all the unregistration functions are safe to call on
non-registered entities, the error path in rkisp1_entities_register()
can be simplified. Factor out the unregistration to a separate function
to share code with rkisp1_remove().
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-dev.c | 40 +++++++++----------
1 file changed, 19 insertions(+), 21 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
index 3f5cfa7eb937..f8b2573aa9da 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
@@ -346,48 +346,50 @@ static const struct dev_pm_ops rkisp1_pm_ops = {
* Core
*/
+static void rkisp1_entities_unregister(struct rkisp1_device *rkisp1)
+{
+ rkisp1_params_unregister(rkisp1);
+ rkisp1_stats_unregister(rkisp1);
+ rkisp1_capture_devs_unregister(rkisp1);
+ rkisp1_resizer_devs_unregister(rkisp1);
+ rkisp1_isp_unregister(rkisp1);
+}
+
static int rkisp1_entities_register(struct rkisp1_device *rkisp1)
{
int ret;
ret = rkisp1_isp_register(rkisp1);
if (ret)
- return ret;
+ goto error;
ret = rkisp1_resizer_devs_register(rkisp1);
if (ret)
- goto err_unreg_isp_subdev;
+ goto error;
ret = rkisp1_capture_devs_register(rkisp1);
if (ret)
- goto err_unreg_resizer_devs;
+ goto error;
ret = rkisp1_stats_register(rkisp1);
if (ret)
- goto err_unreg_capture_devs;
+ goto error;
ret = rkisp1_params_register(rkisp1);
if (ret)
- goto err_unreg_stats;
+ goto error;
ret = rkisp1_subdev_notifier(rkisp1);
if (ret) {
dev_err(rkisp1->dev,
"Failed to register subdev notifier(%d)\n", ret);
- goto err_unreg_params;
+ goto error;
}
return 0;
-err_unreg_params:
- rkisp1_params_unregister(rkisp1);
-err_unreg_stats:
- rkisp1_stats_unregister(rkisp1);
-err_unreg_capture_devs:
- rkisp1_capture_devs_unregister(rkisp1);
-err_unreg_resizer_devs:
- rkisp1_resizer_devs_unregister(rkisp1);
-err_unreg_isp_subdev:
- rkisp1_isp_unregister(rkisp1);
+
+error:
+ rkisp1_entities_unregister(rkisp1);
return ret;
}
@@ -583,11 +585,7 @@ static int rkisp1_remove(struct platform_device *pdev)
v4l2_async_nf_unregister(&rkisp1->notifier);
v4l2_async_nf_cleanup(&rkisp1->notifier);
- rkisp1_params_unregister(rkisp1);
- rkisp1_stats_unregister(rkisp1);
- rkisp1_capture_devs_unregister(rkisp1);
- rkisp1_resizer_devs_unregister(rkisp1);
- rkisp1_isp_unregister(rkisp1);
+ rkisp1_entities_unregister(rkisp1);
media_device_unregister(&rkisp1->media_dev);
v4l2_device_unregister(&rkisp1->v4l2_dev);
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 07/16] media: rkisp1: Simplify rkisp1_entities_register() error path
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
Now that all the unregistration functions are safe to call on
non-registered entities, the error path in rkisp1_entities_register()
can be simplified. Factor out the unregistration to a separate function
to share code with rkisp1_remove().
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-dev.c | 40 +++++++++----------
1 file changed, 19 insertions(+), 21 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
index 3f5cfa7eb937..f8b2573aa9da 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
@@ -346,48 +346,50 @@ static const struct dev_pm_ops rkisp1_pm_ops = {
* Core
*/
+static void rkisp1_entities_unregister(struct rkisp1_device *rkisp1)
+{
+ rkisp1_params_unregister(rkisp1);
+ rkisp1_stats_unregister(rkisp1);
+ rkisp1_capture_devs_unregister(rkisp1);
+ rkisp1_resizer_devs_unregister(rkisp1);
+ rkisp1_isp_unregister(rkisp1);
+}
+
static int rkisp1_entities_register(struct rkisp1_device *rkisp1)
{
int ret;
ret = rkisp1_isp_register(rkisp1);
if (ret)
- return ret;
+ goto error;
ret = rkisp1_resizer_devs_register(rkisp1);
if (ret)
- goto err_unreg_isp_subdev;
+ goto error;
ret = rkisp1_capture_devs_register(rkisp1);
if (ret)
- goto err_unreg_resizer_devs;
+ goto error;
ret = rkisp1_stats_register(rkisp1);
if (ret)
- goto err_unreg_capture_devs;
+ goto error;
ret = rkisp1_params_register(rkisp1);
if (ret)
- goto err_unreg_stats;
+ goto error;
ret = rkisp1_subdev_notifier(rkisp1);
if (ret) {
dev_err(rkisp1->dev,
"Failed to register subdev notifier(%d)\n", ret);
- goto err_unreg_params;
+ goto error;
}
return 0;
-err_unreg_params:
- rkisp1_params_unregister(rkisp1);
-err_unreg_stats:
- rkisp1_stats_unregister(rkisp1);
-err_unreg_capture_devs:
- rkisp1_capture_devs_unregister(rkisp1);
-err_unreg_resizer_devs:
- rkisp1_resizer_devs_unregister(rkisp1);
-err_unreg_isp_subdev:
- rkisp1_isp_unregister(rkisp1);
+
+error:
+ rkisp1_entities_unregister(rkisp1);
return ret;
}
@@ -583,11 +585,7 @@ static int rkisp1_remove(struct platform_device *pdev)
v4l2_async_nf_unregister(&rkisp1->notifier);
v4l2_async_nf_cleanup(&rkisp1->notifier);
- rkisp1_params_unregister(rkisp1);
- rkisp1_stats_unregister(rkisp1);
- rkisp1_capture_devs_unregister(rkisp1);
- rkisp1_resizer_devs_unregister(rkisp1);
- rkisp1_isp_unregister(rkisp1);
+ rkisp1_entities_unregister(rkisp1);
media_device_unregister(&rkisp1->media_dev);
v4l2_device_unregister(&rkisp1->v4l2_dev);
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread* Re: [PATCH 07/16] media: rkisp1: Simplify rkisp1_entities_register() error path
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-03-02 19:16 ` Dafna Hirschfeld
-1 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-02 19:16 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:01, Laurent Pinchart wrote:
> Now that all the unregistration functions are safe to call on
> non-registered entities, the error path in rkisp1_entities_register()
> can be simplified. Factor out the unregistration to a separate function
> to share code with rkisp1_remove().
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Dafna Hirschfeld <dafna@fastmail.com>
> ---
> .../platform/rockchip/rkisp1/rkisp1-dev.c | 40 +++++++++----------
> 1 file changed, 19 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
> index 3f5cfa7eb937..f8b2573aa9da 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
> @@ -346,48 +346,50 @@ static const struct dev_pm_ops rkisp1_pm_ops = {
> * Core
> */
>
> +static void rkisp1_entities_unregister(struct rkisp1_device *rkisp1)
> +{
> + rkisp1_params_unregister(rkisp1);
> + rkisp1_stats_unregister(rkisp1);
> + rkisp1_capture_devs_unregister(rkisp1);
> + rkisp1_resizer_devs_unregister(rkisp1);
> + rkisp1_isp_unregister(rkisp1);
> +}
> +
> static int rkisp1_entities_register(struct rkisp1_device *rkisp1)
> {
> int ret;
>
> ret = rkisp1_isp_register(rkisp1);
> if (ret)
> - return ret;
> + goto error;
>
> ret = rkisp1_resizer_devs_register(rkisp1);
> if (ret)
> - goto err_unreg_isp_subdev;
> + goto error;
>
> ret = rkisp1_capture_devs_register(rkisp1);
> if (ret)
> - goto err_unreg_resizer_devs;
> + goto error;
>
> ret = rkisp1_stats_register(rkisp1);
> if (ret)
> - goto err_unreg_capture_devs;
> + goto error;
>
> ret = rkisp1_params_register(rkisp1);
> if (ret)
> - goto err_unreg_stats;
> + goto error;
>
> ret = rkisp1_subdev_notifier(rkisp1);
> if (ret) {
> dev_err(rkisp1->dev,
> "Failed to register subdev notifier(%d)\n", ret);
> - goto err_unreg_params;
> + goto error;
> }
>
> return 0;
> -err_unreg_params:
> - rkisp1_params_unregister(rkisp1);
> -err_unreg_stats:
> - rkisp1_stats_unregister(rkisp1);
> -err_unreg_capture_devs:
> - rkisp1_capture_devs_unregister(rkisp1);
> -err_unreg_resizer_devs:
> - rkisp1_resizer_devs_unregister(rkisp1);
> -err_unreg_isp_subdev:
> - rkisp1_isp_unregister(rkisp1);
> +
> +error:
> + rkisp1_entities_unregister(rkisp1);
> return ret;
> }
>
> @@ -583,11 +585,7 @@ static int rkisp1_remove(struct platform_device *pdev)
> v4l2_async_nf_unregister(&rkisp1->notifier);
> v4l2_async_nf_cleanup(&rkisp1->notifier);
>
> - rkisp1_params_unregister(rkisp1);
> - rkisp1_stats_unregister(rkisp1);
> - rkisp1_capture_devs_unregister(rkisp1);
> - rkisp1_resizer_devs_unregister(rkisp1);
> - rkisp1_isp_unregister(rkisp1);
> + rkisp1_entities_unregister(rkisp1);
>
> media_device_unregister(&rkisp1->media_dev);
> v4l2_device_unregister(&rkisp1->v4l2_dev);
> --
> Regards,
>
> Laurent Pinchart
>
^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH 07/16] media: rkisp1: Simplify rkisp1_entities_register() error path
@ 2022-03-02 19:16 ` Dafna Hirschfeld
0 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-02 19:16 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:01, Laurent Pinchart wrote:
> Now that all the unregistration functions are safe to call on
> non-registered entities, the error path in rkisp1_entities_register()
> can be simplified. Factor out the unregistration to a separate function
> to share code with rkisp1_remove().
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Dafna Hirschfeld <dafna@fastmail.com>
> ---
> .../platform/rockchip/rkisp1/rkisp1-dev.c | 40 +++++++++----------
> 1 file changed, 19 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
> index 3f5cfa7eb937..f8b2573aa9da 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
> @@ -346,48 +346,50 @@ static const struct dev_pm_ops rkisp1_pm_ops = {
> * Core
> */
>
> +static void rkisp1_entities_unregister(struct rkisp1_device *rkisp1)
> +{
> + rkisp1_params_unregister(rkisp1);
> + rkisp1_stats_unregister(rkisp1);
> + rkisp1_capture_devs_unregister(rkisp1);
> + rkisp1_resizer_devs_unregister(rkisp1);
> + rkisp1_isp_unregister(rkisp1);
> +}
> +
> static int rkisp1_entities_register(struct rkisp1_device *rkisp1)
> {
> int ret;
>
> ret = rkisp1_isp_register(rkisp1);
> if (ret)
> - return ret;
> + goto error;
>
> ret = rkisp1_resizer_devs_register(rkisp1);
> if (ret)
> - goto err_unreg_isp_subdev;
> + goto error;
>
> ret = rkisp1_capture_devs_register(rkisp1);
> if (ret)
> - goto err_unreg_resizer_devs;
> + goto error;
>
> ret = rkisp1_stats_register(rkisp1);
> if (ret)
> - goto err_unreg_capture_devs;
> + goto error;
>
> ret = rkisp1_params_register(rkisp1);
> if (ret)
> - goto err_unreg_stats;
> + goto error;
>
> ret = rkisp1_subdev_notifier(rkisp1);
> if (ret) {
> dev_err(rkisp1->dev,
> "Failed to register subdev notifier(%d)\n", ret);
> - goto err_unreg_params;
> + goto error;
> }
>
> return 0;
> -err_unreg_params:
> - rkisp1_params_unregister(rkisp1);
> -err_unreg_stats:
> - rkisp1_stats_unregister(rkisp1);
> -err_unreg_capture_devs:
> - rkisp1_capture_devs_unregister(rkisp1);
> -err_unreg_resizer_devs:
> - rkisp1_resizer_devs_unregister(rkisp1);
> -err_unreg_isp_subdev:
> - rkisp1_isp_unregister(rkisp1);
> +
> +error:
> + rkisp1_entities_unregister(rkisp1);
> return ret;
> }
>
> @@ -583,11 +585,7 @@ static int rkisp1_remove(struct platform_device *pdev)
> v4l2_async_nf_unregister(&rkisp1->notifier);
> v4l2_async_nf_cleanup(&rkisp1->notifier);
>
> - rkisp1_params_unregister(rkisp1);
> - rkisp1_stats_unregister(rkisp1);
> - rkisp1_capture_devs_unregister(rkisp1);
> - rkisp1_resizer_devs_unregister(rkisp1);
> - rkisp1_isp_unregister(rkisp1);
> + rkisp1_entities_unregister(rkisp1);
>
> media_device_unregister(&rkisp1->media_dev);
> v4l2_device_unregister(&rkisp1->v4l2_dev);
> --
> Regards,
>
> Laurent Pinchart
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH 08/16] media: rkisp1: regs: Don't use BIT() macro for multi-bit register fields
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The BIT() macro is meant to represent a single bit. It is incorrectly
used for register field values that store the value 1 in a multi-bit
field. Use the usual (1 << n) construct for those.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-regs.h | 52 +++++++++----------
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index d326214c7e07..9e786de23480 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -11,7 +11,7 @@
/* ISP_CTRL */
#define RKISP1_CIF_ISP_CTRL_ISP_ENABLE BIT(0)
#define RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1)
-#define RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU656 BIT(1)
+#define RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU656 (1 << 1)
#define RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601 (2 << 1)
#define RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU601 (3 << 1)
#define RKISP1_CIF_ISP_CTRL_ISP_MODE_DATA_MODE (4 << 1)
@@ -33,37 +33,37 @@
#define RKISP1_CIF_ISP_ACQ_PROP_HSYNC_LOW BIT(1)
#define RKISP1_CIF_ISP_ACQ_PROP_VSYNC_LOW BIT(2)
#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3)
-#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_GRBG BIT(3)
+#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_GRBG (1 << 3)
#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_GBRG (2 << 3)
#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_BGGR (3 << 3)
#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT(pat) ((pat) << 3)
#define RKISP1_CIF_ISP_ACQ_PROP_YCBYCR (0 << 7)
-#define RKISP1_CIF_ISP_ACQ_PROP_YCRYCB BIT(7)
+#define RKISP1_CIF_ISP_ACQ_PROP_YCRYCB (1 << 7)
#define RKISP1_CIF_ISP_ACQ_PROP_CBYCRY (2 << 7)
#define RKISP1_CIF_ISP_ACQ_PROP_CRYCBY (3 << 7)
#define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ALL (0 << 9)
-#define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_EVEN BIT(9)
+#define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_EVEN (1 << 9)
#define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ODD (2 << 9)
#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_12B (0 << 12)
-#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_10B_ZERO BIT(12)
+#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_10B_ZERO (1 << 12)
#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_10B_MSB (2 << 12)
#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_ZERO (3 << 12)
#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_MSB (4 << 12)
/* VI_DPCL */
#define RKISP1_CIF_VI_DPCL_DMA_JPEG (0 << 0)
-#define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_MI BIT(0)
+#define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_MI (1 << 0)
#define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_JPEG (2 << 0)
-#define RKISP1_CIF_VI_DPCL_CHAN_MODE_MP BIT(2)
+#define RKISP1_CIF_VI_DPCL_CHAN_MODE_MP (1 << 2)
#define RKISP1_CIF_VI_DPCL_CHAN_MODE_SP (2 << 2)
#define RKISP1_CIF_VI_DPCL_CHAN_MODE_MPSP (3 << 2)
#define RKISP1_CIF_VI_DPCL_DMA_SW_SPMUX (0 << 4)
-#define RKISP1_CIF_VI_DPCL_DMA_SW_SI BIT(4)
+#define RKISP1_CIF_VI_DPCL_DMA_SW_SI (1 << 4)
#define RKISP1_CIF_VI_DPCL_DMA_SW_IE (2 << 4)
#define RKISP1_CIF_VI_DPCL_DMA_SW_JPEG (3 << 4)
#define RKISP1_CIF_VI_DPCL_DMA_SW_ISP (4 << 4)
#define RKISP1_CIF_VI_DPCL_IF_SEL_PARALLEL (0 << 8)
-#define RKISP1_CIF_VI_DPCL_IF_SEL_SMIA BIT(8)
+#define RKISP1_CIF_VI_DPCL_IF_SEL_SMIA (1 << 8)
#define RKISP1_CIF_VI_DPCL_IF_SEL_MIPI (2 << 8)
#define RKISP1_CIF_VI_DPCL_DMA_IE_MUX_DMA BIT(10)
#define RKISP1_CIF_VI_DPCL_DMA_SP_MUX_DMA BIT(11)
@@ -112,26 +112,26 @@
#define RKISP1_CIF_MI_SP_AUTOUPDATE_ENABLE BIT(14)
#define RKISP1_CIF_MI_LAST_PIXEL_SIG_ENABLE BIT(15)
#define RKISP1_CIF_MI_CTRL_BURST_LEN_LUM_16 (0 << 16)
-#define RKISP1_CIF_MI_CTRL_BURST_LEN_LUM_32 BIT(16)
+#define RKISP1_CIF_MI_CTRL_BURST_LEN_LUM_32 (1 << 16)
#define RKISP1_CIF_MI_CTRL_BURST_LEN_LUM_64 (2 << 16)
#define RKISP1_CIF_MI_CTRL_BURST_LEN_CHROM_16 (0 << 18)
-#define RKISP1_CIF_MI_CTRL_BURST_LEN_CHROM_32 BIT(18)
+#define RKISP1_CIF_MI_CTRL_BURST_LEN_CHROM_32 (1 << 18)
#define RKISP1_CIF_MI_CTRL_BURST_LEN_CHROM_64 (2 << 18)
#define RKISP1_CIF_MI_CTRL_INIT_BASE_EN BIT(20)
#define RKISP1_CIF_MI_CTRL_INIT_OFFSET_EN BIT(21)
#define RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8 (0 << 22)
-#define RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA BIT(22)
+#define RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA (1 << 22)
#define RKISP1_MI_CTRL_MP_WRITE_YUVINT (2 << 22)
#define RKISP1_MI_CTRL_MP_WRITE_RAW12 (2 << 22)
#define RKISP1_MI_CTRL_SP_WRITE_PLA (0 << 24)
-#define RKISP1_MI_CTRL_SP_WRITE_SPLA BIT(24)
+#define RKISP1_MI_CTRL_SP_WRITE_SPLA (1 << 24)
#define RKISP1_MI_CTRL_SP_WRITE_INT (2 << 24)
#define RKISP1_MI_CTRL_SP_INPUT_YUV400 (0 << 26)
-#define RKISP1_MI_CTRL_SP_INPUT_YUV420 BIT(26)
+#define RKISP1_MI_CTRL_SP_INPUT_YUV420 (1 << 26)
#define RKISP1_MI_CTRL_SP_INPUT_YUV422 (2 << 26)
#define RKISP1_MI_CTRL_SP_INPUT_YUV444 (3 << 26)
#define RKISP1_MI_CTRL_SP_OUTPUT_YUV400 (0 << 28)
-#define RKISP1_MI_CTRL_SP_OUTPUT_YUV420 BIT(28)
+#define RKISP1_MI_CTRL_SP_OUTPUT_YUV420 (1 << 28)
#define RKISP1_MI_CTRL_SP_OUTPUT_YUV422 (2 << 28)
#define RKISP1_MI_CTRL_SP_OUTPUT_YUV444 (3 << 28)
#define RKISP1_MI_CTRL_SP_OUTPUT_RGB565 (4 << 28)
@@ -186,22 +186,22 @@
/* MI_DMA_CTRL */
#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_LUM_16 (0 << 0)
-#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_LUM_32 BIT(0)
+#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_LUM_32 (1 << 0)
#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_LUM_64 (2 << 0)
#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_CHROM_16 (0 << 2)
-#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_CHROM_32 BIT(2)
+#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_CHROM_32 (1 << 2)
#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_CHROM_64 (2 << 2)
#define RKISP1_CIF_MI_DMA_CTRL_READ_FMT_PLANAR (0 << 4)
-#define RKISP1_CIF_MI_DMA_CTRL_READ_FMT_SPLANAR BIT(4)
+#define RKISP1_CIF_MI_DMA_CTRL_READ_FMT_SPLANAR (1 << 4)
#define RKISP1_CIF_MI_DMA_CTRL_FMT_YUV400 (0 << 6)
-#define RKISP1_CIF_MI_DMA_CTRL_FMT_YUV420 BIT(6)
+#define RKISP1_CIF_MI_DMA_CTRL_FMT_YUV420 (1 << 6)
#define RKISP1_CIF_MI_DMA_CTRL_READ_FMT_PACKED (2 << 4)
#define RKISP1_CIF_MI_DMA_CTRL_FMT_YUV422 (2 << 6)
#define RKISP1_CIF_MI_DMA_CTRL_FMT_YUV444 (3 << 6)
#define RKISP1_CIF_MI_DMA_CTRL_BYTE_SWAP BIT(8)
#define RKISP1_CIF_MI_DMA_CTRL_CONTINUOUS_ENA BIT(9)
#define RKISP1_CIF_MI_DMA_CTRL_RGB_BAYER_NO (0 << 12)
-#define RKISP1_CIF_MI_DMA_CTRL_RGB_BAYER_8BIT BIT(12)
+#define RKISP1_CIF_MI_DMA_CTRL_RGB_BAYER_8BIT (1 << 12)
#define RKISP1_CIF_MI_DMA_CTRL_RGB_BAYER_16BIT (2 << 12)
/* MI_DMA_START */
#define RKISP1_CIF_MI_DMA_START_ENABLE BIT(0)
@@ -282,10 +282,10 @@
#define RKISP1_CIF_C_PROC_TONE_RESERVED 0xF000
/* DUAL_CROP_CTRL */
#define RKISP1_CIF_DUAL_CROP_MP_MODE_BYPASS (0 << 0)
-#define RKISP1_CIF_DUAL_CROP_MP_MODE_YUV BIT(0)
+#define RKISP1_CIF_DUAL_CROP_MP_MODE_YUV (1 << 0)
#define RKISP1_CIF_DUAL_CROP_MP_MODE_RAW (2 << 0)
#define RKISP1_CIF_DUAL_CROP_SP_MODE_BYPASS (0 << 2)
-#define RKISP1_CIF_DUAL_CROP_SP_MODE_YUV BIT(2)
+#define RKISP1_CIF_DUAL_CROP_SP_MODE_YUV (1 << 2)
#define RKISP1_CIF_DUAL_CROP_SP_MODE_RAW (2 << 2)
#define RKISP1_CIF_DUAL_CROP_CFG_UPD_PERMANENT BIT(4)
#define RKISP1_CIF_DUAL_CROP_CFG_UPD BIT(5)
@@ -294,7 +294,7 @@
/* IMG_EFF_CTRL */
#define RKISP1_CIF_IMG_EFF_CTRL_ENABLE BIT(0)
#define RKISP1_CIF_IMG_EFF_CTRL_MODE_BLACKWHITE (0 << 1)
-#define RKISP1_CIF_IMG_EFF_CTRL_MODE_NEGATIVE BIT(1)
+#define RKISP1_CIF_IMG_EFF_CTRL_MODE_NEGATIVE (1 << 1)
#define RKISP1_CIF_IMG_EFF_CTRL_MODE_SEPIA (2 << 1)
#define RKISP1_CIF_IMG_EFF_CTRL_MODE_COLOR_SEL (3 << 1)
#define RKISP1_CIF_IMG_EFF_CTRL_MODE_EMBOSS (4 << 1)
@@ -314,7 +314,7 @@
/* IMG_EFF_COLOR_SEL */
#define RKISP1_CIF_IMG_EFF_COLOR_RGB 0
-#define RKISP1_CIF_IMG_EFF_COLOR_B BIT(0)
+#define RKISP1_CIF_IMG_EFF_COLOR_B (1 << 0)
#define RKISP1_CIF_IMG_EFF_COLOR_G (2 << 0)
#define RKISP1_CIF_IMG_EFF_COLOR_GB (3 << 0)
#define RKISP1_CIF_IMG_EFF_COLOR_R (4 << 0)
@@ -376,7 +376,7 @@
/* ISP HISTOGRAM CALCULATION : ISP_HIST_PROP */
#define RKISP1_CIF_ISP_HIST_PROP_MODE_DIS_V10 (0 << 0)
-#define RKISP1_CIF_ISP_HIST_PROP_MODE_RGB_V10 BIT(0)
+#define RKISP1_CIF_ISP_HIST_PROP_MODE_RGB_V10 (1 << 0)
#define RKISP1_CIF_ISP_HIST_PROP_MODE_RED_V10 (2 << 0)
#define RKISP1_CIF_ISP_HIST_PROP_MODE_GREEN_V10 (3 << 0)
#define RKISP1_CIF_ISP_HIST_PROP_MODE_BLUE_V10 (4 << 0)
@@ -639,7 +639,7 @@
#define RKISP1_CIF_ISP_BLS_ENA BIT(0)
#define RKISP1_CIF_ISP_BLS_MODE_MEASURED BIT(1)
#define RKISP1_CIF_ISP_BLS_MODE_FIXED 0
-#define RKISP1_CIF_ISP_BLS_WINDOW_1 BIT(2)
+#define RKISP1_CIF_ISP_BLS_WINDOW_1 (1 << 2)
#define RKISP1_CIF_ISP_BLS_WINDOW_2 (2 << 2)
/* GAMMA-IN */
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH 08/16] media: rkisp1: regs: Don't use BIT() macro for multi-bit register fields
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The BIT() macro is meant to represent a single bit. It is incorrectly
used for register field values that store the value 1 in a multi-bit
field. Use the usual (1 << n) construct for those.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-regs.h | 52 +++++++++----------
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index d326214c7e07..9e786de23480 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -11,7 +11,7 @@
/* ISP_CTRL */
#define RKISP1_CIF_ISP_CTRL_ISP_ENABLE BIT(0)
#define RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1)
-#define RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU656 BIT(1)
+#define RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU656 (1 << 1)
#define RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601 (2 << 1)
#define RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU601 (3 << 1)
#define RKISP1_CIF_ISP_CTRL_ISP_MODE_DATA_MODE (4 << 1)
@@ -33,37 +33,37 @@
#define RKISP1_CIF_ISP_ACQ_PROP_HSYNC_LOW BIT(1)
#define RKISP1_CIF_ISP_ACQ_PROP_VSYNC_LOW BIT(2)
#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3)
-#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_GRBG BIT(3)
+#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_GRBG (1 << 3)
#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_GBRG (2 << 3)
#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_BGGR (3 << 3)
#define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT(pat) ((pat) << 3)
#define RKISP1_CIF_ISP_ACQ_PROP_YCBYCR (0 << 7)
-#define RKISP1_CIF_ISP_ACQ_PROP_YCRYCB BIT(7)
+#define RKISP1_CIF_ISP_ACQ_PROP_YCRYCB (1 << 7)
#define RKISP1_CIF_ISP_ACQ_PROP_CBYCRY (2 << 7)
#define RKISP1_CIF_ISP_ACQ_PROP_CRYCBY (3 << 7)
#define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ALL (0 << 9)
-#define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_EVEN BIT(9)
+#define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_EVEN (1 << 9)
#define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ODD (2 << 9)
#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_12B (0 << 12)
-#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_10B_ZERO BIT(12)
+#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_10B_ZERO (1 << 12)
#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_10B_MSB (2 << 12)
#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_ZERO (3 << 12)
#define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_MSB (4 << 12)
/* VI_DPCL */
#define RKISP1_CIF_VI_DPCL_DMA_JPEG (0 << 0)
-#define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_MI BIT(0)
+#define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_MI (1 << 0)
#define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_JPEG (2 << 0)
-#define RKISP1_CIF_VI_DPCL_CHAN_MODE_MP BIT(2)
+#define RKISP1_CIF_VI_DPCL_CHAN_MODE_MP (1 << 2)
#define RKISP1_CIF_VI_DPCL_CHAN_MODE_SP (2 << 2)
#define RKISP1_CIF_VI_DPCL_CHAN_MODE_MPSP (3 << 2)
#define RKISP1_CIF_VI_DPCL_DMA_SW_SPMUX (0 << 4)
-#define RKISP1_CIF_VI_DPCL_DMA_SW_SI BIT(4)
+#define RKISP1_CIF_VI_DPCL_DMA_SW_SI (1 << 4)
#define RKISP1_CIF_VI_DPCL_DMA_SW_IE (2 << 4)
#define RKISP1_CIF_VI_DPCL_DMA_SW_JPEG (3 << 4)
#define RKISP1_CIF_VI_DPCL_DMA_SW_ISP (4 << 4)
#define RKISP1_CIF_VI_DPCL_IF_SEL_PARALLEL (0 << 8)
-#define RKISP1_CIF_VI_DPCL_IF_SEL_SMIA BIT(8)
+#define RKISP1_CIF_VI_DPCL_IF_SEL_SMIA (1 << 8)
#define RKISP1_CIF_VI_DPCL_IF_SEL_MIPI (2 << 8)
#define RKISP1_CIF_VI_DPCL_DMA_IE_MUX_DMA BIT(10)
#define RKISP1_CIF_VI_DPCL_DMA_SP_MUX_DMA BIT(11)
@@ -112,26 +112,26 @@
#define RKISP1_CIF_MI_SP_AUTOUPDATE_ENABLE BIT(14)
#define RKISP1_CIF_MI_LAST_PIXEL_SIG_ENABLE BIT(15)
#define RKISP1_CIF_MI_CTRL_BURST_LEN_LUM_16 (0 << 16)
-#define RKISP1_CIF_MI_CTRL_BURST_LEN_LUM_32 BIT(16)
+#define RKISP1_CIF_MI_CTRL_BURST_LEN_LUM_32 (1 << 16)
#define RKISP1_CIF_MI_CTRL_BURST_LEN_LUM_64 (2 << 16)
#define RKISP1_CIF_MI_CTRL_BURST_LEN_CHROM_16 (0 << 18)
-#define RKISP1_CIF_MI_CTRL_BURST_LEN_CHROM_32 BIT(18)
+#define RKISP1_CIF_MI_CTRL_BURST_LEN_CHROM_32 (1 << 18)
#define RKISP1_CIF_MI_CTRL_BURST_LEN_CHROM_64 (2 << 18)
#define RKISP1_CIF_MI_CTRL_INIT_BASE_EN BIT(20)
#define RKISP1_CIF_MI_CTRL_INIT_OFFSET_EN BIT(21)
#define RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8 (0 << 22)
-#define RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA BIT(22)
+#define RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA (1 << 22)
#define RKISP1_MI_CTRL_MP_WRITE_YUVINT (2 << 22)
#define RKISP1_MI_CTRL_MP_WRITE_RAW12 (2 << 22)
#define RKISP1_MI_CTRL_SP_WRITE_PLA (0 << 24)
-#define RKISP1_MI_CTRL_SP_WRITE_SPLA BIT(24)
+#define RKISP1_MI_CTRL_SP_WRITE_SPLA (1 << 24)
#define RKISP1_MI_CTRL_SP_WRITE_INT (2 << 24)
#define RKISP1_MI_CTRL_SP_INPUT_YUV400 (0 << 26)
-#define RKISP1_MI_CTRL_SP_INPUT_YUV420 BIT(26)
+#define RKISP1_MI_CTRL_SP_INPUT_YUV420 (1 << 26)
#define RKISP1_MI_CTRL_SP_INPUT_YUV422 (2 << 26)
#define RKISP1_MI_CTRL_SP_INPUT_YUV444 (3 << 26)
#define RKISP1_MI_CTRL_SP_OUTPUT_YUV400 (0 << 28)
-#define RKISP1_MI_CTRL_SP_OUTPUT_YUV420 BIT(28)
+#define RKISP1_MI_CTRL_SP_OUTPUT_YUV420 (1 << 28)
#define RKISP1_MI_CTRL_SP_OUTPUT_YUV422 (2 << 28)
#define RKISP1_MI_CTRL_SP_OUTPUT_YUV444 (3 << 28)
#define RKISP1_MI_CTRL_SP_OUTPUT_RGB565 (4 << 28)
@@ -186,22 +186,22 @@
/* MI_DMA_CTRL */
#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_LUM_16 (0 << 0)
-#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_LUM_32 BIT(0)
+#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_LUM_32 (1 << 0)
#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_LUM_64 (2 << 0)
#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_CHROM_16 (0 << 2)
-#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_CHROM_32 BIT(2)
+#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_CHROM_32 (1 << 2)
#define RKISP1_CIF_MI_DMA_CTRL_BURST_LEN_CHROM_64 (2 << 2)
#define RKISP1_CIF_MI_DMA_CTRL_READ_FMT_PLANAR (0 << 4)
-#define RKISP1_CIF_MI_DMA_CTRL_READ_FMT_SPLANAR BIT(4)
+#define RKISP1_CIF_MI_DMA_CTRL_READ_FMT_SPLANAR (1 << 4)
#define RKISP1_CIF_MI_DMA_CTRL_FMT_YUV400 (0 << 6)
-#define RKISP1_CIF_MI_DMA_CTRL_FMT_YUV420 BIT(6)
+#define RKISP1_CIF_MI_DMA_CTRL_FMT_YUV420 (1 << 6)
#define RKISP1_CIF_MI_DMA_CTRL_READ_FMT_PACKED (2 << 4)
#define RKISP1_CIF_MI_DMA_CTRL_FMT_YUV422 (2 << 6)
#define RKISP1_CIF_MI_DMA_CTRL_FMT_YUV444 (3 << 6)
#define RKISP1_CIF_MI_DMA_CTRL_BYTE_SWAP BIT(8)
#define RKISP1_CIF_MI_DMA_CTRL_CONTINUOUS_ENA BIT(9)
#define RKISP1_CIF_MI_DMA_CTRL_RGB_BAYER_NO (0 << 12)
-#define RKISP1_CIF_MI_DMA_CTRL_RGB_BAYER_8BIT BIT(12)
+#define RKISP1_CIF_MI_DMA_CTRL_RGB_BAYER_8BIT (1 << 12)
#define RKISP1_CIF_MI_DMA_CTRL_RGB_BAYER_16BIT (2 << 12)
/* MI_DMA_START */
#define RKISP1_CIF_MI_DMA_START_ENABLE BIT(0)
@@ -282,10 +282,10 @@
#define RKISP1_CIF_C_PROC_TONE_RESERVED 0xF000
/* DUAL_CROP_CTRL */
#define RKISP1_CIF_DUAL_CROP_MP_MODE_BYPASS (0 << 0)
-#define RKISP1_CIF_DUAL_CROP_MP_MODE_YUV BIT(0)
+#define RKISP1_CIF_DUAL_CROP_MP_MODE_YUV (1 << 0)
#define RKISP1_CIF_DUAL_CROP_MP_MODE_RAW (2 << 0)
#define RKISP1_CIF_DUAL_CROP_SP_MODE_BYPASS (0 << 2)
-#define RKISP1_CIF_DUAL_CROP_SP_MODE_YUV BIT(2)
+#define RKISP1_CIF_DUAL_CROP_SP_MODE_YUV (1 << 2)
#define RKISP1_CIF_DUAL_CROP_SP_MODE_RAW (2 << 2)
#define RKISP1_CIF_DUAL_CROP_CFG_UPD_PERMANENT BIT(4)
#define RKISP1_CIF_DUAL_CROP_CFG_UPD BIT(5)
@@ -294,7 +294,7 @@
/* IMG_EFF_CTRL */
#define RKISP1_CIF_IMG_EFF_CTRL_ENABLE BIT(0)
#define RKISP1_CIF_IMG_EFF_CTRL_MODE_BLACKWHITE (0 << 1)
-#define RKISP1_CIF_IMG_EFF_CTRL_MODE_NEGATIVE BIT(1)
+#define RKISP1_CIF_IMG_EFF_CTRL_MODE_NEGATIVE (1 << 1)
#define RKISP1_CIF_IMG_EFF_CTRL_MODE_SEPIA (2 << 1)
#define RKISP1_CIF_IMG_EFF_CTRL_MODE_COLOR_SEL (3 << 1)
#define RKISP1_CIF_IMG_EFF_CTRL_MODE_EMBOSS (4 << 1)
@@ -314,7 +314,7 @@
/* IMG_EFF_COLOR_SEL */
#define RKISP1_CIF_IMG_EFF_COLOR_RGB 0
-#define RKISP1_CIF_IMG_EFF_COLOR_B BIT(0)
+#define RKISP1_CIF_IMG_EFF_COLOR_B (1 << 0)
#define RKISP1_CIF_IMG_EFF_COLOR_G (2 << 0)
#define RKISP1_CIF_IMG_EFF_COLOR_GB (3 << 0)
#define RKISP1_CIF_IMG_EFF_COLOR_R (4 << 0)
@@ -376,7 +376,7 @@
/* ISP HISTOGRAM CALCULATION : ISP_HIST_PROP */
#define RKISP1_CIF_ISP_HIST_PROP_MODE_DIS_V10 (0 << 0)
-#define RKISP1_CIF_ISP_HIST_PROP_MODE_RGB_V10 BIT(0)
+#define RKISP1_CIF_ISP_HIST_PROP_MODE_RGB_V10 (1 << 0)
#define RKISP1_CIF_ISP_HIST_PROP_MODE_RED_V10 (2 << 0)
#define RKISP1_CIF_ISP_HIST_PROP_MODE_GREEN_V10 (3 << 0)
#define RKISP1_CIF_ISP_HIST_PROP_MODE_BLUE_V10 (4 << 0)
@@ -639,7 +639,7 @@
#define RKISP1_CIF_ISP_BLS_ENA BIT(0)
#define RKISP1_CIF_ISP_BLS_MODE_MEASURED BIT(1)
#define RKISP1_CIF_ISP_BLS_MODE_FIXED 0
-#define RKISP1_CIF_ISP_BLS_WINDOW_1 BIT(2)
+#define RKISP1_CIF_ISP_BLS_WINDOW_1 (1 << 2)
#define RKISP1_CIF_ISP_BLS_WINDOW_2 (2 << 2)
/* GAMMA-IN */
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH 09/16] media: rkisp1: regs: Rename CCL, ICCL and IRCL registers with VI_ prefix
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The documentation names the CCL, ICCL and IRCL registers with a VI_
prefix, like the VI_ID and VI_DPCL registers. Fix the macro names
accordingly.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-isp.c | 19 +++---
.../platform/rockchip/rkisp1/rkisp1-params.c | 8 +--
.../platform/rockchip/rkisp1/rkisp1-regs.h | 60 +++++++++----------
3 files changed, 44 insertions(+), 43 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
index f84e53b60ee1..e8abb57fb728 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
@@ -523,20 +523,21 @@ static void rkisp1_isp_stop(struct rkisp1_device *rkisp1)
readx_poll_timeout(readl, rkisp1->base_addr + RKISP1_CIF_ISP_RIS,
val, val & RKISP1_CIF_ISP_OFF, 20, 100);
rkisp1_write(rkisp1,
- RKISP1_CIF_IRCL_MIPI_SW_RST | RKISP1_CIF_IRCL_ISP_SW_RST,
- RKISP1_CIF_IRCL);
- rkisp1_write(rkisp1, 0x0, RKISP1_CIF_IRCL);
+ RKISP1_CIF_VI_IRCL_MIPI_SW_RST |
+ RKISP1_CIF_VI_IRCL_ISP_SW_RST,
+ RKISP1_CIF_VI_IRCL);
+ rkisp1_write(rkisp1, 0x0, RKISP1_CIF_VI_IRCL);
}
static void rkisp1_config_clk(struct rkisp1_device *rkisp1)
{
- u32 val = RKISP1_CIF_ICCL_ISP_CLK | RKISP1_CIF_ICCL_CP_CLK |
- RKISP1_CIF_ICCL_MRSZ_CLK | RKISP1_CIF_ICCL_SRSZ_CLK |
- RKISP1_CIF_ICCL_JPEG_CLK | RKISP1_CIF_ICCL_MI_CLK |
- RKISP1_CIF_ICCL_IE_CLK | RKISP1_CIF_ICCL_MIPI_CLK |
- RKISP1_CIF_ICCL_DCROP_CLK;
+ u32 val = RKISP1_CIF_VI_ICCL_ISP_CLK | RKISP1_CIF_VI_ICCL_CP_CLK |
+ RKISP1_CIF_VI_ICCL_MRSZ_CLK | RKISP1_CIF_VI_ICCL_SRSZ_CLK |
+ RKISP1_CIF_VI_ICCL_JPEG_CLK | RKISP1_CIF_VI_ICCL_MI_CLK |
+ RKISP1_CIF_VI_ICCL_IE_CLK | RKISP1_CIF_VI_ICCL_MIPI_CLK |
+ RKISP1_CIF_VI_ICCL_DCROP_CLK;
- rkisp1_write(rkisp1, val, RKISP1_CIF_ICCL);
+ rkisp1_write(rkisp1, val, RKISP1_CIF_VI_ICCL);
/* ensure sp and mp can run at the same time in V12 */
if (rkisp1->media_dev.hw_revision == RKISP1_V12) {
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
index d41823c861ca..7a172d47d475 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
@@ -1058,8 +1058,8 @@ static void rkisp1_ie_config(struct rkisp1_params *params,
static void rkisp1_ie_enable(struct rkisp1_params *params, bool en)
{
if (en) {
- rkisp1_param_set_bits(params, RKISP1_CIF_ICCL,
- RKISP1_CIF_ICCL_IE_CLK);
+ rkisp1_param_set_bits(params, RKISP1_CIF_VI_ICCL,
+ RKISP1_CIF_VI_ICCL_IE_CLK);
rkisp1_write(params->rkisp1, RKISP1_CIF_IMG_EFF_CTRL_ENABLE,
RKISP1_CIF_IMG_EFF_CTRL);
rkisp1_param_set_bits(params, RKISP1_CIF_IMG_EFF_CTRL,
@@ -1067,8 +1067,8 @@ static void rkisp1_ie_enable(struct rkisp1_params *params, bool en)
} else {
rkisp1_param_clear_bits(params, RKISP1_CIF_IMG_EFF_CTRL,
RKISP1_CIF_IMG_EFF_CTRL_ENABLE);
- rkisp1_param_clear_bits(params, RKISP1_CIF_ICCL,
- RKISP1_CIF_ICCL_IE_CLK);
+ rkisp1_param_clear_bits(params, RKISP1_CIF_VI_ICCL,
+ RKISP1_CIF_VI_ICCL_IE_CLK);
}
}
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index 9e786de23480..4e2b73227e61 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -210,7 +210,7 @@
#define RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP BIT(1)
#define RKISP1_CIF_MI_XTD_FMT_CTRL_DMA_CB_CR_SWAP BIT(2)
-/* CCL */
+/* VI_CCL */
#define RKISP1_CIF_CCL_CIF_CLK_DIS BIT(2)
/* VI_ISP_CLK_CTRL */
#define RKISP1_CIF_CLK_CTRL_ISP_RAW BIT(0)
@@ -241,32 +241,32 @@
#define RKISP1_CIF_CLK_CTRL_RSZS BIT(25)
#define RKISP1_CIF_CLK_CTRL_MIPI BIT(26)
#define RKISP1_CIF_CLK_CTRL_MARVINMI BIT(27)
-/* ICCL */
-#define RKISP1_CIF_ICCL_ISP_CLK BIT(0)
-#define RKISP1_CIF_ICCL_CP_CLK BIT(1)
-#define RKISP1_CIF_ICCL_RES_2 BIT(2)
-#define RKISP1_CIF_ICCL_MRSZ_CLK BIT(3)
-#define RKISP1_CIF_ICCL_SRSZ_CLK BIT(4)
-#define RKISP1_CIF_ICCL_JPEG_CLK BIT(5)
-#define RKISP1_CIF_ICCL_MI_CLK BIT(6)
-#define RKISP1_CIF_ICCL_RES_7 BIT(7)
-#define RKISP1_CIF_ICCL_IE_CLK BIT(8)
-#define RKISP1_CIF_ICCL_SIMP_CLK BIT(9)
-#define RKISP1_CIF_ICCL_SMIA_CLK BIT(10)
-#define RKISP1_CIF_ICCL_MIPI_CLK BIT(11)
-#define RKISP1_CIF_ICCL_DCROP_CLK BIT(12)
-/* IRCL */
-#define RKISP1_CIF_IRCL_ISP_SW_RST BIT(0)
-#define RKISP1_CIF_IRCL_CP_SW_RST BIT(1)
-#define RKISP1_CIF_IRCL_YCS_SW_RST BIT(2)
-#define RKISP1_CIF_IRCL_MRSZ_SW_RST BIT(3)
-#define RKISP1_CIF_IRCL_SRSZ_SW_RST BIT(4)
-#define RKISP1_CIF_IRCL_JPEG_SW_RST BIT(5)
-#define RKISP1_CIF_IRCL_MI_SW_RST BIT(6)
-#define RKISP1_CIF_IRCL_CIF_SW_RST BIT(7)
-#define RKISP1_CIF_IRCL_IE_SW_RST BIT(8)
-#define RKISP1_CIF_IRCL_SI_SW_RST BIT(9)
-#define RKISP1_CIF_IRCL_MIPI_SW_RST BIT(11)
+/* VI_ICCL */
+#define RKISP1_CIF_VI_ICCL_ISP_CLK BIT(0)
+#define RKISP1_CIF_VI_ICCL_CP_CLK BIT(1)
+#define RKISP1_CIF_VI_ICCL_RES_2 BIT(2)
+#define RKISP1_CIF_VI_ICCL_MRSZ_CLK BIT(3)
+#define RKISP1_CIF_VI_ICCL_SRSZ_CLK BIT(4)
+#define RKISP1_CIF_VI_ICCL_JPEG_CLK BIT(5)
+#define RKISP1_CIF_VI_ICCL_MI_CLK BIT(6)
+#define RKISP1_CIF_VI_ICCL_RES_7 BIT(7)
+#define RKISP1_CIF_VI_ICCL_IE_CLK BIT(8)
+#define RKISP1_CIF_VI_ICCL_SIMP_CLK BIT(9)
+#define RKISP1_CIF_VI_ICCL_SMIA_CLK BIT(10)
+#define RKISP1_CIF_VI_ICCL_MIPI_CLK BIT(11)
+#define RKISP1_CIF_VI_ICCL_DCROP_CLK BIT(12)
+/* VI_IRCL */
+#define RKISP1_CIF_VI_IRCL_ISP_SW_RST BIT(0)
+#define RKISP1_CIF_VI_IRCL_CP_SW_RST BIT(1)
+#define RKISP1_CIF_VI_IRCL_YCS_SW_RST BIT(2)
+#define RKISP1_CIF_VI_IRCL_MRSZ_SW_RST BIT(3)
+#define RKISP1_CIF_VI_IRCL_SRSZ_SW_RST BIT(4)
+#define RKISP1_CIF_VI_IRCL_JPEG_SW_RST BIT(5)
+#define RKISP1_CIF_VI_IRCL_MI_SW_RST BIT(6)
+#define RKISP1_CIF_VI_IRCL_CIF_SW_RST BIT(7)
+#define RKISP1_CIF_VI_IRCL_IE_SW_RST BIT(8)
+#define RKISP1_CIF_VI_IRCL_SI_SW_RST BIT(9)
+#define RKISP1_CIF_VI_IRCL_MIPI_SW_RST BIT(11)
/* C_PROC_CTR */
#define RKISP1_CIF_C_PROC_CTR_ENABLE BIT(0)
@@ -687,11 +687,11 @@
/* CIF Registers */
/* =================================================================== */
#define RKISP1_CIF_CTRL_BASE 0x00000000
-#define RKISP1_CIF_CCL (RKISP1_CIF_CTRL_BASE + 0x00000000)
+#define RKISP1_CIF_VI_CCL (RKISP1_CIF_CTRL_BASE + 0x00000000)
#define RKISP1_CIF_VI_ID (RKISP1_CIF_CTRL_BASE + 0x00000008)
#define RKISP1_CIF_VI_ISP_CLK_CTRL_V12 (RKISP1_CIF_CTRL_BASE + 0x0000000C)
-#define RKISP1_CIF_ICCL (RKISP1_CIF_CTRL_BASE + 0x00000010)
-#define RKISP1_CIF_IRCL (RKISP1_CIF_CTRL_BASE + 0x00000014)
+#define RKISP1_CIF_VI_ICCL (RKISP1_CIF_CTRL_BASE + 0x00000010)
+#define RKISP1_CIF_VI_IRCL (RKISP1_CIF_CTRL_BASE + 0x00000014)
#define RKISP1_CIF_VI_DPCL (RKISP1_CIF_CTRL_BASE + 0x00000018)
#define RKISP1_CIF_IMG_EFF_BASE 0x00000200
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 09/16] media: rkisp1: regs: Rename CCL, ICCL and IRCL registers with VI_ prefix
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The documentation names the CCL, ICCL and IRCL registers with a VI_
prefix, like the VI_ID and VI_DPCL registers. Fix the macro names
accordingly.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-isp.c | 19 +++---
.../platform/rockchip/rkisp1/rkisp1-params.c | 8 +--
.../platform/rockchip/rkisp1/rkisp1-regs.h | 60 +++++++++----------
3 files changed, 44 insertions(+), 43 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
index f84e53b60ee1..e8abb57fb728 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
@@ -523,20 +523,21 @@ static void rkisp1_isp_stop(struct rkisp1_device *rkisp1)
readx_poll_timeout(readl, rkisp1->base_addr + RKISP1_CIF_ISP_RIS,
val, val & RKISP1_CIF_ISP_OFF, 20, 100);
rkisp1_write(rkisp1,
- RKISP1_CIF_IRCL_MIPI_SW_RST | RKISP1_CIF_IRCL_ISP_SW_RST,
- RKISP1_CIF_IRCL);
- rkisp1_write(rkisp1, 0x0, RKISP1_CIF_IRCL);
+ RKISP1_CIF_VI_IRCL_MIPI_SW_RST |
+ RKISP1_CIF_VI_IRCL_ISP_SW_RST,
+ RKISP1_CIF_VI_IRCL);
+ rkisp1_write(rkisp1, 0x0, RKISP1_CIF_VI_IRCL);
}
static void rkisp1_config_clk(struct rkisp1_device *rkisp1)
{
- u32 val = RKISP1_CIF_ICCL_ISP_CLK | RKISP1_CIF_ICCL_CP_CLK |
- RKISP1_CIF_ICCL_MRSZ_CLK | RKISP1_CIF_ICCL_SRSZ_CLK |
- RKISP1_CIF_ICCL_JPEG_CLK | RKISP1_CIF_ICCL_MI_CLK |
- RKISP1_CIF_ICCL_IE_CLK | RKISP1_CIF_ICCL_MIPI_CLK |
- RKISP1_CIF_ICCL_DCROP_CLK;
+ u32 val = RKISP1_CIF_VI_ICCL_ISP_CLK | RKISP1_CIF_VI_ICCL_CP_CLK |
+ RKISP1_CIF_VI_ICCL_MRSZ_CLK | RKISP1_CIF_VI_ICCL_SRSZ_CLK |
+ RKISP1_CIF_VI_ICCL_JPEG_CLK | RKISP1_CIF_VI_ICCL_MI_CLK |
+ RKISP1_CIF_VI_ICCL_IE_CLK | RKISP1_CIF_VI_ICCL_MIPI_CLK |
+ RKISP1_CIF_VI_ICCL_DCROP_CLK;
- rkisp1_write(rkisp1, val, RKISP1_CIF_ICCL);
+ rkisp1_write(rkisp1, val, RKISP1_CIF_VI_ICCL);
/* ensure sp and mp can run at the same time in V12 */
if (rkisp1->media_dev.hw_revision == RKISP1_V12) {
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
index d41823c861ca..7a172d47d475 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
@@ -1058,8 +1058,8 @@ static void rkisp1_ie_config(struct rkisp1_params *params,
static void rkisp1_ie_enable(struct rkisp1_params *params, bool en)
{
if (en) {
- rkisp1_param_set_bits(params, RKISP1_CIF_ICCL,
- RKISP1_CIF_ICCL_IE_CLK);
+ rkisp1_param_set_bits(params, RKISP1_CIF_VI_ICCL,
+ RKISP1_CIF_VI_ICCL_IE_CLK);
rkisp1_write(params->rkisp1, RKISP1_CIF_IMG_EFF_CTRL_ENABLE,
RKISP1_CIF_IMG_EFF_CTRL);
rkisp1_param_set_bits(params, RKISP1_CIF_IMG_EFF_CTRL,
@@ -1067,8 +1067,8 @@ static void rkisp1_ie_enable(struct rkisp1_params *params, bool en)
} else {
rkisp1_param_clear_bits(params, RKISP1_CIF_IMG_EFF_CTRL,
RKISP1_CIF_IMG_EFF_CTRL_ENABLE);
- rkisp1_param_clear_bits(params, RKISP1_CIF_ICCL,
- RKISP1_CIF_ICCL_IE_CLK);
+ rkisp1_param_clear_bits(params, RKISP1_CIF_VI_ICCL,
+ RKISP1_CIF_VI_ICCL_IE_CLK);
}
}
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index 9e786de23480..4e2b73227e61 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -210,7 +210,7 @@
#define RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP BIT(1)
#define RKISP1_CIF_MI_XTD_FMT_CTRL_DMA_CB_CR_SWAP BIT(2)
-/* CCL */
+/* VI_CCL */
#define RKISP1_CIF_CCL_CIF_CLK_DIS BIT(2)
/* VI_ISP_CLK_CTRL */
#define RKISP1_CIF_CLK_CTRL_ISP_RAW BIT(0)
@@ -241,32 +241,32 @@
#define RKISP1_CIF_CLK_CTRL_RSZS BIT(25)
#define RKISP1_CIF_CLK_CTRL_MIPI BIT(26)
#define RKISP1_CIF_CLK_CTRL_MARVINMI BIT(27)
-/* ICCL */
-#define RKISP1_CIF_ICCL_ISP_CLK BIT(0)
-#define RKISP1_CIF_ICCL_CP_CLK BIT(1)
-#define RKISP1_CIF_ICCL_RES_2 BIT(2)
-#define RKISP1_CIF_ICCL_MRSZ_CLK BIT(3)
-#define RKISP1_CIF_ICCL_SRSZ_CLK BIT(4)
-#define RKISP1_CIF_ICCL_JPEG_CLK BIT(5)
-#define RKISP1_CIF_ICCL_MI_CLK BIT(6)
-#define RKISP1_CIF_ICCL_RES_7 BIT(7)
-#define RKISP1_CIF_ICCL_IE_CLK BIT(8)
-#define RKISP1_CIF_ICCL_SIMP_CLK BIT(9)
-#define RKISP1_CIF_ICCL_SMIA_CLK BIT(10)
-#define RKISP1_CIF_ICCL_MIPI_CLK BIT(11)
-#define RKISP1_CIF_ICCL_DCROP_CLK BIT(12)
-/* IRCL */
-#define RKISP1_CIF_IRCL_ISP_SW_RST BIT(0)
-#define RKISP1_CIF_IRCL_CP_SW_RST BIT(1)
-#define RKISP1_CIF_IRCL_YCS_SW_RST BIT(2)
-#define RKISP1_CIF_IRCL_MRSZ_SW_RST BIT(3)
-#define RKISP1_CIF_IRCL_SRSZ_SW_RST BIT(4)
-#define RKISP1_CIF_IRCL_JPEG_SW_RST BIT(5)
-#define RKISP1_CIF_IRCL_MI_SW_RST BIT(6)
-#define RKISP1_CIF_IRCL_CIF_SW_RST BIT(7)
-#define RKISP1_CIF_IRCL_IE_SW_RST BIT(8)
-#define RKISP1_CIF_IRCL_SI_SW_RST BIT(9)
-#define RKISP1_CIF_IRCL_MIPI_SW_RST BIT(11)
+/* VI_ICCL */
+#define RKISP1_CIF_VI_ICCL_ISP_CLK BIT(0)
+#define RKISP1_CIF_VI_ICCL_CP_CLK BIT(1)
+#define RKISP1_CIF_VI_ICCL_RES_2 BIT(2)
+#define RKISP1_CIF_VI_ICCL_MRSZ_CLK BIT(3)
+#define RKISP1_CIF_VI_ICCL_SRSZ_CLK BIT(4)
+#define RKISP1_CIF_VI_ICCL_JPEG_CLK BIT(5)
+#define RKISP1_CIF_VI_ICCL_MI_CLK BIT(6)
+#define RKISP1_CIF_VI_ICCL_RES_7 BIT(7)
+#define RKISP1_CIF_VI_ICCL_IE_CLK BIT(8)
+#define RKISP1_CIF_VI_ICCL_SIMP_CLK BIT(9)
+#define RKISP1_CIF_VI_ICCL_SMIA_CLK BIT(10)
+#define RKISP1_CIF_VI_ICCL_MIPI_CLK BIT(11)
+#define RKISP1_CIF_VI_ICCL_DCROP_CLK BIT(12)
+/* VI_IRCL */
+#define RKISP1_CIF_VI_IRCL_ISP_SW_RST BIT(0)
+#define RKISP1_CIF_VI_IRCL_CP_SW_RST BIT(1)
+#define RKISP1_CIF_VI_IRCL_YCS_SW_RST BIT(2)
+#define RKISP1_CIF_VI_IRCL_MRSZ_SW_RST BIT(3)
+#define RKISP1_CIF_VI_IRCL_SRSZ_SW_RST BIT(4)
+#define RKISP1_CIF_VI_IRCL_JPEG_SW_RST BIT(5)
+#define RKISP1_CIF_VI_IRCL_MI_SW_RST BIT(6)
+#define RKISP1_CIF_VI_IRCL_CIF_SW_RST BIT(7)
+#define RKISP1_CIF_VI_IRCL_IE_SW_RST BIT(8)
+#define RKISP1_CIF_VI_IRCL_SI_SW_RST BIT(9)
+#define RKISP1_CIF_VI_IRCL_MIPI_SW_RST BIT(11)
/* C_PROC_CTR */
#define RKISP1_CIF_C_PROC_CTR_ENABLE BIT(0)
@@ -687,11 +687,11 @@
/* CIF Registers */
/* =================================================================== */
#define RKISP1_CIF_CTRL_BASE 0x00000000
-#define RKISP1_CIF_CCL (RKISP1_CIF_CTRL_BASE + 0x00000000)
+#define RKISP1_CIF_VI_CCL (RKISP1_CIF_CTRL_BASE + 0x00000000)
#define RKISP1_CIF_VI_ID (RKISP1_CIF_CTRL_BASE + 0x00000008)
#define RKISP1_CIF_VI_ISP_CLK_CTRL_V12 (RKISP1_CIF_CTRL_BASE + 0x0000000C)
-#define RKISP1_CIF_ICCL (RKISP1_CIF_CTRL_BASE + 0x00000010)
-#define RKISP1_CIF_IRCL (RKISP1_CIF_CTRL_BASE + 0x00000014)
+#define RKISP1_CIF_VI_ICCL (RKISP1_CIF_CTRL_BASE + 0x00000010)
+#define RKISP1_CIF_VI_IRCL (RKISP1_CIF_CTRL_BASE + 0x00000014)
#define RKISP1_CIF_VI_DPCL (RKISP1_CIF_CTRL_BASE + 0x00000018)
#define RKISP1_CIF_IMG_EFF_BASE 0x00000200
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH 10/16] media: rkisp1: resizer: Simplify register access
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The registers for the mainpath and selfpath resizers are located at the
same offset from the instance-specific base. Use this to simplify
register access, removing the need to store per-register offsets in the
rkisp1_rsz_config structure.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-common.h | 2 +
.../platform/rockchip/rkisp1/rkisp1-regs.h | 67 +++-----
.../platform/rockchip/rkisp1/rkisp1-resizer.c | 161 ++++++------------
3 files changed, 75 insertions(+), 155 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
index d8fa3f1a5a85..64ad7452eb6b 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
@@ -313,6 +313,7 @@ struct rkisp1_params {
* struct rkisp1_resizer - Resizer subdev
*
* @sd: v4l2_subdev variable
+ * @regs_base: base register address offset
* @id: id of the resizer, one of RKISP1_SELFPATH, RKISP1_MAINPATH
* @rkisp1: pointer to the rkisp1 device
* @pads: media pads
@@ -323,6 +324,7 @@ struct rkisp1_params {
*/
struct rkisp1_resizer {
struct v4l2_subdev sd;
+ u32 regs_base;
enum rkisp1_stream_id id;
struct rkisp1_device *rkisp1;
struct media_pad pads[RKISP1_RSZ_PAD_MAX];
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index 4e2b73227e61..083d92ada73f 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -905,52 +905,29 @@
#define RKISP1_CIF_DUAL_CROP_S_V_SIZE_SHD (RKISP1_CIF_DUAL_CROP_BASE + 0x00000040)
#define RKISP1_CIF_MRSZ_BASE 0x00000C00
-#define RKISP1_CIF_MRSZ_CTRL (RKISP1_CIF_MRSZ_BASE + 0x00000000)
-#define RKISP1_CIF_MRSZ_SCALE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000004)
-#define RKISP1_CIF_MRSZ_SCALE_HCB (RKISP1_CIF_MRSZ_BASE + 0x00000008)
-#define RKISP1_CIF_MRSZ_SCALE_HCR (RKISP1_CIF_MRSZ_BASE + 0x0000000C)
-#define RKISP1_CIF_MRSZ_SCALE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000010)
-#define RKISP1_CIF_MRSZ_SCALE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000014)
-#define RKISP1_CIF_MRSZ_PHASE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000018)
-#define RKISP1_CIF_MRSZ_PHASE_HC (RKISP1_CIF_MRSZ_BASE + 0x0000001C)
-#define RKISP1_CIF_MRSZ_PHASE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000020)
-#define RKISP1_CIF_MRSZ_PHASE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000024)
-#define RKISP1_CIF_MRSZ_SCALE_LUT_ADDR (RKISP1_CIF_MRSZ_BASE + 0x00000028)
-#define RKISP1_CIF_MRSZ_SCALE_LUT (RKISP1_CIF_MRSZ_BASE + 0x0000002C)
-#define RKISP1_CIF_MRSZ_CTRL_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000030)
-#define RKISP1_CIF_MRSZ_SCALE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000034)
-#define RKISP1_CIF_MRSZ_SCALE_HCB_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000038)
-#define RKISP1_CIF_MRSZ_SCALE_HCR_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000003C)
-#define RKISP1_CIF_MRSZ_SCALE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000040)
-#define RKISP1_CIF_MRSZ_SCALE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000044)
-#define RKISP1_CIF_MRSZ_PHASE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000048)
-#define RKISP1_CIF_MRSZ_PHASE_HC_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000004C)
-#define RKISP1_CIF_MRSZ_PHASE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000050)
-#define RKISP1_CIF_MRSZ_PHASE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000054)
-
#define RKISP1_CIF_SRSZ_BASE 0x00001000
-#define RKISP1_CIF_SRSZ_CTRL (RKISP1_CIF_SRSZ_BASE + 0x00000000)
-#define RKISP1_CIF_SRSZ_SCALE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000004)
-#define RKISP1_CIF_SRSZ_SCALE_HCB (RKISP1_CIF_SRSZ_BASE + 0x00000008)
-#define RKISP1_CIF_SRSZ_SCALE_HCR (RKISP1_CIF_SRSZ_BASE + 0x0000000C)
-#define RKISP1_CIF_SRSZ_SCALE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000010)
-#define RKISP1_CIF_SRSZ_SCALE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000014)
-#define RKISP1_CIF_SRSZ_PHASE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000018)
-#define RKISP1_CIF_SRSZ_PHASE_HC (RKISP1_CIF_SRSZ_BASE + 0x0000001C)
-#define RKISP1_CIF_SRSZ_PHASE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000020)
-#define RKISP1_CIF_SRSZ_PHASE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000024)
-#define RKISP1_CIF_SRSZ_SCALE_LUT_ADDR (RKISP1_CIF_SRSZ_BASE + 0x00000028)
-#define RKISP1_CIF_SRSZ_SCALE_LUT (RKISP1_CIF_SRSZ_BASE + 0x0000002C)
-#define RKISP1_CIF_SRSZ_CTRL_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000030)
-#define RKISP1_CIF_SRSZ_SCALE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000034)
-#define RKISP1_CIF_SRSZ_SCALE_HCB_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000038)
-#define RKISP1_CIF_SRSZ_SCALE_HCR_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000003C)
-#define RKISP1_CIF_SRSZ_SCALE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000040)
-#define RKISP1_CIF_SRSZ_SCALE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000044)
-#define RKISP1_CIF_SRSZ_PHASE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000048)
-#define RKISP1_CIF_SRSZ_PHASE_HC_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000004C)
-#define RKISP1_CIF_SRSZ_PHASE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000050)
-#define RKISP1_CIF_SRSZ_PHASE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000054)
+#define RKISP1_CIF_RSZ_CTRL 0x0000
+#define RKISP1_CIF_RSZ_SCALE_HY 0x0004
+#define RKISP1_CIF_RSZ_SCALE_HCB 0x0008
+#define RKISP1_CIF_RSZ_SCALE_HCR 0x000C
+#define RKISP1_CIF_RSZ_SCALE_VY 0x0010
+#define RKISP1_CIF_RSZ_SCALE_VC 0x0014
+#define RKISP1_CIF_RSZ_PHASE_HY 0x0018
+#define RKISP1_CIF_RSZ_PHASE_HC 0x001C
+#define RKISP1_CIF_RSZ_PHASE_VY 0x0020
+#define RKISP1_CIF_RSZ_PHASE_VC 0x0024
+#define RKISP1_CIF_RSZ_SCALE_LUT_ADDR 0x0028
+#define RKISP1_CIF_RSZ_SCALE_LUT 0x002C
+#define RKISP1_CIF_RSZ_CTRL_SHD 0x0030
+#define RKISP1_CIF_RSZ_SCALE_HY_SHD 0x0034
+#define RKISP1_CIF_RSZ_SCALE_HCB_SHD 0x0038
+#define RKISP1_CIF_RSZ_SCALE_HCR_SHD 0x003C
+#define RKISP1_CIF_RSZ_SCALE_VY_SHD 0x0040
+#define RKISP1_CIF_RSZ_SCALE_VC_SHD 0x0044
+#define RKISP1_CIF_RSZ_PHASE_HY_SHD 0x0048
+#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
+#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
+#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
#define RKISP1_CIF_MI_BASE 0x00001400
#define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
index 65ce8d647118..2135cd40f604 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
@@ -59,30 +59,6 @@ struct rkisp1_rsz_config {
const int min_rsz_width;
const int min_rsz_height;
/* registers */
- struct {
- u32 ctrl;
- u32 ctrl_shd;
- u32 scale_hy;
- u32 scale_hcr;
- u32 scale_hcb;
- u32 scale_vy;
- u32 scale_vc;
- u32 scale_lut;
- u32 scale_lut_addr;
- u32 scale_hy_shd;
- u32 scale_hcr_shd;
- u32 scale_hcb_shd;
- u32 scale_vy_shd;
- u32 scale_vc_shd;
- u32 phase_hy;
- u32 phase_hc;
- u32 phase_vy;
- u32 phase_vc;
- u32 phase_hy_shd;
- u32 phase_hc_shd;
- u32 phase_vy_shd;
- u32 phase_vc_shd;
- } rsz;
struct {
u32 ctrl;
u32 yuvmode_mask;
@@ -101,30 +77,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
.min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
.min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
/* registers */
- .rsz = {
- .ctrl = RKISP1_CIF_MRSZ_CTRL,
- .scale_hy = RKISP1_CIF_MRSZ_SCALE_HY,
- .scale_hcr = RKISP1_CIF_MRSZ_SCALE_HCR,
- .scale_hcb = RKISP1_CIF_MRSZ_SCALE_HCB,
- .scale_vy = RKISP1_CIF_MRSZ_SCALE_VY,
- .scale_vc = RKISP1_CIF_MRSZ_SCALE_VC,
- .scale_lut = RKISP1_CIF_MRSZ_SCALE_LUT,
- .scale_lut_addr = RKISP1_CIF_MRSZ_SCALE_LUT_ADDR,
- .scale_hy_shd = RKISP1_CIF_MRSZ_SCALE_HY_SHD,
- .scale_hcr_shd = RKISP1_CIF_MRSZ_SCALE_HCR_SHD,
- .scale_hcb_shd = RKISP1_CIF_MRSZ_SCALE_HCB_SHD,
- .scale_vy_shd = RKISP1_CIF_MRSZ_SCALE_VY_SHD,
- .scale_vc_shd = RKISP1_CIF_MRSZ_SCALE_VC_SHD,
- .phase_hy = RKISP1_CIF_MRSZ_PHASE_HY,
- .phase_hc = RKISP1_CIF_MRSZ_PHASE_HC,
- .phase_vy = RKISP1_CIF_MRSZ_PHASE_VY,
- .phase_vc = RKISP1_CIF_MRSZ_PHASE_VC,
- .ctrl_shd = RKISP1_CIF_MRSZ_CTRL_SHD,
- .phase_hy_shd = RKISP1_CIF_MRSZ_PHASE_HY_SHD,
- .phase_hc_shd = RKISP1_CIF_MRSZ_PHASE_HC_SHD,
- .phase_vy_shd = RKISP1_CIF_MRSZ_PHASE_VY_SHD,
- .phase_vc_shd = RKISP1_CIF_MRSZ_PHASE_VC_SHD,
- },
.dual_crop = {
.ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
.yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
@@ -143,30 +95,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
.min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
.min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
/* registers */
- .rsz = {
- .ctrl = RKISP1_CIF_SRSZ_CTRL,
- .scale_hy = RKISP1_CIF_SRSZ_SCALE_HY,
- .scale_hcr = RKISP1_CIF_SRSZ_SCALE_HCR,
- .scale_hcb = RKISP1_CIF_SRSZ_SCALE_HCB,
- .scale_vy = RKISP1_CIF_SRSZ_SCALE_VY,
- .scale_vc = RKISP1_CIF_SRSZ_SCALE_VC,
- .scale_lut = RKISP1_CIF_SRSZ_SCALE_LUT,
- .scale_lut_addr = RKISP1_CIF_SRSZ_SCALE_LUT_ADDR,
- .scale_hy_shd = RKISP1_CIF_SRSZ_SCALE_HY_SHD,
- .scale_hcr_shd = RKISP1_CIF_SRSZ_SCALE_HCR_SHD,
- .scale_hcb_shd = RKISP1_CIF_SRSZ_SCALE_HCB_SHD,
- .scale_vy_shd = RKISP1_CIF_SRSZ_SCALE_VY_SHD,
- .scale_vc_shd = RKISP1_CIF_SRSZ_SCALE_VC_SHD,
- .phase_hy = RKISP1_CIF_SRSZ_PHASE_HY,
- .phase_hc = RKISP1_CIF_SRSZ_PHASE_HC,
- .phase_vy = RKISP1_CIF_SRSZ_PHASE_VY,
- .phase_vc = RKISP1_CIF_SRSZ_PHASE_VC,
- .ctrl_shd = RKISP1_CIF_SRSZ_CTRL_SHD,
- .phase_hy_shd = RKISP1_CIF_SRSZ_PHASE_HY_SHD,
- .phase_hc_shd = RKISP1_CIF_SRSZ_PHASE_HC_SHD,
- .phase_vy_shd = RKISP1_CIF_SRSZ_PHASE_VY_SHD,
- .phase_vc_shd = RKISP1_CIF_SRSZ_PHASE_VC_SHD,
- },
.dual_crop = {
.ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
.yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
@@ -178,6 +106,17 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
},
};
+static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
+{
+ return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
+}
+
+static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
+ u32 value)
+{
+ rkisp1_write(rsz->rkisp1, rsz->regs_base + offset, value);
+}
+
static struct v4l2_mbus_framefmt *
rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz,
struct v4l2_subdev_state *sd_state,
@@ -277,39 +216,39 @@ static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
"RSZ_PHASE_HC %d/%d\n"
"RSZ_PHASE_VY %d/%d\n"
"RSZ_PHASE_VC %d/%d\n",
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc_shd));
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
}
static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
- u32 ctrl_cfg = rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl);
+ u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
if (when == RKISP1_SHADOW_REGS_ASYNC)
ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
else
ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
- rkisp1_write(rsz->rkisp1, ctrl_cfg, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
}
static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
@@ -325,7 +264,7 @@ static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
- rkisp1_write(rsz->rkisp1, 0, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
if (when == RKISP1_SHADOW_REGS_SYNC)
rkisp1_rsz_update_shadow(rsz, when);
@@ -338,20 +277,19 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
struct v4l2_rect *src_c,
enum rkisp1_shadow_regs_when when)
{
- struct rkisp1_device *rkisp1 = rsz->rkisp1;
u32 ratio, rsz_ctrl = 0;
unsigned int i;
/* No phase offset */
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hy);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hc);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vy);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vc);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
/* Linear interpolation */
for (i = 0; i < 64; i++) {
- rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut_addr);
- rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
}
if (sink_y->width != src_y->width) {
@@ -359,7 +297,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_y->width < src_y->width)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hy);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
}
if (sink_c->width != src_c->width) {
@@ -367,8 +305,8 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_c->width < src_c->width)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcb);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcr);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
}
if (sink_y->height != src_y->height) {
@@ -376,7 +314,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_y->height < src_y->height)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vy);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
}
if (sink_c->height != src_c->height) {
@@ -384,10 +322,10 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_c->height < src_c->height)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vc);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
}
- rkisp1_write(rkisp1, rsz_ctrl, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
rkisp1_rsz_update_shadow(rsz, when);
}
@@ -803,10 +741,13 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
struct v4l2_subdev *sd = &rsz->sd;
int ret;
- if (rsz->id == RKISP1_SELFPATH)
+ if (rsz->id == RKISP1_SELFPATH) {
+ rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
rsz->config = &rkisp1_rsz_config_sp;
- else
+ } else {
+ rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
rsz->config = &rkisp1_rsz_config_mp;
+ }
v4l2_subdev_init(sd, &rkisp1_rsz_ops);
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 10/16] media: rkisp1: resizer: Simplify register access
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The registers for the mainpath and selfpath resizers are located at the
same offset from the instance-specific base. Use this to simplify
register access, removing the need to store per-register offsets in the
rkisp1_rsz_config structure.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-common.h | 2 +
.../platform/rockchip/rkisp1/rkisp1-regs.h | 67 +++-----
.../platform/rockchip/rkisp1/rkisp1-resizer.c | 161 ++++++------------
3 files changed, 75 insertions(+), 155 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
index d8fa3f1a5a85..64ad7452eb6b 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
@@ -313,6 +313,7 @@ struct rkisp1_params {
* struct rkisp1_resizer - Resizer subdev
*
* @sd: v4l2_subdev variable
+ * @regs_base: base register address offset
* @id: id of the resizer, one of RKISP1_SELFPATH, RKISP1_MAINPATH
* @rkisp1: pointer to the rkisp1 device
* @pads: media pads
@@ -323,6 +324,7 @@ struct rkisp1_params {
*/
struct rkisp1_resizer {
struct v4l2_subdev sd;
+ u32 regs_base;
enum rkisp1_stream_id id;
struct rkisp1_device *rkisp1;
struct media_pad pads[RKISP1_RSZ_PAD_MAX];
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index 4e2b73227e61..083d92ada73f 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -905,52 +905,29 @@
#define RKISP1_CIF_DUAL_CROP_S_V_SIZE_SHD (RKISP1_CIF_DUAL_CROP_BASE + 0x00000040)
#define RKISP1_CIF_MRSZ_BASE 0x00000C00
-#define RKISP1_CIF_MRSZ_CTRL (RKISP1_CIF_MRSZ_BASE + 0x00000000)
-#define RKISP1_CIF_MRSZ_SCALE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000004)
-#define RKISP1_CIF_MRSZ_SCALE_HCB (RKISP1_CIF_MRSZ_BASE + 0x00000008)
-#define RKISP1_CIF_MRSZ_SCALE_HCR (RKISP1_CIF_MRSZ_BASE + 0x0000000C)
-#define RKISP1_CIF_MRSZ_SCALE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000010)
-#define RKISP1_CIF_MRSZ_SCALE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000014)
-#define RKISP1_CIF_MRSZ_PHASE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000018)
-#define RKISP1_CIF_MRSZ_PHASE_HC (RKISP1_CIF_MRSZ_BASE + 0x0000001C)
-#define RKISP1_CIF_MRSZ_PHASE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000020)
-#define RKISP1_CIF_MRSZ_PHASE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000024)
-#define RKISP1_CIF_MRSZ_SCALE_LUT_ADDR (RKISP1_CIF_MRSZ_BASE + 0x00000028)
-#define RKISP1_CIF_MRSZ_SCALE_LUT (RKISP1_CIF_MRSZ_BASE + 0x0000002C)
-#define RKISP1_CIF_MRSZ_CTRL_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000030)
-#define RKISP1_CIF_MRSZ_SCALE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000034)
-#define RKISP1_CIF_MRSZ_SCALE_HCB_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000038)
-#define RKISP1_CIF_MRSZ_SCALE_HCR_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000003C)
-#define RKISP1_CIF_MRSZ_SCALE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000040)
-#define RKISP1_CIF_MRSZ_SCALE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000044)
-#define RKISP1_CIF_MRSZ_PHASE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000048)
-#define RKISP1_CIF_MRSZ_PHASE_HC_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000004C)
-#define RKISP1_CIF_MRSZ_PHASE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000050)
-#define RKISP1_CIF_MRSZ_PHASE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000054)
-
#define RKISP1_CIF_SRSZ_BASE 0x00001000
-#define RKISP1_CIF_SRSZ_CTRL (RKISP1_CIF_SRSZ_BASE + 0x00000000)
-#define RKISP1_CIF_SRSZ_SCALE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000004)
-#define RKISP1_CIF_SRSZ_SCALE_HCB (RKISP1_CIF_SRSZ_BASE + 0x00000008)
-#define RKISP1_CIF_SRSZ_SCALE_HCR (RKISP1_CIF_SRSZ_BASE + 0x0000000C)
-#define RKISP1_CIF_SRSZ_SCALE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000010)
-#define RKISP1_CIF_SRSZ_SCALE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000014)
-#define RKISP1_CIF_SRSZ_PHASE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000018)
-#define RKISP1_CIF_SRSZ_PHASE_HC (RKISP1_CIF_SRSZ_BASE + 0x0000001C)
-#define RKISP1_CIF_SRSZ_PHASE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000020)
-#define RKISP1_CIF_SRSZ_PHASE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000024)
-#define RKISP1_CIF_SRSZ_SCALE_LUT_ADDR (RKISP1_CIF_SRSZ_BASE + 0x00000028)
-#define RKISP1_CIF_SRSZ_SCALE_LUT (RKISP1_CIF_SRSZ_BASE + 0x0000002C)
-#define RKISP1_CIF_SRSZ_CTRL_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000030)
-#define RKISP1_CIF_SRSZ_SCALE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000034)
-#define RKISP1_CIF_SRSZ_SCALE_HCB_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000038)
-#define RKISP1_CIF_SRSZ_SCALE_HCR_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000003C)
-#define RKISP1_CIF_SRSZ_SCALE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000040)
-#define RKISP1_CIF_SRSZ_SCALE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000044)
-#define RKISP1_CIF_SRSZ_PHASE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000048)
-#define RKISP1_CIF_SRSZ_PHASE_HC_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000004C)
-#define RKISP1_CIF_SRSZ_PHASE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000050)
-#define RKISP1_CIF_SRSZ_PHASE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000054)
+#define RKISP1_CIF_RSZ_CTRL 0x0000
+#define RKISP1_CIF_RSZ_SCALE_HY 0x0004
+#define RKISP1_CIF_RSZ_SCALE_HCB 0x0008
+#define RKISP1_CIF_RSZ_SCALE_HCR 0x000C
+#define RKISP1_CIF_RSZ_SCALE_VY 0x0010
+#define RKISP1_CIF_RSZ_SCALE_VC 0x0014
+#define RKISP1_CIF_RSZ_PHASE_HY 0x0018
+#define RKISP1_CIF_RSZ_PHASE_HC 0x001C
+#define RKISP1_CIF_RSZ_PHASE_VY 0x0020
+#define RKISP1_CIF_RSZ_PHASE_VC 0x0024
+#define RKISP1_CIF_RSZ_SCALE_LUT_ADDR 0x0028
+#define RKISP1_CIF_RSZ_SCALE_LUT 0x002C
+#define RKISP1_CIF_RSZ_CTRL_SHD 0x0030
+#define RKISP1_CIF_RSZ_SCALE_HY_SHD 0x0034
+#define RKISP1_CIF_RSZ_SCALE_HCB_SHD 0x0038
+#define RKISP1_CIF_RSZ_SCALE_HCR_SHD 0x003C
+#define RKISP1_CIF_RSZ_SCALE_VY_SHD 0x0040
+#define RKISP1_CIF_RSZ_SCALE_VC_SHD 0x0044
+#define RKISP1_CIF_RSZ_PHASE_HY_SHD 0x0048
+#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
+#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
+#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
#define RKISP1_CIF_MI_BASE 0x00001400
#define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
index 65ce8d647118..2135cd40f604 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
@@ -59,30 +59,6 @@ struct rkisp1_rsz_config {
const int min_rsz_width;
const int min_rsz_height;
/* registers */
- struct {
- u32 ctrl;
- u32 ctrl_shd;
- u32 scale_hy;
- u32 scale_hcr;
- u32 scale_hcb;
- u32 scale_vy;
- u32 scale_vc;
- u32 scale_lut;
- u32 scale_lut_addr;
- u32 scale_hy_shd;
- u32 scale_hcr_shd;
- u32 scale_hcb_shd;
- u32 scale_vy_shd;
- u32 scale_vc_shd;
- u32 phase_hy;
- u32 phase_hc;
- u32 phase_vy;
- u32 phase_vc;
- u32 phase_hy_shd;
- u32 phase_hc_shd;
- u32 phase_vy_shd;
- u32 phase_vc_shd;
- } rsz;
struct {
u32 ctrl;
u32 yuvmode_mask;
@@ -101,30 +77,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
.min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
.min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
/* registers */
- .rsz = {
- .ctrl = RKISP1_CIF_MRSZ_CTRL,
- .scale_hy = RKISP1_CIF_MRSZ_SCALE_HY,
- .scale_hcr = RKISP1_CIF_MRSZ_SCALE_HCR,
- .scale_hcb = RKISP1_CIF_MRSZ_SCALE_HCB,
- .scale_vy = RKISP1_CIF_MRSZ_SCALE_VY,
- .scale_vc = RKISP1_CIF_MRSZ_SCALE_VC,
- .scale_lut = RKISP1_CIF_MRSZ_SCALE_LUT,
- .scale_lut_addr = RKISP1_CIF_MRSZ_SCALE_LUT_ADDR,
- .scale_hy_shd = RKISP1_CIF_MRSZ_SCALE_HY_SHD,
- .scale_hcr_shd = RKISP1_CIF_MRSZ_SCALE_HCR_SHD,
- .scale_hcb_shd = RKISP1_CIF_MRSZ_SCALE_HCB_SHD,
- .scale_vy_shd = RKISP1_CIF_MRSZ_SCALE_VY_SHD,
- .scale_vc_shd = RKISP1_CIF_MRSZ_SCALE_VC_SHD,
- .phase_hy = RKISP1_CIF_MRSZ_PHASE_HY,
- .phase_hc = RKISP1_CIF_MRSZ_PHASE_HC,
- .phase_vy = RKISP1_CIF_MRSZ_PHASE_VY,
- .phase_vc = RKISP1_CIF_MRSZ_PHASE_VC,
- .ctrl_shd = RKISP1_CIF_MRSZ_CTRL_SHD,
- .phase_hy_shd = RKISP1_CIF_MRSZ_PHASE_HY_SHD,
- .phase_hc_shd = RKISP1_CIF_MRSZ_PHASE_HC_SHD,
- .phase_vy_shd = RKISP1_CIF_MRSZ_PHASE_VY_SHD,
- .phase_vc_shd = RKISP1_CIF_MRSZ_PHASE_VC_SHD,
- },
.dual_crop = {
.ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
.yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
@@ -143,30 +95,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
.min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
.min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
/* registers */
- .rsz = {
- .ctrl = RKISP1_CIF_SRSZ_CTRL,
- .scale_hy = RKISP1_CIF_SRSZ_SCALE_HY,
- .scale_hcr = RKISP1_CIF_SRSZ_SCALE_HCR,
- .scale_hcb = RKISP1_CIF_SRSZ_SCALE_HCB,
- .scale_vy = RKISP1_CIF_SRSZ_SCALE_VY,
- .scale_vc = RKISP1_CIF_SRSZ_SCALE_VC,
- .scale_lut = RKISP1_CIF_SRSZ_SCALE_LUT,
- .scale_lut_addr = RKISP1_CIF_SRSZ_SCALE_LUT_ADDR,
- .scale_hy_shd = RKISP1_CIF_SRSZ_SCALE_HY_SHD,
- .scale_hcr_shd = RKISP1_CIF_SRSZ_SCALE_HCR_SHD,
- .scale_hcb_shd = RKISP1_CIF_SRSZ_SCALE_HCB_SHD,
- .scale_vy_shd = RKISP1_CIF_SRSZ_SCALE_VY_SHD,
- .scale_vc_shd = RKISP1_CIF_SRSZ_SCALE_VC_SHD,
- .phase_hy = RKISP1_CIF_SRSZ_PHASE_HY,
- .phase_hc = RKISP1_CIF_SRSZ_PHASE_HC,
- .phase_vy = RKISP1_CIF_SRSZ_PHASE_VY,
- .phase_vc = RKISP1_CIF_SRSZ_PHASE_VC,
- .ctrl_shd = RKISP1_CIF_SRSZ_CTRL_SHD,
- .phase_hy_shd = RKISP1_CIF_SRSZ_PHASE_HY_SHD,
- .phase_hc_shd = RKISP1_CIF_SRSZ_PHASE_HC_SHD,
- .phase_vy_shd = RKISP1_CIF_SRSZ_PHASE_VY_SHD,
- .phase_vc_shd = RKISP1_CIF_SRSZ_PHASE_VC_SHD,
- },
.dual_crop = {
.ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
.yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
@@ -178,6 +106,17 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
},
};
+static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
+{
+ return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
+}
+
+static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
+ u32 value)
+{
+ rkisp1_write(rsz->rkisp1, rsz->regs_base + offset, value);
+}
+
static struct v4l2_mbus_framefmt *
rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz,
struct v4l2_subdev_state *sd_state,
@@ -277,39 +216,39 @@ static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
"RSZ_PHASE_HC %d/%d\n"
"RSZ_PHASE_VY %d/%d\n"
"RSZ_PHASE_VC %d/%d\n",
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc_shd));
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
}
static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
- u32 ctrl_cfg = rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl);
+ u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
if (when == RKISP1_SHADOW_REGS_ASYNC)
ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
else
ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
- rkisp1_write(rsz->rkisp1, ctrl_cfg, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
}
static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
@@ -325,7 +264,7 @@ static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
- rkisp1_write(rsz->rkisp1, 0, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
if (when == RKISP1_SHADOW_REGS_SYNC)
rkisp1_rsz_update_shadow(rsz, when);
@@ -338,20 +277,19 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
struct v4l2_rect *src_c,
enum rkisp1_shadow_regs_when when)
{
- struct rkisp1_device *rkisp1 = rsz->rkisp1;
u32 ratio, rsz_ctrl = 0;
unsigned int i;
/* No phase offset */
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hy);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hc);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vy);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vc);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
/* Linear interpolation */
for (i = 0; i < 64; i++) {
- rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut_addr);
- rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
}
if (sink_y->width != src_y->width) {
@@ -359,7 +297,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_y->width < src_y->width)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hy);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
}
if (sink_c->width != src_c->width) {
@@ -367,8 +305,8 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_c->width < src_c->width)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcb);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcr);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
}
if (sink_y->height != src_y->height) {
@@ -376,7 +314,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_y->height < src_y->height)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vy);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
}
if (sink_c->height != src_c->height) {
@@ -384,10 +322,10 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_c->height < src_c->height)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vc);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
}
- rkisp1_write(rkisp1, rsz_ctrl, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
rkisp1_rsz_update_shadow(rsz, when);
}
@@ -803,10 +741,13 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
struct v4l2_subdev *sd = &rsz->sd;
int ret;
- if (rsz->id == RKISP1_SELFPATH)
+ if (rsz->id == RKISP1_SELFPATH) {
+ rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
rsz->config = &rkisp1_rsz_config_sp;
- else
+ } else {
+ rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
rsz->config = &rkisp1_rsz_config_mp;
+ }
v4l2_subdev_init(sd, &rkisp1_rsz_ops);
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH v1.1 10/16] media: rkisp1: resizer: Simplify register access
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:10 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:10 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The registers for the mainpath and selfpath resizers are located at the
same offset from the instance-specific base. Use this to simplify
register access, removing the need to store per-register offsets in the
rkisp1_rsz_config structure.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
Changes since v1:
- Fix order of arguments to write function
---
.../platform/rockchip/rkisp1/rkisp1-common.h | 2 +
.../platform/rockchip/rkisp1/rkisp1-regs.h | 67 +++-----
.../platform/rockchip/rkisp1/rkisp1-resizer.c | 161 ++++++------------
3 files changed, 75 insertions(+), 155 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
index d8fa3f1a5a85..64ad7452eb6b 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
@@ -313,6 +313,7 @@ struct rkisp1_params {
* struct rkisp1_resizer - Resizer subdev
*
* @sd: v4l2_subdev variable
+ * @regs_base: base register address offset
* @id: id of the resizer, one of RKISP1_SELFPATH, RKISP1_MAINPATH
* @rkisp1: pointer to the rkisp1 device
* @pads: media pads
@@ -323,6 +324,7 @@ struct rkisp1_params {
*/
struct rkisp1_resizer {
struct v4l2_subdev sd;
+ u32 regs_base;
enum rkisp1_stream_id id;
struct rkisp1_device *rkisp1;
struct media_pad pads[RKISP1_RSZ_PAD_MAX];
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index 4e2b73227e61..083d92ada73f 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -905,52 +905,29 @@
#define RKISP1_CIF_DUAL_CROP_S_V_SIZE_SHD (RKISP1_CIF_DUAL_CROP_BASE + 0x00000040)
#define RKISP1_CIF_MRSZ_BASE 0x00000C00
-#define RKISP1_CIF_MRSZ_CTRL (RKISP1_CIF_MRSZ_BASE + 0x00000000)
-#define RKISP1_CIF_MRSZ_SCALE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000004)
-#define RKISP1_CIF_MRSZ_SCALE_HCB (RKISP1_CIF_MRSZ_BASE + 0x00000008)
-#define RKISP1_CIF_MRSZ_SCALE_HCR (RKISP1_CIF_MRSZ_BASE + 0x0000000C)
-#define RKISP1_CIF_MRSZ_SCALE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000010)
-#define RKISP1_CIF_MRSZ_SCALE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000014)
-#define RKISP1_CIF_MRSZ_PHASE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000018)
-#define RKISP1_CIF_MRSZ_PHASE_HC (RKISP1_CIF_MRSZ_BASE + 0x0000001C)
-#define RKISP1_CIF_MRSZ_PHASE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000020)
-#define RKISP1_CIF_MRSZ_PHASE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000024)
-#define RKISP1_CIF_MRSZ_SCALE_LUT_ADDR (RKISP1_CIF_MRSZ_BASE + 0x00000028)
-#define RKISP1_CIF_MRSZ_SCALE_LUT (RKISP1_CIF_MRSZ_BASE + 0x0000002C)
-#define RKISP1_CIF_MRSZ_CTRL_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000030)
-#define RKISP1_CIF_MRSZ_SCALE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000034)
-#define RKISP1_CIF_MRSZ_SCALE_HCB_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000038)
-#define RKISP1_CIF_MRSZ_SCALE_HCR_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000003C)
-#define RKISP1_CIF_MRSZ_SCALE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000040)
-#define RKISP1_CIF_MRSZ_SCALE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000044)
-#define RKISP1_CIF_MRSZ_PHASE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000048)
-#define RKISP1_CIF_MRSZ_PHASE_HC_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000004C)
-#define RKISP1_CIF_MRSZ_PHASE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000050)
-#define RKISP1_CIF_MRSZ_PHASE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000054)
-
#define RKISP1_CIF_SRSZ_BASE 0x00001000
-#define RKISP1_CIF_SRSZ_CTRL (RKISP1_CIF_SRSZ_BASE + 0x00000000)
-#define RKISP1_CIF_SRSZ_SCALE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000004)
-#define RKISP1_CIF_SRSZ_SCALE_HCB (RKISP1_CIF_SRSZ_BASE + 0x00000008)
-#define RKISP1_CIF_SRSZ_SCALE_HCR (RKISP1_CIF_SRSZ_BASE + 0x0000000C)
-#define RKISP1_CIF_SRSZ_SCALE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000010)
-#define RKISP1_CIF_SRSZ_SCALE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000014)
-#define RKISP1_CIF_SRSZ_PHASE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000018)
-#define RKISP1_CIF_SRSZ_PHASE_HC (RKISP1_CIF_SRSZ_BASE + 0x0000001C)
-#define RKISP1_CIF_SRSZ_PHASE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000020)
-#define RKISP1_CIF_SRSZ_PHASE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000024)
-#define RKISP1_CIF_SRSZ_SCALE_LUT_ADDR (RKISP1_CIF_SRSZ_BASE + 0x00000028)
-#define RKISP1_CIF_SRSZ_SCALE_LUT (RKISP1_CIF_SRSZ_BASE + 0x0000002C)
-#define RKISP1_CIF_SRSZ_CTRL_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000030)
-#define RKISP1_CIF_SRSZ_SCALE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000034)
-#define RKISP1_CIF_SRSZ_SCALE_HCB_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000038)
-#define RKISP1_CIF_SRSZ_SCALE_HCR_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000003C)
-#define RKISP1_CIF_SRSZ_SCALE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000040)
-#define RKISP1_CIF_SRSZ_SCALE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000044)
-#define RKISP1_CIF_SRSZ_PHASE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000048)
-#define RKISP1_CIF_SRSZ_PHASE_HC_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000004C)
-#define RKISP1_CIF_SRSZ_PHASE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000050)
-#define RKISP1_CIF_SRSZ_PHASE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000054)
+#define RKISP1_CIF_RSZ_CTRL 0x0000
+#define RKISP1_CIF_RSZ_SCALE_HY 0x0004
+#define RKISP1_CIF_RSZ_SCALE_HCB 0x0008
+#define RKISP1_CIF_RSZ_SCALE_HCR 0x000C
+#define RKISP1_CIF_RSZ_SCALE_VY 0x0010
+#define RKISP1_CIF_RSZ_SCALE_VC 0x0014
+#define RKISP1_CIF_RSZ_PHASE_HY 0x0018
+#define RKISP1_CIF_RSZ_PHASE_HC 0x001C
+#define RKISP1_CIF_RSZ_PHASE_VY 0x0020
+#define RKISP1_CIF_RSZ_PHASE_VC 0x0024
+#define RKISP1_CIF_RSZ_SCALE_LUT_ADDR 0x0028
+#define RKISP1_CIF_RSZ_SCALE_LUT 0x002C
+#define RKISP1_CIF_RSZ_CTRL_SHD 0x0030
+#define RKISP1_CIF_RSZ_SCALE_HY_SHD 0x0034
+#define RKISP1_CIF_RSZ_SCALE_HCB_SHD 0x0038
+#define RKISP1_CIF_RSZ_SCALE_HCR_SHD 0x003C
+#define RKISP1_CIF_RSZ_SCALE_VY_SHD 0x0040
+#define RKISP1_CIF_RSZ_SCALE_VC_SHD 0x0044
+#define RKISP1_CIF_RSZ_PHASE_HY_SHD 0x0048
+#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
+#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
+#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
#define RKISP1_CIF_MI_BASE 0x00001400
#define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
index 65ce8d647118..d92a23bd2d51 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
@@ -59,30 +59,6 @@ struct rkisp1_rsz_config {
const int min_rsz_width;
const int min_rsz_height;
/* registers */
- struct {
- u32 ctrl;
- u32 ctrl_shd;
- u32 scale_hy;
- u32 scale_hcr;
- u32 scale_hcb;
- u32 scale_vy;
- u32 scale_vc;
- u32 scale_lut;
- u32 scale_lut_addr;
- u32 scale_hy_shd;
- u32 scale_hcr_shd;
- u32 scale_hcb_shd;
- u32 scale_vy_shd;
- u32 scale_vc_shd;
- u32 phase_hy;
- u32 phase_hc;
- u32 phase_vy;
- u32 phase_vc;
- u32 phase_hy_shd;
- u32 phase_hc_shd;
- u32 phase_vy_shd;
- u32 phase_vc_shd;
- } rsz;
struct {
u32 ctrl;
u32 yuvmode_mask;
@@ -101,30 +77,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
.min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
.min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
/* registers */
- .rsz = {
- .ctrl = RKISP1_CIF_MRSZ_CTRL,
- .scale_hy = RKISP1_CIF_MRSZ_SCALE_HY,
- .scale_hcr = RKISP1_CIF_MRSZ_SCALE_HCR,
- .scale_hcb = RKISP1_CIF_MRSZ_SCALE_HCB,
- .scale_vy = RKISP1_CIF_MRSZ_SCALE_VY,
- .scale_vc = RKISP1_CIF_MRSZ_SCALE_VC,
- .scale_lut = RKISP1_CIF_MRSZ_SCALE_LUT,
- .scale_lut_addr = RKISP1_CIF_MRSZ_SCALE_LUT_ADDR,
- .scale_hy_shd = RKISP1_CIF_MRSZ_SCALE_HY_SHD,
- .scale_hcr_shd = RKISP1_CIF_MRSZ_SCALE_HCR_SHD,
- .scale_hcb_shd = RKISP1_CIF_MRSZ_SCALE_HCB_SHD,
- .scale_vy_shd = RKISP1_CIF_MRSZ_SCALE_VY_SHD,
- .scale_vc_shd = RKISP1_CIF_MRSZ_SCALE_VC_SHD,
- .phase_hy = RKISP1_CIF_MRSZ_PHASE_HY,
- .phase_hc = RKISP1_CIF_MRSZ_PHASE_HC,
- .phase_vy = RKISP1_CIF_MRSZ_PHASE_VY,
- .phase_vc = RKISP1_CIF_MRSZ_PHASE_VC,
- .ctrl_shd = RKISP1_CIF_MRSZ_CTRL_SHD,
- .phase_hy_shd = RKISP1_CIF_MRSZ_PHASE_HY_SHD,
- .phase_hc_shd = RKISP1_CIF_MRSZ_PHASE_HC_SHD,
- .phase_vy_shd = RKISP1_CIF_MRSZ_PHASE_VY_SHD,
- .phase_vc_shd = RKISP1_CIF_MRSZ_PHASE_VC_SHD,
- },
.dual_crop = {
.ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
.yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
@@ -143,30 +95,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
.min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
.min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
/* registers */
- .rsz = {
- .ctrl = RKISP1_CIF_SRSZ_CTRL,
- .scale_hy = RKISP1_CIF_SRSZ_SCALE_HY,
- .scale_hcr = RKISP1_CIF_SRSZ_SCALE_HCR,
- .scale_hcb = RKISP1_CIF_SRSZ_SCALE_HCB,
- .scale_vy = RKISP1_CIF_SRSZ_SCALE_VY,
- .scale_vc = RKISP1_CIF_SRSZ_SCALE_VC,
- .scale_lut = RKISP1_CIF_SRSZ_SCALE_LUT,
- .scale_lut_addr = RKISP1_CIF_SRSZ_SCALE_LUT_ADDR,
- .scale_hy_shd = RKISP1_CIF_SRSZ_SCALE_HY_SHD,
- .scale_hcr_shd = RKISP1_CIF_SRSZ_SCALE_HCR_SHD,
- .scale_hcb_shd = RKISP1_CIF_SRSZ_SCALE_HCB_SHD,
- .scale_vy_shd = RKISP1_CIF_SRSZ_SCALE_VY_SHD,
- .scale_vc_shd = RKISP1_CIF_SRSZ_SCALE_VC_SHD,
- .phase_hy = RKISP1_CIF_SRSZ_PHASE_HY,
- .phase_hc = RKISP1_CIF_SRSZ_PHASE_HC,
- .phase_vy = RKISP1_CIF_SRSZ_PHASE_VY,
- .phase_vc = RKISP1_CIF_SRSZ_PHASE_VC,
- .ctrl_shd = RKISP1_CIF_SRSZ_CTRL_SHD,
- .phase_hy_shd = RKISP1_CIF_SRSZ_PHASE_HY_SHD,
- .phase_hc_shd = RKISP1_CIF_SRSZ_PHASE_HC_SHD,
- .phase_vy_shd = RKISP1_CIF_SRSZ_PHASE_VY_SHD,
- .phase_vc_shd = RKISP1_CIF_SRSZ_PHASE_VC_SHD,
- },
.dual_crop = {
.ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
.yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
@@ -178,6 +106,17 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
},
};
+static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
+{
+ return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
+}
+
+static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
+ u32 value)
+{
+ rkisp1_write(rsz->rkisp1, value, rsz->regs_base + offset);
+}
+
static struct v4l2_mbus_framefmt *
rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz,
struct v4l2_subdev_state *sd_state,
@@ -277,39 +216,39 @@ static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
"RSZ_PHASE_HC %d/%d\n"
"RSZ_PHASE_VY %d/%d\n"
"RSZ_PHASE_VC %d/%d\n",
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc_shd));
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
}
static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
- u32 ctrl_cfg = rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl);
+ u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
if (when == RKISP1_SHADOW_REGS_ASYNC)
ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
else
ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
- rkisp1_write(rsz->rkisp1, ctrl_cfg, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
}
static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
@@ -325,7 +264,7 @@ static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
- rkisp1_write(rsz->rkisp1, 0, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
if (when == RKISP1_SHADOW_REGS_SYNC)
rkisp1_rsz_update_shadow(rsz, when);
@@ -338,20 +277,19 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
struct v4l2_rect *src_c,
enum rkisp1_shadow_regs_when when)
{
- struct rkisp1_device *rkisp1 = rsz->rkisp1;
u32 ratio, rsz_ctrl = 0;
unsigned int i;
/* No phase offset */
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hy);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hc);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vy);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vc);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
/* Linear interpolation */
for (i = 0; i < 64; i++) {
- rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut_addr);
- rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
}
if (sink_y->width != src_y->width) {
@@ -359,7 +297,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_y->width < src_y->width)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hy);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
}
if (sink_c->width != src_c->width) {
@@ -367,8 +305,8 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_c->width < src_c->width)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcb);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcr);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
}
if (sink_y->height != src_y->height) {
@@ -376,7 +314,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_y->height < src_y->height)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vy);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
}
if (sink_c->height != src_c->height) {
@@ -384,10 +322,10 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_c->height < src_c->height)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vc);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
}
- rkisp1_write(rkisp1, rsz_ctrl, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
rkisp1_rsz_update_shadow(rsz, when);
}
@@ -803,10 +741,13 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
struct v4l2_subdev *sd = &rsz->sd;
int ret;
- if (rsz->id == RKISP1_SELFPATH)
+ if (rsz->id == RKISP1_SELFPATH) {
+ rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
rsz->config = &rkisp1_rsz_config_sp;
- else
+ } else {
+ rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
rsz->config = &rkisp1_rsz_config_mp;
+ }
v4l2_subdev_init(sd, &rkisp1_rsz_ops);
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH v1.1 10/16] media: rkisp1: resizer: Simplify register access
@ 2022-02-27 16:10 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:10 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The registers for the mainpath and selfpath resizers are located at the
same offset from the instance-specific base. Use this to simplify
register access, removing the need to store per-register offsets in the
rkisp1_rsz_config structure.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
Changes since v1:
- Fix order of arguments to write function
---
.../platform/rockchip/rkisp1/rkisp1-common.h | 2 +
.../platform/rockchip/rkisp1/rkisp1-regs.h | 67 +++-----
.../platform/rockchip/rkisp1/rkisp1-resizer.c | 161 ++++++------------
3 files changed, 75 insertions(+), 155 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
index d8fa3f1a5a85..64ad7452eb6b 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
@@ -313,6 +313,7 @@ struct rkisp1_params {
* struct rkisp1_resizer - Resizer subdev
*
* @sd: v4l2_subdev variable
+ * @regs_base: base register address offset
* @id: id of the resizer, one of RKISP1_SELFPATH, RKISP1_MAINPATH
* @rkisp1: pointer to the rkisp1 device
* @pads: media pads
@@ -323,6 +324,7 @@ struct rkisp1_params {
*/
struct rkisp1_resizer {
struct v4l2_subdev sd;
+ u32 regs_base;
enum rkisp1_stream_id id;
struct rkisp1_device *rkisp1;
struct media_pad pads[RKISP1_RSZ_PAD_MAX];
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index 4e2b73227e61..083d92ada73f 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -905,52 +905,29 @@
#define RKISP1_CIF_DUAL_CROP_S_V_SIZE_SHD (RKISP1_CIF_DUAL_CROP_BASE + 0x00000040)
#define RKISP1_CIF_MRSZ_BASE 0x00000C00
-#define RKISP1_CIF_MRSZ_CTRL (RKISP1_CIF_MRSZ_BASE + 0x00000000)
-#define RKISP1_CIF_MRSZ_SCALE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000004)
-#define RKISP1_CIF_MRSZ_SCALE_HCB (RKISP1_CIF_MRSZ_BASE + 0x00000008)
-#define RKISP1_CIF_MRSZ_SCALE_HCR (RKISP1_CIF_MRSZ_BASE + 0x0000000C)
-#define RKISP1_CIF_MRSZ_SCALE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000010)
-#define RKISP1_CIF_MRSZ_SCALE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000014)
-#define RKISP1_CIF_MRSZ_PHASE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000018)
-#define RKISP1_CIF_MRSZ_PHASE_HC (RKISP1_CIF_MRSZ_BASE + 0x0000001C)
-#define RKISP1_CIF_MRSZ_PHASE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000020)
-#define RKISP1_CIF_MRSZ_PHASE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000024)
-#define RKISP1_CIF_MRSZ_SCALE_LUT_ADDR (RKISP1_CIF_MRSZ_BASE + 0x00000028)
-#define RKISP1_CIF_MRSZ_SCALE_LUT (RKISP1_CIF_MRSZ_BASE + 0x0000002C)
-#define RKISP1_CIF_MRSZ_CTRL_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000030)
-#define RKISP1_CIF_MRSZ_SCALE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000034)
-#define RKISP1_CIF_MRSZ_SCALE_HCB_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000038)
-#define RKISP1_CIF_MRSZ_SCALE_HCR_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000003C)
-#define RKISP1_CIF_MRSZ_SCALE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000040)
-#define RKISP1_CIF_MRSZ_SCALE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000044)
-#define RKISP1_CIF_MRSZ_PHASE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000048)
-#define RKISP1_CIF_MRSZ_PHASE_HC_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000004C)
-#define RKISP1_CIF_MRSZ_PHASE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000050)
-#define RKISP1_CIF_MRSZ_PHASE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000054)
-
#define RKISP1_CIF_SRSZ_BASE 0x00001000
-#define RKISP1_CIF_SRSZ_CTRL (RKISP1_CIF_SRSZ_BASE + 0x00000000)
-#define RKISP1_CIF_SRSZ_SCALE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000004)
-#define RKISP1_CIF_SRSZ_SCALE_HCB (RKISP1_CIF_SRSZ_BASE + 0x00000008)
-#define RKISP1_CIF_SRSZ_SCALE_HCR (RKISP1_CIF_SRSZ_BASE + 0x0000000C)
-#define RKISP1_CIF_SRSZ_SCALE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000010)
-#define RKISP1_CIF_SRSZ_SCALE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000014)
-#define RKISP1_CIF_SRSZ_PHASE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000018)
-#define RKISP1_CIF_SRSZ_PHASE_HC (RKISP1_CIF_SRSZ_BASE + 0x0000001C)
-#define RKISP1_CIF_SRSZ_PHASE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000020)
-#define RKISP1_CIF_SRSZ_PHASE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000024)
-#define RKISP1_CIF_SRSZ_SCALE_LUT_ADDR (RKISP1_CIF_SRSZ_BASE + 0x00000028)
-#define RKISP1_CIF_SRSZ_SCALE_LUT (RKISP1_CIF_SRSZ_BASE + 0x0000002C)
-#define RKISP1_CIF_SRSZ_CTRL_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000030)
-#define RKISP1_CIF_SRSZ_SCALE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000034)
-#define RKISP1_CIF_SRSZ_SCALE_HCB_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000038)
-#define RKISP1_CIF_SRSZ_SCALE_HCR_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000003C)
-#define RKISP1_CIF_SRSZ_SCALE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000040)
-#define RKISP1_CIF_SRSZ_SCALE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000044)
-#define RKISP1_CIF_SRSZ_PHASE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000048)
-#define RKISP1_CIF_SRSZ_PHASE_HC_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000004C)
-#define RKISP1_CIF_SRSZ_PHASE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000050)
-#define RKISP1_CIF_SRSZ_PHASE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000054)
+#define RKISP1_CIF_RSZ_CTRL 0x0000
+#define RKISP1_CIF_RSZ_SCALE_HY 0x0004
+#define RKISP1_CIF_RSZ_SCALE_HCB 0x0008
+#define RKISP1_CIF_RSZ_SCALE_HCR 0x000C
+#define RKISP1_CIF_RSZ_SCALE_VY 0x0010
+#define RKISP1_CIF_RSZ_SCALE_VC 0x0014
+#define RKISP1_CIF_RSZ_PHASE_HY 0x0018
+#define RKISP1_CIF_RSZ_PHASE_HC 0x001C
+#define RKISP1_CIF_RSZ_PHASE_VY 0x0020
+#define RKISP1_CIF_RSZ_PHASE_VC 0x0024
+#define RKISP1_CIF_RSZ_SCALE_LUT_ADDR 0x0028
+#define RKISP1_CIF_RSZ_SCALE_LUT 0x002C
+#define RKISP1_CIF_RSZ_CTRL_SHD 0x0030
+#define RKISP1_CIF_RSZ_SCALE_HY_SHD 0x0034
+#define RKISP1_CIF_RSZ_SCALE_HCB_SHD 0x0038
+#define RKISP1_CIF_RSZ_SCALE_HCR_SHD 0x003C
+#define RKISP1_CIF_RSZ_SCALE_VY_SHD 0x0040
+#define RKISP1_CIF_RSZ_SCALE_VC_SHD 0x0044
+#define RKISP1_CIF_RSZ_PHASE_HY_SHD 0x0048
+#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
+#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
+#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
#define RKISP1_CIF_MI_BASE 0x00001400
#define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
index 65ce8d647118..d92a23bd2d51 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
@@ -59,30 +59,6 @@ struct rkisp1_rsz_config {
const int min_rsz_width;
const int min_rsz_height;
/* registers */
- struct {
- u32 ctrl;
- u32 ctrl_shd;
- u32 scale_hy;
- u32 scale_hcr;
- u32 scale_hcb;
- u32 scale_vy;
- u32 scale_vc;
- u32 scale_lut;
- u32 scale_lut_addr;
- u32 scale_hy_shd;
- u32 scale_hcr_shd;
- u32 scale_hcb_shd;
- u32 scale_vy_shd;
- u32 scale_vc_shd;
- u32 phase_hy;
- u32 phase_hc;
- u32 phase_vy;
- u32 phase_vc;
- u32 phase_hy_shd;
- u32 phase_hc_shd;
- u32 phase_vy_shd;
- u32 phase_vc_shd;
- } rsz;
struct {
u32 ctrl;
u32 yuvmode_mask;
@@ -101,30 +77,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
.min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
.min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
/* registers */
- .rsz = {
- .ctrl = RKISP1_CIF_MRSZ_CTRL,
- .scale_hy = RKISP1_CIF_MRSZ_SCALE_HY,
- .scale_hcr = RKISP1_CIF_MRSZ_SCALE_HCR,
- .scale_hcb = RKISP1_CIF_MRSZ_SCALE_HCB,
- .scale_vy = RKISP1_CIF_MRSZ_SCALE_VY,
- .scale_vc = RKISP1_CIF_MRSZ_SCALE_VC,
- .scale_lut = RKISP1_CIF_MRSZ_SCALE_LUT,
- .scale_lut_addr = RKISP1_CIF_MRSZ_SCALE_LUT_ADDR,
- .scale_hy_shd = RKISP1_CIF_MRSZ_SCALE_HY_SHD,
- .scale_hcr_shd = RKISP1_CIF_MRSZ_SCALE_HCR_SHD,
- .scale_hcb_shd = RKISP1_CIF_MRSZ_SCALE_HCB_SHD,
- .scale_vy_shd = RKISP1_CIF_MRSZ_SCALE_VY_SHD,
- .scale_vc_shd = RKISP1_CIF_MRSZ_SCALE_VC_SHD,
- .phase_hy = RKISP1_CIF_MRSZ_PHASE_HY,
- .phase_hc = RKISP1_CIF_MRSZ_PHASE_HC,
- .phase_vy = RKISP1_CIF_MRSZ_PHASE_VY,
- .phase_vc = RKISP1_CIF_MRSZ_PHASE_VC,
- .ctrl_shd = RKISP1_CIF_MRSZ_CTRL_SHD,
- .phase_hy_shd = RKISP1_CIF_MRSZ_PHASE_HY_SHD,
- .phase_hc_shd = RKISP1_CIF_MRSZ_PHASE_HC_SHD,
- .phase_vy_shd = RKISP1_CIF_MRSZ_PHASE_VY_SHD,
- .phase_vc_shd = RKISP1_CIF_MRSZ_PHASE_VC_SHD,
- },
.dual_crop = {
.ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
.yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
@@ -143,30 +95,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
.min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
.min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
/* registers */
- .rsz = {
- .ctrl = RKISP1_CIF_SRSZ_CTRL,
- .scale_hy = RKISP1_CIF_SRSZ_SCALE_HY,
- .scale_hcr = RKISP1_CIF_SRSZ_SCALE_HCR,
- .scale_hcb = RKISP1_CIF_SRSZ_SCALE_HCB,
- .scale_vy = RKISP1_CIF_SRSZ_SCALE_VY,
- .scale_vc = RKISP1_CIF_SRSZ_SCALE_VC,
- .scale_lut = RKISP1_CIF_SRSZ_SCALE_LUT,
- .scale_lut_addr = RKISP1_CIF_SRSZ_SCALE_LUT_ADDR,
- .scale_hy_shd = RKISP1_CIF_SRSZ_SCALE_HY_SHD,
- .scale_hcr_shd = RKISP1_CIF_SRSZ_SCALE_HCR_SHD,
- .scale_hcb_shd = RKISP1_CIF_SRSZ_SCALE_HCB_SHD,
- .scale_vy_shd = RKISP1_CIF_SRSZ_SCALE_VY_SHD,
- .scale_vc_shd = RKISP1_CIF_SRSZ_SCALE_VC_SHD,
- .phase_hy = RKISP1_CIF_SRSZ_PHASE_HY,
- .phase_hc = RKISP1_CIF_SRSZ_PHASE_HC,
- .phase_vy = RKISP1_CIF_SRSZ_PHASE_VY,
- .phase_vc = RKISP1_CIF_SRSZ_PHASE_VC,
- .ctrl_shd = RKISP1_CIF_SRSZ_CTRL_SHD,
- .phase_hy_shd = RKISP1_CIF_SRSZ_PHASE_HY_SHD,
- .phase_hc_shd = RKISP1_CIF_SRSZ_PHASE_HC_SHD,
- .phase_vy_shd = RKISP1_CIF_SRSZ_PHASE_VY_SHD,
- .phase_vc_shd = RKISP1_CIF_SRSZ_PHASE_VC_SHD,
- },
.dual_crop = {
.ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
.yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
@@ -178,6 +106,17 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
},
};
+static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
+{
+ return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
+}
+
+static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
+ u32 value)
+{
+ rkisp1_write(rsz->rkisp1, value, rsz->regs_base + offset);
+}
+
static struct v4l2_mbus_framefmt *
rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz,
struct v4l2_subdev_state *sd_state,
@@ -277,39 +216,39 @@ static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
"RSZ_PHASE_HC %d/%d\n"
"RSZ_PHASE_VY %d/%d\n"
"RSZ_PHASE_VC %d/%d\n",
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy_shd),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc),
- rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc_shd));
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
+ rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
}
static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
- u32 ctrl_cfg = rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl);
+ u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
if (when == RKISP1_SHADOW_REGS_ASYNC)
ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
else
ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
- rkisp1_write(rsz->rkisp1, ctrl_cfg, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
}
static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
@@ -325,7 +264,7 @@ static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
- rkisp1_write(rsz->rkisp1, 0, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
if (when == RKISP1_SHADOW_REGS_SYNC)
rkisp1_rsz_update_shadow(rsz, when);
@@ -338,20 +277,19 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
struct v4l2_rect *src_c,
enum rkisp1_shadow_regs_when when)
{
- struct rkisp1_device *rkisp1 = rsz->rkisp1;
u32 ratio, rsz_ctrl = 0;
unsigned int i;
/* No phase offset */
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hy);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hc);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vy);
- rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vc);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
/* Linear interpolation */
for (i = 0; i < 64; i++) {
- rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut_addr);
- rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
}
if (sink_y->width != src_y->width) {
@@ -359,7 +297,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_y->width < src_y->width)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hy);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
}
if (sink_c->width != src_c->width) {
@@ -367,8 +305,8 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_c->width < src_c->width)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcb);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcr);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
}
if (sink_y->height != src_y->height) {
@@ -376,7 +314,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_y->height < src_y->height)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vy);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
}
if (sink_c->height != src_c->height) {
@@ -384,10 +322,10 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
if (sink_c->height < src_c->height)
rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
- rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vc);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
}
- rkisp1_write(rkisp1, rsz_ctrl, rsz->config->rsz.ctrl);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
rkisp1_rsz_update_shadow(rsz, when);
}
@@ -803,10 +741,13 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
struct v4l2_subdev *sd = &rsz->sd;
int ret;
- if (rsz->id == RKISP1_SELFPATH)
+ if (rsz->id == RKISP1_SELFPATH) {
+ rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
rsz->config = &rkisp1_rsz_config_sp;
- else
+ } else {
+ rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
rsz->config = &rkisp1_rsz_config_mp;
+ }
v4l2_subdev_init(sd, &rkisp1_rsz_ops);
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread* Re: [PATCH v1.1 10/16] media: rkisp1: resizer: Simplify register access
2022-02-27 16:10 ` Laurent Pinchart
@ 2022-03-03 6:32 ` Dafna Hirschfeld
-1 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-03 6:32 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:10, Laurent Pinchart wrote:
> The registers for the mainpath and selfpath resizers are located at the
> same offset from the instance-specific base. Use this to simplify
> register access, removing the need to store per-register offsets in the
> rkisp1_rsz_config structure.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> Changes since v1:
>
> - Fix order of arguments to write function
> ---
> .../platform/rockchip/rkisp1/rkisp1-common.h | 2 +
> .../platform/rockchip/rkisp1/rkisp1-regs.h | 67 +++-----
> .../platform/rockchip/rkisp1/rkisp1-resizer.c | 161 ++++++------------
> 3 files changed, 75 insertions(+), 155 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> index d8fa3f1a5a85..64ad7452eb6b 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> @@ -313,6 +313,7 @@ struct rkisp1_params {
> * struct rkisp1_resizer - Resizer subdev
> *
> * @sd: v4l2_subdev variable
> + * @regs_base: base register address offset
> * @id: id of the resizer, one of RKISP1_SELFPATH, RKISP1_MAINPATH
> * @rkisp1: pointer to the rkisp1 device
> * @pads: media pads
> @@ -323,6 +324,7 @@ struct rkisp1_params {
> */
> struct rkisp1_resizer {
> struct v4l2_subdev sd;
> + u32 regs_base;
> enum rkisp1_stream_id id;
> struct rkisp1_device *rkisp1;
> struct media_pad pads[RKISP1_RSZ_PAD_MAX];
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> index 4e2b73227e61..083d92ada73f 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> @@ -905,52 +905,29 @@
> #define RKISP1_CIF_DUAL_CROP_S_V_SIZE_SHD (RKISP1_CIF_DUAL_CROP_BASE + 0x00000040)
>
> #define RKISP1_CIF_MRSZ_BASE 0x00000C00
> -#define RKISP1_CIF_MRSZ_CTRL (RKISP1_CIF_MRSZ_BASE + 0x00000000)
> -#define RKISP1_CIF_MRSZ_SCALE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000004)
> -#define RKISP1_CIF_MRSZ_SCALE_HCB (RKISP1_CIF_MRSZ_BASE + 0x00000008)
> -#define RKISP1_CIF_MRSZ_SCALE_HCR (RKISP1_CIF_MRSZ_BASE + 0x0000000C)
> -#define RKISP1_CIF_MRSZ_SCALE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000010)
> -#define RKISP1_CIF_MRSZ_SCALE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000014)
> -#define RKISP1_CIF_MRSZ_PHASE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000018)
> -#define RKISP1_CIF_MRSZ_PHASE_HC (RKISP1_CIF_MRSZ_BASE + 0x0000001C)
> -#define RKISP1_CIF_MRSZ_PHASE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000020)
> -#define RKISP1_CIF_MRSZ_PHASE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000024)
> -#define RKISP1_CIF_MRSZ_SCALE_LUT_ADDR (RKISP1_CIF_MRSZ_BASE + 0x00000028)
> -#define RKISP1_CIF_MRSZ_SCALE_LUT (RKISP1_CIF_MRSZ_BASE + 0x0000002C)
> -#define RKISP1_CIF_MRSZ_CTRL_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000030)
> -#define RKISP1_CIF_MRSZ_SCALE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000034)
> -#define RKISP1_CIF_MRSZ_SCALE_HCB_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000038)
> -#define RKISP1_CIF_MRSZ_SCALE_HCR_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000003C)
> -#define RKISP1_CIF_MRSZ_SCALE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000040)
> -#define RKISP1_CIF_MRSZ_SCALE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000044)
> -#define RKISP1_CIF_MRSZ_PHASE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000048)
> -#define RKISP1_CIF_MRSZ_PHASE_HC_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000004C)
> -#define RKISP1_CIF_MRSZ_PHASE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000050)
> -#define RKISP1_CIF_MRSZ_PHASE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000054)
> -
> #define RKISP1_CIF_SRSZ_BASE 0x00001000
> -#define RKISP1_CIF_SRSZ_CTRL (RKISP1_CIF_SRSZ_BASE + 0x00000000)
> -#define RKISP1_CIF_SRSZ_SCALE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000004)
> -#define RKISP1_CIF_SRSZ_SCALE_HCB (RKISP1_CIF_SRSZ_BASE + 0x00000008)
> -#define RKISP1_CIF_SRSZ_SCALE_HCR (RKISP1_CIF_SRSZ_BASE + 0x0000000C)
> -#define RKISP1_CIF_SRSZ_SCALE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000010)
> -#define RKISP1_CIF_SRSZ_SCALE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000014)
> -#define RKISP1_CIF_SRSZ_PHASE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000018)
> -#define RKISP1_CIF_SRSZ_PHASE_HC (RKISP1_CIF_SRSZ_BASE + 0x0000001C)
> -#define RKISP1_CIF_SRSZ_PHASE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000020)
> -#define RKISP1_CIF_SRSZ_PHASE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000024)
> -#define RKISP1_CIF_SRSZ_SCALE_LUT_ADDR (RKISP1_CIF_SRSZ_BASE + 0x00000028)
> -#define RKISP1_CIF_SRSZ_SCALE_LUT (RKISP1_CIF_SRSZ_BASE + 0x0000002C)
> -#define RKISP1_CIF_SRSZ_CTRL_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000030)
> -#define RKISP1_CIF_SRSZ_SCALE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000034)
> -#define RKISP1_CIF_SRSZ_SCALE_HCB_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000038)
> -#define RKISP1_CIF_SRSZ_SCALE_HCR_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000003C)
> -#define RKISP1_CIF_SRSZ_SCALE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000040)
> -#define RKISP1_CIF_SRSZ_SCALE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000044)
> -#define RKISP1_CIF_SRSZ_PHASE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000048)
> -#define RKISP1_CIF_SRSZ_PHASE_HC_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000004C)
> -#define RKISP1_CIF_SRSZ_PHASE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000050)
> -#define RKISP1_CIF_SRSZ_PHASE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000054)
> +#define RKISP1_CIF_RSZ_CTRL 0x0000
> +#define RKISP1_CIF_RSZ_SCALE_HY 0x0004
> +#define RKISP1_CIF_RSZ_SCALE_HCB 0x0008
> +#define RKISP1_CIF_RSZ_SCALE_HCR 0x000C
> +#define RKISP1_CIF_RSZ_SCALE_VY 0x0010
> +#define RKISP1_CIF_RSZ_SCALE_VC 0x0014
> +#define RKISP1_CIF_RSZ_PHASE_HY 0x0018
> +#define RKISP1_CIF_RSZ_PHASE_HC 0x001C
> +#define RKISP1_CIF_RSZ_PHASE_VY 0x0020
> +#define RKISP1_CIF_RSZ_PHASE_VC 0x0024
> +#define RKISP1_CIF_RSZ_SCALE_LUT_ADDR 0x0028
> +#define RKISP1_CIF_RSZ_SCALE_LUT 0x002C
> +#define RKISP1_CIF_RSZ_CTRL_SHD 0x0030
> +#define RKISP1_CIF_RSZ_SCALE_HY_SHD 0x0034
> +#define RKISP1_CIF_RSZ_SCALE_HCB_SHD 0x0038
> +#define RKISP1_CIF_RSZ_SCALE_HCR_SHD 0x003C
> +#define RKISP1_CIF_RSZ_SCALE_VY_SHD 0x0040
> +#define RKISP1_CIF_RSZ_SCALE_VC_SHD 0x0044
> +#define RKISP1_CIF_RSZ_PHASE_HY_SHD 0x0048
> +#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
> +#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
> +#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
>
> #define RKISP1_CIF_MI_BASE 0x00001400
> #define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> index 65ce8d647118..d92a23bd2d51 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> @@ -59,30 +59,6 @@ struct rkisp1_rsz_config {
> const int min_rsz_width;
> const int min_rsz_height;
> /* registers */
> - struct {
> - u32 ctrl;
> - u32 ctrl_shd;
> - u32 scale_hy;
> - u32 scale_hcr;
> - u32 scale_hcb;
> - u32 scale_vy;
> - u32 scale_vc;
> - u32 scale_lut;
> - u32 scale_lut_addr;
> - u32 scale_hy_shd;
> - u32 scale_hcr_shd;
> - u32 scale_hcb_shd;
> - u32 scale_vy_shd;
> - u32 scale_vc_shd;
> - u32 phase_hy;
> - u32 phase_hc;
> - u32 phase_vy;
> - u32 phase_vc;
> - u32 phase_hy_shd;
> - u32 phase_hc_shd;
> - u32 phase_vy_shd;
> - u32 phase_vc_shd;
> - } rsz;
> struct {
> u32 ctrl;
> u32 yuvmode_mask;
> @@ -101,30 +77,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
> .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> /* registers */
> - .rsz = {
> - .ctrl = RKISP1_CIF_MRSZ_CTRL,
> - .scale_hy = RKISP1_CIF_MRSZ_SCALE_HY,
> - .scale_hcr = RKISP1_CIF_MRSZ_SCALE_HCR,
> - .scale_hcb = RKISP1_CIF_MRSZ_SCALE_HCB,
> - .scale_vy = RKISP1_CIF_MRSZ_SCALE_VY,
> - .scale_vc = RKISP1_CIF_MRSZ_SCALE_VC,
> - .scale_lut = RKISP1_CIF_MRSZ_SCALE_LUT,
> - .scale_lut_addr = RKISP1_CIF_MRSZ_SCALE_LUT_ADDR,
> - .scale_hy_shd = RKISP1_CIF_MRSZ_SCALE_HY_SHD,
> - .scale_hcr_shd = RKISP1_CIF_MRSZ_SCALE_HCR_SHD,
> - .scale_hcb_shd = RKISP1_CIF_MRSZ_SCALE_HCB_SHD,
> - .scale_vy_shd = RKISP1_CIF_MRSZ_SCALE_VY_SHD,
> - .scale_vc_shd = RKISP1_CIF_MRSZ_SCALE_VC_SHD,
> - .phase_hy = RKISP1_CIF_MRSZ_PHASE_HY,
> - .phase_hc = RKISP1_CIF_MRSZ_PHASE_HC,
> - .phase_vy = RKISP1_CIF_MRSZ_PHASE_VY,
> - .phase_vc = RKISP1_CIF_MRSZ_PHASE_VC,
> - .ctrl_shd = RKISP1_CIF_MRSZ_CTRL_SHD,
> - .phase_hy_shd = RKISP1_CIF_MRSZ_PHASE_HY_SHD,
> - .phase_hc_shd = RKISP1_CIF_MRSZ_PHASE_HC_SHD,
> - .phase_vy_shd = RKISP1_CIF_MRSZ_PHASE_VY_SHD,
> - .phase_vc_shd = RKISP1_CIF_MRSZ_PHASE_VC_SHD,
> - },
> .dual_crop = {
> .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> .yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
> @@ -143,30 +95,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> /* registers */
> - .rsz = {
> - .ctrl = RKISP1_CIF_SRSZ_CTRL,
> - .scale_hy = RKISP1_CIF_SRSZ_SCALE_HY,
> - .scale_hcr = RKISP1_CIF_SRSZ_SCALE_HCR,
> - .scale_hcb = RKISP1_CIF_SRSZ_SCALE_HCB,
> - .scale_vy = RKISP1_CIF_SRSZ_SCALE_VY,
> - .scale_vc = RKISP1_CIF_SRSZ_SCALE_VC,
> - .scale_lut = RKISP1_CIF_SRSZ_SCALE_LUT,
> - .scale_lut_addr = RKISP1_CIF_SRSZ_SCALE_LUT_ADDR,
> - .scale_hy_shd = RKISP1_CIF_SRSZ_SCALE_HY_SHD,
> - .scale_hcr_shd = RKISP1_CIF_SRSZ_SCALE_HCR_SHD,
> - .scale_hcb_shd = RKISP1_CIF_SRSZ_SCALE_HCB_SHD,
> - .scale_vy_shd = RKISP1_CIF_SRSZ_SCALE_VY_SHD,
> - .scale_vc_shd = RKISP1_CIF_SRSZ_SCALE_VC_SHD,
> - .phase_hy = RKISP1_CIF_SRSZ_PHASE_HY,
> - .phase_hc = RKISP1_CIF_SRSZ_PHASE_HC,
> - .phase_vy = RKISP1_CIF_SRSZ_PHASE_VY,
> - .phase_vc = RKISP1_CIF_SRSZ_PHASE_VC,
> - .ctrl_shd = RKISP1_CIF_SRSZ_CTRL_SHD,
> - .phase_hy_shd = RKISP1_CIF_SRSZ_PHASE_HY_SHD,
> - .phase_hc_shd = RKISP1_CIF_SRSZ_PHASE_HC_SHD,
> - .phase_vy_shd = RKISP1_CIF_SRSZ_PHASE_VY_SHD,
> - .phase_vc_shd = RKISP1_CIF_SRSZ_PHASE_VC_SHD,
> - },
> .dual_crop = {
> .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> .yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
> @@ -178,6 +106,17 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> },
> };
>
> +static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
> +{
> + return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
> +}
> +
> +static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
> + u32 value)
> +{
> + rkisp1_write(rsz->rkisp1, value, rsz->regs_base + offset);
> +}
I'd keep the order of params the same as rkisp1_write, or change the order
of params in rkisp1_write to the be the same as rkisp1_rsz_write, otherwise
it's confusing.
thanks,
Dafna
> +
> static struct v4l2_mbus_framefmt *
> rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz,
> struct v4l2_subdev_state *sd_state,
> @@ -277,39 +216,39 @@ static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
> "RSZ_PHASE_HC %d/%d\n"
> "RSZ_PHASE_VY %d/%d\n"
> "RSZ_PHASE_VC %d/%d\n",
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc_shd));
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
> }
>
> static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
> enum rkisp1_shadow_regs_when when)
> {
> - u32 ctrl_cfg = rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl);
> + u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
>
> if (when == RKISP1_SHADOW_REGS_ASYNC)
> ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
> else
> ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
>
> - rkisp1_write(rsz->rkisp1, ctrl_cfg, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
> }
>
> static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> @@ -325,7 +264,7 @@ static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
> enum rkisp1_shadow_regs_when when)
> {
> - rkisp1_write(rsz->rkisp1, 0, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
>
> if (when == RKISP1_SHADOW_REGS_SYNC)
> rkisp1_rsz_update_shadow(rsz, when);
> @@ -338,20 +277,19 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> struct v4l2_rect *src_c,
> enum rkisp1_shadow_regs_when when)
> {
> - struct rkisp1_device *rkisp1 = rsz->rkisp1;
> u32 ratio, rsz_ctrl = 0;
> unsigned int i;
>
> /* No phase offset */
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hy);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hc);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vy);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vc);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
>
> /* Linear interpolation */
> for (i = 0; i < 64; i++) {
> - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut_addr);
> - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
> }
>
> if (sink_y->width != src_y->width) {
> @@ -359,7 +297,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_y->width < src_y->width)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hy);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
> }
>
> if (sink_c->width != src_c->width) {
> @@ -367,8 +305,8 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_c->width < src_c->width)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcb);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcr);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
> }
>
> if (sink_y->height != src_y->height) {
> @@ -376,7 +314,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_y->height < src_y->height)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vy);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
> }
>
> if (sink_c->height != src_c->height) {
> @@ -384,10 +322,10 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_c->height < src_c->height)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vc);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
> }
>
> - rkisp1_write(rkisp1, rsz_ctrl, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
>
> rkisp1_rsz_update_shadow(rsz, when);
> }
> @@ -803,10 +741,13 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
> struct v4l2_subdev *sd = &rsz->sd;
> int ret;
>
> - if (rsz->id == RKISP1_SELFPATH)
> + if (rsz->id == RKISP1_SELFPATH) {
> + rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
> rsz->config = &rkisp1_rsz_config_sp;
> - else
> + } else {
> + rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
> rsz->config = &rkisp1_rsz_config_mp;
> + }
>
> v4l2_subdev_init(sd, &rkisp1_rsz_ops);
> sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
> --
> Regards,
>
> Laurent Pinchart
>
^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH v1.1 10/16] media: rkisp1: resizer: Simplify register access
@ 2022-03-03 6:32 ` Dafna Hirschfeld
0 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-03 6:32 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:10, Laurent Pinchart wrote:
> The registers for the mainpath and selfpath resizers are located at the
> same offset from the instance-specific base. Use this to simplify
> register access, removing the need to store per-register offsets in the
> rkisp1_rsz_config structure.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> Changes since v1:
>
> - Fix order of arguments to write function
> ---
> .../platform/rockchip/rkisp1/rkisp1-common.h | 2 +
> .../platform/rockchip/rkisp1/rkisp1-regs.h | 67 +++-----
> .../platform/rockchip/rkisp1/rkisp1-resizer.c | 161 ++++++------------
> 3 files changed, 75 insertions(+), 155 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> index d8fa3f1a5a85..64ad7452eb6b 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> @@ -313,6 +313,7 @@ struct rkisp1_params {
> * struct rkisp1_resizer - Resizer subdev
> *
> * @sd: v4l2_subdev variable
> + * @regs_base: base register address offset
> * @id: id of the resizer, one of RKISP1_SELFPATH, RKISP1_MAINPATH
> * @rkisp1: pointer to the rkisp1 device
> * @pads: media pads
> @@ -323,6 +324,7 @@ struct rkisp1_params {
> */
> struct rkisp1_resizer {
> struct v4l2_subdev sd;
> + u32 regs_base;
> enum rkisp1_stream_id id;
> struct rkisp1_device *rkisp1;
> struct media_pad pads[RKISP1_RSZ_PAD_MAX];
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> index 4e2b73227e61..083d92ada73f 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> @@ -905,52 +905,29 @@
> #define RKISP1_CIF_DUAL_CROP_S_V_SIZE_SHD (RKISP1_CIF_DUAL_CROP_BASE + 0x00000040)
>
> #define RKISP1_CIF_MRSZ_BASE 0x00000C00
> -#define RKISP1_CIF_MRSZ_CTRL (RKISP1_CIF_MRSZ_BASE + 0x00000000)
> -#define RKISP1_CIF_MRSZ_SCALE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000004)
> -#define RKISP1_CIF_MRSZ_SCALE_HCB (RKISP1_CIF_MRSZ_BASE + 0x00000008)
> -#define RKISP1_CIF_MRSZ_SCALE_HCR (RKISP1_CIF_MRSZ_BASE + 0x0000000C)
> -#define RKISP1_CIF_MRSZ_SCALE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000010)
> -#define RKISP1_CIF_MRSZ_SCALE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000014)
> -#define RKISP1_CIF_MRSZ_PHASE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000018)
> -#define RKISP1_CIF_MRSZ_PHASE_HC (RKISP1_CIF_MRSZ_BASE + 0x0000001C)
> -#define RKISP1_CIF_MRSZ_PHASE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000020)
> -#define RKISP1_CIF_MRSZ_PHASE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000024)
> -#define RKISP1_CIF_MRSZ_SCALE_LUT_ADDR (RKISP1_CIF_MRSZ_BASE + 0x00000028)
> -#define RKISP1_CIF_MRSZ_SCALE_LUT (RKISP1_CIF_MRSZ_BASE + 0x0000002C)
> -#define RKISP1_CIF_MRSZ_CTRL_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000030)
> -#define RKISP1_CIF_MRSZ_SCALE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000034)
> -#define RKISP1_CIF_MRSZ_SCALE_HCB_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000038)
> -#define RKISP1_CIF_MRSZ_SCALE_HCR_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000003C)
> -#define RKISP1_CIF_MRSZ_SCALE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000040)
> -#define RKISP1_CIF_MRSZ_SCALE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000044)
> -#define RKISP1_CIF_MRSZ_PHASE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000048)
> -#define RKISP1_CIF_MRSZ_PHASE_HC_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000004C)
> -#define RKISP1_CIF_MRSZ_PHASE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000050)
> -#define RKISP1_CIF_MRSZ_PHASE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000054)
> -
> #define RKISP1_CIF_SRSZ_BASE 0x00001000
> -#define RKISP1_CIF_SRSZ_CTRL (RKISP1_CIF_SRSZ_BASE + 0x00000000)
> -#define RKISP1_CIF_SRSZ_SCALE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000004)
> -#define RKISP1_CIF_SRSZ_SCALE_HCB (RKISP1_CIF_SRSZ_BASE + 0x00000008)
> -#define RKISP1_CIF_SRSZ_SCALE_HCR (RKISP1_CIF_SRSZ_BASE + 0x0000000C)
> -#define RKISP1_CIF_SRSZ_SCALE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000010)
> -#define RKISP1_CIF_SRSZ_SCALE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000014)
> -#define RKISP1_CIF_SRSZ_PHASE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000018)
> -#define RKISP1_CIF_SRSZ_PHASE_HC (RKISP1_CIF_SRSZ_BASE + 0x0000001C)
> -#define RKISP1_CIF_SRSZ_PHASE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000020)
> -#define RKISP1_CIF_SRSZ_PHASE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000024)
> -#define RKISP1_CIF_SRSZ_SCALE_LUT_ADDR (RKISP1_CIF_SRSZ_BASE + 0x00000028)
> -#define RKISP1_CIF_SRSZ_SCALE_LUT (RKISP1_CIF_SRSZ_BASE + 0x0000002C)
> -#define RKISP1_CIF_SRSZ_CTRL_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000030)
> -#define RKISP1_CIF_SRSZ_SCALE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000034)
> -#define RKISP1_CIF_SRSZ_SCALE_HCB_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000038)
> -#define RKISP1_CIF_SRSZ_SCALE_HCR_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000003C)
> -#define RKISP1_CIF_SRSZ_SCALE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000040)
> -#define RKISP1_CIF_SRSZ_SCALE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000044)
> -#define RKISP1_CIF_SRSZ_PHASE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000048)
> -#define RKISP1_CIF_SRSZ_PHASE_HC_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000004C)
> -#define RKISP1_CIF_SRSZ_PHASE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000050)
> -#define RKISP1_CIF_SRSZ_PHASE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000054)
> +#define RKISP1_CIF_RSZ_CTRL 0x0000
> +#define RKISP1_CIF_RSZ_SCALE_HY 0x0004
> +#define RKISP1_CIF_RSZ_SCALE_HCB 0x0008
> +#define RKISP1_CIF_RSZ_SCALE_HCR 0x000C
> +#define RKISP1_CIF_RSZ_SCALE_VY 0x0010
> +#define RKISP1_CIF_RSZ_SCALE_VC 0x0014
> +#define RKISP1_CIF_RSZ_PHASE_HY 0x0018
> +#define RKISP1_CIF_RSZ_PHASE_HC 0x001C
> +#define RKISP1_CIF_RSZ_PHASE_VY 0x0020
> +#define RKISP1_CIF_RSZ_PHASE_VC 0x0024
> +#define RKISP1_CIF_RSZ_SCALE_LUT_ADDR 0x0028
> +#define RKISP1_CIF_RSZ_SCALE_LUT 0x002C
> +#define RKISP1_CIF_RSZ_CTRL_SHD 0x0030
> +#define RKISP1_CIF_RSZ_SCALE_HY_SHD 0x0034
> +#define RKISP1_CIF_RSZ_SCALE_HCB_SHD 0x0038
> +#define RKISP1_CIF_RSZ_SCALE_HCR_SHD 0x003C
> +#define RKISP1_CIF_RSZ_SCALE_VY_SHD 0x0040
> +#define RKISP1_CIF_RSZ_SCALE_VC_SHD 0x0044
> +#define RKISP1_CIF_RSZ_PHASE_HY_SHD 0x0048
> +#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
> +#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
> +#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
>
> #define RKISP1_CIF_MI_BASE 0x00001400
> #define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> index 65ce8d647118..d92a23bd2d51 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> @@ -59,30 +59,6 @@ struct rkisp1_rsz_config {
> const int min_rsz_width;
> const int min_rsz_height;
> /* registers */
> - struct {
> - u32 ctrl;
> - u32 ctrl_shd;
> - u32 scale_hy;
> - u32 scale_hcr;
> - u32 scale_hcb;
> - u32 scale_vy;
> - u32 scale_vc;
> - u32 scale_lut;
> - u32 scale_lut_addr;
> - u32 scale_hy_shd;
> - u32 scale_hcr_shd;
> - u32 scale_hcb_shd;
> - u32 scale_vy_shd;
> - u32 scale_vc_shd;
> - u32 phase_hy;
> - u32 phase_hc;
> - u32 phase_vy;
> - u32 phase_vc;
> - u32 phase_hy_shd;
> - u32 phase_hc_shd;
> - u32 phase_vy_shd;
> - u32 phase_vc_shd;
> - } rsz;
> struct {
> u32 ctrl;
> u32 yuvmode_mask;
> @@ -101,30 +77,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
> .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> /* registers */
> - .rsz = {
> - .ctrl = RKISP1_CIF_MRSZ_CTRL,
> - .scale_hy = RKISP1_CIF_MRSZ_SCALE_HY,
> - .scale_hcr = RKISP1_CIF_MRSZ_SCALE_HCR,
> - .scale_hcb = RKISP1_CIF_MRSZ_SCALE_HCB,
> - .scale_vy = RKISP1_CIF_MRSZ_SCALE_VY,
> - .scale_vc = RKISP1_CIF_MRSZ_SCALE_VC,
> - .scale_lut = RKISP1_CIF_MRSZ_SCALE_LUT,
> - .scale_lut_addr = RKISP1_CIF_MRSZ_SCALE_LUT_ADDR,
> - .scale_hy_shd = RKISP1_CIF_MRSZ_SCALE_HY_SHD,
> - .scale_hcr_shd = RKISP1_CIF_MRSZ_SCALE_HCR_SHD,
> - .scale_hcb_shd = RKISP1_CIF_MRSZ_SCALE_HCB_SHD,
> - .scale_vy_shd = RKISP1_CIF_MRSZ_SCALE_VY_SHD,
> - .scale_vc_shd = RKISP1_CIF_MRSZ_SCALE_VC_SHD,
> - .phase_hy = RKISP1_CIF_MRSZ_PHASE_HY,
> - .phase_hc = RKISP1_CIF_MRSZ_PHASE_HC,
> - .phase_vy = RKISP1_CIF_MRSZ_PHASE_VY,
> - .phase_vc = RKISP1_CIF_MRSZ_PHASE_VC,
> - .ctrl_shd = RKISP1_CIF_MRSZ_CTRL_SHD,
> - .phase_hy_shd = RKISP1_CIF_MRSZ_PHASE_HY_SHD,
> - .phase_hc_shd = RKISP1_CIF_MRSZ_PHASE_HC_SHD,
> - .phase_vy_shd = RKISP1_CIF_MRSZ_PHASE_VY_SHD,
> - .phase_vc_shd = RKISP1_CIF_MRSZ_PHASE_VC_SHD,
> - },
> .dual_crop = {
> .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> .yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
> @@ -143,30 +95,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> /* registers */
> - .rsz = {
> - .ctrl = RKISP1_CIF_SRSZ_CTRL,
> - .scale_hy = RKISP1_CIF_SRSZ_SCALE_HY,
> - .scale_hcr = RKISP1_CIF_SRSZ_SCALE_HCR,
> - .scale_hcb = RKISP1_CIF_SRSZ_SCALE_HCB,
> - .scale_vy = RKISP1_CIF_SRSZ_SCALE_VY,
> - .scale_vc = RKISP1_CIF_SRSZ_SCALE_VC,
> - .scale_lut = RKISP1_CIF_SRSZ_SCALE_LUT,
> - .scale_lut_addr = RKISP1_CIF_SRSZ_SCALE_LUT_ADDR,
> - .scale_hy_shd = RKISP1_CIF_SRSZ_SCALE_HY_SHD,
> - .scale_hcr_shd = RKISP1_CIF_SRSZ_SCALE_HCR_SHD,
> - .scale_hcb_shd = RKISP1_CIF_SRSZ_SCALE_HCB_SHD,
> - .scale_vy_shd = RKISP1_CIF_SRSZ_SCALE_VY_SHD,
> - .scale_vc_shd = RKISP1_CIF_SRSZ_SCALE_VC_SHD,
> - .phase_hy = RKISP1_CIF_SRSZ_PHASE_HY,
> - .phase_hc = RKISP1_CIF_SRSZ_PHASE_HC,
> - .phase_vy = RKISP1_CIF_SRSZ_PHASE_VY,
> - .phase_vc = RKISP1_CIF_SRSZ_PHASE_VC,
> - .ctrl_shd = RKISP1_CIF_SRSZ_CTRL_SHD,
> - .phase_hy_shd = RKISP1_CIF_SRSZ_PHASE_HY_SHD,
> - .phase_hc_shd = RKISP1_CIF_SRSZ_PHASE_HC_SHD,
> - .phase_vy_shd = RKISP1_CIF_SRSZ_PHASE_VY_SHD,
> - .phase_vc_shd = RKISP1_CIF_SRSZ_PHASE_VC_SHD,
> - },
> .dual_crop = {
> .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> .yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
> @@ -178,6 +106,17 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> },
> };
>
> +static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
> +{
> + return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
> +}
> +
> +static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
> + u32 value)
> +{
> + rkisp1_write(rsz->rkisp1, value, rsz->regs_base + offset);
> +}
I'd keep the order of params the same as rkisp1_write, or change the order
of params in rkisp1_write to the be the same as rkisp1_rsz_write, otherwise
it's confusing.
thanks,
Dafna
> +
> static struct v4l2_mbus_framefmt *
> rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz,
> struct v4l2_subdev_state *sd_state,
> @@ -277,39 +216,39 @@ static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
> "RSZ_PHASE_HC %d/%d\n"
> "RSZ_PHASE_VY %d/%d\n"
> "RSZ_PHASE_VC %d/%d\n",
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc_shd));
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
> }
>
> static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
> enum rkisp1_shadow_regs_when when)
> {
> - u32 ctrl_cfg = rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl);
> + u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
>
> if (when == RKISP1_SHADOW_REGS_ASYNC)
> ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
> else
> ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
>
> - rkisp1_write(rsz->rkisp1, ctrl_cfg, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
> }
>
> static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> @@ -325,7 +264,7 @@ static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
> enum rkisp1_shadow_regs_when when)
> {
> - rkisp1_write(rsz->rkisp1, 0, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
>
> if (when == RKISP1_SHADOW_REGS_SYNC)
> rkisp1_rsz_update_shadow(rsz, when);
> @@ -338,20 +277,19 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> struct v4l2_rect *src_c,
> enum rkisp1_shadow_regs_when when)
> {
> - struct rkisp1_device *rkisp1 = rsz->rkisp1;
> u32 ratio, rsz_ctrl = 0;
> unsigned int i;
>
> /* No phase offset */
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hy);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hc);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vy);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vc);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
>
> /* Linear interpolation */
> for (i = 0; i < 64; i++) {
> - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut_addr);
> - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
> }
>
> if (sink_y->width != src_y->width) {
> @@ -359,7 +297,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_y->width < src_y->width)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hy);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
> }
>
> if (sink_c->width != src_c->width) {
> @@ -367,8 +305,8 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_c->width < src_c->width)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcb);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcr);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
> }
>
> if (sink_y->height != src_y->height) {
> @@ -376,7 +314,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_y->height < src_y->height)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vy);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
> }
>
> if (sink_c->height != src_c->height) {
> @@ -384,10 +322,10 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_c->height < src_c->height)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vc);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
> }
>
> - rkisp1_write(rkisp1, rsz_ctrl, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
>
> rkisp1_rsz_update_shadow(rsz, when);
> }
> @@ -803,10 +741,13 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
> struct v4l2_subdev *sd = &rsz->sd;
> int ret;
>
> - if (rsz->id == RKISP1_SELFPATH)
> + if (rsz->id == RKISP1_SELFPATH) {
> + rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
> rsz->config = &rkisp1_rsz_config_sp;
> - else
> + } else {
> + rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
> rsz->config = &rkisp1_rsz_config_mp;
> + }
>
> v4l2_subdev_init(sd, &rkisp1_rsz_ops);
> sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
> --
> Regards,
>
> Laurent Pinchart
>
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^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH v1.1 10/16] media: rkisp1: resizer: Simplify register access
2022-03-03 6:32 ` Dafna Hirschfeld
@ 2022-03-03 8:21 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-03-03 8:21 UTC (permalink / raw)
To: Dafna Hirschfeld
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
Hi Dafna,
On Thu, Mar 03, 2022 at 08:32:12AM +0200, Dafna Hirschfeld wrote:
> On 27.02.2022 18:10, Laurent Pinchart wrote:
> > The registers for the mainpath and selfpath resizers are located at the
> > same offset from the instance-specific base. Use this to simplify
> > register access, removing the need to store per-register offsets in the
> > rkisp1_rsz_config structure.
> >
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> > Changes since v1:
> >
> > - Fix order of arguments to write function
> > ---
> > .../platform/rockchip/rkisp1/rkisp1-common.h | 2 +
> > .../platform/rockchip/rkisp1/rkisp1-regs.h | 67 +++-----
> > .../platform/rockchip/rkisp1/rkisp1-resizer.c | 161 ++++++------------
> > 3 files changed, 75 insertions(+), 155 deletions(-)
> >
> > diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> > index d8fa3f1a5a85..64ad7452eb6b 100644
> > --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> > +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> > @@ -313,6 +313,7 @@ struct rkisp1_params {
> > * struct rkisp1_resizer - Resizer subdev
> > *
> > * @sd: v4l2_subdev variable
> > + * @regs_base: base register address offset
> > * @id: id of the resizer, one of RKISP1_SELFPATH, RKISP1_MAINPATH
> > * @rkisp1: pointer to the rkisp1 device
> > * @pads: media pads
> > @@ -323,6 +324,7 @@ struct rkisp1_params {
> > */
> > struct rkisp1_resizer {
> > struct v4l2_subdev sd;
> > + u32 regs_base;
> > enum rkisp1_stream_id id;
> > struct rkisp1_device *rkisp1;
> > struct media_pad pads[RKISP1_RSZ_PAD_MAX];
> > diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> > index 4e2b73227e61..083d92ada73f 100644
> > --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> > +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> > @@ -905,52 +905,29 @@
> > #define RKISP1_CIF_DUAL_CROP_S_V_SIZE_SHD (RKISP1_CIF_DUAL_CROP_BASE + 0x00000040)
> >
> > #define RKISP1_CIF_MRSZ_BASE 0x00000C00
> > -#define RKISP1_CIF_MRSZ_CTRL (RKISP1_CIF_MRSZ_BASE + 0x00000000)
> > -#define RKISP1_CIF_MRSZ_SCALE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000004)
> > -#define RKISP1_CIF_MRSZ_SCALE_HCB (RKISP1_CIF_MRSZ_BASE + 0x00000008)
> > -#define RKISP1_CIF_MRSZ_SCALE_HCR (RKISP1_CIF_MRSZ_BASE + 0x0000000C)
> > -#define RKISP1_CIF_MRSZ_SCALE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000010)
> > -#define RKISP1_CIF_MRSZ_SCALE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000014)
> > -#define RKISP1_CIF_MRSZ_PHASE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000018)
> > -#define RKISP1_CIF_MRSZ_PHASE_HC (RKISP1_CIF_MRSZ_BASE + 0x0000001C)
> > -#define RKISP1_CIF_MRSZ_PHASE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000020)
> > -#define RKISP1_CIF_MRSZ_PHASE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000024)
> > -#define RKISP1_CIF_MRSZ_SCALE_LUT_ADDR (RKISP1_CIF_MRSZ_BASE + 0x00000028)
> > -#define RKISP1_CIF_MRSZ_SCALE_LUT (RKISP1_CIF_MRSZ_BASE + 0x0000002C)
> > -#define RKISP1_CIF_MRSZ_CTRL_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000030)
> > -#define RKISP1_CIF_MRSZ_SCALE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000034)
> > -#define RKISP1_CIF_MRSZ_SCALE_HCB_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000038)
> > -#define RKISP1_CIF_MRSZ_SCALE_HCR_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000003C)
> > -#define RKISP1_CIF_MRSZ_SCALE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000040)
> > -#define RKISP1_CIF_MRSZ_SCALE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000044)
> > -#define RKISP1_CIF_MRSZ_PHASE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000048)
> > -#define RKISP1_CIF_MRSZ_PHASE_HC_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000004C)
> > -#define RKISP1_CIF_MRSZ_PHASE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000050)
> > -#define RKISP1_CIF_MRSZ_PHASE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000054)
> > -
> > #define RKISP1_CIF_SRSZ_BASE 0x00001000
> > -#define RKISP1_CIF_SRSZ_CTRL (RKISP1_CIF_SRSZ_BASE + 0x00000000)
> > -#define RKISP1_CIF_SRSZ_SCALE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000004)
> > -#define RKISP1_CIF_SRSZ_SCALE_HCB (RKISP1_CIF_SRSZ_BASE + 0x00000008)
> > -#define RKISP1_CIF_SRSZ_SCALE_HCR (RKISP1_CIF_SRSZ_BASE + 0x0000000C)
> > -#define RKISP1_CIF_SRSZ_SCALE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000010)
> > -#define RKISP1_CIF_SRSZ_SCALE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000014)
> > -#define RKISP1_CIF_SRSZ_PHASE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000018)
> > -#define RKISP1_CIF_SRSZ_PHASE_HC (RKISP1_CIF_SRSZ_BASE + 0x0000001C)
> > -#define RKISP1_CIF_SRSZ_PHASE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000020)
> > -#define RKISP1_CIF_SRSZ_PHASE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000024)
> > -#define RKISP1_CIF_SRSZ_SCALE_LUT_ADDR (RKISP1_CIF_SRSZ_BASE + 0x00000028)
> > -#define RKISP1_CIF_SRSZ_SCALE_LUT (RKISP1_CIF_SRSZ_BASE + 0x0000002C)
> > -#define RKISP1_CIF_SRSZ_CTRL_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000030)
> > -#define RKISP1_CIF_SRSZ_SCALE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000034)
> > -#define RKISP1_CIF_SRSZ_SCALE_HCB_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000038)
> > -#define RKISP1_CIF_SRSZ_SCALE_HCR_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000003C)
> > -#define RKISP1_CIF_SRSZ_SCALE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000040)
> > -#define RKISP1_CIF_SRSZ_SCALE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000044)
> > -#define RKISP1_CIF_SRSZ_PHASE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000048)
> > -#define RKISP1_CIF_SRSZ_PHASE_HC_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000004C)
> > -#define RKISP1_CIF_SRSZ_PHASE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000050)
> > -#define RKISP1_CIF_SRSZ_PHASE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000054)
> > +#define RKISP1_CIF_RSZ_CTRL 0x0000
> > +#define RKISP1_CIF_RSZ_SCALE_HY 0x0004
> > +#define RKISP1_CIF_RSZ_SCALE_HCB 0x0008
> > +#define RKISP1_CIF_RSZ_SCALE_HCR 0x000C
> > +#define RKISP1_CIF_RSZ_SCALE_VY 0x0010
> > +#define RKISP1_CIF_RSZ_SCALE_VC 0x0014
> > +#define RKISP1_CIF_RSZ_PHASE_HY 0x0018
> > +#define RKISP1_CIF_RSZ_PHASE_HC 0x001C
> > +#define RKISP1_CIF_RSZ_PHASE_VY 0x0020
> > +#define RKISP1_CIF_RSZ_PHASE_VC 0x0024
> > +#define RKISP1_CIF_RSZ_SCALE_LUT_ADDR 0x0028
> > +#define RKISP1_CIF_RSZ_SCALE_LUT 0x002C
> > +#define RKISP1_CIF_RSZ_CTRL_SHD 0x0030
> > +#define RKISP1_CIF_RSZ_SCALE_HY_SHD 0x0034
> > +#define RKISP1_CIF_RSZ_SCALE_HCB_SHD 0x0038
> > +#define RKISP1_CIF_RSZ_SCALE_HCR_SHD 0x003C
> > +#define RKISP1_CIF_RSZ_SCALE_VY_SHD 0x0040
> > +#define RKISP1_CIF_RSZ_SCALE_VC_SHD 0x0044
> > +#define RKISP1_CIF_RSZ_PHASE_HY_SHD 0x0048
> > +#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
> > +#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
> > +#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
> >
> > #define RKISP1_CIF_MI_BASE 0x00001400
> > #define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
> > diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> > index 65ce8d647118..d92a23bd2d51 100644
> > --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> > +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> > @@ -59,30 +59,6 @@ struct rkisp1_rsz_config {
> > const int min_rsz_width;
> > const int min_rsz_height;
> > /* registers */
> > - struct {
> > - u32 ctrl;
> > - u32 ctrl_shd;
> > - u32 scale_hy;
> > - u32 scale_hcr;
> > - u32 scale_hcb;
> > - u32 scale_vy;
> > - u32 scale_vc;
> > - u32 scale_lut;
> > - u32 scale_lut_addr;
> > - u32 scale_hy_shd;
> > - u32 scale_hcr_shd;
> > - u32 scale_hcb_shd;
> > - u32 scale_vy_shd;
> > - u32 scale_vc_shd;
> > - u32 phase_hy;
> > - u32 phase_hc;
> > - u32 phase_vy;
> > - u32 phase_vc;
> > - u32 phase_hy_shd;
> > - u32 phase_hc_shd;
> > - u32 phase_vy_shd;
> > - u32 phase_vc_shd;
> > - } rsz;
> > struct {
> > u32 ctrl;
> > u32 yuvmode_mask;
> > @@ -101,30 +77,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
> > .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> > .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> > /* registers */
> > - .rsz = {
> > - .ctrl = RKISP1_CIF_MRSZ_CTRL,
> > - .scale_hy = RKISP1_CIF_MRSZ_SCALE_HY,
> > - .scale_hcr = RKISP1_CIF_MRSZ_SCALE_HCR,
> > - .scale_hcb = RKISP1_CIF_MRSZ_SCALE_HCB,
> > - .scale_vy = RKISP1_CIF_MRSZ_SCALE_VY,
> > - .scale_vc = RKISP1_CIF_MRSZ_SCALE_VC,
> > - .scale_lut = RKISP1_CIF_MRSZ_SCALE_LUT,
> > - .scale_lut_addr = RKISP1_CIF_MRSZ_SCALE_LUT_ADDR,
> > - .scale_hy_shd = RKISP1_CIF_MRSZ_SCALE_HY_SHD,
> > - .scale_hcr_shd = RKISP1_CIF_MRSZ_SCALE_HCR_SHD,
> > - .scale_hcb_shd = RKISP1_CIF_MRSZ_SCALE_HCB_SHD,
> > - .scale_vy_shd = RKISP1_CIF_MRSZ_SCALE_VY_SHD,
> > - .scale_vc_shd = RKISP1_CIF_MRSZ_SCALE_VC_SHD,
> > - .phase_hy = RKISP1_CIF_MRSZ_PHASE_HY,
> > - .phase_hc = RKISP1_CIF_MRSZ_PHASE_HC,
> > - .phase_vy = RKISP1_CIF_MRSZ_PHASE_VY,
> > - .phase_vc = RKISP1_CIF_MRSZ_PHASE_VC,
> > - .ctrl_shd = RKISP1_CIF_MRSZ_CTRL_SHD,
> > - .phase_hy_shd = RKISP1_CIF_MRSZ_PHASE_HY_SHD,
> > - .phase_hc_shd = RKISP1_CIF_MRSZ_PHASE_HC_SHD,
> > - .phase_vy_shd = RKISP1_CIF_MRSZ_PHASE_VY_SHD,
> > - .phase_vc_shd = RKISP1_CIF_MRSZ_PHASE_VC_SHD,
> > - },
> > .dual_crop = {
> > .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> > .yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
> > @@ -143,30 +95,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> > .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> > .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> > /* registers */
> > - .rsz = {
> > - .ctrl = RKISP1_CIF_SRSZ_CTRL,
> > - .scale_hy = RKISP1_CIF_SRSZ_SCALE_HY,
> > - .scale_hcr = RKISP1_CIF_SRSZ_SCALE_HCR,
> > - .scale_hcb = RKISP1_CIF_SRSZ_SCALE_HCB,
> > - .scale_vy = RKISP1_CIF_SRSZ_SCALE_VY,
> > - .scale_vc = RKISP1_CIF_SRSZ_SCALE_VC,
> > - .scale_lut = RKISP1_CIF_SRSZ_SCALE_LUT,
> > - .scale_lut_addr = RKISP1_CIF_SRSZ_SCALE_LUT_ADDR,
> > - .scale_hy_shd = RKISP1_CIF_SRSZ_SCALE_HY_SHD,
> > - .scale_hcr_shd = RKISP1_CIF_SRSZ_SCALE_HCR_SHD,
> > - .scale_hcb_shd = RKISP1_CIF_SRSZ_SCALE_HCB_SHD,
> > - .scale_vy_shd = RKISP1_CIF_SRSZ_SCALE_VY_SHD,
> > - .scale_vc_shd = RKISP1_CIF_SRSZ_SCALE_VC_SHD,
> > - .phase_hy = RKISP1_CIF_SRSZ_PHASE_HY,
> > - .phase_hc = RKISP1_CIF_SRSZ_PHASE_HC,
> > - .phase_vy = RKISP1_CIF_SRSZ_PHASE_VY,
> > - .phase_vc = RKISP1_CIF_SRSZ_PHASE_VC,
> > - .ctrl_shd = RKISP1_CIF_SRSZ_CTRL_SHD,
> > - .phase_hy_shd = RKISP1_CIF_SRSZ_PHASE_HY_SHD,
> > - .phase_hc_shd = RKISP1_CIF_SRSZ_PHASE_HC_SHD,
> > - .phase_vy_shd = RKISP1_CIF_SRSZ_PHASE_VY_SHD,
> > - .phase_vc_shd = RKISP1_CIF_SRSZ_PHASE_VC_SHD,
> > - },
> > .dual_crop = {
> > .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> > .yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
> > @@ -178,6 +106,17 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> > },
> > };
> >
> > +static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
> > +{
> > + return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
> > +}
> > +
> > +static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
> > + u32 value)
> > +{
> > + rkisp1_write(rsz->rkisp1, value, rsz->regs_base + offset);
> > +}
>
> I'd keep the order of params the same as rkisp1_write, or change the order
> of params in rkisp1_write to the be the same as rkisp1_rsz_write, otherwise
> it's confusing.
You're right. Time to fire up coccinelle to submit a new patch :-)
> > +
> > static struct v4l2_mbus_framefmt *
> > rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz,
> > struct v4l2_subdev_state *sd_state,
> > @@ -277,39 +216,39 @@ static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
> > "RSZ_PHASE_HC %d/%d\n"
> > "RSZ_PHASE_VY %d/%d\n"
> > "RSZ_PHASE_VC %d/%d\n",
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc_shd));
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
> > }
> >
> > static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
> > enum rkisp1_shadow_regs_when when)
> > {
> > - u32 ctrl_cfg = rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl);
> > + u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
> >
> > if (when == RKISP1_SHADOW_REGS_ASYNC)
> > ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
> > else
> > ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
> >
> > - rkisp1_write(rsz->rkisp1, ctrl_cfg, rsz->config->rsz.ctrl);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
> > }
> >
> > static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> > @@ -325,7 +264,7 @@ static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> > static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
> > enum rkisp1_shadow_regs_when when)
> > {
> > - rkisp1_write(rsz->rkisp1, 0, rsz->config->rsz.ctrl);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
> >
> > if (when == RKISP1_SHADOW_REGS_SYNC)
> > rkisp1_rsz_update_shadow(rsz, when);
> > @@ -338,20 +277,19 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> > struct v4l2_rect *src_c,
> > enum rkisp1_shadow_regs_when when)
> > {
> > - struct rkisp1_device *rkisp1 = rsz->rkisp1;
> > u32 ratio, rsz_ctrl = 0;
> > unsigned int i;
> >
> > /* No phase offset */
> > - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hy);
> > - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hc);
> > - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vy);
> > - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vc);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
> >
> > /* Linear interpolation */
> > for (i = 0; i < 64; i++) {
> > - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut_addr);
> > - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
> > }
> >
> > if (sink_y->width != src_y->width) {
> > @@ -359,7 +297,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> > if (sink_y->width < src_y->width)
> > rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
> > ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
> > - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hy);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
> > }
> >
> > if (sink_c->width != src_c->width) {
> > @@ -367,8 +305,8 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> > if (sink_c->width < src_c->width)
> > rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
> > ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
> > - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcb);
> > - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcr);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
> > }
> >
> > if (sink_y->height != src_y->height) {
> > @@ -376,7 +314,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> > if (sink_y->height < src_y->height)
> > rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
> > ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
> > - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vy);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
> > }
> >
> > if (sink_c->height != src_c->height) {
> > @@ -384,10 +322,10 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> > if (sink_c->height < src_c->height)
> > rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
> > ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
> > - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vc);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
> > }
> >
> > - rkisp1_write(rkisp1, rsz_ctrl, rsz->config->rsz.ctrl);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
> >
> > rkisp1_rsz_update_shadow(rsz, when);
> > }
> > @@ -803,10 +741,13 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
> > struct v4l2_subdev *sd = &rsz->sd;
> > int ret;
> >
> > - if (rsz->id == RKISP1_SELFPATH)
> > + if (rsz->id == RKISP1_SELFPATH) {
> > + rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
> > rsz->config = &rkisp1_rsz_config_sp;
> > - else
> > + } else {
> > + rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
> > rsz->config = &rkisp1_rsz_config_mp;
> > + }
> >
> > v4l2_subdev_init(sd, &rkisp1_rsz_ops);
> > sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH v1.1 10/16] media: rkisp1: resizer: Simplify register access
@ 2022-03-03 8:21 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-03-03 8:21 UTC (permalink / raw)
To: Dafna Hirschfeld
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
Hi Dafna,
On Thu, Mar 03, 2022 at 08:32:12AM +0200, Dafna Hirschfeld wrote:
> On 27.02.2022 18:10, Laurent Pinchart wrote:
> > The registers for the mainpath and selfpath resizers are located at the
> > same offset from the instance-specific base. Use this to simplify
> > register access, removing the need to store per-register offsets in the
> > rkisp1_rsz_config structure.
> >
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> > Changes since v1:
> >
> > - Fix order of arguments to write function
> > ---
> > .../platform/rockchip/rkisp1/rkisp1-common.h | 2 +
> > .../platform/rockchip/rkisp1/rkisp1-regs.h | 67 +++-----
> > .../platform/rockchip/rkisp1/rkisp1-resizer.c | 161 ++++++------------
> > 3 files changed, 75 insertions(+), 155 deletions(-)
> >
> > diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> > index d8fa3f1a5a85..64ad7452eb6b 100644
> > --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> > +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> > @@ -313,6 +313,7 @@ struct rkisp1_params {
> > * struct rkisp1_resizer - Resizer subdev
> > *
> > * @sd: v4l2_subdev variable
> > + * @regs_base: base register address offset
> > * @id: id of the resizer, one of RKISP1_SELFPATH, RKISP1_MAINPATH
> > * @rkisp1: pointer to the rkisp1 device
> > * @pads: media pads
> > @@ -323,6 +324,7 @@ struct rkisp1_params {
> > */
> > struct rkisp1_resizer {
> > struct v4l2_subdev sd;
> > + u32 regs_base;
> > enum rkisp1_stream_id id;
> > struct rkisp1_device *rkisp1;
> > struct media_pad pads[RKISP1_RSZ_PAD_MAX];
> > diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> > index 4e2b73227e61..083d92ada73f 100644
> > --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> > +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> > @@ -905,52 +905,29 @@
> > #define RKISP1_CIF_DUAL_CROP_S_V_SIZE_SHD (RKISP1_CIF_DUAL_CROP_BASE + 0x00000040)
> >
> > #define RKISP1_CIF_MRSZ_BASE 0x00000C00
> > -#define RKISP1_CIF_MRSZ_CTRL (RKISP1_CIF_MRSZ_BASE + 0x00000000)
> > -#define RKISP1_CIF_MRSZ_SCALE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000004)
> > -#define RKISP1_CIF_MRSZ_SCALE_HCB (RKISP1_CIF_MRSZ_BASE + 0x00000008)
> > -#define RKISP1_CIF_MRSZ_SCALE_HCR (RKISP1_CIF_MRSZ_BASE + 0x0000000C)
> > -#define RKISP1_CIF_MRSZ_SCALE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000010)
> > -#define RKISP1_CIF_MRSZ_SCALE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000014)
> > -#define RKISP1_CIF_MRSZ_PHASE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000018)
> > -#define RKISP1_CIF_MRSZ_PHASE_HC (RKISP1_CIF_MRSZ_BASE + 0x0000001C)
> > -#define RKISP1_CIF_MRSZ_PHASE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000020)
> > -#define RKISP1_CIF_MRSZ_PHASE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000024)
> > -#define RKISP1_CIF_MRSZ_SCALE_LUT_ADDR (RKISP1_CIF_MRSZ_BASE + 0x00000028)
> > -#define RKISP1_CIF_MRSZ_SCALE_LUT (RKISP1_CIF_MRSZ_BASE + 0x0000002C)
> > -#define RKISP1_CIF_MRSZ_CTRL_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000030)
> > -#define RKISP1_CIF_MRSZ_SCALE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000034)
> > -#define RKISP1_CIF_MRSZ_SCALE_HCB_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000038)
> > -#define RKISP1_CIF_MRSZ_SCALE_HCR_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000003C)
> > -#define RKISP1_CIF_MRSZ_SCALE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000040)
> > -#define RKISP1_CIF_MRSZ_SCALE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000044)
> > -#define RKISP1_CIF_MRSZ_PHASE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000048)
> > -#define RKISP1_CIF_MRSZ_PHASE_HC_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000004C)
> > -#define RKISP1_CIF_MRSZ_PHASE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000050)
> > -#define RKISP1_CIF_MRSZ_PHASE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000054)
> > -
> > #define RKISP1_CIF_SRSZ_BASE 0x00001000
> > -#define RKISP1_CIF_SRSZ_CTRL (RKISP1_CIF_SRSZ_BASE + 0x00000000)
> > -#define RKISP1_CIF_SRSZ_SCALE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000004)
> > -#define RKISP1_CIF_SRSZ_SCALE_HCB (RKISP1_CIF_SRSZ_BASE + 0x00000008)
> > -#define RKISP1_CIF_SRSZ_SCALE_HCR (RKISP1_CIF_SRSZ_BASE + 0x0000000C)
> > -#define RKISP1_CIF_SRSZ_SCALE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000010)
> > -#define RKISP1_CIF_SRSZ_SCALE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000014)
> > -#define RKISP1_CIF_SRSZ_PHASE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000018)
> > -#define RKISP1_CIF_SRSZ_PHASE_HC (RKISP1_CIF_SRSZ_BASE + 0x0000001C)
> > -#define RKISP1_CIF_SRSZ_PHASE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000020)
> > -#define RKISP1_CIF_SRSZ_PHASE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000024)
> > -#define RKISP1_CIF_SRSZ_SCALE_LUT_ADDR (RKISP1_CIF_SRSZ_BASE + 0x00000028)
> > -#define RKISP1_CIF_SRSZ_SCALE_LUT (RKISP1_CIF_SRSZ_BASE + 0x0000002C)
> > -#define RKISP1_CIF_SRSZ_CTRL_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000030)
> > -#define RKISP1_CIF_SRSZ_SCALE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000034)
> > -#define RKISP1_CIF_SRSZ_SCALE_HCB_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000038)
> > -#define RKISP1_CIF_SRSZ_SCALE_HCR_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000003C)
> > -#define RKISP1_CIF_SRSZ_SCALE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000040)
> > -#define RKISP1_CIF_SRSZ_SCALE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000044)
> > -#define RKISP1_CIF_SRSZ_PHASE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000048)
> > -#define RKISP1_CIF_SRSZ_PHASE_HC_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000004C)
> > -#define RKISP1_CIF_SRSZ_PHASE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000050)
> > -#define RKISP1_CIF_SRSZ_PHASE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000054)
> > +#define RKISP1_CIF_RSZ_CTRL 0x0000
> > +#define RKISP1_CIF_RSZ_SCALE_HY 0x0004
> > +#define RKISP1_CIF_RSZ_SCALE_HCB 0x0008
> > +#define RKISP1_CIF_RSZ_SCALE_HCR 0x000C
> > +#define RKISP1_CIF_RSZ_SCALE_VY 0x0010
> > +#define RKISP1_CIF_RSZ_SCALE_VC 0x0014
> > +#define RKISP1_CIF_RSZ_PHASE_HY 0x0018
> > +#define RKISP1_CIF_RSZ_PHASE_HC 0x001C
> > +#define RKISP1_CIF_RSZ_PHASE_VY 0x0020
> > +#define RKISP1_CIF_RSZ_PHASE_VC 0x0024
> > +#define RKISP1_CIF_RSZ_SCALE_LUT_ADDR 0x0028
> > +#define RKISP1_CIF_RSZ_SCALE_LUT 0x002C
> > +#define RKISP1_CIF_RSZ_CTRL_SHD 0x0030
> > +#define RKISP1_CIF_RSZ_SCALE_HY_SHD 0x0034
> > +#define RKISP1_CIF_RSZ_SCALE_HCB_SHD 0x0038
> > +#define RKISP1_CIF_RSZ_SCALE_HCR_SHD 0x003C
> > +#define RKISP1_CIF_RSZ_SCALE_VY_SHD 0x0040
> > +#define RKISP1_CIF_RSZ_SCALE_VC_SHD 0x0044
> > +#define RKISP1_CIF_RSZ_PHASE_HY_SHD 0x0048
> > +#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
> > +#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
> > +#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
> >
> > #define RKISP1_CIF_MI_BASE 0x00001400
> > #define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
> > diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> > index 65ce8d647118..d92a23bd2d51 100644
> > --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> > +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> > @@ -59,30 +59,6 @@ struct rkisp1_rsz_config {
> > const int min_rsz_width;
> > const int min_rsz_height;
> > /* registers */
> > - struct {
> > - u32 ctrl;
> > - u32 ctrl_shd;
> > - u32 scale_hy;
> > - u32 scale_hcr;
> > - u32 scale_hcb;
> > - u32 scale_vy;
> > - u32 scale_vc;
> > - u32 scale_lut;
> > - u32 scale_lut_addr;
> > - u32 scale_hy_shd;
> > - u32 scale_hcr_shd;
> > - u32 scale_hcb_shd;
> > - u32 scale_vy_shd;
> > - u32 scale_vc_shd;
> > - u32 phase_hy;
> > - u32 phase_hc;
> > - u32 phase_vy;
> > - u32 phase_vc;
> > - u32 phase_hy_shd;
> > - u32 phase_hc_shd;
> > - u32 phase_vy_shd;
> > - u32 phase_vc_shd;
> > - } rsz;
> > struct {
> > u32 ctrl;
> > u32 yuvmode_mask;
> > @@ -101,30 +77,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
> > .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> > .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> > /* registers */
> > - .rsz = {
> > - .ctrl = RKISP1_CIF_MRSZ_CTRL,
> > - .scale_hy = RKISP1_CIF_MRSZ_SCALE_HY,
> > - .scale_hcr = RKISP1_CIF_MRSZ_SCALE_HCR,
> > - .scale_hcb = RKISP1_CIF_MRSZ_SCALE_HCB,
> > - .scale_vy = RKISP1_CIF_MRSZ_SCALE_VY,
> > - .scale_vc = RKISP1_CIF_MRSZ_SCALE_VC,
> > - .scale_lut = RKISP1_CIF_MRSZ_SCALE_LUT,
> > - .scale_lut_addr = RKISP1_CIF_MRSZ_SCALE_LUT_ADDR,
> > - .scale_hy_shd = RKISP1_CIF_MRSZ_SCALE_HY_SHD,
> > - .scale_hcr_shd = RKISP1_CIF_MRSZ_SCALE_HCR_SHD,
> > - .scale_hcb_shd = RKISP1_CIF_MRSZ_SCALE_HCB_SHD,
> > - .scale_vy_shd = RKISP1_CIF_MRSZ_SCALE_VY_SHD,
> > - .scale_vc_shd = RKISP1_CIF_MRSZ_SCALE_VC_SHD,
> > - .phase_hy = RKISP1_CIF_MRSZ_PHASE_HY,
> > - .phase_hc = RKISP1_CIF_MRSZ_PHASE_HC,
> > - .phase_vy = RKISP1_CIF_MRSZ_PHASE_VY,
> > - .phase_vc = RKISP1_CIF_MRSZ_PHASE_VC,
> > - .ctrl_shd = RKISP1_CIF_MRSZ_CTRL_SHD,
> > - .phase_hy_shd = RKISP1_CIF_MRSZ_PHASE_HY_SHD,
> > - .phase_hc_shd = RKISP1_CIF_MRSZ_PHASE_HC_SHD,
> > - .phase_vy_shd = RKISP1_CIF_MRSZ_PHASE_VY_SHD,
> > - .phase_vc_shd = RKISP1_CIF_MRSZ_PHASE_VC_SHD,
> > - },
> > .dual_crop = {
> > .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> > .yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
> > @@ -143,30 +95,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> > .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> > .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> > /* registers */
> > - .rsz = {
> > - .ctrl = RKISP1_CIF_SRSZ_CTRL,
> > - .scale_hy = RKISP1_CIF_SRSZ_SCALE_HY,
> > - .scale_hcr = RKISP1_CIF_SRSZ_SCALE_HCR,
> > - .scale_hcb = RKISP1_CIF_SRSZ_SCALE_HCB,
> > - .scale_vy = RKISP1_CIF_SRSZ_SCALE_VY,
> > - .scale_vc = RKISP1_CIF_SRSZ_SCALE_VC,
> > - .scale_lut = RKISP1_CIF_SRSZ_SCALE_LUT,
> > - .scale_lut_addr = RKISP1_CIF_SRSZ_SCALE_LUT_ADDR,
> > - .scale_hy_shd = RKISP1_CIF_SRSZ_SCALE_HY_SHD,
> > - .scale_hcr_shd = RKISP1_CIF_SRSZ_SCALE_HCR_SHD,
> > - .scale_hcb_shd = RKISP1_CIF_SRSZ_SCALE_HCB_SHD,
> > - .scale_vy_shd = RKISP1_CIF_SRSZ_SCALE_VY_SHD,
> > - .scale_vc_shd = RKISP1_CIF_SRSZ_SCALE_VC_SHD,
> > - .phase_hy = RKISP1_CIF_SRSZ_PHASE_HY,
> > - .phase_hc = RKISP1_CIF_SRSZ_PHASE_HC,
> > - .phase_vy = RKISP1_CIF_SRSZ_PHASE_VY,
> > - .phase_vc = RKISP1_CIF_SRSZ_PHASE_VC,
> > - .ctrl_shd = RKISP1_CIF_SRSZ_CTRL_SHD,
> > - .phase_hy_shd = RKISP1_CIF_SRSZ_PHASE_HY_SHD,
> > - .phase_hc_shd = RKISP1_CIF_SRSZ_PHASE_HC_SHD,
> > - .phase_vy_shd = RKISP1_CIF_SRSZ_PHASE_VY_SHD,
> > - .phase_vc_shd = RKISP1_CIF_SRSZ_PHASE_VC_SHD,
> > - },
> > .dual_crop = {
> > .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> > .yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
> > @@ -178,6 +106,17 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> > },
> > };
> >
> > +static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
> > +{
> > + return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
> > +}
> > +
> > +static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
> > + u32 value)
> > +{
> > + rkisp1_write(rsz->rkisp1, value, rsz->regs_base + offset);
> > +}
>
> I'd keep the order of params the same as rkisp1_write, or change the order
> of params in rkisp1_write to the be the same as rkisp1_rsz_write, otherwise
> it's confusing.
You're right. Time to fire up coccinelle to submit a new patch :-)
> > +
> > static struct v4l2_mbus_framefmt *
> > rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz,
> > struct v4l2_subdev_state *sd_state,
> > @@ -277,39 +216,39 @@ static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
> > "RSZ_PHASE_HC %d/%d\n"
> > "RSZ_PHASE_VY %d/%d\n"
> > "RSZ_PHASE_VC %d/%d\n",
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy_shd),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc),
> > - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc_shd));
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
> > + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
> > }
> >
> > static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
> > enum rkisp1_shadow_regs_when when)
> > {
> > - u32 ctrl_cfg = rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl);
> > + u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
> >
> > if (when == RKISP1_SHADOW_REGS_ASYNC)
> > ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
> > else
> > ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
> >
> > - rkisp1_write(rsz->rkisp1, ctrl_cfg, rsz->config->rsz.ctrl);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
> > }
> >
> > static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> > @@ -325,7 +264,7 @@ static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> > static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
> > enum rkisp1_shadow_regs_when when)
> > {
> > - rkisp1_write(rsz->rkisp1, 0, rsz->config->rsz.ctrl);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
> >
> > if (when == RKISP1_SHADOW_REGS_SYNC)
> > rkisp1_rsz_update_shadow(rsz, when);
> > @@ -338,20 +277,19 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> > struct v4l2_rect *src_c,
> > enum rkisp1_shadow_regs_when when)
> > {
> > - struct rkisp1_device *rkisp1 = rsz->rkisp1;
> > u32 ratio, rsz_ctrl = 0;
> > unsigned int i;
> >
> > /* No phase offset */
> > - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hy);
> > - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hc);
> > - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vy);
> > - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vc);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
> >
> > /* Linear interpolation */
> > for (i = 0; i < 64; i++) {
> > - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut_addr);
> > - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
> > }
> >
> > if (sink_y->width != src_y->width) {
> > @@ -359,7 +297,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> > if (sink_y->width < src_y->width)
> > rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
> > ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
> > - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hy);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
> > }
> >
> > if (sink_c->width != src_c->width) {
> > @@ -367,8 +305,8 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> > if (sink_c->width < src_c->width)
> > rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
> > ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
> > - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcb);
> > - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcr);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
> > }
> >
> > if (sink_y->height != src_y->height) {
> > @@ -376,7 +314,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> > if (sink_y->height < src_y->height)
> > rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
> > ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
> > - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vy);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
> > }
> >
> > if (sink_c->height != src_c->height) {
> > @@ -384,10 +322,10 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> > if (sink_c->height < src_c->height)
> > rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
> > ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
> > - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vc);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
> > }
> >
> > - rkisp1_write(rkisp1, rsz_ctrl, rsz->config->rsz.ctrl);
> > + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
> >
> > rkisp1_rsz_update_shadow(rsz, when);
> > }
> > @@ -803,10 +741,13 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
> > struct v4l2_subdev *sd = &rsz->sd;
> > int ret;
> >
> > - if (rsz->id == RKISP1_SELFPATH)
> > + if (rsz->id == RKISP1_SELFPATH) {
> > + rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
> > rsz->config = &rkisp1_rsz_config_sp;
> > - else
> > + } else {
> > + rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
> > rsz->config = &rkisp1_rsz_config_mp;
> > + }
> >
> > v4l2_subdev_init(sd, &rkisp1_rsz_ops);
> > sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH 10/16] media: rkisp1: resizer: Simplify register access
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-03-02 19:34 ` Dafna Hirschfeld
-1 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-02 19:34 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:01, Laurent Pinchart wrote:
> The registers for the mainpath and selfpath resizers are located at the
> same offset from the instance-specific base. Use this to simplify
> register access, removing the need to store per-register offsets in the
> rkisp1_rsz_config structure.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Dafna Hirschfeld <dafna@fastmail.com>
> ---
> .../platform/rockchip/rkisp1/rkisp1-common.h | 2 +
> .../platform/rockchip/rkisp1/rkisp1-regs.h | 67 +++-----
> .../platform/rockchip/rkisp1/rkisp1-resizer.c | 161 ++++++------------
> 3 files changed, 75 insertions(+), 155 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> index d8fa3f1a5a85..64ad7452eb6b 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> @@ -313,6 +313,7 @@ struct rkisp1_params {
> * struct rkisp1_resizer - Resizer subdev
> *
> * @sd: v4l2_subdev variable
> + * @regs_base: base register address offset
> * @id: id of the resizer, one of RKISP1_SELFPATH, RKISP1_MAINPATH
> * @rkisp1: pointer to the rkisp1 device
> * @pads: media pads
> @@ -323,6 +324,7 @@ struct rkisp1_params {
> */
> struct rkisp1_resizer {
> struct v4l2_subdev sd;
> + u32 regs_base;
> enum rkisp1_stream_id id;
> struct rkisp1_device *rkisp1;
> struct media_pad pads[RKISP1_RSZ_PAD_MAX];
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> index 4e2b73227e61..083d92ada73f 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> @@ -905,52 +905,29 @@
> #define RKISP1_CIF_DUAL_CROP_S_V_SIZE_SHD (RKISP1_CIF_DUAL_CROP_BASE + 0x00000040)
>
> #define RKISP1_CIF_MRSZ_BASE 0x00000C00
> -#define RKISP1_CIF_MRSZ_CTRL (RKISP1_CIF_MRSZ_BASE + 0x00000000)
> -#define RKISP1_CIF_MRSZ_SCALE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000004)
> -#define RKISP1_CIF_MRSZ_SCALE_HCB (RKISP1_CIF_MRSZ_BASE + 0x00000008)
> -#define RKISP1_CIF_MRSZ_SCALE_HCR (RKISP1_CIF_MRSZ_BASE + 0x0000000C)
> -#define RKISP1_CIF_MRSZ_SCALE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000010)
> -#define RKISP1_CIF_MRSZ_SCALE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000014)
> -#define RKISP1_CIF_MRSZ_PHASE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000018)
> -#define RKISP1_CIF_MRSZ_PHASE_HC (RKISP1_CIF_MRSZ_BASE + 0x0000001C)
> -#define RKISP1_CIF_MRSZ_PHASE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000020)
> -#define RKISP1_CIF_MRSZ_PHASE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000024)
> -#define RKISP1_CIF_MRSZ_SCALE_LUT_ADDR (RKISP1_CIF_MRSZ_BASE + 0x00000028)
> -#define RKISP1_CIF_MRSZ_SCALE_LUT (RKISP1_CIF_MRSZ_BASE + 0x0000002C)
> -#define RKISP1_CIF_MRSZ_CTRL_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000030)
> -#define RKISP1_CIF_MRSZ_SCALE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000034)
> -#define RKISP1_CIF_MRSZ_SCALE_HCB_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000038)
> -#define RKISP1_CIF_MRSZ_SCALE_HCR_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000003C)
> -#define RKISP1_CIF_MRSZ_SCALE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000040)
> -#define RKISP1_CIF_MRSZ_SCALE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000044)
> -#define RKISP1_CIF_MRSZ_PHASE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000048)
> -#define RKISP1_CIF_MRSZ_PHASE_HC_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000004C)
> -#define RKISP1_CIF_MRSZ_PHASE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000050)
> -#define RKISP1_CIF_MRSZ_PHASE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000054)
> -
> #define RKISP1_CIF_SRSZ_BASE 0x00001000
> -#define RKISP1_CIF_SRSZ_CTRL (RKISP1_CIF_SRSZ_BASE + 0x00000000)
> -#define RKISP1_CIF_SRSZ_SCALE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000004)
> -#define RKISP1_CIF_SRSZ_SCALE_HCB (RKISP1_CIF_SRSZ_BASE + 0x00000008)
> -#define RKISP1_CIF_SRSZ_SCALE_HCR (RKISP1_CIF_SRSZ_BASE + 0x0000000C)
> -#define RKISP1_CIF_SRSZ_SCALE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000010)
> -#define RKISP1_CIF_SRSZ_SCALE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000014)
> -#define RKISP1_CIF_SRSZ_PHASE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000018)
> -#define RKISP1_CIF_SRSZ_PHASE_HC (RKISP1_CIF_SRSZ_BASE + 0x0000001C)
> -#define RKISP1_CIF_SRSZ_PHASE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000020)
> -#define RKISP1_CIF_SRSZ_PHASE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000024)
> -#define RKISP1_CIF_SRSZ_SCALE_LUT_ADDR (RKISP1_CIF_SRSZ_BASE + 0x00000028)
> -#define RKISP1_CIF_SRSZ_SCALE_LUT (RKISP1_CIF_SRSZ_BASE + 0x0000002C)
> -#define RKISP1_CIF_SRSZ_CTRL_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000030)
> -#define RKISP1_CIF_SRSZ_SCALE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000034)
> -#define RKISP1_CIF_SRSZ_SCALE_HCB_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000038)
> -#define RKISP1_CIF_SRSZ_SCALE_HCR_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000003C)
> -#define RKISP1_CIF_SRSZ_SCALE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000040)
> -#define RKISP1_CIF_SRSZ_SCALE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000044)
> -#define RKISP1_CIF_SRSZ_PHASE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000048)
> -#define RKISP1_CIF_SRSZ_PHASE_HC_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000004C)
> -#define RKISP1_CIF_SRSZ_PHASE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000050)
> -#define RKISP1_CIF_SRSZ_PHASE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000054)
> +#define RKISP1_CIF_RSZ_CTRL 0x0000
> +#define RKISP1_CIF_RSZ_SCALE_HY 0x0004
> +#define RKISP1_CIF_RSZ_SCALE_HCB 0x0008
> +#define RKISP1_CIF_RSZ_SCALE_HCR 0x000C
> +#define RKISP1_CIF_RSZ_SCALE_VY 0x0010
> +#define RKISP1_CIF_RSZ_SCALE_VC 0x0014
> +#define RKISP1_CIF_RSZ_PHASE_HY 0x0018
> +#define RKISP1_CIF_RSZ_PHASE_HC 0x001C
> +#define RKISP1_CIF_RSZ_PHASE_VY 0x0020
> +#define RKISP1_CIF_RSZ_PHASE_VC 0x0024
> +#define RKISP1_CIF_RSZ_SCALE_LUT_ADDR 0x0028
> +#define RKISP1_CIF_RSZ_SCALE_LUT 0x002C
> +#define RKISP1_CIF_RSZ_CTRL_SHD 0x0030
> +#define RKISP1_CIF_RSZ_SCALE_HY_SHD 0x0034
> +#define RKISP1_CIF_RSZ_SCALE_HCB_SHD 0x0038
> +#define RKISP1_CIF_RSZ_SCALE_HCR_SHD 0x003C
> +#define RKISP1_CIF_RSZ_SCALE_VY_SHD 0x0040
> +#define RKISP1_CIF_RSZ_SCALE_VC_SHD 0x0044
> +#define RKISP1_CIF_RSZ_PHASE_HY_SHD 0x0048
> +#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
> +#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
> +#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
>
> #define RKISP1_CIF_MI_BASE 0x00001400
> #define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> index 65ce8d647118..2135cd40f604 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> @@ -59,30 +59,6 @@ struct rkisp1_rsz_config {
> const int min_rsz_width;
> const int min_rsz_height;
> /* registers */
> - struct {
> - u32 ctrl;
> - u32 ctrl_shd;
> - u32 scale_hy;
> - u32 scale_hcr;
> - u32 scale_hcb;
> - u32 scale_vy;
> - u32 scale_vc;
> - u32 scale_lut;
> - u32 scale_lut_addr;
> - u32 scale_hy_shd;
> - u32 scale_hcr_shd;
> - u32 scale_hcb_shd;
> - u32 scale_vy_shd;
> - u32 scale_vc_shd;
> - u32 phase_hy;
> - u32 phase_hc;
> - u32 phase_vy;
> - u32 phase_vc;
> - u32 phase_hy_shd;
> - u32 phase_hc_shd;
> - u32 phase_vy_shd;
> - u32 phase_vc_shd;
> - } rsz;
> struct {
> u32 ctrl;
> u32 yuvmode_mask;
> @@ -101,30 +77,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
> .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> /* registers */
> - .rsz = {
> - .ctrl = RKISP1_CIF_MRSZ_CTRL,
> - .scale_hy = RKISP1_CIF_MRSZ_SCALE_HY,
> - .scale_hcr = RKISP1_CIF_MRSZ_SCALE_HCR,
> - .scale_hcb = RKISP1_CIF_MRSZ_SCALE_HCB,
> - .scale_vy = RKISP1_CIF_MRSZ_SCALE_VY,
> - .scale_vc = RKISP1_CIF_MRSZ_SCALE_VC,
> - .scale_lut = RKISP1_CIF_MRSZ_SCALE_LUT,
> - .scale_lut_addr = RKISP1_CIF_MRSZ_SCALE_LUT_ADDR,
> - .scale_hy_shd = RKISP1_CIF_MRSZ_SCALE_HY_SHD,
> - .scale_hcr_shd = RKISP1_CIF_MRSZ_SCALE_HCR_SHD,
> - .scale_hcb_shd = RKISP1_CIF_MRSZ_SCALE_HCB_SHD,
> - .scale_vy_shd = RKISP1_CIF_MRSZ_SCALE_VY_SHD,
> - .scale_vc_shd = RKISP1_CIF_MRSZ_SCALE_VC_SHD,
> - .phase_hy = RKISP1_CIF_MRSZ_PHASE_HY,
> - .phase_hc = RKISP1_CIF_MRSZ_PHASE_HC,
> - .phase_vy = RKISP1_CIF_MRSZ_PHASE_VY,
> - .phase_vc = RKISP1_CIF_MRSZ_PHASE_VC,
> - .ctrl_shd = RKISP1_CIF_MRSZ_CTRL_SHD,
> - .phase_hy_shd = RKISP1_CIF_MRSZ_PHASE_HY_SHD,
> - .phase_hc_shd = RKISP1_CIF_MRSZ_PHASE_HC_SHD,
> - .phase_vy_shd = RKISP1_CIF_MRSZ_PHASE_VY_SHD,
> - .phase_vc_shd = RKISP1_CIF_MRSZ_PHASE_VC_SHD,
> - },
> .dual_crop = {
> .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> .yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
> @@ -143,30 +95,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> /* registers */
> - .rsz = {
> - .ctrl = RKISP1_CIF_SRSZ_CTRL,
> - .scale_hy = RKISP1_CIF_SRSZ_SCALE_HY,
> - .scale_hcr = RKISP1_CIF_SRSZ_SCALE_HCR,
> - .scale_hcb = RKISP1_CIF_SRSZ_SCALE_HCB,
> - .scale_vy = RKISP1_CIF_SRSZ_SCALE_VY,
> - .scale_vc = RKISP1_CIF_SRSZ_SCALE_VC,
> - .scale_lut = RKISP1_CIF_SRSZ_SCALE_LUT,
> - .scale_lut_addr = RKISP1_CIF_SRSZ_SCALE_LUT_ADDR,
> - .scale_hy_shd = RKISP1_CIF_SRSZ_SCALE_HY_SHD,
> - .scale_hcr_shd = RKISP1_CIF_SRSZ_SCALE_HCR_SHD,
> - .scale_hcb_shd = RKISP1_CIF_SRSZ_SCALE_HCB_SHD,
> - .scale_vy_shd = RKISP1_CIF_SRSZ_SCALE_VY_SHD,
> - .scale_vc_shd = RKISP1_CIF_SRSZ_SCALE_VC_SHD,
> - .phase_hy = RKISP1_CIF_SRSZ_PHASE_HY,
> - .phase_hc = RKISP1_CIF_SRSZ_PHASE_HC,
> - .phase_vy = RKISP1_CIF_SRSZ_PHASE_VY,
> - .phase_vc = RKISP1_CIF_SRSZ_PHASE_VC,
> - .ctrl_shd = RKISP1_CIF_SRSZ_CTRL_SHD,
> - .phase_hy_shd = RKISP1_CIF_SRSZ_PHASE_HY_SHD,
> - .phase_hc_shd = RKISP1_CIF_SRSZ_PHASE_HC_SHD,
> - .phase_vy_shd = RKISP1_CIF_SRSZ_PHASE_VY_SHD,
> - .phase_vc_shd = RKISP1_CIF_SRSZ_PHASE_VC_SHD,
> - },
> .dual_crop = {
> .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> .yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
> @@ -178,6 +106,17 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> },
> };
>
> +static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
> +{
> + return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
> +}
> +
> +static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
> + u32 value)
> +{
> + rkisp1_write(rsz->rkisp1, rsz->regs_base + offset, value);
> +}
> +
> static struct v4l2_mbus_framefmt *
> rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz,
> struct v4l2_subdev_state *sd_state,
> @@ -277,39 +216,39 @@ static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
> "RSZ_PHASE_HC %d/%d\n"
> "RSZ_PHASE_VY %d/%d\n"
> "RSZ_PHASE_VC %d/%d\n",
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc_shd));
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
> }
>
> static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
> enum rkisp1_shadow_regs_when when)
> {
> - u32 ctrl_cfg = rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl);
> + u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
>
> if (when == RKISP1_SHADOW_REGS_ASYNC)
> ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
> else
> ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
>
> - rkisp1_write(rsz->rkisp1, ctrl_cfg, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
> }
>
> static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> @@ -325,7 +264,7 @@ static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
> enum rkisp1_shadow_regs_when when)
> {
> - rkisp1_write(rsz->rkisp1, 0, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
>
> if (when == RKISP1_SHADOW_REGS_SYNC)
> rkisp1_rsz_update_shadow(rsz, when);
> @@ -338,20 +277,19 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> struct v4l2_rect *src_c,
> enum rkisp1_shadow_regs_when when)
> {
> - struct rkisp1_device *rkisp1 = rsz->rkisp1;
> u32 ratio, rsz_ctrl = 0;
> unsigned int i;
>
> /* No phase offset */
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hy);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hc);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vy);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vc);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
>
> /* Linear interpolation */
> for (i = 0; i < 64; i++) {
> - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut_addr);
> - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
> }
>
> if (sink_y->width != src_y->width) {
> @@ -359,7 +297,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_y->width < src_y->width)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hy);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
> }
>
> if (sink_c->width != src_c->width) {
> @@ -367,8 +305,8 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_c->width < src_c->width)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcb);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcr);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
> }
>
> if (sink_y->height != src_y->height) {
> @@ -376,7 +314,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_y->height < src_y->height)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vy);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
> }
>
> if (sink_c->height != src_c->height) {
> @@ -384,10 +322,10 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_c->height < src_c->height)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vc);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
> }
>
> - rkisp1_write(rkisp1, rsz_ctrl, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
>
> rkisp1_rsz_update_shadow(rsz, when);
> }
> @@ -803,10 +741,13 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
> struct v4l2_subdev *sd = &rsz->sd;
> int ret;
>
> - if (rsz->id == RKISP1_SELFPATH)
> + if (rsz->id == RKISP1_SELFPATH) {
> + rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
> rsz->config = &rkisp1_rsz_config_sp;
> - else
> + } else {
> + rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
> rsz->config = &rkisp1_rsz_config_mp;
> + }
>
> v4l2_subdev_init(sd, &rkisp1_rsz_ops);
> sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
> --
> Regards,
>
> Laurent Pinchart
>
^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH 10/16] media: rkisp1: resizer: Simplify register access
@ 2022-03-02 19:34 ` Dafna Hirschfeld
0 siblings, 0 replies; 54+ messages in thread
From: Dafna Hirschfeld @ 2022-03-02 19:34 UTC (permalink / raw)
To: Laurent Pinchart
Cc: linux-media, Heiko Stuebner, Paul Elder, Tomasz Figa, linux-rockchip
On 27.02.2022 18:01, Laurent Pinchart wrote:
> The registers for the mainpath and selfpath resizers are located at the
> same offset from the instance-specific base. Use this to simplify
> register access, removing the need to store per-register offsets in the
> rkisp1_rsz_config structure.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Dafna Hirschfeld <dafna@fastmail.com>
> ---
> .../platform/rockchip/rkisp1/rkisp1-common.h | 2 +
> .../platform/rockchip/rkisp1/rkisp1-regs.h | 67 +++-----
> .../platform/rockchip/rkisp1/rkisp1-resizer.c | 161 ++++++------------
> 3 files changed, 75 insertions(+), 155 deletions(-)
>
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> index d8fa3f1a5a85..64ad7452eb6b 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
> @@ -313,6 +313,7 @@ struct rkisp1_params {
> * struct rkisp1_resizer - Resizer subdev
> *
> * @sd: v4l2_subdev variable
> + * @regs_base: base register address offset
> * @id: id of the resizer, one of RKISP1_SELFPATH, RKISP1_MAINPATH
> * @rkisp1: pointer to the rkisp1 device
> * @pads: media pads
> @@ -323,6 +324,7 @@ struct rkisp1_params {
> */
> struct rkisp1_resizer {
> struct v4l2_subdev sd;
> + u32 regs_base;
> enum rkisp1_stream_id id;
> struct rkisp1_device *rkisp1;
> struct media_pad pads[RKISP1_RSZ_PAD_MAX];
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> index 4e2b73227e61..083d92ada73f 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> @@ -905,52 +905,29 @@
> #define RKISP1_CIF_DUAL_CROP_S_V_SIZE_SHD (RKISP1_CIF_DUAL_CROP_BASE + 0x00000040)
>
> #define RKISP1_CIF_MRSZ_BASE 0x00000C00
> -#define RKISP1_CIF_MRSZ_CTRL (RKISP1_CIF_MRSZ_BASE + 0x00000000)
> -#define RKISP1_CIF_MRSZ_SCALE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000004)
> -#define RKISP1_CIF_MRSZ_SCALE_HCB (RKISP1_CIF_MRSZ_BASE + 0x00000008)
> -#define RKISP1_CIF_MRSZ_SCALE_HCR (RKISP1_CIF_MRSZ_BASE + 0x0000000C)
> -#define RKISP1_CIF_MRSZ_SCALE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000010)
> -#define RKISP1_CIF_MRSZ_SCALE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000014)
> -#define RKISP1_CIF_MRSZ_PHASE_HY (RKISP1_CIF_MRSZ_BASE + 0x00000018)
> -#define RKISP1_CIF_MRSZ_PHASE_HC (RKISP1_CIF_MRSZ_BASE + 0x0000001C)
> -#define RKISP1_CIF_MRSZ_PHASE_VY (RKISP1_CIF_MRSZ_BASE + 0x00000020)
> -#define RKISP1_CIF_MRSZ_PHASE_VC (RKISP1_CIF_MRSZ_BASE + 0x00000024)
> -#define RKISP1_CIF_MRSZ_SCALE_LUT_ADDR (RKISP1_CIF_MRSZ_BASE + 0x00000028)
> -#define RKISP1_CIF_MRSZ_SCALE_LUT (RKISP1_CIF_MRSZ_BASE + 0x0000002C)
> -#define RKISP1_CIF_MRSZ_CTRL_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000030)
> -#define RKISP1_CIF_MRSZ_SCALE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000034)
> -#define RKISP1_CIF_MRSZ_SCALE_HCB_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000038)
> -#define RKISP1_CIF_MRSZ_SCALE_HCR_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000003C)
> -#define RKISP1_CIF_MRSZ_SCALE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000040)
> -#define RKISP1_CIF_MRSZ_SCALE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000044)
> -#define RKISP1_CIF_MRSZ_PHASE_HY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000048)
> -#define RKISP1_CIF_MRSZ_PHASE_HC_SHD (RKISP1_CIF_MRSZ_BASE + 0x0000004C)
> -#define RKISP1_CIF_MRSZ_PHASE_VY_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000050)
> -#define RKISP1_CIF_MRSZ_PHASE_VC_SHD (RKISP1_CIF_MRSZ_BASE + 0x00000054)
> -
> #define RKISP1_CIF_SRSZ_BASE 0x00001000
> -#define RKISP1_CIF_SRSZ_CTRL (RKISP1_CIF_SRSZ_BASE + 0x00000000)
> -#define RKISP1_CIF_SRSZ_SCALE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000004)
> -#define RKISP1_CIF_SRSZ_SCALE_HCB (RKISP1_CIF_SRSZ_BASE + 0x00000008)
> -#define RKISP1_CIF_SRSZ_SCALE_HCR (RKISP1_CIF_SRSZ_BASE + 0x0000000C)
> -#define RKISP1_CIF_SRSZ_SCALE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000010)
> -#define RKISP1_CIF_SRSZ_SCALE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000014)
> -#define RKISP1_CIF_SRSZ_PHASE_HY (RKISP1_CIF_SRSZ_BASE + 0x00000018)
> -#define RKISP1_CIF_SRSZ_PHASE_HC (RKISP1_CIF_SRSZ_BASE + 0x0000001C)
> -#define RKISP1_CIF_SRSZ_PHASE_VY (RKISP1_CIF_SRSZ_BASE + 0x00000020)
> -#define RKISP1_CIF_SRSZ_PHASE_VC (RKISP1_CIF_SRSZ_BASE + 0x00000024)
> -#define RKISP1_CIF_SRSZ_SCALE_LUT_ADDR (RKISP1_CIF_SRSZ_BASE + 0x00000028)
> -#define RKISP1_CIF_SRSZ_SCALE_LUT (RKISP1_CIF_SRSZ_BASE + 0x0000002C)
> -#define RKISP1_CIF_SRSZ_CTRL_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000030)
> -#define RKISP1_CIF_SRSZ_SCALE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000034)
> -#define RKISP1_CIF_SRSZ_SCALE_HCB_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000038)
> -#define RKISP1_CIF_SRSZ_SCALE_HCR_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000003C)
> -#define RKISP1_CIF_SRSZ_SCALE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000040)
> -#define RKISP1_CIF_SRSZ_SCALE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000044)
> -#define RKISP1_CIF_SRSZ_PHASE_HY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000048)
> -#define RKISP1_CIF_SRSZ_PHASE_HC_SHD (RKISP1_CIF_SRSZ_BASE + 0x0000004C)
> -#define RKISP1_CIF_SRSZ_PHASE_VY_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000050)
> -#define RKISP1_CIF_SRSZ_PHASE_VC_SHD (RKISP1_CIF_SRSZ_BASE + 0x00000054)
> +#define RKISP1_CIF_RSZ_CTRL 0x0000
> +#define RKISP1_CIF_RSZ_SCALE_HY 0x0004
> +#define RKISP1_CIF_RSZ_SCALE_HCB 0x0008
> +#define RKISP1_CIF_RSZ_SCALE_HCR 0x000C
> +#define RKISP1_CIF_RSZ_SCALE_VY 0x0010
> +#define RKISP1_CIF_RSZ_SCALE_VC 0x0014
> +#define RKISP1_CIF_RSZ_PHASE_HY 0x0018
> +#define RKISP1_CIF_RSZ_PHASE_HC 0x001C
> +#define RKISP1_CIF_RSZ_PHASE_VY 0x0020
> +#define RKISP1_CIF_RSZ_PHASE_VC 0x0024
> +#define RKISP1_CIF_RSZ_SCALE_LUT_ADDR 0x0028
> +#define RKISP1_CIF_RSZ_SCALE_LUT 0x002C
> +#define RKISP1_CIF_RSZ_CTRL_SHD 0x0030
> +#define RKISP1_CIF_RSZ_SCALE_HY_SHD 0x0034
> +#define RKISP1_CIF_RSZ_SCALE_HCB_SHD 0x0038
> +#define RKISP1_CIF_RSZ_SCALE_HCR_SHD 0x003C
> +#define RKISP1_CIF_RSZ_SCALE_VY_SHD 0x0040
> +#define RKISP1_CIF_RSZ_SCALE_VC_SHD 0x0044
> +#define RKISP1_CIF_RSZ_PHASE_HY_SHD 0x0048
> +#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
> +#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
> +#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
>
> #define RKISP1_CIF_MI_BASE 0x00001400
> #define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> index 65ce8d647118..2135cd40f604 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
> @@ -59,30 +59,6 @@ struct rkisp1_rsz_config {
> const int min_rsz_width;
> const int min_rsz_height;
> /* registers */
> - struct {
> - u32 ctrl;
> - u32 ctrl_shd;
> - u32 scale_hy;
> - u32 scale_hcr;
> - u32 scale_hcb;
> - u32 scale_vy;
> - u32 scale_vc;
> - u32 scale_lut;
> - u32 scale_lut_addr;
> - u32 scale_hy_shd;
> - u32 scale_hcr_shd;
> - u32 scale_hcb_shd;
> - u32 scale_vy_shd;
> - u32 scale_vc_shd;
> - u32 phase_hy;
> - u32 phase_hc;
> - u32 phase_vy;
> - u32 phase_vc;
> - u32 phase_hy_shd;
> - u32 phase_hc_shd;
> - u32 phase_vy_shd;
> - u32 phase_vc_shd;
> - } rsz;
> struct {
> u32 ctrl;
> u32 yuvmode_mask;
> @@ -101,30 +77,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
> .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> /* registers */
> - .rsz = {
> - .ctrl = RKISP1_CIF_MRSZ_CTRL,
> - .scale_hy = RKISP1_CIF_MRSZ_SCALE_HY,
> - .scale_hcr = RKISP1_CIF_MRSZ_SCALE_HCR,
> - .scale_hcb = RKISP1_CIF_MRSZ_SCALE_HCB,
> - .scale_vy = RKISP1_CIF_MRSZ_SCALE_VY,
> - .scale_vc = RKISP1_CIF_MRSZ_SCALE_VC,
> - .scale_lut = RKISP1_CIF_MRSZ_SCALE_LUT,
> - .scale_lut_addr = RKISP1_CIF_MRSZ_SCALE_LUT_ADDR,
> - .scale_hy_shd = RKISP1_CIF_MRSZ_SCALE_HY_SHD,
> - .scale_hcr_shd = RKISP1_CIF_MRSZ_SCALE_HCR_SHD,
> - .scale_hcb_shd = RKISP1_CIF_MRSZ_SCALE_HCB_SHD,
> - .scale_vy_shd = RKISP1_CIF_MRSZ_SCALE_VY_SHD,
> - .scale_vc_shd = RKISP1_CIF_MRSZ_SCALE_VC_SHD,
> - .phase_hy = RKISP1_CIF_MRSZ_PHASE_HY,
> - .phase_hc = RKISP1_CIF_MRSZ_PHASE_HC,
> - .phase_vy = RKISP1_CIF_MRSZ_PHASE_VY,
> - .phase_vc = RKISP1_CIF_MRSZ_PHASE_VC,
> - .ctrl_shd = RKISP1_CIF_MRSZ_CTRL_SHD,
> - .phase_hy_shd = RKISP1_CIF_MRSZ_PHASE_HY_SHD,
> - .phase_hc_shd = RKISP1_CIF_MRSZ_PHASE_HC_SHD,
> - .phase_vy_shd = RKISP1_CIF_MRSZ_PHASE_VY_SHD,
> - .phase_vc_shd = RKISP1_CIF_MRSZ_PHASE_VC_SHD,
> - },
> .dual_crop = {
> .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> .yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
> @@ -143,30 +95,6 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
> .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
> /* registers */
> - .rsz = {
> - .ctrl = RKISP1_CIF_SRSZ_CTRL,
> - .scale_hy = RKISP1_CIF_SRSZ_SCALE_HY,
> - .scale_hcr = RKISP1_CIF_SRSZ_SCALE_HCR,
> - .scale_hcb = RKISP1_CIF_SRSZ_SCALE_HCB,
> - .scale_vy = RKISP1_CIF_SRSZ_SCALE_VY,
> - .scale_vc = RKISP1_CIF_SRSZ_SCALE_VC,
> - .scale_lut = RKISP1_CIF_SRSZ_SCALE_LUT,
> - .scale_lut_addr = RKISP1_CIF_SRSZ_SCALE_LUT_ADDR,
> - .scale_hy_shd = RKISP1_CIF_SRSZ_SCALE_HY_SHD,
> - .scale_hcr_shd = RKISP1_CIF_SRSZ_SCALE_HCR_SHD,
> - .scale_hcb_shd = RKISP1_CIF_SRSZ_SCALE_HCB_SHD,
> - .scale_vy_shd = RKISP1_CIF_SRSZ_SCALE_VY_SHD,
> - .scale_vc_shd = RKISP1_CIF_SRSZ_SCALE_VC_SHD,
> - .phase_hy = RKISP1_CIF_SRSZ_PHASE_HY,
> - .phase_hc = RKISP1_CIF_SRSZ_PHASE_HC,
> - .phase_vy = RKISP1_CIF_SRSZ_PHASE_VY,
> - .phase_vc = RKISP1_CIF_SRSZ_PHASE_VC,
> - .ctrl_shd = RKISP1_CIF_SRSZ_CTRL_SHD,
> - .phase_hy_shd = RKISP1_CIF_SRSZ_PHASE_HY_SHD,
> - .phase_hc_shd = RKISP1_CIF_SRSZ_PHASE_HC_SHD,
> - .phase_vy_shd = RKISP1_CIF_SRSZ_PHASE_VY_SHD,
> - .phase_vc_shd = RKISP1_CIF_SRSZ_PHASE_VC_SHD,
> - },
> .dual_crop = {
> .ctrl = RKISP1_CIF_DUAL_CROP_CTRL,
> .yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
> @@ -178,6 +106,17 @@ static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
> },
> };
>
> +static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
> +{
> + return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
> +}
> +
> +static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
> + u32 value)
> +{
> + rkisp1_write(rsz->rkisp1, rsz->regs_base + offset, value);
> +}
> +
> static struct v4l2_mbus_framefmt *
> rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz,
> struct v4l2_subdev_state *sd_state,
> @@ -277,39 +216,39 @@ static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
> "RSZ_PHASE_HC %d/%d\n"
> "RSZ_PHASE_VY %d/%d\n"
> "RSZ_PHASE_VC %d/%d\n",
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcb_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_hcr_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.scale_vc_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_hc_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vy_shd),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc),
> - rkisp1_read(rsz->rkisp1, rsz->config->rsz.phase_vc_shd));
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
> + rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
> }
>
> static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
> enum rkisp1_shadow_regs_when when)
> {
> - u32 ctrl_cfg = rkisp1_read(rsz->rkisp1, rsz->config->rsz.ctrl);
> + u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
>
> if (when == RKISP1_SHADOW_REGS_ASYNC)
> ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
> else
> ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
>
> - rkisp1_write(rsz->rkisp1, ctrl_cfg, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
> }
>
> static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> @@ -325,7 +264,7 @@ static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
> static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
> enum rkisp1_shadow_regs_when when)
> {
> - rkisp1_write(rsz->rkisp1, 0, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
>
> if (when == RKISP1_SHADOW_REGS_SYNC)
> rkisp1_rsz_update_shadow(rsz, when);
> @@ -338,20 +277,19 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> struct v4l2_rect *src_c,
> enum rkisp1_shadow_regs_when when)
> {
> - struct rkisp1_device *rkisp1 = rsz->rkisp1;
> u32 ratio, rsz_ctrl = 0;
> unsigned int i;
>
> /* No phase offset */
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hy);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_hc);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vy);
> - rkisp1_write(rkisp1, 0, rsz->config->rsz.phase_vc);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
>
> /* Linear interpolation */
> for (i = 0; i < 64; i++) {
> - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut_addr);
> - rkisp1_write(rkisp1, i, rsz->config->rsz.scale_lut);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
> }
>
> if (sink_y->width != src_y->width) {
> @@ -359,7 +297,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_y->width < src_y->width)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hy);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
> }
>
> if (sink_c->width != src_c->width) {
> @@ -367,8 +305,8 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_c->width < src_c->width)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcb);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_hcr);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
> }
>
> if (sink_y->height != src_y->height) {
> @@ -376,7 +314,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_y->height < src_y->height)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vy);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
> }
>
> if (sink_c->height != src_c->height) {
> @@ -384,10 +322,10 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
> if (sink_c->height < src_c->height)
> rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
> ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
> - rkisp1_write(rkisp1, ratio, rsz->config->rsz.scale_vc);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
> }
>
> - rkisp1_write(rkisp1, rsz_ctrl, rsz->config->rsz.ctrl);
> + rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
>
> rkisp1_rsz_update_shadow(rsz, when);
> }
> @@ -803,10 +741,13 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
> struct v4l2_subdev *sd = &rsz->sd;
> int ret;
>
> - if (rsz->id == RKISP1_SELFPATH)
> + if (rsz->id == RKISP1_SELFPATH) {
> + rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
> rsz->config = &rkisp1_rsz_config_sp;
> - else
> + } else {
> + rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
> rsz->config = &rkisp1_rsz_config_mp;
> + }
>
> v4l2_subdev_init(sd, &rkisp1_rsz_ops);
> sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
> --
> Regards,
>
> Laurent Pinchart
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH 11/16] media: rkisp1: Move debugfs code to a separate file
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
To avoid cluttering the main rkisp1-dev.c driver file, move debugfs code
to a separate source file. This prepares for extensions to the debugfs
infrastructure.
While at it, add a missing forward declaration for struct dentry in
rkisp1-common.h to avoid depending on indirect includes.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../media/platform/rockchip/rkisp1/Makefile | 1 +
.../platform/rockchip/rkisp1/rkisp1-common.h | 5 ++
.../platform/rockchip/rkisp1/rkisp1-debug.c | 50 +++++++++++++++++++
.../platform/rockchip/rkisp1/rkisp1-dev.c | 33 +-----------
4 files changed, 57 insertions(+), 32 deletions(-)
create mode 100644 drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
diff --git a/drivers/media/platform/rockchip/rkisp1/Makefile b/drivers/media/platform/rockchip/rkisp1/Makefile
index ab32a77db8f7..1a39bdcc608e 100644
--- a/drivers/media/platform/rockchip/rkisp1/Makefile
+++ b/drivers/media/platform/rockchip/rkisp1/Makefile
@@ -3,6 +3,7 @@
obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rockchip-isp1.o
rockchip-isp1-objs += rkisp1-capture.o \
rkisp1-common.o \
+ rkisp1-debug.o \
rkisp1-dev.o \
rkisp1-isp.o \
rkisp1-resizer.o \
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
index 64ad7452eb6b..b860eac9a981 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
@@ -23,6 +23,8 @@
#include "rkisp1-regs.h"
+struct dentry;
+
/*
* flags on the 'direction' field in struct 'rkisp1_isp_mbus_info' that indicate
* on which pad the media bus format is supported
@@ -516,4 +518,7 @@ void rkisp1_stats_unregister(struct rkisp1_device *rkisp1);
int rkisp1_params_register(struct rkisp1_device *rkisp1);
void rkisp1_params_unregister(struct rkisp1_device *rkisp1);
+void rkisp1_debug_init(struct rkisp1_device *rkisp1);
+void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1);
+
#endif /* _RKISP1_COMMON_H */
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
new file mode 100644
index 000000000000..64b33774cbdf
--- /dev/null
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip ISP1 Driver - Base driver
+ *
+ * Copyright (C) 2019 Collabora, Ltd.
+ *
+ * Based on Rockchip ISP1 driver by Rockchip Electronics Co., Ltd.
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/debugfs.h>
+#include <linux/device.h>
+
+#include "rkisp1-common.h"
+
+void rkisp1_debug_init(struct rkisp1_device *rkisp1)
+{
+ struct rkisp1_debug *debug = &rkisp1->debug;
+
+ debug->debugfs_dir = debugfs_create_dir(dev_name(rkisp1->dev), NULL);
+
+ debugfs_create_ulong("data_loss", 0444, debug->debugfs_dir,
+ &debug->data_loss);
+ debugfs_create_ulong("outform_size_err", 0444, debug->debugfs_dir,
+ &debug->outform_size_error);
+ debugfs_create_ulong("img_stabilization_size_error", 0444,
+ debug->debugfs_dir,
+ &debug->img_stabilization_size_error);
+ debugfs_create_ulong("inform_size_error", 0444, debug->debugfs_dir,
+ &debug->inform_size_error);
+ debugfs_create_ulong("irq_delay", 0444, debug->debugfs_dir,
+ &debug->irq_delay);
+ debugfs_create_ulong("mipi_error", 0444, debug->debugfs_dir,
+ &debug->mipi_error);
+ debugfs_create_ulong("stats_error", 0444, debug->debugfs_dir,
+ &debug->stats_error);
+ debugfs_create_ulong("mp_stop_timeout", 0444, debug->debugfs_dir,
+ &debug->stop_timeout[RKISP1_MAINPATH]);
+ debugfs_create_ulong("sp_stop_timeout", 0444, debug->debugfs_dir,
+ &debug->stop_timeout[RKISP1_SELFPATH]);
+ debugfs_create_ulong("mp_frame_drop", 0444, debug->debugfs_dir,
+ &debug->frame_drop[RKISP1_MAINPATH]);
+ debugfs_create_ulong("sp_frame_drop", 0444, debug->debugfs_dir,
+ &debug->frame_drop[RKISP1_SELFPATH]);
+}
+
+void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
+{
+ debugfs_remove_recursive(rkisp1->debug.debugfs_dir);
+}
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
index f8b2573aa9da..c7ad1986e67b 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
@@ -9,7 +9,6 @@
*/
#include <linux/clk.h>
-#include <linux/debugfs.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
@@ -460,36 +459,6 @@ static const struct of_device_id rkisp1_of_match[] = {
};
MODULE_DEVICE_TABLE(of, rkisp1_of_match);
-static void rkisp1_debug_init(struct rkisp1_device *rkisp1)
-{
- struct rkisp1_debug *debug = &rkisp1->debug;
-
- debug->debugfs_dir = debugfs_create_dir(dev_name(rkisp1->dev), NULL);
- debugfs_create_ulong("data_loss", 0444, debug->debugfs_dir,
- &debug->data_loss);
- debugfs_create_ulong("outform_size_err", 0444, debug->debugfs_dir,
- &debug->outform_size_error);
- debugfs_create_ulong("img_stabilization_size_error", 0444,
- debug->debugfs_dir,
- &debug->img_stabilization_size_error);
- debugfs_create_ulong("inform_size_error", 0444, debug->debugfs_dir,
- &debug->inform_size_error);
- debugfs_create_ulong("irq_delay", 0444, debug->debugfs_dir,
- &debug->irq_delay);
- debugfs_create_ulong("mipi_error", 0444, debug->debugfs_dir,
- &debug->mipi_error);
- debugfs_create_ulong("stats_error", 0444, debug->debugfs_dir,
- &debug->stats_error);
- debugfs_create_ulong("mp_stop_timeout", 0444, debug->debugfs_dir,
- &debug->stop_timeout[RKISP1_MAINPATH]);
- debugfs_create_ulong("sp_stop_timeout", 0444, debug->debugfs_dir,
- &debug->stop_timeout[RKISP1_SELFPATH]);
- debugfs_create_ulong("mp_frame_drop", 0444, debug->debugfs_dir,
- &debug->frame_drop[RKISP1_MAINPATH]);
- debugfs_create_ulong("sp_frame_drop", 0444, debug->debugfs_dir,
- &debug->frame_drop[RKISP1_SELFPATH]);
-}
-
static int rkisp1_probe(struct platform_device *pdev)
{
const struct rkisp1_match_data *match_data;
@@ -586,13 +555,13 @@ static int rkisp1_remove(struct platform_device *pdev)
v4l2_async_nf_cleanup(&rkisp1->notifier);
rkisp1_entities_unregister(rkisp1);
+ rkisp1_debug_cleanup(rkisp1);
media_device_unregister(&rkisp1->media_dev);
v4l2_device_unregister(&rkisp1->v4l2_dev);
pm_runtime_disable(&pdev->dev);
- debugfs_remove_recursive(rkisp1->debug.debugfs_dir);
return 0;
}
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 11/16] media: rkisp1: Move debugfs code to a separate file
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
To avoid cluttering the main rkisp1-dev.c driver file, move debugfs code
to a separate source file. This prepares for extensions to the debugfs
infrastructure.
While at it, add a missing forward declaration for struct dentry in
rkisp1-common.h to avoid depending on indirect includes.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../media/platform/rockchip/rkisp1/Makefile | 1 +
.../platform/rockchip/rkisp1/rkisp1-common.h | 5 ++
.../platform/rockchip/rkisp1/rkisp1-debug.c | 50 +++++++++++++++++++
.../platform/rockchip/rkisp1/rkisp1-dev.c | 33 +-----------
4 files changed, 57 insertions(+), 32 deletions(-)
create mode 100644 drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
diff --git a/drivers/media/platform/rockchip/rkisp1/Makefile b/drivers/media/platform/rockchip/rkisp1/Makefile
index ab32a77db8f7..1a39bdcc608e 100644
--- a/drivers/media/platform/rockchip/rkisp1/Makefile
+++ b/drivers/media/platform/rockchip/rkisp1/Makefile
@@ -3,6 +3,7 @@
obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rockchip-isp1.o
rockchip-isp1-objs += rkisp1-capture.o \
rkisp1-common.o \
+ rkisp1-debug.o \
rkisp1-dev.o \
rkisp1-isp.o \
rkisp1-resizer.o \
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
index 64ad7452eb6b..b860eac9a981 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
@@ -23,6 +23,8 @@
#include "rkisp1-regs.h"
+struct dentry;
+
/*
* flags on the 'direction' field in struct 'rkisp1_isp_mbus_info' that indicate
* on which pad the media bus format is supported
@@ -516,4 +518,7 @@ void rkisp1_stats_unregister(struct rkisp1_device *rkisp1);
int rkisp1_params_register(struct rkisp1_device *rkisp1);
void rkisp1_params_unregister(struct rkisp1_device *rkisp1);
+void rkisp1_debug_init(struct rkisp1_device *rkisp1);
+void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1);
+
#endif /* _RKISP1_COMMON_H */
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
new file mode 100644
index 000000000000..64b33774cbdf
--- /dev/null
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip ISP1 Driver - Base driver
+ *
+ * Copyright (C) 2019 Collabora, Ltd.
+ *
+ * Based on Rockchip ISP1 driver by Rockchip Electronics Co., Ltd.
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/debugfs.h>
+#include <linux/device.h>
+
+#include "rkisp1-common.h"
+
+void rkisp1_debug_init(struct rkisp1_device *rkisp1)
+{
+ struct rkisp1_debug *debug = &rkisp1->debug;
+
+ debug->debugfs_dir = debugfs_create_dir(dev_name(rkisp1->dev), NULL);
+
+ debugfs_create_ulong("data_loss", 0444, debug->debugfs_dir,
+ &debug->data_loss);
+ debugfs_create_ulong("outform_size_err", 0444, debug->debugfs_dir,
+ &debug->outform_size_error);
+ debugfs_create_ulong("img_stabilization_size_error", 0444,
+ debug->debugfs_dir,
+ &debug->img_stabilization_size_error);
+ debugfs_create_ulong("inform_size_error", 0444, debug->debugfs_dir,
+ &debug->inform_size_error);
+ debugfs_create_ulong("irq_delay", 0444, debug->debugfs_dir,
+ &debug->irq_delay);
+ debugfs_create_ulong("mipi_error", 0444, debug->debugfs_dir,
+ &debug->mipi_error);
+ debugfs_create_ulong("stats_error", 0444, debug->debugfs_dir,
+ &debug->stats_error);
+ debugfs_create_ulong("mp_stop_timeout", 0444, debug->debugfs_dir,
+ &debug->stop_timeout[RKISP1_MAINPATH]);
+ debugfs_create_ulong("sp_stop_timeout", 0444, debug->debugfs_dir,
+ &debug->stop_timeout[RKISP1_SELFPATH]);
+ debugfs_create_ulong("mp_frame_drop", 0444, debug->debugfs_dir,
+ &debug->frame_drop[RKISP1_MAINPATH]);
+ debugfs_create_ulong("sp_frame_drop", 0444, debug->debugfs_dir,
+ &debug->frame_drop[RKISP1_SELFPATH]);
+}
+
+void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
+{
+ debugfs_remove_recursive(rkisp1->debug.debugfs_dir);
+}
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
index f8b2573aa9da..c7ad1986e67b 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c
@@ -9,7 +9,6 @@
*/
#include <linux/clk.h>
-#include <linux/debugfs.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
@@ -460,36 +459,6 @@ static const struct of_device_id rkisp1_of_match[] = {
};
MODULE_DEVICE_TABLE(of, rkisp1_of_match);
-static void rkisp1_debug_init(struct rkisp1_device *rkisp1)
-{
- struct rkisp1_debug *debug = &rkisp1->debug;
-
- debug->debugfs_dir = debugfs_create_dir(dev_name(rkisp1->dev), NULL);
- debugfs_create_ulong("data_loss", 0444, debug->debugfs_dir,
- &debug->data_loss);
- debugfs_create_ulong("outform_size_err", 0444, debug->debugfs_dir,
- &debug->outform_size_error);
- debugfs_create_ulong("img_stabilization_size_error", 0444,
- debug->debugfs_dir,
- &debug->img_stabilization_size_error);
- debugfs_create_ulong("inform_size_error", 0444, debug->debugfs_dir,
- &debug->inform_size_error);
- debugfs_create_ulong("irq_delay", 0444, debug->debugfs_dir,
- &debug->irq_delay);
- debugfs_create_ulong("mipi_error", 0444, debug->debugfs_dir,
- &debug->mipi_error);
- debugfs_create_ulong("stats_error", 0444, debug->debugfs_dir,
- &debug->stats_error);
- debugfs_create_ulong("mp_stop_timeout", 0444, debug->debugfs_dir,
- &debug->stop_timeout[RKISP1_MAINPATH]);
- debugfs_create_ulong("sp_stop_timeout", 0444, debug->debugfs_dir,
- &debug->stop_timeout[RKISP1_SELFPATH]);
- debugfs_create_ulong("mp_frame_drop", 0444, debug->debugfs_dir,
- &debug->frame_drop[RKISP1_MAINPATH]);
- debugfs_create_ulong("sp_frame_drop", 0444, debug->debugfs_dir,
- &debug->frame_drop[RKISP1_SELFPATH]);
-}
-
static int rkisp1_probe(struct platform_device *pdev)
{
const struct rkisp1_match_data *match_data;
@@ -586,13 +555,13 @@ static int rkisp1_remove(struct platform_device *pdev)
v4l2_async_nf_cleanup(&rkisp1->notifier);
rkisp1_entities_unregister(rkisp1);
+ rkisp1_debug_cleanup(rkisp1);
media_device_unregister(&rkisp1->media_dev);
v4l2_device_unregister(&rkisp1->v4l2_dev);
pm_runtime_disable(&pdev->dev);
- debugfs_remove_recursive(rkisp1->debug.debugfs_dir);
return 0;
}
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH 12/16] media: rkisp1: Compile debugfs support conditionally
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
When CONFIG_DEBUGFS is disabled, there's no need to compile the debugfs
support in. Make it conditional.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../media/platform/rockchip/rkisp1/Makefile | 19 +++++++++++--------
.../platform/rockchip/rkisp1/rkisp1-common.h | 9 +++++++++
2 files changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/Makefile b/drivers/media/platform/rockchip/rkisp1/Makefile
index 1a39bdcc608e..c39ab7010c66 100644
--- a/drivers/media/platform/rockchip/rkisp1/Makefile
+++ b/drivers/media/platform/rockchip/rkisp1/Makefile
@@ -1,11 +1,14 @@
# SPDX-License-Identifier: GPL-2.0
+rockchip-isp1-y := rkisp1-capture.o \
+ rkisp1-common.o \
+ rkisp1-debug.o \
+ rkisp1-dev.o \
+ rkisp1-isp.o \
+ rkisp1-resizer.o \
+ rkisp1-stats.o \
+ rkisp1-params.o
+
+rockchip-isp1-$(CONFIG_DEBUG_FS) += rkisp1-debug.o
+
obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rockchip-isp1.o
-rockchip-isp1-objs += rkisp1-capture.o \
- rkisp1-common.o \
- rkisp1-debug.o \
- rkisp1-dev.o \
- rkisp1-isp.o \
- rkisp1-resizer.o \
- rkisp1-stats.o \
- rkisp1-params.o
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
index b860eac9a981..fa31b343d1d2 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
@@ -518,7 +518,16 @@ void rkisp1_stats_unregister(struct rkisp1_device *rkisp1);
int rkisp1_params_register(struct rkisp1_device *rkisp1);
void rkisp1_params_unregister(struct rkisp1_device *rkisp1);
+#if IS_ENABLED(CONFIG_DEBUG_FS)
void rkisp1_debug_init(struct rkisp1_device *rkisp1);
void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1);
+#else
+static inline void rkisp1_debug_init(struct rkisp1_device *rkisp1)
+{
+}
+static inline void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
+{
+}
+#endif
#endif /* _RKISP1_COMMON_H */
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 12/16] media: rkisp1: Compile debugfs support conditionally
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
When CONFIG_DEBUGFS is disabled, there's no need to compile the debugfs
support in. Make it conditional.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../media/platform/rockchip/rkisp1/Makefile | 19 +++++++++++--------
.../platform/rockchip/rkisp1/rkisp1-common.h | 9 +++++++++
2 files changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/Makefile b/drivers/media/platform/rockchip/rkisp1/Makefile
index 1a39bdcc608e..c39ab7010c66 100644
--- a/drivers/media/platform/rockchip/rkisp1/Makefile
+++ b/drivers/media/platform/rockchip/rkisp1/Makefile
@@ -1,11 +1,14 @@
# SPDX-License-Identifier: GPL-2.0
+rockchip-isp1-y := rkisp1-capture.o \
+ rkisp1-common.o \
+ rkisp1-debug.o \
+ rkisp1-dev.o \
+ rkisp1-isp.o \
+ rkisp1-resizer.o \
+ rkisp1-stats.o \
+ rkisp1-params.o
+
+rockchip-isp1-$(CONFIG_DEBUG_FS) += rkisp1-debug.o
+
obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rockchip-isp1.o
-rockchip-isp1-objs += rkisp1-capture.o \
- rkisp1-common.o \
- rkisp1-debug.o \
- rkisp1-dev.o \
- rkisp1-isp.o \
- rkisp1-resizer.o \
- rkisp1-stats.o \
- rkisp1-params.o
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
index b860eac9a981..fa31b343d1d2 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
@@ -518,7 +518,16 @@ void rkisp1_stats_unregister(struct rkisp1_device *rkisp1);
int rkisp1_params_register(struct rkisp1_device *rkisp1);
void rkisp1_params_unregister(struct rkisp1_device *rkisp1);
+#if IS_ENABLED(CONFIG_DEBUG_FS)
void rkisp1_debug_init(struct rkisp1_device *rkisp1);
void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1);
+#else
+static inline void rkisp1_debug_init(struct rkisp1_device *rkisp1)
+{
+}
+static inline void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
+{
+}
+#endif
#endif /* _RKISP1_COMMON_H */
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread* Re: [PATCH 12/16] media: rkisp1: Compile debugfs support conditionally
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-28 3:27 ` kernel test robot
-1 siblings, 0 replies; 54+ messages in thread
From: kernel test robot @ 2022-02-28 3:27 UTC (permalink / raw)
To: Laurent Pinchart, linux-media
Cc: kbuild-all, Dafna Hirschfeld, Heiko Stuebner, Paul Elder,
Tomasz Figa, linux-rockchip
Hi Laurent,
I love your patch! Yet something to improve:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on media-tree/master v5.17-rc6 next-20220225]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Laurent-Pinchart/media-rkisp1-Misc-bug-fixes-and-cleanups/20220228-000306
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
config: m68k-randconfig-r022-20220228 (https://download.01.org/0day-ci/archive/20220228/202202281151.lY2yvuon-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/2ee8966047a595378fe16e057f9a25fd7e237f9c
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Laurent-Pinchart/media-rkisp1-Misc-bug-fixes-and-cleanups/20220228-000306
git checkout 2ee8966047a595378fe16e057f9a25fd7e237f9c
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=m68k SHELL=/bin/bash drivers/media/platform/rockchip/rkisp1/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c:16:6: error: redefinition of 'rkisp1_debug_init'
16 | void rkisp1_debug_init(struct rkisp1_device *rkisp1)
| ^~~~~~~~~~~~~~~~~
In file included from drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c:14:
drivers/media/platform/rockchip/rkisp1/rkisp1-common.h:525:20: note: previous definition of 'rkisp1_debug_init' with type 'void(struct rkisp1_device *)'
525 | static inline void rkisp1_debug_init(struct rkisp1_device *rkisp1)
| ^~~~~~~~~~~~~~~~~
>> drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c:47:6: error: redefinition of 'rkisp1_debug_cleanup'
47 | void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
| ^~~~~~~~~~~~~~~~~~~~
In file included from drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c:14:
drivers/media/platform/rockchip/rkisp1/rkisp1-common.h:528:20: note: previous definition of 'rkisp1_debug_cleanup' with type 'void(struct rkisp1_device *)'
528 | static inline void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
| ^~~~~~~~~~~~~~~~~~~~
vim +/rkisp1_debug_init +16 drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
d321afe87aa3ed Laurent Pinchart 2022-02-27 15
d321afe87aa3ed Laurent Pinchart 2022-02-27 @16 void rkisp1_debug_init(struct rkisp1_device *rkisp1)
d321afe87aa3ed Laurent Pinchart 2022-02-27 17 {
d321afe87aa3ed Laurent Pinchart 2022-02-27 18 struct rkisp1_debug *debug = &rkisp1->debug;
d321afe87aa3ed Laurent Pinchart 2022-02-27 19
d321afe87aa3ed Laurent Pinchart 2022-02-27 20 debug->debugfs_dir = debugfs_create_dir(dev_name(rkisp1->dev), NULL);
d321afe87aa3ed Laurent Pinchart 2022-02-27 21
d321afe87aa3ed Laurent Pinchart 2022-02-27 22 debugfs_create_ulong("data_loss", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 23 &debug->data_loss);
d321afe87aa3ed Laurent Pinchart 2022-02-27 24 debugfs_create_ulong("outform_size_err", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 25 &debug->outform_size_error);
d321afe87aa3ed Laurent Pinchart 2022-02-27 26 debugfs_create_ulong("img_stabilization_size_error", 0444,
d321afe87aa3ed Laurent Pinchart 2022-02-27 27 debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 28 &debug->img_stabilization_size_error);
d321afe87aa3ed Laurent Pinchart 2022-02-27 29 debugfs_create_ulong("inform_size_error", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 30 &debug->inform_size_error);
d321afe87aa3ed Laurent Pinchart 2022-02-27 31 debugfs_create_ulong("irq_delay", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 32 &debug->irq_delay);
d321afe87aa3ed Laurent Pinchart 2022-02-27 33 debugfs_create_ulong("mipi_error", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 34 &debug->mipi_error);
d321afe87aa3ed Laurent Pinchart 2022-02-27 35 debugfs_create_ulong("stats_error", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 36 &debug->stats_error);
d321afe87aa3ed Laurent Pinchart 2022-02-27 37 debugfs_create_ulong("mp_stop_timeout", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 38 &debug->stop_timeout[RKISP1_MAINPATH]);
d321afe87aa3ed Laurent Pinchart 2022-02-27 39 debugfs_create_ulong("sp_stop_timeout", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 40 &debug->stop_timeout[RKISP1_SELFPATH]);
d321afe87aa3ed Laurent Pinchart 2022-02-27 41 debugfs_create_ulong("mp_frame_drop", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 42 &debug->frame_drop[RKISP1_MAINPATH]);
d321afe87aa3ed Laurent Pinchart 2022-02-27 43 debugfs_create_ulong("sp_frame_drop", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 44 &debug->frame_drop[RKISP1_SELFPATH]);
d321afe87aa3ed Laurent Pinchart 2022-02-27 45 }
d321afe87aa3ed Laurent Pinchart 2022-02-27 46
d321afe87aa3ed Laurent Pinchart 2022-02-27 @47 void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply [flat|nested] 54+ messages in thread* Re: [PATCH 12/16] media: rkisp1: Compile debugfs support conditionally
@ 2022-02-28 3:27 ` kernel test robot
0 siblings, 0 replies; 54+ messages in thread
From: kernel test robot @ 2022-02-28 3:27 UTC (permalink / raw)
To: Laurent Pinchart, linux-media
Cc: kbuild-all, Dafna Hirschfeld, Heiko Stuebner, Paul Elder,
Tomasz Figa, linux-rockchip
Hi Laurent,
I love your patch! Yet something to improve:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on media-tree/master v5.17-rc6 next-20220225]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Laurent-Pinchart/media-rkisp1-Misc-bug-fixes-and-cleanups/20220228-000306
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
config: m68k-randconfig-r022-20220228 (https://download.01.org/0day-ci/archive/20220228/202202281151.lY2yvuon-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/2ee8966047a595378fe16e057f9a25fd7e237f9c
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Laurent-Pinchart/media-rkisp1-Misc-bug-fixes-and-cleanups/20220228-000306
git checkout 2ee8966047a595378fe16e057f9a25fd7e237f9c
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=m68k SHELL=/bin/bash drivers/media/platform/rockchip/rkisp1/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c:16:6: error: redefinition of 'rkisp1_debug_init'
16 | void rkisp1_debug_init(struct rkisp1_device *rkisp1)
| ^~~~~~~~~~~~~~~~~
In file included from drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c:14:
drivers/media/platform/rockchip/rkisp1/rkisp1-common.h:525:20: note: previous definition of 'rkisp1_debug_init' with type 'void(struct rkisp1_device *)'
525 | static inline void rkisp1_debug_init(struct rkisp1_device *rkisp1)
| ^~~~~~~~~~~~~~~~~
>> drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c:47:6: error: redefinition of 'rkisp1_debug_cleanup'
47 | void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
| ^~~~~~~~~~~~~~~~~~~~
In file included from drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c:14:
drivers/media/platform/rockchip/rkisp1/rkisp1-common.h:528:20: note: previous definition of 'rkisp1_debug_cleanup' with type 'void(struct rkisp1_device *)'
528 | static inline void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
| ^~~~~~~~~~~~~~~~~~~~
vim +/rkisp1_debug_init +16 drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
d321afe87aa3ed Laurent Pinchart 2022-02-27 15
d321afe87aa3ed Laurent Pinchart 2022-02-27 @16 void rkisp1_debug_init(struct rkisp1_device *rkisp1)
d321afe87aa3ed Laurent Pinchart 2022-02-27 17 {
d321afe87aa3ed Laurent Pinchart 2022-02-27 18 struct rkisp1_debug *debug = &rkisp1->debug;
d321afe87aa3ed Laurent Pinchart 2022-02-27 19
d321afe87aa3ed Laurent Pinchart 2022-02-27 20 debug->debugfs_dir = debugfs_create_dir(dev_name(rkisp1->dev), NULL);
d321afe87aa3ed Laurent Pinchart 2022-02-27 21
d321afe87aa3ed Laurent Pinchart 2022-02-27 22 debugfs_create_ulong("data_loss", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 23 &debug->data_loss);
d321afe87aa3ed Laurent Pinchart 2022-02-27 24 debugfs_create_ulong("outform_size_err", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 25 &debug->outform_size_error);
d321afe87aa3ed Laurent Pinchart 2022-02-27 26 debugfs_create_ulong("img_stabilization_size_error", 0444,
d321afe87aa3ed Laurent Pinchart 2022-02-27 27 debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 28 &debug->img_stabilization_size_error);
d321afe87aa3ed Laurent Pinchart 2022-02-27 29 debugfs_create_ulong("inform_size_error", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 30 &debug->inform_size_error);
d321afe87aa3ed Laurent Pinchart 2022-02-27 31 debugfs_create_ulong("irq_delay", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 32 &debug->irq_delay);
d321afe87aa3ed Laurent Pinchart 2022-02-27 33 debugfs_create_ulong("mipi_error", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 34 &debug->mipi_error);
d321afe87aa3ed Laurent Pinchart 2022-02-27 35 debugfs_create_ulong("stats_error", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 36 &debug->stats_error);
d321afe87aa3ed Laurent Pinchart 2022-02-27 37 debugfs_create_ulong("mp_stop_timeout", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 38 &debug->stop_timeout[RKISP1_MAINPATH]);
d321afe87aa3ed Laurent Pinchart 2022-02-27 39 debugfs_create_ulong("sp_stop_timeout", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 40 &debug->stop_timeout[RKISP1_SELFPATH]);
d321afe87aa3ed Laurent Pinchart 2022-02-27 41 debugfs_create_ulong("mp_frame_drop", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 42 &debug->frame_drop[RKISP1_MAINPATH]);
d321afe87aa3ed Laurent Pinchart 2022-02-27 43 debugfs_create_ulong("sp_frame_drop", 0444, debug->debugfs_dir,
d321afe87aa3ed Laurent Pinchart 2022-02-27 44 &debug->frame_drop[RKISP1_SELFPATH]);
d321afe87aa3ed Laurent Pinchart 2022-02-27 45 }
d321afe87aa3ed Laurent Pinchart 2022-02-27 46
d321afe87aa3ed Laurent Pinchart 2022-02-27 @47 void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH 13/16] media: rkisp1: debug: Collect input status by sampling ISP_FLAGS_SHD
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The ISP_FLAGS_SHD register exposes the ISP parallel input signals (data
and synchronization) in real time. This can help debugging when the
device doesn't output any image. Sample the register 10000 times with a
1µs delay and expose the result through debugfs.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-debug.c | 46 +++++++++++++++++++
.../platform/rockchip/rkisp1/rkisp1-regs.h | 9 ++++
2 files changed, 55 insertions(+)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
index 64b33774cbdf..8be4ac134cc9 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
@@ -9,9 +9,53 @@
*/
#include <linux/debugfs.h>
+#include <linux/delay.h>
#include <linux/device.h>
+#include <linux/seq_file.h>
#include "rkisp1-common.h"
+#include "rkisp1-regs.h"
+
+#define RKISP1_DEBUG_DATA_COUNT_BINS 32
+#define RKISP1_DEBUG_DATA_COUNT_STEP (4096 / RKISP1_DEBUG_DATA_COUNT_BINS)
+
+static int rkisp1_debug_input_status_show(struct seq_file *m, void *p)
+{
+ struct rkisp1_device *rkisp1 = m->private;
+ u16 data_count[RKISP1_DEBUG_DATA_COUNT_BINS] = { };
+ unsigned int hsync_count = 0;
+ unsigned int vsync_count = 0;
+ unsigned int i;
+ u32 data;
+ u32 val;
+
+ /* Sample the ISP input port status 10000 times with a 1µs interval. */
+ for (i = 0; i < 10000; ++i) {
+ val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_FLAGS_SHD);
+
+ data = (val & RKISP1_CIF_ISP_FLAGS_SHD_S_DATA_MASK)
+ >> RKISP1_CIF_ISP_FLAGS_SHD_S_DATA_SHIFT;
+ data_count[data / RKISP1_DEBUG_DATA_COUNT_STEP]++;
+
+ if (val & RKISP1_CIF_ISP_FLAGS_SHD_S_HSYNC)
+ hsync_count++;
+ if (val & RKISP1_CIF_ISP_FLAGS_SHD_S_VSYNC)
+ vsync_count++;
+
+ udelay(1);
+ }
+
+ seq_printf(m, "vsync: %u, hsync: %u\n", vsync_count, hsync_count);
+ seq_puts(m, "data:\n");
+ for (i = 0; i < ARRAY_SIZE(data_count); ++i)
+ seq_printf(m, "- [%04u:%04u]: %u\n",
+ i * RKISP1_DEBUG_DATA_COUNT_STEP,
+ (i + 1) * RKISP1_DEBUG_DATA_COUNT_STEP - 1,
+ data_count[i]);
+
+ return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_input_status);
void rkisp1_debug_init(struct rkisp1_device *rkisp1)
{
@@ -42,6 +86,8 @@ void rkisp1_debug_init(struct rkisp1_device *rkisp1)
&debug->frame_drop[RKISP1_MAINPATH]);
debugfs_create_ulong("sp_frame_drop", 0444, debug->debugfs_dir,
&debug->frame_drop[RKISP1_SELFPATH]);
+ debugfs_create_file("input_status", 0444, debug->debugfs_dir, rkisp1,
+ &rkisp1_debug_input_status_fops);
}
void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index 083d92ada73f..447c5f241d69 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -454,6 +454,15 @@
#define RKISP1_CIF_ISP_DEMOSAIC_BYPASS BIT(10)
#define RKISP1_CIF_ISP_DEMOSAIC_TH(x) ((x) & 0xFF)
+/* ISP_FLAGS_SHD */
+#define RKISP1_CIF_ISP_FLAGS_SHD_ISP_ENABLE_SHD BIT(0)
+#define RKISP1_CIF_ISP_FLAGS_SHD_ISP_ENABLE_INFORM_SHD BIT(1)
+#define RKISP1_CIF_ISP_FLAGS_SHD_INFORM_FIELD BIT(2)
+#define RKISP1_CIF_ISP_FLAGS_SHD_S_DATA_MASK GENMASK(27, 16)
+#define RKISP1_CIF_ISP_FLAGS_SHD_S_DATA_SHIFT 16
+#define RKISP1_CIF_ISP_FLAGS_SHD_S_VSYNC BIT(30)
+#define RKISP1_CIF_ISP_FLAGS_SHD_S_HSYNC BIT(31)
+
/* AWB */
/* ISP_AWB_PROP */
#define RKISP1_CIF_ISP_AWB_YMAX_CMP_EN BIT(2)
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 13/16] media: rkisp1: debug: Collect input status by sampling ISP_FLAGS_SHD
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The ISP_FLAGS_SHD register exposes the ISP parallel input signals (data
and synchronization) in real time. This can help debugging when the
device doesn't output any image. Sample the register 10000 times with a
1µs delay and expose the result through debugfs.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-debug.c | 46 +++++++++++++++++++
.../platform/rockchip/rkisp1/rkisp1-regs.h | 9 ++++
2 files changed, 55 insertions(+)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
index 64b33774cbdf..8be4ac134cc9 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
@@ -9,9 +9,53 @@
*/
#include <linux/debugfs.h>
+#include <linux/delay.h>
#include <linux/device.h>
+#include <linux/seq_file.h>
#include "rkisp1-common.h"
+#include "rkisp1-regs.h"
+
+#define RKISP1_DEBUG_DATA_COUNT_BINS 32
+#define RKISP1_DEBUG_DATA_COUNT_STEP (4096 / RKISP1_DEBUG_DATA_COUNT_BINS)
+
+static int rkisp1_debug_input_status_show(struct seq_file *m, void *p)
+{
+ struct rkisp1_device *rkisp1 = m->private;
+ u16 data_count[RKISP1_DEBUG_DATA_COUNT_BINS] = { };
+ unsigned int hsync_count = 0;
+ unsigned int vsync_count = 0;
+ unsigned int i;
+ u32 data;
+ u32 val;
+
+ /* Sample the ISP input port status 10000 times with a 1µs interval. */
+ for (i = 0; i < 10000; ++i) {
+ val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_FLAGS_SHD);
+
+ data = (val & RKISP1_CIF_ISP_FLAGS_SHD_S_DATA_MASK)
+ >> RKISP1_CIF_ISP_FLAGS_SHD_S_DATA_SHIFT;
+ data_count[data / RKISP1_DEBUG_DATA_COUNT_STEP]++;
+
+ if (val & RKISP1_CIF_ISP_FLAGS_SHD_S_HSYNC)
+ hsync_count++;
+ if (val & RKISP1_CIF_ISP_FLAGS_SHD_S_VSYNC)
+ vsync_count++;
+
+ udelay(1);
+ }
+
+ seq_printf(m, "vsync: %u, hsync: %u\n", vsync_count, hsync_count);
+ seq_puts(m, "data:\n");
+ for (i = 0; i < ARRAY_SIZE(data_count); ++i)
+ seq_printf(m, "- [%04u:%04u]: %u\n",
+ i * RKISP1_DEBUG_DATA_COUNT_STEP,
+ (i + 1) * RKISP1_DEBUG_DATA_COUNT_STEP - 1,
+ data_count[i]);
+
+ return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_input_status);
void rkisp1_debug_init(struct rkisp1_device *rkisp1)
{
@@ -42,6 +86,8 @@ void rkisp1_debug_init(struct rkisp1_device *rkisp1)
&debug->frame_drop[RKISP1_MAINPATH]);
debugfs_create_ulong("sp_frame_drop", 0444, debug->debugfs_dir,
&debug->frame_drop[RKISP1_SELFPATH]);
+ debugfs_create_file("input_status", 0444, debug->debugfs_dir, rkisp1,
+ &rkisp1_debug_input_status_fops);
}
void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index 083d92ada73f..447c5f241d69 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -454,6 +454,15 @@
#define RKISP1_CIF_ISP_DEMOSAIC_BYPASS BIT(10)
#define RKISP1_CIF_ISP_DEMOSAIC_TH(x) ((x) & 0xFF)
+/* ISP_FLAGS_SHD */
+#define RKISP1_CIF_ISP_FLAGS_SHD_ISP_ENABLE_SHD BIT(0)
+#define RKISP1_CIF_ISP_FLAGS_SHD_ISP_ENABLE_INFORM_SHD BIT(1)
+#define RKISP1_CIF_ISP_FLAGS_SHD_INFORM_FIELD BIT(2)
+#define RKISP1_CIF_ISP_FLAGS_SHD_S_DATA_MASK GENMASK(27, 16)
+#define RKISP1_CIF_ISP_FLAGS_SHD_S_DATA_SHIFT 16
+#define RKISP1_CIF_ISP_FLAGS_SHD_S_VSYNC BIT(30)
+#define RKISP1_CIF_ISP_FLAGS_SHD_S_HSYNC BIT(31)
+
/* AWB */
/* ISP_AWB_PROP */
#define RKISP1_CIF_ISP_AWB_YMAX_CMP_EN BIT(2)
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH 14/16] media: rkisp1: debug: Add debugfs files to dump core and ISP registers
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
It's useful to dumb the value of registers for debugging purpose. Add
two debugfs files to dump key core and ISP registers.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-debug.c | 65 +++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
index 8be4ac134cc9..c7872d8dc3df 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
@@ -16,6 +16,63 @@
#include "rkisp1-common.h"
#include "rkisp1-regs.h"
+struct rkisp1_debug_register {
+ u32 offset;
+ const char * const name;
+};
+
+#define RKISP1_DEBUG_REG(name) { RKISP1_CIF_##name, #name }
+
+static int rkisp1_debug_dump_regs(struct seq_file *m,
+ const struct rkisp1_debug_register *regs)
+{
+ struct rkisp1_device *rkisp1 = m->private;
+ u32 val;
+
+ for ( ; regs->name; ++regs) {
+ val = rkisp1_read(rkisp1, regs->offset);
+ seq_printf(m, "%14s: 0x%08x\n", regs->name, val);
+ }
+
+ return 0;
+}
+
+static int rkisp1_debug_dump_core_regs_show(struct seq_file *m, void *p)
+{
+ static const struct rkisp1_debug_register registers[] = {
+ RKISP1_DEBUG_REG(VI_CCL),
+ RKISP1_DEBUG_REG(VI_ICCL),
+ RKISP1_DEBUG_REG(VI_IRCL),
+ RKISP1_DEBUG_REG(VI_DPCL),
+ RKISP1_DEBUG_REG(MI_CTRL),
+ RKISP1_DEBUG_REG(MI_BYTE_CNT),
+ RKISP1_DEBUG_REG(MI_CTRL_SHD),
+ RKISP1_DEBUG_REG(MI_RIS),
+ RKISP1_DEBUG_REG(MI_STATUS),
+ RKISP1_DEBUG_REG(MI_DMA_CTRL),
+ RKISP1_DEBUG_REG(MI_DMA_STATUS),
+ { /* Sentinel */ },
+ };
+
+ return rkisp1_debug_dump_regs(m, registers);
+}
+DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_core_regs);
+
+static int rkisp1_debug_dump_isp_regs_show(struct seq_file *m, void *p)
+{
+ static const struct rkisp1_debug_register registers[] = {
+ RKISP1_DEBUG_REG(ISP_CTRL),
+ RKISP1_DEBUG_REG(ISP_ACQ_PROP),
+ RKISP1_DEBUG_REG(ISP_FLAGS_SHD),
+ RKISP1_DEBUG_REG(ISP_RIS),
+ RKISP1_DEBUG_REG(ISP_ERR),
+ { /* Sentinel */ },
+ };
+
+ return rkisp1_debug_dump_regs(m, registers);
+}
+DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_isp_regs);
+
#define RKISP1_DEBUG_DATA_COUNT_BINS 32
#define RKISP1_DEBUG_DATA_COUNT_STEP (4096 / RKISP1_DEBUG_DATA_COUNT_BINS)
@@ -60,6 +117,7 @@ DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_input_status);
void rkisp1_debug_init(struct rkisp1_device *rkisp1)
{
struct rkisp1_debug *debug = &rkisp1->debug;
+ struct dentry *regs_dir;
debug->debugfs_dir = debugfs_create_dir(dev_name(rkisp1->dev), NULL);
@@ -88,6 +146,13 @@ void rkisp1_debug_init(struct rkisp1_device *rkisp1)
&debug->frame_drop[RKISP1_SELFPATH]);
debugfs_create_file("input_status", 0444, debug->debugfs_dir, rkisp1,
&rkisp1_debug_input_status_fops);
+
+ regs_dir = debugfs_create_dir("regs", debug->debugfs_dir);
+
+ debugfs_create_file("core", 0444, regs_dir, rkisp1,
+ &rkisp1_debug_dump_core_regs_fops);
+ debugfs_create_file("isp", 0444, regs_dir, rkisp1,
+ &rkisp1_debug_dump_isp_regs_fops);
}
void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 14/16] media: rkisp1: debug: Add debugfs files to dump core and ISP registers
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
It's useful to dumb the value of registers for debugging purpose. Add
two debugfs files to dump key core and ISP registers.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-debug.c | 65 +++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
index 8be4ac134cc9..c7872d8dc3df 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
@@ -16,6 +16,63 @@
#include "rkisp1-common.h"
#include "rkisp1-regs.h"
+struct rkisp1_debug_register {
+ u32 offset;
+ const char * const name;
+};
+
+#define RKISP1_DEBUG_REG(name) { RKISP1_CIF_##name, #name }
+
+static int rkisp1_debug_dump_regs(struct seq_file *m,
+ const struct rkisp1_debug_register *regs)
+{
+ struct rkisp1_device *rkisp1 = m->private;
+ u32 val;
+
+ for ( ; regs->name; ++regs) {
+ val = rkisp1_read(rkisp1, regs->offset);
+ seq_printf(m, "%14s: 0x%08x\n", regs->name, val);
+ }
+
+ return 0;
+}
+
+static int rkisp1_debug_dump_core_regs_show(struct seq_file *m, void *p)
+{
+ static const struct rkisp1_debug_register registers[] = {
+ RKISP1_DEBUG_REG(VI_CCL),
+ RKISP1_DEBUG_REG(VI_ICCL),
+ RKISP1_DEBUG_REG(VI_IRCL),
+ RKISP1_DEBUG_REG(VI_DPCL),
+ RKISP1_DEBUG_REG(MI_CTRL),
+ RKISP1_DEBUG_REG(MI_BYTE_CNT),
+ RKISP1_DEBUG_REG(MI_CTRL_SHD),
+ RKISP1_DEBUG_REG(MI_RIS),
+ RKISP1_DEBUG_REG(MI_STATUS),
+ RKISP1_DEBUG_REG(MI_DMA_CTRL),
+ RKISP1_DEBUG_REG(MI_DMA_STATUS),
+ { /* Sentinel */ },
+ };
+
+ return rkisp1_debug_dump_regs(m, registers);
+}
+DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_core_regs);
+
+static int rkisp1_debug_dump_isp_regs_show(struct seq_file *m, void *p)
+{
+ static const struct rkisp1_debug_register registers[] = {
+ RKISP1_DEBUG_REG(ISP_CTRL),
+ RKISP1_DEBUG_REG(ISP_ACQ_PROP),
+ RKISP1_DEBUG_REG(ISP_FLAGS_SHD),
+ RKISP1_DEBUG_REG(ISP_RIS),
+ RKISP1_DEBUG_REG(ISP_ERR),
+ { /* Sentinel */ },
+ };
+
+ return rkisp1_debug_dump_regs(m, registers);
+}
+DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_isp_regs);
+
#define RKISP1_DEBUG_DATA_COUNT_BINS 32
#define RKISP1_DEBUG_DATA_COUNT_STEP (4096 / RKISP1_DEBUG_DATA_COUNT_BINS)
@@ -60,6 +117,7 @@ DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_input_status);
void rkisp1_debug_init(struct rkisp1_device *rkisp1)
{
struct rkisp1_debug *debug = &rkisp1->debug;
+ struct dentry *regs_dir;
debug->debugfs_dir = debugfs_create_dir(dev_name(rkisp1->dev), NULL);
@@ -88,6 +146,13 @@ void rkisp1_debug_init(struct rkisp1_device *rkisp1)
&debug->frame_drop[RKISP1_SELFPATH]);
debugfs_create_file("input_status", 0444, debug->debugfs_dir, rkisp1,
&rkisp1_debug_input_status_fops);
+
+ regs_dir = debugfs_create_dir("regs", debug->debugfs_dir);
+
+ debugfs_create_file("core", 0444, regs_dir, rkisp1,
+ &rkisp1_debug_dump_core_regs_fops);
+ debugfs_create_file("isp", 0444, regs_dir, rkisp1,
+ &rkisp1_debug_dump_isp_regs_fops);
}
void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH 15/16] media: rkisp1: debug: Move resizer register dump to debugfs
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The debugfs support already includes support to dump core and ISP
registers. Move the resizer register dump there too to make the
userspace interface consistent.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-debug.c | 48 +++++++++++++++++++
.../platform/rockchip/rkisp1/rkisp1-resizer.c | 37 --------------
2 files changed, 48 insertions(+), 37 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
index c7872d8dc3df..f9fc8b661bdb 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
@@ -73,6 +73,50 @@ static int rkisp1_debug_dump_isp_regs_show(struct seq_file *m, void *p)
}
DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_isp_regs);
+#define RKISP1_DEBUG_RSZ_REG_DEC(name) { \
+ RKISP1_CIF_##name, RKISP1_CIF_##name##_SHD, #name, false \
+}
+
+#define RKISP1_DEBUG_RSZ_REG_HEX(name) { \
+ RKISP1_CIF_##name, RKISP1_CIF_##name##_SHD, #name, true \
+}
+
+static int rkisp1_debug_dump_rsz_regs_show(struct seq_file *m, void *p)
+{
+ static const struct {
+ u32 reg;
+ u32 shadow;
+ const char * const name;
+ bool hex;
+ } registers[] = {
+ RKISP1_DEBUG_RSZ_REG_HEX(RSZ_CTRL),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_HY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_HCB),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_HCR),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_VY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_VC),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_HY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_HC),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_VY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_VC),
+ { /* Sentinel */ },
+ };
+
+ struct rkisp1_resizer *rsz = m->private;
+ typeof(registers[0]) *reg;
+ u32 val, shd;
+
+ for (reg = registers; reg->name; ++reg) {
+ val = rkisp1_read(rsz->rkisp1, rsz->regs_base + reg->reg);
+ shd = rkisp1_read(rsz->rkisp1, rsz->regs_base + reg->shadow);
+ seq_printf(m, reg->hex ? "%14s: 0x%08x/0x%08x\n" : "%14s: %u/%u\n",
+ reg->name, val, shd);
+ }
+
+ return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_rsz_regs);
+
#define RKISP1_DEBUG_DATA_COUNT_BINS 32
#define RKISP1_DEBUG_DATA_COUNT_STEP (4096 / RKISP1_DEBUG_DATA_COUNT_BINS)
@@ -153,6 +197,10 @@ void rkisp1_debug_init(struct rkisp1_device *rkisp1)
&rkisp1_debug_dump_core_regs_fops);
debugfs_create_file("isp", 0444, regs_dir, rkisp1,
&rkisp1_debug_dump_isp_regs_fops);
+ debugfs_create_file("mrsz", 0444, regs_dir, &rkisp1->resizer_devs[0],
+ &rkisp1_debug_dump_rsz_regs_fops);
+ debugfs_create_file("srsz", 0444, regs_dir, &rkisp1->resizer_devs[1],
+ &rkisp1_debug_dump_rsz_regs_fops);
}
void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
index 2135cd40f604..3895c522f49e 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
@@ -203,41 +203,6 @@ static void rkisp1_dcrop_config(struct rkisp1_resizer *rsz)
* Resizer hw configs
*/
-static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
-{
- dev_dbg(rsz->rkisp1->dev,
- "RSZ_CTRL 0x%08x/0x%08x\n"
- "RSZ_SCALE_HY %d/%d\n"
- "RSZ_SCALE_HCB %d/%d\n"
- "RSZ_SCALE_HCR %d/%d\n"
- "RSZ_SCALE_VY %d/%d\n"
- "RSZ_SCALE_VC %d/%d\n"
- "RSZ_PHASE_HY %d/%d\n"
- "RSZ_PHASE_HC %d/%d\n"
- "RSZ_PHASE_VY %d/%d\n"
- "RSZ_PHASE_VC %d/%d\n",
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
-}
-
static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
@@ -386,8 +351,6 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz,
/* set values in the hw */
rkisp1_rsz_config_regs(rsz, &sink_y, &sink_c, &src_y, &src_c, when);
-
- rkisp1_rsz_dump_regs(rsz);
}
/* ----------------------------------------------------------------------------
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 15/16] media: rkisp1: debug: Move resizer register dump to debugfs
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
The debugfs support already includes support to dump core and ISP
registers. Move the resizer register dump there too to make the
userspace interface consistent.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../platform/rockchip/rkisp1/rkisp1-debug.c | 48 +++++++++++++++++++
.../platform/rockchip/rkisp1/rkisp1-resizer.c | 37 --------------
2 files changed, 48 insertions(+), 37 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
index c7872d8dc3df..f9fc8b661bdb 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
@@ -73,6 +73,50 @@ static int rkisp1_debug_dump_isp_regs_show(struct seq_file *m, void *p)
}
DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_isp_regs);
+#define RKISP1_DEBUG_RSZ_REG_DEC(name) { \
+ RKISP1_CIF_##name, RKISP1_CIF_##name##_SHD, #name, false \
+}
+
+#define RKISP1_DEBUG_RSZ_REG_HEX(name) { \
+ RKISP1_CIF_##name, RKISP1_CIF_##name##_SHD, #name, true \
+}
+
+static int rkisp1_debug_dump_rsz_regs_show(struct seq_file *m, void *p)
+{
+ static const struct {
+ u32 reg;
+ u32 shadow;
+ const char * const name;
+ bool hex;
+ } registers[] = {
+ RKISP1_DEBUG_RSZ_REG_HEX(RSZ_CTRL),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_HY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_HCB),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_HCR),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_VY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_VC),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_HY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_HC),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_VY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_VC),
+ { /* Sentinel */ },
+ };
+
+ struct rkisp1_resizer *rsz = m->private;
+ typeof(registers[0]) *reg;
+ u32 val, shd;
+
+ for (reg = registers; reg->name; ++reg) {
+ val = rkisp1_read(rsz->rkisp1, rsz->regs_base + reg->reg);
+ shd = rkisp1_read(rsz->rkisp1, rsz->regs_base + reg->shadow);
+ seq_printf(m, reg->hex ? "%14s: 0x%08x/0x%08x\n" : "%14s: %u/%u\n",
+ reg->name, val, shd);
+ }
+
+ return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_rsz_regs);
+
#define RKISP1_DEBUG_DATA_COUNT_BINS 32
#define RKISP1_DEBUG_DATA_COUNT_STEP (4096 / RKISP1_DEBUG_DATA_COUNT_BINS)
@@ -153,6 +197,10 @@ void rkisp1_debug_init(struct rkisp1_device *rkisp1)
&rkisp1_debug_dump_core_regs_fops);
debugfs_create_file("isp", 0444, regs_dir, rkisp1,
&rkisp1_debug_dump_isp_regs_fops);
+ debugfs_create_file("mrsz", 0444, regs_dir, &rkisp1->resizer_devs[0],
+ &rkisp1_debug_dump_rsz_regs_fops);
+ debugfs_create_file("srsz", 0444, regs_dir, &rkisp1->resizer_devs[1],
+ &rkisp1_debug_dump_rsz_regs_fops);
}
void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
index 2135cd40f604..3895c522f49e 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
@@ -203,41 +203,6 @@ static void rkisp1_dcrop_config(struct rkisp1_resizer *rsz)
* Resizer hw configs
*/
-static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
-{
- dev_dbg(rsz->rkisp1->dev,
- "RSZ_CTRL 0x%08x/0x%08x\n"
- "RSZ_SCALE_HY %d/%d\n"
- "RSZ_SCALE_HCB %d/%d\n"
- "RSZ_SCALE_HCR %d/%d\n"
- "RSZ_SCALE_VY %d/%d\n"
- "RSZ_SCALE_VC %d/%d\n"
- "RSZ_PHASE_HY %d/%d\n"
- "RSZ_PHASE_HC %d/%d\n"
- "RSZ_PHASE_VY %d/%d\n"
- "RSZ_PHASE_VC %d/%d\n",
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
-}
-
static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
@@ -386,8 +351,6 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz,
/* set values in the hw */
rkisp1_rsz_config_regs(rsz, &sink_y, &sink_c, &src_y, &src_c, when);
-
- rkisp1_rsz_dump_regs(rsz);
}
/* ----------------------------------------------------------------------------
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH 16/16] media: rkisp1: capture: Bypass the main device for handling querycap
2022-02-27 16:01 ` Laurent Pinchart
@ 2022-02-27 16:01 ` Laurent Pinchart
-1 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
From: Paul Elder <paul.elder@ideasonboard.com>
When handling querycap, the capture node would access the main rkisp1
device unnecessarily. Get the information from the most direct source.
Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
---
drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
index 0eccf9eb6a14..68aa282ce499 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
@@ -1239,11 +1239,8 @@ static int rkisp1_g_fmt_vid_cap_mplane(struct file *file, void *fh,
static int
rkisp1_querycap(struct file *file, void *priv, struct v4l2_capability *cap)
{
- struct rkisp1_capture *cap_dev = video_drvdata(file);
- struct rkisp1_device *rkisp1 = cap_dev->rkisp1;
-
- strscpy(cap->driver, rkisp1->dev->driver->name, sizeof(cap->driver));
- strscpy(cap->card, rkisp1->dev->driver->name, sizeof(cap->card));
+ strscpy(cap->driver, RKISP1_DRIVER_NAME, sizeof(cap->driver));
+ strscpy(cap->card, RKISP1_DRIVER_NAME, sizeof(cap->card));
strscpy(cap->bus_info, RKISP1_BUS_INFO, sizeof(cap->bus_info));
return 0;
--
Regards,
Laurent Pinchart
^ permalink raw reply related [flat|nested] 54+ messages in thread* [PATCH 16/16] media: rkisp1: capture: Bypass the main device for handling querycap
@ 2022-02-27 16:01 ` Laurent Pinchart
0 siblings, 0 replies; 54+ messages in thread
From: Laurent Pinchart @ 2022-02-27 16:01 UTC (permalink / raw)
To: linux-media
Cc: Dafna Hirschfeld, Heiko Stuebner, Paul Elder, Tomasz Figa,
linux-rockchip
From: Paul Elder <paul.elder@ideasonboard.com>
When handling querycap, the capture node would access the main rkisp1
device unnecessarily. Get the information from the most direct source.
Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
---
drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
index 0eccf9eb6a14..68aa282ce499 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
@@ -1239,11 +1239,8 @@ static int rkisp1_g_fmt_vid_cap_mplane(struct file *file, void *fh,
static int
rkisp1_querycap(struct file *file, void *priv, struct v4l2_capability *cap)
{
- struct rkisp1_capture *cap_dev = video_drvdata(file);
- struct rkisp1_device *rkisp1 = cap_dev->rkisp1;
-
- strscpy(cap->driver, rkisp1->dev->driver->name, sizeof(cap->driver));
- strscpy(cap->card, rkisp1->dev->driver->name, sizeof(cap->card));
+ strscpy(cap->driver, RKISP1_DRIVER_NAME, sizeof(cap->driver));
+ strscpy(cap->card, RKISP1_DRIVER_NAME, sizeof(cap->card));
strscpy(cap->bus_info, RKISP1_BUS_INFO, sizeof(cap->bus_info));
return 0;
--
Regards,
Laurent Pinchart
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 54+ messages in thread