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From: Rob Herring <robh@kernel.org>
To: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Jingoo Han <jingoohan1@gmail.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] dt-bindings: PCI: designware-ep: Increase maxItems of reg and reg-names
Date: Wed, 6 Apr 2022 13:14:00 -0500	[thread overview]
Message-ID: <Yk3YaAWPJ0bpLTHK@robh.at.kernel.org> (raw)
In-Reply-To: <1649145062-29833-2-git-send-email-hayashi.kunihiko@socionext.com>

On Tue, Apr 05, 2022 at 04:51:00PM +0900, Kunihiko Hayashi wrote:
> UniPhier PCIe EP controller has 5 register mappings (dbi, dbi2, link,
> config and atu), so maxItems of "reg" and "reg-names" should allow 5.

Shouldn't that be 'addr_space' rather than 'config'? IIRC, 'config' is 
only for the host.

> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>  Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
> index e59059ab5be0..03f97e7c4089 100644
> --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
> +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
> @@ -28,11 +28,11 @@ properties:
>        versions.
>        For designware core version >= 4.80, it may contain ATU address space.
>      minItems: 2
> -    maxItems: 4
> +    maxItems: 5
>  
>    reg-names:
>      minItems: 2
> -    maxItems: 4
> +    maxItems: 5
>      items:
>        enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]
>  
> -- 
> 2.25.1
> 
> 

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WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Jingoo Han <jingoohan1@gmail.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] dt-bindings: PCI: designware-ep: Increase maxItems of reg and reg-names
Date: Wed, 6 Apr 2022 13:14:00 -0500	[thread overview]
Message-ID: <Yk3YaAWPJ0bpLTHK@robh.at.kernel.org> (raw)
In-Reply-To: <1649145062-29833-2-git-send-email-hayashi.kunihiko@socionext.com>

On Tue, Apr 05, 2022 at 04:51:00PM +0900, Kunihiko Hayashi wrote:
> UniPhier PCIe EP controller has 5 register mappings (dbi, dbi2, link,
> config and atu), so maxItems of "reg" and "reg-names" should allow 5.

Shouldn't that be 'addr_space' rather than 'config'? IIRC, 'config' is 
only for the host.

> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>  Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
> index e59059ab5be0..03f97e7c4089 100644
> --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
> +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
> @@ -28,11 +28,11 @@ properties:
>        versions.
>        For designware core version >= 4.80, it may contain ATU address space.
>      minItems: 2
> -    maxItems: 4
> +    maxItems: 5
>  
>    reg-names:
>      minItems: 2
> -    maxItems: 4
> +    maxItems: 5
>      items:
>        enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]
>  
> -- 
> 2.25.1
> 
> 

  reply	other threads:[~2022-04-06 18:15 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-05  7:50 [PATCH 0/3] dt-bindings: PCI: uniphier: Fix endpoint descriptions Kunihiko Hayashi
2022-04-05  7:50 ` Kunihiko Hayashi
2022-04-05  7:51 ` [PATCH 1/3] dt-bindings: PCI: designware-ep: Increase maxItems of reg and reg-names Kunihiko Hayashi
2022-04-05  7:51   ` Kunihiko Hayashi
2022-04-06 18:14   ` Rob Herring [this message]
2022-04-06 18:14     ` Rob Herring
2022-04-07  0:51     ` Kunihiko Hayashi
2022-04-07  0:51       ` Kunihiko Hayashi
2022-04-05  7:51 ` [PATCH 2/3] dt-bindings: PCI: uniphier-ep: Clean up reg, clocks, resets, and their names using compatible string Kunihiko Hayashi
2022-04-05  7:51   ` Kunihiko Hayashi
2022-04-06 18:15   ` Rob Herring
2022-04-06 18:15     ` Rob Herring
2022-04-05  7:51 ` [PATCH 3/3] ARM: dts: uniphier: Remove compatible "snps, dw-pcie-ep" from Pro5 pcie-ep node Kunihiko Hayashi
2022-04-05  7:51   ` [PATCH 3/3] ARM: dts: uniphier: Remove compatible "snps,dw-pcie-ep" " Kunihiko Hayashi

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