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From: Rob Herring <robh@kernel.org>
To: Guillaume Ranquet <granquet@baylibre.com>
Cc: airlied@linux.ie, angelogioacchino.delregno@collabora.com,
	chunfeng.yun@mediatek.com, chunkuang.hu@kernel.org,
	ck.hu@mediatek.com, daniel@ffwll.ch, deller@gmx.de,
	jitao.shi@mediatek.com, kishon@ti.com, krzk+dt@kernel.org,
	maarten.lankhorst@linux.intel.com, matthias.bgg@gmail.com,
	mripard@kernel.org, p.zabel@pengutronix.de, tzimmermann@suse.de,
	vkoul@kernel.org, devicetree@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mediatek@lists.infradead.org,
	linux-phy@lists.infradead.org, markyacoub@google.com
Subject: Re: [PATCH v9 03/22] dt-bindings: mediatek,dp_phy: Add Display Port PHY binding
Date: Tue, 29 Mar 2022 17:58:15 -0500	[thread overview]
Message-ID: <YkOPB5W7uXkOc72/@robh.at.kernel.org> (raw)
In-Reply-To: <20220327223927.20848-4-granquet@baylibre.com>

On Mon, Mar 28, 2022 at 12:39:08AM +0200, Guillaume Ranquet wrote:
> This phy controller is embedded in the Display Port Controller on mt8195 SoCs.

Sorry, but I think you need to go back to what you had in v8. While yes, 
the phy and controller IP often do change independently, this h/w looks 
pretty interwined. 

You could make the controller a phy provider to itself if you wanted.

> 
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  .../bindings/phy/mediatek,dp-phy.yaml         | 43 +++++++++++++++++++
>  1 file changed, 43 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> new file mode 100644
> index 000000000000..1f5ffca4e140
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2022 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/mediatek,dp-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Display Port PHY
> +
> +maintainers:
> +  - CK Hu <ck.hu@mediatek.com>
> +  - Jitao shi <jitao.shi@mediatek.com>
> +
> +description: |
> +  Device tree bindings for the Mediatek (embedded) Display Port PHY
> +  present on some Mediatek SoCs.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt8195-dp-phy
> +
> +  mediatek,dp-syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: Phandle to the Display Port node.
> +
> +  "#phy-cells":
> +    const: 0
> +
> +required:
> +  - compatible
> +  - mediatek,dp-syscon
> +  - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    dp_phy: dp-phy {
> +      compatible = "mediatek,mt8195-dp-phy";
> +      mediatek,dp-syscon = <&dp_tx>;
> +      #phy-cells = <0>;
> +    };
> -- 
> 2.34.1
> 
> 

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Guillaume Ranquet <granquet@baylibre.com>
Cc: airlied@linux.ie, angelogioacchino.delregno@collabora.com,
	chunfeng.yun@mediatek.com, chunkuang.hu@kernel.org,
	ck.hu@mediatek.com, daniel@ffwll.ch, deller@gmx.de,
	jitao.shi@mediatek.com, kishon@ti.com, krzk+dt@kernel.org,
	maarten.lankhorst@linux.intel.com, matthias.bgg@gmail.com,
	mripard@kernel.org, p.zabel@pengutronix.de, tzimmermann@suse.de,
	vkoul@kernel.org, devicetree@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mediatek@lists.infradead.org,
	linux-phy@lists.infradead.org, markyacoub@google.com
Subject: Re: [PATCH v9 03/22] dt-bindings: mediatek,dp_phy: Add Display Port PHY binding
Date: Tue, 29 Mar 2022 17:58:15 -0500	[thread overview]
Message-ID: <YkOPB5W7uXkOc72/@robh.at.kernel.org> (raw)
In-Reply-To: <20220327223927.20848-4-granquet@baylibre.com>

On Mon, Mar 28, 2022 at 12:39:08AM +0200, Guillaume Ranquet wrote:
> This phy controller is embedded in the Display Port Controller on mt8195 SoCs.

Sorry, but I think you need to go back to what you had in v8. While yes, 
the phy and controller IP often do change independently, this h/w looks 
pretty interwined. 

You could make the controller a phy provider to itself if you wanted.

> 
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  .../bindings/phy/mediatek,dp-phy.yaml         | 43 +++++++++++++++++++
>  1 file changed, 43 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> new file mode 100644
> index 000000000000..1f5ffca4e140
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2022 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/mediatek,dp-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Display Port PHY
> +
> +maintainers:
> +  - CK Hu <ck.hu@mediatek.com>
> +  - Jitao shi <jitao.shi@mediatek.com>
> +
> +description: |
> +  Device tree bindings for the Mediatek (embedded) Display Port PHY
> +  present on some Mediatek SoCs.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt8195-dp-phy
> +
> +  mediatek,dp-syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: Phandle to the Display Port node.
> +
> +  "#phy-cells":
> +    const: 0
> +
> +required:
> +  - compatible
> +  - mediatek,dp-syscon
> +  - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    dp_phy: dp-phy {
> +      compatible = "mediatek,mt8195-dp-phy";
> +      mediatek,dp-syscon = <&dp_tx>;
> +      #phy-cells = <0>;
> +    };
> -- 
> 2.34.1
> 
> 

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Guillaume Ranquet <granquet@baylibre.com>
Cc: linux-fbdev@vger.kernel.org, devicetree@vger.kernel.org,
	airlied@linux.ie, dri-devel@lists.freedesktop.org,
	linux-phy@lists.infradead.org, deller@gmx.de, kishon@ti.com,
	chunkuang.hu@kernel.org, jitao.shi@mediatek.com,
	tzimmermann@suse.de, chunfeng.yun@mediatek.com,
	linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com,
	linux-arm-kernel@lists.infradead.org,
	angelogioacchino.delregno@collabora.com,
	linux-kernel@vger.kernel.org, vkoul@kernel.org,
	krzk+dt@kernel.org, markyacoub@google.com
Subject: Re: [PATCH v9 03/22] dt-bindings: mediatek,dp_phy: Add Display Port PHY binding
Date: Tue, 29 Mar 2022 17:58:15 -0500	[thread overview]
Message-ID: <YkOPB5W7uXkOc72/@robh.at.kernel.org> (raw)
In-Reply-To: <20220327223927.20848-4-granquet@baylibre.com>

On Mon, Mar 28, 2022 at 12:39:08AM +0200, Guillaume Ranquet wrote:
> This phy controller is embedded in the Display Port Controller on mt8195 SoCs.

Sorry, but I think you need to go back to what you had in v8. While yes, 
the phy and controller IP often do change independently, this h/w looks 
pretty interwined. 

You could make the controller a phy provider to itself if you wanted.

> 
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  .../bindings/phy/mediatek,dp-phy.yaml         | 43 +++++++++++++++++++
>  1 file changed, 43 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> new file mode 100644
> index 000000000000..1f5ffca4e140
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2022 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/mediatek,dp-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Display Port PHY
> +
> +maintainers:
> +  - CK Hu <ck.hu@mediatek.com>
> +  - Jitao shi <jitao.shi@mediatek.com>
> +
> +description: |
> +  Device tree bindings for the Mediatek (embedded) Display Port PHY
> +  present on some Mediatek SoCs.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt8195-dp-phy
> +
> +  mediatek,dp-syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: Phandle to the Display Port node.
> +
> +  "#phy-cells":
> +    const: 0
> +
> +required:
> +  - compatible
> +  - mediatek,dp-syscon
> +  - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    dp_phy: dp-phy {
> +      compatible = "mediatek,mt8195-dp-phy";
> +      mediatek,dp-syscon = <&dp_tx>;
> +      #phy-cells = <0>;
> +    };
> -- 
> 2.34.1
> 
> 

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Guillaume Ranquet <granquet@baylibre.com>
Cc: airlied@linux.ie, angelogioacchino.delregno@collabora.com,
	chunfeng.yun@mediatek.com, chunkuang.hu@kernel.org,
	ck.hu@mediatek.com, daniel@ffwll.ch, deller@gmx.de,
	jitao.shi@mediatek.com, kishon@ti.com, krzk+dt@kernel.org,
	maarten.lankhorst@linux.intel.com, matthias.bgg@gmail.com,
	mripard@kernel.org, p.zabel@pengutronix.de, tzimmermann@suse.de,
	vkoul@kernel.org, devicetree@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mediatek@lists.infradead.org,
	linux-phy@lists.infradead.org, markyacoub@google.com
Subject: Re: [PATCH v9 03/22] dt-bindings: mediatek,dp_phy: Add Display Port PHY binding
Date: Tue, 29 Mar 2022 17:58:15 -0500	[thread overview]
Message-ID: <YkOPB5W7uXkOc72/@robh.at.kernel.org> (raw)
In-Reply-To: <20220327223927.20848-4-granquet@baylibre.com>

On Mon, Mar 28, 2022 at 12:39:08AM +0200, Guillaume Ranquet wrote:
> This phy controller is embedded in the Display Port Controller on mt8195 SoCs.

Sorry, but I think you need to go back to what you had in v8. While yes, 
the phy and controller IP often do change independently, this h/w looks 
pretty interwined. 

You could make the controller a phy provider to itself if you wanted.

> 
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  .../bindings/phy/mediatek,dp-phy.yaml         | 43 +++++++++++++++++++
>  1 file changed, 43 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> new file mode 100644
> index 000000000000..1f5ffca4e140
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2022 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/mediatek,dp-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Display Port PHY
> +
> +maintainers:
> +  - CK Hu <ck.hu@mediatek.com>
> +  - Jitao shi <jitao.shi@mediatek.com>
> +
> +description: |
> +  Device tree bindings for the Mediatek (embedded) Display Port PHY
> +  present on some Mediatek SoCs.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt8195-dp-phy
> +
> +  mediatek,dp-syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: Phandle to the Display Port node.
> +
> +  "#phy-cells":
> +    const: 0
> +
> +required:
> +  - compatible
> +  - mediatek,dp-syscon
> +  - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    dp_phy: dp-phy {
> +      compatible = "mediatek,mt8195-dp-phy";
> +      mediatek,dp-syscon = <&dp_tx>;
> +      #phy-cells = <0>;
> +    };
> -- 
> 2.34.1
> 
> 

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Guillaume Ranquet <granquet@baylibre.com>
Cc: airlied@linux.ie, angelogioacchino.delregno@collabora.com,
	chunfeng.yun@mediatek.com, chunkuang.hu@kernel.org,
	ck.hu@mediatek.com, daniel@ffwll.ch, deller@gmx.de,
	jitao.shi@mediatek.com, kishon@ti.com, krzk+dt@kernel.org,
	maarten.lankhorst@linux.intel.com, matthias.bgg@gmail.com,
	mripard@kernel.org, p.zabel@pengutronix.de, tzimmermann@suse.de,
	vkoul@kernel.org, devicetree@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mediatek@lists.infradead.org,
	linux-phy@lists.infradead.org, markyacoub@google.com
Subject: Re: [PATCH v9 03/22] dt-bindings: mediatek,dp_phy: Add Display Port PHY binding
Date: Tue, 29 Mar 2022 17:58:15 -0500	[thread overview]
Message-ID: <YkOPB5W7uXkOc72/@robh.at.kernel.org> (raw)
In-Reply-To: <20220327223927.20848-4-granquet@baylibre.com>

On Mon, Mar 28, 2022 at 12:39:08AM +0200, Guillaume Ranquet wrote:
> This phy controller is embedded in the Display Port Controller on mt8195 SoCs.

Sorry, but I think you need to go back to what you had in v8. While yes, 
the phy and controller IP often do change independently, this h/w looks 
pretty interwined. 

You could make the controller a phy provider to itself if you wanted.

> 
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  .../bindings/phy/mediatek,dp-phy.yaml         | 43 +++++++++++++++++++
>  1 file changed, 43 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> new file mode 100644
> index 000000000000..1f5ffca4e140
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2022 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/mediatek,dp-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Display Port PHY
> +
> +maintainers:
> +  - CK Hu <ck.hu@mediatek.com>
> +  - Jitao shi <jitao.shi@mediatek.com>
> +
> +description: |
> +  Device tree bindings for the Mediatek (embedded) Display Port PHY
> +  present on some Mediatek SoCs.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt8195-dp-phy
> +
> +  mediatek,dp-syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: Phandle to the Display Port node.
> +
> +  "#phy-cells":
> +    const: 0
> +
> +required:
> +  - compatible
> +  - mediatek,dp-syscon
> +  - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    dp_phy: dp-phy {
> +      compatible = "mediatek,mt8195-dp-phy";
> +      mediatek,dp-syscon = <&dp_tx>;
> +      #phy-cells = <0>;
> +    };
> -- 
> 2.34.1
> 
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-03-29 22:58 UTC|newest]

Thread overview: 335+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-27 22:39 [PATCH 00/22] drm/mediatek: Add mt8195 DisplayPort driver Guillaume Ranquet
2022-03-27 22:39 ` Guillaume Ranquet
2022-03-27 22:39 ` Guillaume Ranquet
2022-03-27 22:39 ` Guillaume Ranquet
2022-03-27 22:39 ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 01/22] dt-bindings: mediatek,dpi: Add DP_INTF compatible Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-29 10:42   ` Matthias Brugger
2022-03-29 10:42     ` Matthias Brugger
2022-03-29 10:42     ` Matthias Brugger
2022-03-29 10:42     ` Matthias Brugger
2022-03-29 10:42     ` Matthias Brugger
2022-03-30  5:11   ` Miles Chen
2022-03-30  5:11     ` [PATCH v9 01/22] dt-bindings: mediatek, dpi: " Miles Chen
2022-03-30  5:11     ` Miles Chen
2022-03-30  5:11     ` Miles Chen
2022-03-30  5:11     ` Miles Chen
2022-04-22 10:57   ` [PATCH v9 01/22] dt-bindings: mediatek,dpi: " Maxime Ripard
2022-04-22 10:57     ` Maxime Ripard
2022-04-22 10:57     ` Maxime Ripard
2022-04-22 10:57     ` Maxime Ripard
2022-04-22 10:57     ` Maxime Ripard
2022-05-11 12:37     ` Guillaume Ranquet
2022-05-11 12:37       ` [PATCH v9 01/22] dt-bindings: mediatek, dpi: " Guillaume Ranquet
2022-05-11 12:37       ` Guillaume Ranquet
2022-05-11 12:37       ` Guillaume Ranquet
2022-05-11 12:37       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 02/22] dt-bindings: mediatek,dp: Add Display Port binding Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28 12:51   ` Rob Herring
2022-03-28 12:51     ` [PATCH v9 02/22] dt-bindings: mediatek, dp: " Rob Herring
2022-03-28 12:51     ` Rob Herring
2022-03-28 12:51     ` Rob Herring
2022-03-28 12:51     ` Rob Herring
2022-03-28 16:33   ` [PATCH v9 02/22] dt-bindings: mediatek,dp: " Rob Herring
2022-03-28 16:33     ` Rob Herring
2022-03-28 16:33     ` Rob Herring
2022-03-28 16:33     ` Rob Herring
2022-03-28 16:33     ` Rob Herring
2022-03-30  5:12   ` Miles Chen
2022-03-30  5:12     ` [PATCH v9 02/22] dt-bindings: mediatek, dp: " Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-27 22:39 ` [PATCH v9 03/22] dt-bindings: mediatek,dp_phy: Add Display Port PHY binding Guillaume Ranquet
2022-03-27 22:39   ` [PATCH v9 03/22] dt-bindings: mediatek, dp_phy: " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-29 22:58   ` Rob Herring [this message]
2022-03-29 22:58     ` [PATCH v9 03/22] dt-bindings: mediatek,dp_phy: " Rob Herring
2022-03-29 22:58     ` Rob Herring
2022-03-29 22:58     ` Rob Herring
2022-03-29 22:58     ` Rob Herring
2022-04-12 10:06     ` Guillaume Ranquet
2022-04-12 10:06       ` Guillaume Ranquet
2022-04-12 10:06       ` Guillaume Ranquet
2022-04-12 10:06       ` Guillaume Ranquet
2022-04-12 10:06       ` Guillaume Ranquet
2022-03-30  5:12   ` Miles Chen
2022-03-30  5:12     ` [PATCH v9 03/22] dt-bindings: mediatek, dp_phy: " Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-27 22:39 ` [PATCH v9 04/22] drm/edid: Convert cea_sad helper struct to kernelDoc Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:04   ` AngeloGioacchino Del Regno
2022-03-28  8:04     ` AngeloGioacchino Del Regno
2022-03-28  8:04     ` AngeloGioacchino Del Regno
2022-03-28  8:04     ` AngeloGioacchino Del Regno
2022-03-28  8:04     ` AngeloGioacchino Del Regno
2022-04-12  8:57     ` Guillaume Ranquet
2022-04-12  8:57       ` Guillaume Ranquet
2022-04-12  8:57       ` Guillaume Ranquet
2022-04-12  8:57       ` Guillaume Ranquet
2022-04-12  8:57       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 05/22] drm/edid: Add cea_sad helpers for freq/length Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 06/22] video/hdmi: Add audio_infoframe packing for DP Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:09   ` AngeloGioacchino Del Regno
2022-03-28  8:09     ` AngeloGioacchino Del Regno
2022-03-28  8:09     ` AngeloGioacchino Del Regno
2022-03-28  8:09     ` AngeloGioacchino Del Regno
2022-03-28  8:09     ` AngeloGioacchino Del Regno
2022-04-12  8:59     ` Guillaume Ranquet
2022-04-12  8:59       ` Guillaume Ranquet
2022-04-12  8:59       ` Guillaume Ranquet
2022-04-12  8:59       ` Guillaume Ranquet
2022-04-12  8:59       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 07/22] drm/mediatek: dpi: move dpi limits to SoC config Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  7:18   ` Rex-BC Chen
2022-03-28  7:18     ` Rex-BC Chen
2022-03-28  7:18     ` Rex-BC Chen
2022-03-28  7:18     ` Rex-BC Chen
2022-03-28  7:18     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 08/22] drm/mediatek: dpi: implement a CK/DE pol toggle in " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  7:31   ` Rex-BC Chen
2022-03-28  7:31     ` Rex-BC Chen
2022-03-28  7:31     ` Rex-BC Chen
2022-03-28  7:31     ` Rex-BC Chen
2022-03-28  7:31     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 09/22] drm/mediatek: dpi: implement a swap_input " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:33   ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 10/22] drm/mediatek: dpi: move dimension mask to " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:33   ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 11/22] drm/mediatek: dpi: move hvsize_mask " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:34   ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 12/22] drm/mediatek: dpi: move swap_shift " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:20   ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:34   ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 13/22] drm/mediatek: dpi: move the yuv422_en_bit " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:54   ` Rex-BC Chen
2022-03-28  8:54     ` Rex-BC Chen
2022-03-28  8:54     ` Rex-BC Chen
2022-03-28  8:54     ` Rex-BC Chen
2022-03-28  8:54     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 14/22] drm/mediatek: dpi: move the csc_enable bit " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:35   ` Rex-BC Chen
2022-03-28  8:35     ` Rex-BC Chen
2022-03-28  8:35     ` Rex-BC Chen
2022-03-28  8:35     ` Rex-BC Chen
2022-03-28  8:35     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 15/22] drm/mediatek: dpi: Add dpintf support Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:38   ` Rex-BC Chen
2022-03-28  8:38     ` Rex-BC Chen
2022-03-28  8:38     ` Rex-BC Chen
2022-03-28  8:38     ` Rex-BC Chen
2022-03-28  8:38     ` Rex-BC Chen
2022-04-12  9:10     ` Guillaume Ranquet
2022-04-12  9:10       ` Guillaume Ranquet
2022-04-12  9:10       ` Guillaume Ranquet
2022-04-12  9:10       ` Guillaume Ranquet
2022-04-12  9:10       ` Guillaume Ranquet
2022-03-29  3:16   ` Rex-BC Chen
2022-03-29  3:16     ` Rex-BC Chen
2022-03-29  3:16     ` Rex-BC Chen
2022-03-29  3:16     ` Rex-BC Chen
2022-03-29  3:16     ` Rex-BC Chen
2022-04-12  9:12     ` Guillaume Ranquet
2022-04-12  9:12       ` Guillaume Ranquet
2022-04-12  9:12       ` Guillaume Ranquet
2022-04-12  9:12       ` Guillaume Ranquet
2022-04-12  9:12       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 16/22] drm/meditek: dpi: Add matrix_sel helper Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:49   ` Rex-BC Chen
2022-03-28  8:49     ` Rex-BC Chen
2022-03-28  8:49     ` Rex-BC Chen
2022-03-28  8:49     ` Rex-BC Chen
2022-03-28  8:49     ` Rex-BC Chen
2022-04-12  9:37     ` Guillaume Ranquet
2022-04-12  9:37       ` Guillaume Ranquet
2022-04-12  9:37       ` Guillaume Ranquet
2022-04-12  9:37       ` Guillaume Ranquet
2022-04-12  9:37       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 17/22] phy: phy-mtk-dp: Add driver for DP phy Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:20   ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-04-12  9:04     ` Guillaume Ranquet
2022-04-12  9:04       ` Guillaume Ranquet
2022-04-12  9:04       ` Guillaume Ranquet
2022-04-12  9:04       ` Guillaume Ranquet
2022-04-12  9:04       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 18/22] drm/mediatek: Add mt8195 Embedded DisplayPort driver Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  9:14   ` AngeloGioacchino Del Regno
2022-03-28  9:14     ` AngeloGioacchino Del Regno
2022-03-28  9:14     ` AngeloGioacchino Del Regno
2022-03-28  9:14     ` AngeloGioacchino Del Regno
2022-03-28  9:14     ` AngeloGioacchino Del Regno
2022-04-12  9:46     ` Guillaume Ranquet
2022-04-12  9:46       ` Guillaume Ranquet
2022-04-12  9:46       ` Guillaume Ranquet
2022-04-12  9:46       ` Guillaume Ranquet
2022-04-12  9:46       ` Guillaume Ranquet
2022-04-13  7:50       ` AngeloGioacchino Del Regno
2022-04-13  7:50         ` AngeloGioacchino Del Regno
2022-04-13  7:50         ` AngeloGioacchino Del Regno
2022-04-13  7:50         ` AngeloGioacchino Del Regno
2022-04-13  7:50         ` AngeloGioacchino Del Regno
2022-03-29  3:34   ` Rex-BC Chen
2022-03-29  3:34     ` Rex-BC Chen
2022-03-29  3:34     ` Rex-BC Chen
2022-03-29  3:34     ` Rex-BC Chen
2022-03-29  3:34     ` Rex-BC Chen
2022-04-12  9:48     ` Guillaume Ranquet
2022-04-12  9:48       ` Guillaume Ranquet
2022-04-12  9:48       ` Guillaume Ranquet
2022-04-12  9:48       ` Guillaume Ranquet
2022-04-12  9:48       ` Guillaume Ranquet
2022-03-29  5:41   ` Rex-BC Chen
2022-03-29  5:41     ` Rex-BC Chen
2022-03-29  5:41     ` Rex-BC Chen
2022-03-29  5:41     ` Rex-BC Chen
2022-03-29  5:41     ` Rex-BC Chen
2022-04-12 10:03     ` Guillaume Ranquet
2022-04-12 10:03       ` Guillaume Ranquet
2022-04-12 10:03       ` Guillaume Ranquet
2022-04-12 10:03       ` Guillaume Ranquet
2022-04-12 10:03       ` Guillaume Ranquet
2022-04-29  8:39   ` Maxime Ripard
2022-04-29  8:39     ` Maxime Ripard
2022-04-29  8:39     ` Maxime Ripard
2022-04-29  8:39     ` Maxime Ripard
2022-04-29  8:39     ` Maxime Ripard
2022-05-11 12:59     ` Guillaume Ranquet
2022-05-11 12:59       ` Guillaume Ranquet
2022-05-11 12:59       ` Guillaume Ranquet
2022-05-11 12:59       ` Guillaume Ranquet
2022-05-11 12:59       ` Guillaume Ranquet
2022-05-12  7:44       ` Maxime Ripard
2022-05-12  7:44         ` Maxime Ripard
2022-05-12  7:44         ` Maxime Ripard
2022-05-12  7:44         ` Maxime Ripard
2022-05-12  7:44         ` Maxime Ripard
2022-05-19 16:26         ` Guillaume Ranquet
2022-05-19 16:26           ` Guillaume Ranquet
2022-05-19 16:26           ` Guillaume Ranquet
2022-05-19 16:26           ` Guillaume Ranquet
2022-05-19 16:26           ` Guillaume Ranquet
2022-05-25  9:44           ` Maxime Ripard
2022-05-25  9:44             ` Maxime Ripard
2022-05-25  9:44             ` Maxime Ripard
2022-05-25  9:44             ` Maxime Ripard
2022-05-25  9:44             ` Maxime Ripard
2022-03-27 22:39 ` [PATCH v9 19/22] drm/mediatek: Add mt8195 External DisplayPort support Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 20/22] drm/mediatek: add hpd debounce Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 21/22] drm/mediatek: change the aux retries times when receiving AUX_DEFER Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  1:46   ` Rex-BC Chen
2022-03-28  1:46     ` Rex-BC Chen
2022-03-28  1:46     ` Rex-BC Chen
2022-03-28  1:46     ` Rex-BC Chen
2022-03-28  1:46     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 22/22] drm/mediatek: DP audio support for mt8195 Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet

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