All of lore.kernel.org
 help / color / mirror / Atom feed
From: Andrew Lunn <andrew@lunn.ch>
To: "Pali Rohár" <pali@kernel.org>
Cc: Gregory Clement <gregory.clement@bootlin.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] irqchip/armada-370-xp: Do not touch Performance Counter Overflow on A375, A38x, A39x
Date: Sat, 30 Apr 2022 00:23:34 +0200	[thread overview]
Message-ID: <YmxlZncjVnym4kfc@lunn.ch> (raw)
In-Reply-To: <20220429130524.vs6mlzvotvaortbw@pali>

On Fri, Apr 29, 2022 at 03:05:24PM +0200, Pali Rohár wrote:
> On Friday 29 April 2022 14:23:08 Andrew Lunn wrote:
> > On Mon, Apr 25, 2022 at 01:37:05PM +0200, Pali Rohár wrote:
> > > Register ARMADA_370_XP_INT_FABRIC_MASK_OFFS is Armada 370 and XP specific
> > > and on new Armada platforms it has different meaning. It does not configure
> > > Performance Counter Overflow interrupt masking. So do not touch this
> > > register on non-A370/XP platforms (A375, A38x and A39x).
> > 
> > Hi Pali
> > 
> > Do the Armada 375, 38x and 39x have an over flow interrupt? I assume
> > not.
> 
> Hello! According to documentation there is something named performance
> counter interrupt, but it is in different register... and this register
> is not per-cpu.

O.K, not something which can be quickly added. 

> > Does this need a fixes tag? Should it be back ported in stable?
> 
> git blame show that this functionality appeared in commit 28da06dfd9e4
> ("irqchip: armada-370-xp: Enable the PMU interrupts").

It is more a question of:

 o It must fix a real bug that bothers people (not a, “This could be a
   problem…” type thing).

From https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html

Have you seen bad things happen because of this?

     Andrew

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: "Pali Rohár" <pali@kernel.org>
Cc: Gregory Clement <gregory.clement@bootlin.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] irqchip/armada-370-xp: Do not touch Performance Counter Overflow on A375, A38x, A39x
Date: Sat, 30 Apr 2022 00:23:34 +0200	[thread overview]
Message-ID: <YmxlZncjVnym4kfc@lunn.ch> (raw)
In-Reply-To: <20220429130524.vs6mlzvotvaortbw@pali>

On Fri, Apr 29, 2022 at 03:05:24PM +0200, Pali Rohár wrote:
> On Friday 29 April 2022 14:23:08 Andrew Lunn wrote:
> > On Mon, Apr 25, 2022 at 01:37:05PM +0200, Pali Rohár wrote:
> > > Register ARMADA_370_XP_INT_FABRIC_MASK_OFFS is Armada 370 and XP specific
> > > and on new Armada platforms it has different meaning. It does not configure
> > > Performance Counter Overflow interrupt masking. So do not touch this
> > > register on non-A370/XP platforms (A375, A38x and A39x).
> > 
> > Hi Pali
> > 
> > Do the Armada 375, 38x and 39x have an over flow interrupt? I assume
> > not.
> 
> Hello! According to documentation there is something named performance
> counter interrupt, but it is in different register... and this register
> is not per-cpu.

O.K, not something which can be quickly added. 

> > Does this need a fixes tag? Should it be back ported in stable?
> 
> git blame show that this functionality appeared in commit 28da06dfd9e4
> ("irqchip: armada-370-xp: Enable the PMU interrupts").

It is more a question of:

 o It must fix a real bug that bothers people (not a, “This could be a
   problem…” type thing).

From https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html

Have you seen bad things happen because of this?

     Andrew

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-04-29 22:23 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-25 11:37 [PATCH 1/2] irqchip/armada-370-xp: Do not touch Performance Counter Overflow on A375, A38x, A39x Pali Rohár
2022-04-25 11:37 ` Pali Rohár
2022-04-25 11:37 ` [PATCH 2/2] irqchip/armada-370-xp: Do not allow mapping IRQ 0 and 1 Pali Rohár
2022-04-25 11:37   ` Pali Rohár
2022-04-29 12:30   ` Andrew Lunn
2022-04-29 12:30     ` Andrew Lunn
2022-05-01 12:02     ` Pali Rohár
2022-05-01 12:02       ` Pali Rohár
2022-05-06 11:22   ` Marc Zyngier
2022-05-06 11:22     ` Marc Zyngier
2022-05-06 11:25   ` [irqchip: irq/irqchip-next] " irqchip-bot for Pali Rohár
2022-04-29 12:23 ` [PATCH 1/2] irqchip/armada-370-xp: Do not touch Performance Counter Overflow on A375, A38x, A39x Andrew Lunn
2022-04-29 12:23   ` Andrew Lunn
2022-04-29 13:05   ` Pali Rohár
2022-04-29 13:05     ` Pali Rohár
2022-04-29 22:23     ` Andrew Lunn [this message]
2022-04-29 22:23       ` Andrew Lunn
2022-04-29 22:31       ` Pali Rohár
2022-04-29 22:31         ` Pali Rohár
2022-04-29 22:39         ` Andrew Lunn
2022-04-29 22:39           ` Andrew Lunn
2022-05-06 11:25 ` [irqchip: irq/irqchip-next] " irqchip-bot for Pali Rohár

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YmxlZncjVnym4kfc@lunn.ch \
    --to=andrew@lunn.ch \
    --cc=gregory.clement@bootlin.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=maz@kernel.org \
    --cc=pali@kernel.org \
    --cc=sebastian.hesselbarth@gmail.com \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.