From: Mark Brown <broonie@kernel.org>
To: James Clark <james.clark@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
german.gomez@arm.com, John Garry <john.garry@huawei.com>,
Will Deacon <will@kernel.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Leo Yan <leo.yan@linaro.org>, Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
linux-doc@vger.kernel.org
Subject: Re: [PATCH v1 2/6] arm64/sve: Add Perf extensions documentation
Date: Mon, 9 May 2022 16:45:43 +0100 [thread overview]
Message-ID: <Ynk3J2Gfnm4LkHn0@sirena.org.uk> (raw)
In-Reply-To: <20220509144257.1623063-3-james.clark@arm.com>
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On Mon, May 09, 2022 at 03:42:50PM +0100, James Clark wrote:
> +* Its value is equivalent to the current vector length (VL) in bits divided by
> + 64.
Please explicitly say that this is the current *SVE* vector length,
given that with SME entering streaming mode means we have SVE registers
with the current streaming vector length which may be different to the
SVE vector length it is possible that someone may read the above as
referring to the vector length that applies to the current Z/P registers.
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WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: James Clark <james.clark@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
german.gomez@arm.com, John Garry <john.garry@huawei.com>,
Will Deacon <will@kernel.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Leo Yan <leo.yan@linaro.org>, Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
linux-doc@vger.kernel.org
Subject: Re: [PATCH v1 2/6] arm64/sve: Add Perf extensions documentation
Date: Mon, 9 May 2022 16:45:43 +0100 [thread overview]
Message-ID: <Ynk3J2Gfnm4LkHn0@sirena.org.uk> (raw)
In-Reply-To: <20220509144257.1623063-3-james.clark@arm.com>
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On Mon, May 09, 2022 at 03:42:50PM +0100, James Clark wrote:
> +* Its value is equivalent to the current vector length (VL) in bits divided by
> + 64.
Please explicitly say that this is the current *SVE* vector length,
given that with SME entering streaming mode means we have SVE registers
with the current streaming vector length which may be different to the
SVE vector length it is possible that someone may read the above as
referring to the vector length that applies to the current Z/P registers.
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next prev parent reply other threads:[~2022-05-09 15:46 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-09 14:42 [PATCH v1 0/6] perf: arm64: Support for Dwarf unwinding through SVE functions James Clark
2022-05-09 14:42 ` James Clark
2022-05-09 14:42 ` [PATCH v1 1/6] perf: arm64: Add SVE vector granule register to user regs James Clark
2022-05-09 14:42 ` James Clark
2022-05-09 15:48 ` Mark Brown
2022-05-09 15:48 ` Mark Brown
2022-05-10 9:34 ` James Clark
2022-05-10 9:34 ` James Clark
2022-05-09 14:42 ` [PATCH v1 2/6] arm64/sve: Add Perf extensions documentation James Clark
2022-05-09 14:42 ` James Clark
2022-05-09 15:45 ` Mark Brown [this message]
2022-05-09 15:45 ` Mark Brown
2022-05-09 14:42 ` [PATCH v1 3/6] perf tools: arm64: Copy perf_regs.h from the kernel James Clark
2022-05-09 14:42 ` James Clark
2022-05-09 14:42 ` [PATCH v1 4/6] perf tools: Use dynamic register set for Dwarf unwind James Clark
2022-05-09 14:42 ` James Clark
2022-05-26 15:44 ` Arnaldo Carvalho de Melo
2022-05-26 15:44 ` Arnaldo Carvalho de Melo
2022-05-26 18:19 ` Arnaldo Carvalho de Melo
2022-05-26 18:19 ` Arnaldo Carvalho de Melo
2022-05-27 6:18 ` Leo Yan
2022-05-27 6:18 ` Leo Yan
2022-05-27 16:08 ` Arnaldo Carvalho de Melo
2022-05-27 16:08 ` Arnaldo Carvalho de Melo
2022-05-09 14:42 ` [PATCH v1 5/6] perf tools: arm64: Decouple Libunwind register names from Perf James Clark
2022-05-09 14:42 ` James Clark
2022-05-09 14:42 ` [PATCH v1 6/6] perf tools: arm64: Add support for VG register James Clark
2022-05-09 14:42 ` James Clark
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