* [PATCH] drm/amdgpu/pm: smu_v13_0_4: delete duplicate condition
@ 2022-05-18 17:38 ` Dan Carpenter
0 siblings, 0 replies; 4+ messages in thread
From: Dan Carpenter @ 2022-05-18 17:38 UTC (permalink / raw)
To: Evan Quan, Tim Huang
Cc: Alex Deucher, Christian König, Pan, Xinhui, David Airlie,
Daniel Vetter, Huang Rui, Xiaomeng Hou, Aaron Liu, amd-gfx,
kernel-janitors
There is no need to check if "clock_ranges' is non-NULL. It is checked
already on the line before.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c | 62 +++++++++----------
1 file changed, 30 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
index 7d6ff141b43f..5a17b51aa0f9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
@@ -644,42 +644,40 @@ static int smu_v13_0_4_set_watermarks_table(struct smu_context *smu,
if (!table || !clock_ranges)
return -EINVAL;
- if (clock_ranges) {
- if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
- clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
- return -EINVAL;
-
- for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
- table->WatermarkRow[WM_DCFCLK][i].MinClock =
- clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
- table->WatermarkRow[WM_DCFCLK][i].MaxClock =
- clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
- table->WatermarkRow[WM_DCFCLK][i].MinMclk =
- clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
- table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
- clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
-
- table->WatermarkRow[WM_DCFCLK][i].WmSetting =
- clock_ranges->reader_wm_sets[i].wm_inst;
- }
+ if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
+ clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
+ return -EINVAL;
- for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
- table->WatermarkRow[WM_SOCCLK][i].MinClock =
- clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
- table->WatermarkRow[WM_SOCCLK][i].MaxClock =
- clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
- table->WatermarkRow[WM_SOCCLK][i].MinMclk =
- clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
- table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
- clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
-
- table->WatermarkRow[WM_SOCCLK][i].WmSetting =
- clock_ranges->writer_wm_sets[i].wm_inst;
- }
+ for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
+ table->WatermarkRow[WM_DCFCLK][i].MinClock =
+ clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
+ table->WatermarkRow[WM_DCFCLK][i].MaxClock =
+ clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
+ table->WatermarkRow[WM_DCFCLK][i].MinMclk =
+ clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
+ table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
+ clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
+
+ table->WatermarkRow[WM_DCFCLK][i].WmSetting =
+ clock_ranges->reader_wm_sets[i].wm_inst;
+ }
- smu->watermarks_bitmap |= WATERMARKS_EXIST;
+ for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
+ table->WatermarkRow[WM_SOCCLK][i].MinClock =
+ clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
+ table->WatermarkRow[WM_SOCCLK][i].MaxClock =
+ clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
+ table->WatermarkRow[WM_SOCCLK][i].MinMclk =
+ clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
+ table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
+ clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
+
+ table->WatermarkRow[WM_SOCCLK][i].WmSetting =
+ clock_ranges->writer_wm_sets[i].wm_inst;
}
+ smu->watermarks_bitmap |= WATERMARKS_EXIST;
+
/* pass data to smu controller */
if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
!(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
--
2.35.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] drm/amdgpu/pm: smu_v13_0_4: delete duplicate condition
@ 2022-05-18 17:38 ` Dan Carpenter
0 siblings, 0 replies; 4+ messages in thread
From: Dan Carpenter @ 2022-05-18 17:38 UTC (permalink / raw)
To: Evan Quan, Tim Huang
Cc: Xiaomeng Hou, David Airlie, Pan, Xinhui, kernel-janitors,
Aaron Liu, amd-gfx, Huang Rui, Daniel Vetter, Alex Deucher,
Christian König
There is no need to check if "clock_ranges' is non-NULL. It is checked
already on the line before.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c | 62 +++++++++----------
1 file changed, 30 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
index 7d6ff141b43f..5a17b51aa0f9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
@@ -644,42 +644,40 @@ static int smu_v13_0_4_set_watermarks_table(struct smu_context *smu,
if (!table || !clock_ranges)
return -EINVAL;
- if (clock_ranges) {
- if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
- clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
- return -EINVAL;
-
- for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
- table->WatermarkRow[WM_DCFCLK][i].MinClock =
- clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
- table->WatermarkRow[WM_DCFCLK][i].MaxClock =
- clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
- table->WatermarkRow[WM_DCFCLK][i].MinMclk =
- clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
- table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
- clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
-
- table->WatermarkRow[WM_DCFCLK][i].WmSetting =
- clock_ranges->reader_wm_sets[i].wm_inst;
- }
+ if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
+ clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
+ return -EINVAL;
- for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
- table->WatermarkRow[WM_SOCCLK][i].MinClock =
- clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
- table->WatermarkRow[WM_SOCCLK][i].MaxClock =
- clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
- table->WatermarkRow[WM_SOCCLK][i].MinMclk =
- clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
- table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
- clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
-
- table->WatermarkRow[WM_SOCCLK][i].WmSetting =
- clock_ranges->writer_wm_sets[i].wm_inst;
- }
+ for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
+ table->WatermarkRow[WM_DCFCLK][i].MinClock =
+ clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
+ table->WatermarkRow[WM_DCFCLK][i].MaxClock =
+ clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
+ table->WatermarkRow[WM_DCFCLK][i].MinMclk =
+ clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
+ table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
+ clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
+
+ table->WatermarkRow[WM_DCFCLK][i].WmSetting =
+ clock_ranges->reader_wm_sets[i].wm_inst;
+ }
- smu->watermarks_bitmap |= WATERMARKS_EXIST;
+ for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
+ table->WatermarkRow[WM_SOCCLK][i].MinClock =
+ clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
+ table->WatermarkRow[WM_SOCCLK][i].MaxClock =
+ clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
+ table->WatermarkRow[WM_SOCCLK][i].MinMclk =
+ clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
+ table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
+ clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
+
+ table->WatermarkRow[WM_SOCCLK][i].WmSetting =
+ clock_ranges->writer_wm_sets[i].wm_inst;
}
+ smu->watermarks_bitmap |= WATERMARKS_EXIST;
+
/* pass data to smu controller */
if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
!(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
--
2.35.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/amdgpu/pm: smu_v13_0_4: delete duplicate condition
2022-05-18 17:38 ` Dan Carpenter
@ 2022-05-18 17:58 ` Alex Deucher
-1 siblings, 0 replies; 4+ messages in thread
From: Alex Deucher @ 2022-05-18 17:58 UTC (permalink / raw)
To: Dan Carpenter
Cc: Evan Quan, Tim Huang, Xiaomeng Hou, David Airlie, Pan, Xinhui,
kernel-janitors, Aaron Liu, amd-gfx list, Huang Rui,
Daniel Vetter, Alex Deucher, Christian König
Applied. Thanks!
Alex
On Wed, May 18, 2022 at 1:39 PM Dan Carpenter <dan.carpenter@oracle.com> wrote:
>
> There is no need to check if "clock_ranges' is non-NULL. It is checked
> already on the line before.
>
> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
> ---
> .../drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c | 62 +++++++++----------
> 1 file changed, 30 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
> index 7d6ff141b43f..5a17b51aa0f9 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
> @@ -644,42 +644,40 @@ static int smu_v13_0_4_set_watermarks_table(struct smu_context *smu,
> if (!table || !clock_ranges)
> return -EINVAL;
>
> - if (clock_ranges) {
> - if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
> - clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
> - return -EINVAL;
> -
> - for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
> - table->WatermarkRow[WM_DCFCLK][i].MinClock =
> - clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
> - table->WatermarkRow[WM_DCFCLK][i].MaxClock =
> - clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
> - table->WatermarkRow[WM_DCFCLK][i].MinMclk =
> - clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
> - table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
> - clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
> -
> - table->WatermarkRow[WM_DCFCLK][i].WmSetting =
> - clock_ranges->reader_wm_sets[i].wm_inst;
> - }
> + if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
> + clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
> + return -EINVAL;
>
> - for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
> - table->WatermarkRow[WM_SOCCLK][i].MinClock =
> - clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
> - table->WatermarkRow[WM_SOCCLK][i].MaxClock =
> - clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
> - table->WatermarkRow[WM_SOCCLK][i].MinMclk =
> - clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
> - table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
> - clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
> -
> - table->WatermarkRow[WM_SOCCLK][i].WmSetting =
> - clock_ranges->writer_wm_sets[i].wm_inst;
> - }
> + for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
> + table->WatermarkRow[WM_DCFCLK][i].MinClock =
> + clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
> + table->WatermarkRow[WM_DCFCLK][i].MaxClock =
> + clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
> + table->WatermarkRow[WM_DCFCLK][i].MinMclk =
> + clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
> + table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
> + clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
> +
> + table->WatermarkRow[WM_DCFCLK][i].WmSetting =
> + clock_ranges->reader_wm_sets[i].wm_inst;
> + }
>
> - smu->watermarks_bitmap |= WATERMARKS_EXIST;
> + for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
> + table->WatermarkRow[WM_SOCCLK][i].MinClock =
> + clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
> + table->WatermarkRow[WM_SOCCLK][i].MaxClock =
> + clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
> + table->WatermarkRow[WM_SOCCLK][i].MinMclk =
> + clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
> + table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
> + clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
> +
> + table->WatermarkRow[WM_SOCCLK][i].WmSetting =
> + clock_ranges->writer_wm_sets[i].wm_inst;
> }
>
> + smu->watermarks_bitmap |= WATERMARKS_EXIST;
> +
> /* pass data to smu controller */
> if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
> !(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/amdgpu/pm: smu_v13_0_4: delete duplicate condition
@ 2022-05-18 17:58 ` Alex Deucher
0 siblings, 0 replies; 4+ messages in thread
From: Alex Deucher @ 2022-05-18 17:58 UTC (permalink / raw)
To: Dan Carpenter
Cc: Tim Huang, David Airlie, Huang Rui, Pan, Xinhui, kernel-janitors,
Aaron Liu, amd-gfx list, Xiaomeng Hou, Daniel Vetter,
Alex Deucher, Evan Quan, Christian König
Applied. Thanks!
Alex
On Wed, May 18, 2022 at 1:39 PM Dan Carpenter <dan.carpenter@oracle.com> wrote:
>
> There is no need to check if "clock_ranges' is non-NULL. It is checked
> already on the line before.
>
> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
> ---
> .../drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c | 62 +++++++++----------
> 1 file changed, 30 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
> index 7d6ff141b43f..5a17b51aa0f9 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
> @@ -644,42 +644,40 @@ static int smu_v13_0_4_set_watermarks_table(struct smu_context *smu,
> if (!table || !clock_ranges)
> return -EINVAL;
>
> - if (clock_ranges) {
> - if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
> - clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
> - return -EINVAL;
> -
> - for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
> - table->WatermarkRow[WM_DCFCLK][i].MinClock =
> - clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
> - table->WatermarkRow[WM_DCFCLK][i].MaxClock =
> - clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
> - table->WatermarkRow[WM_DCFCLK][i].MinMclk =
> - clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
> - table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
> - clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
> -
> - table->WatermarkRow[WM_DCFCLK][i].WmSetting =
> - clock_ranges->reader_wm_sets[i].wm_inst;
> - }
> + if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
> + clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
> + return -EINVAL;
>
> - for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
> - table->WatermarkRow[WM_SOCCLK][i].MinClock =
> - clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
> - table->WatermarkRow[WM_SOCCLK][i].MaxClock =
> - clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
> - table->WatermarkRow[WM_SOCCLK][i].MinMclk =
> - clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
> - table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
> - clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
> -
> - table->WatermarkRow[WM_SOCCLK][i].WmSetting =
> - clock_ranges->writer_wm_sets[i].wm_inst;
> - }
> + for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
> + table->WatermarkRow[WM_DCFCLK][i].MinClock =
> + clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
> + table->WatermarkRow[WM_DCFCLK][i].MaxClock =
> + clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
> + table->WatermarkRow[WM_DCFCLK][i].MinMclk =
> + clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
> + table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
> + clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
> +
> + table->WatermarkRow[WM_DCFCLK][i].WmSetting =
> + clock_ranges->reader_wm_sets[i].wm_inst;
> + }
>
> - smu->watermarks_bitmap |= WATERMARKS_EXIST;
> + for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
> + table->WatermarkRow[WM_SOCCLK][i].MinClock =
> + clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
> + table->WatermarkRow[WM_SOCCLK][i].MaxClock =
> + clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
> + table->WatermarkRow[WM_SOCCLK][i].MinMclk =
> + clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
> + table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
> + clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
> +
> + table->WatermarkRow[WM_SOCCLK][i].WmSetting =
> + clock_ranges->writer_wm_sets[i].wm_inst;
> }
>
> + smu->watermarks_bitmap |= WATERMARKS_EXIST;
> +
> /* pass data to smu controller */
> if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
> !(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-05-18 17:58 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2022-05-18 17:38 [PATCH] drm/amdgpu/pm: smu_v13_0_4: delete duplicate condition Dan Carpenter
2022-05-18 17:38 ` Dan Carpenter
2022-05-18 17:58 ` Alex Deucher
2022-05-18 17:58 ` Alex Deucher
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