[PATCH v2 0/3] drm/rockchip: support gamma control on RK3399

[PATCH v2 0/3] drm/rockchip: support gamma control on RK3399

[Hugh Cole-Baker]

This extends the Rockchip VOP driver to support setting the gamma LUT on the
RK3399 SoC. Previously, the driver supported gamma control for the RK3288
only. On the RK3399 the method for updating the LUT is slightly different.
This implementation was based on the code and description from the vendor
kernel [1].

The RK3399 also has the address resources for the VOP general registers and
the gamma LUT located adjacent to each other, not on either side of the IOMMU
address as on the RK3288, but for simplicity this series follows the existing
DT binding which requires the gamma LUT as a second address resource.

This should enable gamma control and "night mode" on all RK3399-based devices
such as the Pinebook Pro, it has been tested using the "redshift" app and
GNOME's "Night Light" feature on a RockPro64 SBC. The changes should not
affect RK3288 gamma support using the existing code path, testing on RK3288
would be welcome.

Changes from v1: Moved the vop_crtc_gamma_set call to the end of
vop_crtc_atomic_enable after the clocks and CRTC are enabled; otherwise VOP
regs are written to before the VOP's clocks are enabled which is a no-no and
can cause a hang if re-enabling the CRTC after gamma has been set.

Hugh Cole-Baker (3):
  drm/rockchip: define gamma registers for RK3399
  drm/rockchip: support gamma control on RK3399
  arm64: dts: rockchip: enable gamma control on RK3399

 arch/arm64/boot/dts/rockchip/rk3399.dtsi    |   4 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 105 +++++++++++++-------
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h |   2 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c |  24 ++++-
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h |   1 +
 5 files changed, 98 insertions(+), 38 deletions(-)

-- 
2.24.3 (Apple Git-128)


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH v2 0/3] drm/rockchip: support gamma control on RK3399

[Hugh Cole-Baker]

This extends the Rockchip VOP driver to support setting the gamma LUT on the
RK3399 SoC. Previously, the driver supported gamma control for the RK3288
only. On the RK3399 the method for updating the LUT is slightly different.
This implementation was based on the code and description from the vendor
kernel [1].

The RK3399 also has the address resources for the VOP general registers and
the gamma LUT located adjacent to each other, not on either side of the IOMMU
address as on the RK3288, but for simplicity this series follows the existing
DT binding which requires the gamma LUT as a second address resource.

This should enable gamma control and "night mode" on all RK3399-based devices
such as the Pinebook Pro, it has been tested using the "redshift" app and
GNOME's "Night Light" feature on a RockPro64 SBC. The changes should not
affect RK3288 gamma support using the existing code path, testing on RK3288
would be welcome.

Changes from v1: Moved the vop_crtc_gamma_set call to the end of
vop_crtc_atomic_enable after the clocks and CRTC are enabled; otherwise VOP
regs are written to before the VOP's clocks are enabled which is a no-no and
can cause a hang if re-enabling the CRTC after gamma has been set.

Hugh Cole-Baker (3):
  drm/rockchip: define gamma registers for RK3399
  drm/rockchip: support gamma control on RK3399
  arm64: dts: rockchip: enable gamma control on RK3399

 arch/arm64/boot/dts/rockchip/rk3399.dtsi    |   4 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 105 +++++++++++++-------
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h |   2 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c |  24 ++++-
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h |   1 +
 5 files changed, 98 insertions(+), 38 deletions(-)

-- 
2.24.3 (Apple Git-128)

[PATCH v2 0/3] drm/rockchip: support gamma control on RK3399

[Hugh Cole-Baker]

This extends the Rockchip VOP driver to support setting the gamma LUT on the
RK3399 SoC. Previously, the driver supported gamma control for the RK3288
only. On the RK3399 the method for updating the LUT is slightly different.
This implementation was based on the code and description from the vendor
kernel [1].

The RK3399 also has the address resources for the VOP general registers and
the gamma LUT located adjacent to each other, not on either side of the IOMMU
address as on the RK3288, but for simplicity this series follows the existing
DT binding which requires the gamma LUT as a second address resource.

This should enable gamma control and "night mode" on all RK3399-based devices
such as the Pinebook Pro, it has been tested using the "redshift" app and
GNOME's "Night Light" feature on a RockPro64 SBC. The changes should not
affect RK3288 gamma support using the existing code path, testing on RK3288
would be welcome.

Changes from v1: Moved the vop_crtc_gamma_set call to the end of
vop_crtc_atomic_enable after the clocks and CRTC are enabled; otherwise VOP
regs are written to before the VOP's clocks are enabled which is a no-no and
can cause a hang if re-enabling the CRTC after gamma has been set.

Hugh Cole-Baker (3):
  drm/rockchip: define gamma registers for RK3399
  drm/rockchip: support gamma control on RK3399
  arm64: dts: rockchip: enable gamma control on RK3399

 arch/arm64/boot/dts/rockchip/rk3399.dtsi    |   4 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 105 +++++++++++++-------
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h |   2 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c |  24 ++++-
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h |   1 +
 5 files changed, 98 insertions(+), 38 deletions(-)

-- 
2.24.3 (Apple Git-128)


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399

[Hugh Cole-Baker]

The VOP on RK3399 has a different approach from previous versions for
setting a gamma lookup table, using an update_gamma_lut register. As
this differs from RK3288, give RK3399 its own set of "common" register
definitions.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
---

Changes from v1: no changes in this patch

 drivers/gpu/drm/rockchip/rockchip_drm_vop.h |  2 ++
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 24 +++++++++++++++++++--
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  1 +
 3 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 857d97cdc67c..14179e89bd21 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -99,6 +99,8 @@ struct vop_common {
 	struct vop_reg dither_down_en;
 	struct vop_reg dither_up;
 	struct vop_reg dsp_lut_en;
+	struct vop_reg update_gamma_lut;
+	struct vop_reg lut_buffer_index;
 	struct vop_reg gate_en;
 	struct vop_reg mmu_en;
 	struct vop_reg out_mode;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index ca7cc82125cb..bfb7e130f09b 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -865,6 +865,24 @@ static const struct vop_output rk3399_output = {
 	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
 };
 
+static const struct vop_common rk3399_common = {
+	.standby = VOP_REG_SYNC(RK3399_SYS_CTRL, 0x1, 22),
+	.gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
+	.mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20),
+	.dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4),
+	.dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3),
+	.dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2),
+	.pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
+	.dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
+	.dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0),
+	.update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7),
+	.lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1),
+	.data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
+	.dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18),
+	.out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
+	.cfg_done = VOP_REG_SYNC(RK3399_REG_CFG_DONE, 0x1, 0),
+};
+
 static const struct vop_yuv2yuv_phy rk3399_yuv2yuv_win01_data = {
 	.y2r_coefficients = {
 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),
@@ -944,7 +962,7 @@ static const struct vop_data rk3399_vop_big = {
 	.version = VOP_VERSION(3, 5),
 	.feature = VOP_FEATURE_OUTPUT_RGB10,
 	.intr = &rk3366_vop_intr,
-	.common = &rk3288_common,
+	.common = &rk3399_common,
 	.modeset = &rk3288_modeset,
 	.output = &rk3399_output,
 	.afbc = &rk3399_vop_afbc,
@@ -952,6 +970,7 @@ static const struct vop_data rk3399_vop_big = {
 	.win = rk3399_vop_win_data,
 	.win_size = ARRAY_SIZE(rk3399_vop_win_data),
 	.win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data,
+	.lut_size = 1024,
 };
 
 static const struct vop_win_data rk3399_vop_lit_win_data[] = {
@@ -970,13 +989,14 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_lit_win_yuv2yuv_data[] = {
 static const struct vop_data rk3399_vop_lit = {
 	.version = VOP_VERSION(3, 6),
 	.intr = &rk3366_vop_intr,
-	.common = &rk3288_common,
+	.common = &rk3399_common,
 	.modeset = &rk3288_modeset,
 	.output = &rk3399_output,
 	.misc = &rk3368_misc,
 	.win = rk3399_vop_lit_win_data,
 	.win_size = ARRAY_SIZE(rk3399_vop_lit_win_data),
 	.win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data,
+	.lut_size = 256,
 };
 
 static const struct vop_win_data rk3228_vop_win_data[] = {
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
index 0b3cd65ba5c1..406e981c75bd 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
@@ -628,6 +628,7 @@
 #define RK3399_YUV2YUV_WIN			0x02c0
 #define RK3399_YUV2YUV_POST			0x02c4
 #define RK3399_AUTO_GATING_EN			0x02cc
+#define RK3399_DBG_POST_REG1			0x036c
 #define RK3399_WIN0_CSC_COE			0x03a0
 #define RK3399_WIN1_CSC_COE			0x03c0
 #define RK3399_WIN2_CSC_COE			0x03e0
-- 
2.24.3 (Apple Git-128)


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399

[Hugh Cole-Baker]

The VOP on RK3399 has a different approach from previous versions for
setting a gamma lookup table, using an update_gamma_lut register. As
this differs from RK3288, give RK3399 its own set of "common" register
definitions.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
---

Changes from v1: no changes in this patch

 drivers/gpu/drm/rockchip/rockchip_drm_vop.h |  2 ++
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 24 +++++++++++++++++++--
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  1 +
 3 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 857d97cdc67c..14179e89bd21 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -99,6 +99,8 @@ struct vop_common {
 	struct vop_reg dither_down_en;
 	struct vop_reg dither_up;
 	struct vop_reg dsp_lut_en;
+	struct vop_reg update_gamma_lut;
+	struct vop_reg lut_buffer_index;
 	struct vop_reg gate_en;
 	struct vop_reg mmu_en;
 	struct vop_reg out_mode;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index ca7cc82125cb..bfb7e130f09b 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -865,6 +865,24 @@ static const struct vop_output rk3399_output = {
 	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
 };
 
+static const struct vop_common rk3399_common = {
+	.standby = VOP_REG_SYNC(RK3399_SYS_CTRL, 0x1, 22),
+	.gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
+	.mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20),
+	.dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4),
+	.dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3),
+	.dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2),
+	.pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
+	.dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
+	.dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0),
+	.update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7),
+	.lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1),
+	.data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
+	.dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18),
+	.out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
+	.cfg_done = VOP_REG_SYNC(RK3399_REG_CFG_DONE, 0x1, 0),
+};
+
 static const struct vop_yuv2yuv_phy rk3399_yuv2yuv_win01_data = {
 	.y2r_coefficients = {
 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),
@@ -944,7 +962,7 @@ static const struct vop_data rk3399_vop_big = {
 	.version = VOP_VERSION(3, 5),
 	.feature = VOP_FEATURE_OUTPUT_RGB10,
 	.intr = &rk3366_vop_intr,
-	.common = &rk3288_common,
+	.common = &rk3399_common,
 	.modeset = &rk3288_modeset,
 	.output = &rk3399_output,
 	.afbc = &rk3399_vop_afbc,
@@ -952,6 +970,7 @@ static const struct vop_data rk3399_vop_big = {
 	.win = rk3399_vop_win_data,
 	.win_size = ARRAY_SIZE(rk3399_vop_win_data),
 	.win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data,
+	.lut_size = 1024,
 };
 
 static const struct vop_win_data rk3399_vop_lit_win_data[] = {
@@ -970,13 +989,14 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_lit_win_yuv2yuv_data[] = {
 static const struct vop_data rk3399_vop_lit = {
 	.version = VOP_VERSION(3, 6),
 	.intr = &rk3366_vop_intr,
-	.common = &rk3288_common,
+	.common = &rk3399_common,
 	.modeset = &rk3288_modeset,
 	.output = &rk3399_output,
 	.misc = &rk3368_misc,
 	.win = rk3399_vop_lit_win_data,
 	.win_size = ARRAY_SIZE(rk3399_vop_lit_win_data),
 	.win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data,
+	.lut_size = 256,
 };
 
 static const struct vop_win_data rk3228_vop_win_data[] = {
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
index 0b3cd65ba5c1..406e981c75bd 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
@@ -628,6 +628,7 @@
 #define RK3399_YUV2YUV_WIN			0x02c0
 #define RK3399_YUV2YUV_POST			0x02c4
 #define RK3399_AUTO_GATING_EN			0x02cc
+#define RK3399_DBG_POST_REG1			0x036c
 #define RK3399_WIN0_CSC_COE			0x03a0
 #define RK3399_WIN1_CSC_COE			0x03c0
 #define RK3399_WIN2_CSC_COE			0x03e0
-- 
2.24.3 (Apple Git-128)

[PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399

[Hugh Cole-Baker]

The VOP on RK3399 has a different approach from previous versions for
setting a gamma lookup table, using an update_gamma_lut register. As
this differs from RK3288, give RK3399 its own set of "common" register
definitions.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
---

Changes from v1: no changes in this patch

 drivers/gpu/drm/rockchip/rockchip_drm_vop.h |  2 ++
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 24 +++++++++++++++++++--
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  1 +
 3 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 857d97cdc67c..14179e89bd21 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -99,6 +99,8 @@ struct vop_common {
 	struct vop_reg dither_down_en;
 	struct vop_reg dither_up;
 	struct vop_reg dsp_lut_en;
+	struct vop_reg update_gamma_lut;
+	struct vop_reg lut_buffer_index;
 	struct vop_reg gate_en;
 	struct vop_reg mmu_en;
 	struct vop_reg out_mode;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index ca7cc82125cb..bfb7e130f09b 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -865,6 +865,24 @@ static const struct vop_output rk3399_output = {
 	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
 };
 
+static const struct vop_common rk3399_common = {
+	.standby = VOP_REG_SYNC(RK3399_SYS_CTRL, 0x1, 22),
+	.gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
+	.mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20),
+	.dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4),
+	.dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3),
+	.dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2),
+	.pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
+	.dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
+	.dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0),
+	.update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7),
+	.lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1),
+	.data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
+	.dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18),
+	.out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
+	.cfg_done = VOP_REG_SYNC(RK3399_REG_CFG_DONE, 0x1, 0),
+};
+
 static const struct vop_yuv2yuv_phy rk3399_yuv2yuv_win01_data = {
 	.y2r_coefficients = {
 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),
@@ -944,7 +962,7 @@ static const struct vop_data rk3399_vop_big = {
 	.version = VOP_VERSION(3, 5),
 	.feature = VOP_FEATURE_OUTPUT_RGB10,
 	.intr = &rk3366_vop_intr,
-	.common = &rk3288_common,
+	.common = &rk3399_common,
 	.modeset = &rk3288_modeset,
 	.output = &rk3399_output,
 	.afbc = &rk3399_vop_afbc,
@@ -952,6 +970,7 @@ static const struct vop_data rk3399_vop_big = {
 	.win = rk3399_vop_win_data,
 	.win_size = ARRAY_SIZE(rk3399_vop_win_data),
 	.win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data,
+	.lut_size = 1024,
 };
 
 static const struct vop_win_data rk3399_vop_lit_win_data[] = {
@@ -970,13 +989,14 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_lit_win_yuv2yuv_data[] = {
 static const struct vop_data rk3399_vop_lit = {
 	.version = VOP_VERSION(3, 6),
 	.intr = &rk3366_vop_intr,
-	.common = &rk3288_common,
+	.common = &rk3399_common,
 	.modeset = &rk3288_modeset,
 	.output = &rk3399_output,
 	.misc = &rk3368_misc,
 	.win = rk3399_vop_lit_win_data,
 	.win_size = ARRAY_SIZE(rk3399_vop_lit_win_data),
 	.win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data,
+	.lut_size = 256,
 };
 
 static const struct vop_win_data rk3228_vop_win_data[] = {
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
index 0b3cd65ba5c1..406e981c75bd 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
@@ -628,6 +628,7 @@
 #define RK3399_YUV2YUV_WIN			0x02c0
 #define RK3399_YUV2YUV_POST			0x02c4
 #define RK3399_AUTO_GATING_EN			0x02cc
+#define RK3399_DBG_POST_REG1			0x036c
 #define RK3399_WIN0_CSC_COE			0x03a0
 #define RK3399_WIN1_CSC_COE			0x03c0
 #define RK3399_WIN2_CSC_COE			0x03e0
-- 
2.24.3 (Apple Git-128)


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v2 2/3] drm/rockchip: support gamma control on RK3399

[Hugh Cole-Baker]

The RK3399 has a 1024-entry gamma LUT with 10 bits per component on its
"big" VOP and a 256-entry, 8 bit per component LUT on the "little" VOP.
Compared to the RK3288, it no longer requires disabling gamma while
updating the LUT. On the RK3399, the LUT can be updated at any time as
the hardware has two LUT buffers, one can be written while the other is
in use. A swap of the buffers is triggered by writing 1 to the
update_gamma_lut register.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
---

Changes from v1: Moved the vop_crtc_gamma_set call to the end of
vop_crtc_atomic_enable after the clocks and CRTC are enabled.

 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 105 +++++++++++++-------
 1 file changed, 71 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index ba9e14da41b4..e2c97f1b26da 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -9,6 +9,7 @@
 #include <linux/delay.h>
 #include <linux/iopoll.h>
 #include <linux/kernel.h>
+#include <linux/log2.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
@@ -66,6 +67,9 @@
 #define VOP_REG_SET(vop, group, name, v) \
 		    vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name)
 
+#define VOP_HAS_REG(vop, group, name) \
+		(!!(vop->data->group->name.mask))
+
 #define VOP_INTR_SET_TYPE(vop, name, type, v) \
 	do { \
 		int i, reg = 0, mask = 0; \
@@ -1204,17 +1208,22 @@ static bool vop_dsp_lut_is_enabled(struct vop *vop)
 	return vop_read_reg(vop, 0, &vop->data->common->dsp_lut_en);
 }
 
+static u32 vop_lut_buffer_index(struct vop *vop)
+{
+	return vop_read_reg(vop, 0, &vop->data->common->lut_buffer_index);
+}
+
 static void vop_crtc_write_gamma_lut(struct vop *vop, struct drm_crtc *crtc)
 {
 	struct drm_color_lut *lut = crtc->state->gamma_lut->data;
-	unsigned int i;
+	unsigned int i, bpc = ilog2(vop->data->lut_size);
 
 	for (i = 0; i < crtc->gamma_size; i++) {
 		u32 word;
 
-		word = (drm_color_lut_extract(lut[i].red, 10) << 20) |
-		       (drm_color_lut_extract(lut[i].green, 10) << 10) |
-			drm_color_lut_extract(lut[i].blue, 10);
+		word = (drm_color_lut_extract(lut[i].red, bpc) << (2 * bpc)) |
+		       (drm_color_lut_extract(lut[i].green, bpc) << bpc) |
+			drm_color_lut_extract(lut[i].blue, bpc);
 		writel(word, vop->lut_regs + i * 4);
 	}
 }
@@ -1224,38 +1233,66 @@ static void vop_crtc_gamma_set(struct vop *vop, struct drm_crtc *crtc,
 {
 	struct drm_crtc_state *state = crtc->state;
 	unsigned int idle;
+	u32 lut_idx, old_idx;
 	int ret;
 
 	if (!vop->lut_regs)
 		return;
-	/*
-	 * To disable gamma (gamma_lut is null) or to write
-	 * an update to the LUT, clear dsp_lut_en.
-	 */
-	spin_lock(&vop->reg_lock);
-	VOP_REG_SET(vop, common, dsp_lut_en, 0);
-	vop_cfg_done(vop);
-	spin_unlock(&vop->reg_lock);
 
-	/*
-	 * In order to write the LUT to the internal memory,
-	 * we need to first make sure the dsp_lut_en bit is cleared.
-	 */
-	ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop,
-				 idle, !idle, 5, 30 * 1000);
-	if (ret) {
-		DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n");
-		return;
-	}
+	if (!state->gamma_lut || !VOP_HAS_REG(vop, common, update_gamma_lut)) {
+		/*
+		 * To disable gamma (gamma_lut is null) or to write
+		 * an update to the LUT, clear dsp_lut_en.
+		 */
+		spin_lock(&vop->reg_lock);
+		VOP_REG_SET(vop, common, dsp_lut_en, 0);
+		vop_cfg_done(vop);
+		spin_unlock(&vop->reg_lock);
 
-	if (!state->gamma_lut)
-		return;
+		/*
+		 * In order to write the LUT to the internal memory,
+		 * we need to first make sure the dsp_lut_en bit is cleared.
+		 */
+		ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop,
+					 idle, !idle, 5, 30 * 1000);
+		if (ret) {
+			DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n");
+			return;
+		}
+
+		if (!state->gamma_lut)
+			return;
+	} else {
+		/*
+		 * On RK3399 the gamma LUT can updated without clearing dsp_lut_en,
+		 * by setting update_gamma_lut then waiting for lut_buffer_index change
+		 */
+		old_idx = vop_lut_buffer_index(vop);
+	}
 
 	spin_lock(&vop->reg_lock);
 	vop_crtc_write_gamma_lut(vop, crtc);
 	VOP_REG_SET(vop, common, dsp_lut_en, 1);
+	VOP_REG_SET(vop, common, update_gamma_lut, 1);
 	vop_cfg_done(vop);
 	spin_unlock(&vop->reg_lock);
+
+	if (VOP_HAS_REG(vop, common, update_gamma_lut)) {
+		ret = readx_poll_timeout(vop_lut_buffer_index, vop,
+					 lut_idx, lut_idx != old_idx, 5, 30 * 1000);
+		if (ret) {
+			DRM_DEV_ERROR(vop->dev, "gamma LUT update timeout!\n");
+			return;
+		}
+
+		/*
+		 * update_gamma_lut is auto cleared by HW, but write 0 to clear the bit
+		 * in our backup of the regs.
+		 */
+		spin_lock(&vop->reg_lock);
+		VOP_REG_SET(vop, common, update_gamma_lut, 0);
+		spin_unlock(&vop->reg_lock);
+	}
 }
 
 static void vop_crtc_atomic_begin(struct drm_crtc *crtc,
@@ -1305,14 +1342,6 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
 		return;
 	}
 
-	/*
-	 * If we have a GAMMA LUT in the state, then let's make sure
-	 * it's updated. We might be coming out of suspend,
-	 * which means the LUT internal memory needs to be re-written.
-	 */
-	if (crtc->state->gamma_lut)
-		vop_crtc_gamma_set(vop, crtc, old_state);
-
 	mutex_lock(&vop->vop_lock);
 
 	WARN_ON(vop->event);
@@ -1403,6 +1432,14 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
 
 	VOP_REG_SET(vop, common, standby, 0);
 	mutex_unlock(&vop->vop_lock);
+
+	/*
+	 * If we have a GAMMA LUT in the state, then let's make sure
+	 * it's updated. We might be coming out of suspend,
+	 * which means the LUT internal memory needs to be re-written.
+	 */
+	if (crtc->state->gamma_lut)
+		vop_crtc_gamma_set(vop, crtc, old_state);
 }
 
 static bool vop_fs_irq_is_pending(struct vop *vop)
@@ -2125,8 +2162,8 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 	if (res) {
-		if (!vop_data->lut_size) {
-			DRM_DEV_ERROR(dev, "no gamma LUT size defined\n");
+		if (vop_data->lut_size != 1024 && vop_data->lut_size != 256) {
+			DRM_DEV_ERROR(dev, "unsupported gamma LUT size %d\n", vop_data->lut_size);
 			return -EINVAL;
 		}
 		vop->lut_regs = devm_ioremap_resource(dev, res);
-- 
2.24.3 (Apple Git-128)


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH v2 2/3] drm/rockchip: support gamma control on RK3399

[Hugh Cole-Baker]

The RK3399 has a 1024-entry gamma LUT with 10 bits per component on its
"big" VOP and a 256-entry, 8 bit per component LUT on the "little" VOP.
Compared to the RK3288, it no longer requires disabling gamma while
updating the LUT. On the RK3399, the LUT can be updated at any time as
the hardware has two LUT buffers, one can be written while the other is
in use. A swap of the buffers is triggered by writing 1 to the
update_gamma_lut register.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
---

Changes from v1: Moved the vop_crtc_gamma_set call to the end of
vop_crtc_atomic_enable after the clocks and CRTC are enabled.

 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 105 +++++++++++++-------
 1 file changed, 71 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index ba9e14da41b4..e2c97f1b26da 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -9,6 +9,7 @@
 #include <linux/delay.h>
 #include <linux/iopoll.h>
 #include <linux/kernel.h>
+#include <linux/log2.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
@@ -66,6 +67,9 @@
 #define VOP_REG_SET(vop, group, name, v) \
 		    vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name)
 
+#define VOP_HAS_REG(vop, group, name) \
+		(!!(vop->data->group->name.mask))
+
 #define VOP_INTR_SET_TYPE(vop, name, type, v) \
 	do { \
 		int i, reg = 0, mask = 0; \
@@ -1204,17 +1208,22 @@ static bool vop_dsp_lut_is_enabled(struct vop *vop)
 	return vop_read_reg(vop, 0, &vop->data->common->dsp_lut_en);
 }
 
+static u32 vop_lut_buffer_index(struct vop *vop)
+{
+	return vop_read_reg(vop, 0, &vop->data->common->lut_buffer_index);
+}
+
 static void vop_crtc_write_gamma_lut(struct vop *vop, struct drm_crtc *crtc)
 {
 	struct drm_color_lut *lut = crtc->state->gamma_lut->data;
-	unsigned int i;
+	unsigned int i, bpc = ilog2(vop->data->lut_size);
 
 	for (i = 0; i < crtc->gamma_size; i++) {
 		u32 word;
 
-		word = (drm_color_lut_extract(lut[i].red, 10) << 20) |
-		       (drm_color_lut_extract(lut[i].green, 10) << 10) |
-			drm_color_lut_extract(lut[i].blue, 10);
+		word = (drm_color_lut_extract(lut[i].red, bpc) << (2 * bpc)) |
+		       (drm_color_lut_extract(lut[i].green, bpc) << bpc) |
+			drm_color_lut_extract(lut[i].blue, bpc);
 		writel(word, vop->lut_regs + i * 4);
 	}
 }
@@ -1224,38 +1233,66 @@ static void vop_crtc_gamma_set(struct vop *vop, struct drm_crtc *crtc,
 {
 	struct drm_crtc_state *state = crtc->state;
 	unsigned int idle;
+	u32 lut_idx, old_idx;
 	int ret;
 
 	if (!vop->lut_regs)
 		return;
-	/*
-	 * To disable gamma (gamma_lut is null) or to write
-	 * an update to the LUT, clear dsp_lut_en.
-	 */
-	spin_lock(&vop->reg_lock);
-	VOP_REG_SET(vop, common, dsp_lut_en, 0);
-	vop_cfg_done(vop);
-	spin_unlock(&vop->reg_lock);
 
-	/*
-	 * In order to write the LUT to the internal memory,
-	 * we need to first make sure the dsp_lut_en bit is cleared.
-	 */
-	ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop,
-				 idle, !idle, 5, 30 * 1000);
-	if (ret) {
-		DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n");
-		return;
-	}
+	if (!state->gamma_lut || !VOP_HAS_REG(vop, common, update_gamma_lut)) {
+		/*
+		 * To disable gamma (gamma_lut is null) or to write
+		 * an update to the LUT, clear dsp_lut_en.
+		 */
+		spin_lock(&vop->reg_lock);
+		VOP_REG_SET(vop, common, dsp_lut_en, 0);
+		vop_cfg_done(vop);
+		spin_unlock(&vop->reg_lock);
 
-	if (!state->gamma_lut)
-		return;
+		/*
+		 * In order to write the LUT to the internal memory,
+		 * we need to first make sure the dsp_lut_en bit is cleared.
+		 */
+		ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop,
+					 idle, !idle, 5, 30 * 1000);
+		if (ret) {
+			DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n");
+			return;
+		}
+
+		if (!state->gamma_lut)
+			return;
+	} else {
+		/*
+		 * On RK3399 the gamma LUT can updated without clearing dsp_lut_en,
+		 * by setting update_gamma_lut then waiting for lut_buffer_index change
+		 */
+		old_idx = vop_lut_buffer_index(vop);
+	}
 
 	spin_lock(&vop->reg_lock);
 	vop_crtc_write_gamma_lut(vop, crtc);
 	VOP_REG_SET(vop, common, dsp_lut_en, 1);
+	VOP_REG_SET(vop, common, update_gamma_lut, 1);
 	vop_cfg_done(vop);
 	spin_unlock(&vop->reg_lock);
+
+	if (VOP_HAS_REG(vop, common, update_gamma_lut)) {
+		ret = readx_poll_timeout(vop_lut_buffer_index, vop,
+					 lut_idx, lut_idx != old_idx, 5, 30 * 1000);
+		if (ret) {
+			DRM_DEV_ERROR(vop->dev, "gamma LUT update timeout!\n");
+			return;
+		}
+
+		/*
+		 * update_gamma_lut is auto cleared by HW, but write 0 to clear the bit
+		 * in our backup of the regs.
+		 */
+		spin_lock(&vop->reg_lock);
+		VOP_REG_SET(vop, common, update_gamma_lut, 0);
+		spin_unlock(&vop->reg_lock);
+	}
 }
 
 static void vop_crtc_atomic_begin(struct drm_crtc *crtc,
@@ -1305,14 +1342,6 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
 		return;
 	}
 
-	/*
-	 * If we have a GAMMA LUT in the state, then let's make sure
-	 * it's updated. We might be coming out of suspend,
-	 * which means the LUT internal memory needs to be re-written.
-	 */
-	if (crtc->state->gamma_lut)
-		vop_crtc_gamma_set(vop, crtc, old_state);
-
 	mutex_lock(&vop->vop_lock);
 
 	WARN_ON(vop->event);
@@ -1403,6 +1432,14 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
 
 	VOP_REG_SET(vop, common, standby, 0);
 	mutex_unlock(&vop->vop_lock);
+
+	/*
+	 * If we have a GAMMA LUT in the state, then let's make sure
+	 * it's updated. We might be coming out of suspend,
+	 * which means the LUT internal memory needs to be re-written.
+	 */
+	if (crtc->state->gamma_lut)
+		vop_crtc_gamma_set(vop, crtc, old_state);
 }
 
 static bool vop_fs_irq_is_pending(struct vop *vop)
@@ -2125,8 +2162,8 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 	if (res) {
-		if (!vop_data->lut_size) {
-			DRM_DEV_ERROR(dev, "no gamma LUT size defined\n");
+		if (vop_data->lut_size != 1024 && vop_data->lut_size != 256) {
+			DRM_DEV_ERROR(dev, "unsupported gamma LUT size %d\n", vop_data->lut_size);
 			return -EINVAL;
 		}
 		vop->lut_regs = devm_ioremap_resource(dev, res);
-- 
2.24.3 (Apple Git-128)

[PATCH v2 2/3] drm/rockchip: support gamma control on RK3399

[Hugh Cole-Baker]

The RK3399 has a 1024-entry gamma LUT with 10 bits per component on its
"big" VOP and a 256-entry, 8 bit per component LUT on the "little" VOP.
Compared to the RK3288, it no longer requires disabling gamma while
updating the LUT. On the RK3399, the LUT can be updated at any time as
the hardware has two LUT buffers, one can be written while the other is
in use. A swap of the buffers is triggered by writing 1 to the
update_gamma_lut register.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
---

Changes from v1: Moved the vop_crtc_gamma_set call to the end of
vop_crtc_atomic_enable after the clocks and CRTC are enabled.

 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 105 +++++++++++++-------
 1 file changed, 71 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index ba9e14da41b4..e2c97f1b26da 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -9,6 +9,7 @@
 #include <linux/delay.h>
 #include <linux/iopoll.h>
 #include <linux/kernel.h>
+#include <linux/log2.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
@@ -66,6 +67,9 @@
 #define VOP_REG_SET(vop, group, name, v) \
 		    vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name)
 
+#define VOP_HAS_REG(vop, group, name) \
+		(!!(vop->data->group->name.mask))
+
 #define VOP_INTR_SET_TYPE(vop, name, type, v) \
 	do { \
 		int i, reg = 0, mask = 0; \
@@ -1204,17 +1208,22 @@ static bool vop_dsp_lut_is_enabled(struct vop *vop)
 	return vop_read_reg(vop, 0, &vop->data->common->dsp_lut_en);
 }
 
+static u32 vop_lut_buffer_index(struct vop *vop)
+{
+	return vop_read_reg(vop, 0, &vop->data->common->lut_buffer_index);
+}
+
 static void vop_crtc_write_gamma_lut(struct vop *vop, struct drm_crtc *crtc)
 {
 	struct drm_color_lut *lut = crtc->state->gamma_lut->data;
-	unsigned int i;
+	unsigned int i, bpc = ilog2(vop->data->lut_size);
 
 	for (i = 0; i < crtc->gamma_size; i++) {
 		u32 word;
 
-		word = (drm_color_lut_extract(lut[i].red, 10) << 20) |
-		       (drm_color_lut_extract(lut[i].green, 10) << 10) |
-			drm_color_lut_extract(lut[i].blue, 10);
+		word = (drm_color_lut_extract(lut[i].red, bpc) << (2 * bpc)) |
+		       (drm_color_lut_extract(lut[i].green, bpc) << bpc) |
+			drm_color_lut_extract(lut[i].blue, bpc);
 		writel(word, vop->lut_regs + i * 4);
 	}
 }
@@ -1224,38 +1233,66 @@ static void vop_crtc_gamma_set(struct vop *vop, struct drm_crtc *crtc,
 {
 	struct drm_crtc_state *state = crtc->state;
 	unsigned int idle;
+	u32 lut_idx, old_idx;
 	int ret;
 
 	if (!vop->lut_regs)
 		return;
-	/*
-	 * To disable gamma (gamma_lut is null) or to write
-	 * an update to the LUT, clear dsp_lut_en.
-	 */
-	spin_lock(&vop->reg_lock);
-	VOP_REG_SET(vop, common, dsp_lut_en, 0);
-	vop_cfg_done(vop);
-	spin_unlock(&vop->reg_lock);
 
-	/*
-	 * In order to write the LUT to the internal memory,
-	 * we need to first make sure the dsp_lut_en bit is cleared.
-	 */
-	ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop,
-				 idle, !idle, 5, 30 * 1000);
-	if (ret) {
-		DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n");
-		return;
-	}
+	if (!state->gamma_lut || !VOP_HAS_REG(vop, common, update_gamma_lut)) {
+		/*
+		 * To disable gamma (gamma_lut is null) or to write
+		 * an update to the LUT, clear dsp_lut_en.
+		 */
+		spin_lock(&vop->reg_lock);
+		VOP_REG_SET(vop, common, dsp_lut_en, 0);
+		vop_cfg_done(vop);
+		spin_unlock(&vop->reg_lock);
 
-	if (!state->gamma_lut)
-		return;
+		/*
+		 * In order to write the LUT to the internal memory,
+		 * we need to first make sure the dsp_lut_en bit is cleared.
+		 */
+		ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop,
+					 idle, !idle, 5, 30 * 1000);
+		if (ret) {
+			DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n");
+			return;
+		}
+
+		if (!state->gamma_lut)
+			return;
+	} else {
+		/*
+		 * On RK3399 the gamma LUT can updated without clearing dsp_lut_en,
+		 * by setting update_gamma_lut then waiting for lut_buffer_index change
+		 */
+		old_idx = vop_lut_buffer_index(vop);
+	}
 
 	spin_lock(&vop->reg_lock);
 	vop_crtc_write_gamma_lut(vop, crtc);
 	VOP_REG_SET(vop, common, dsp_lut_en, 1);
+	VOP_REG_SET(vop, common, update_gamma_lut, 1);
 	vop_cfg_done(vop);
 	spin_unlock(&vop->reg_lock);
+
+	if (VOP_HAS_REG(vop, common, update_gamma_lut)) {
+		ret = readx_poll_timeout(vop_lut_buffer_index, vop,
+					 lut_idx, lut_idx != old_idx, 5, 30 * 1000);
+		if (ret) {
+			DRM_DEV_ERROR(vop->dev, "gamma LUT update timeout!\n");
+			return;
+		}
+
+		/*
+		 * update_gamma_lut is auto cleared by HW, but write 0 to clear the bit
+		 * in our backup of the regs.
+		 */
+		spin_lock(&vop->reg_lock);
+		VOP_REG_SET(vop, common, update_gamma_lut, 0);
+		spin_unlock(&vop->reg_lock);
+	}
 }
 
 static void vop_crtc_atomic_begin(struct drm_crtc *crtc,
@@ -1305,14 +1342,6 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
 		return;
 	}
 
-	/*
-	 * If we have a GAMMA LUT in the state, then let's make sure
-	 * it's updated. We might be coming out of suspend,
-	 * which means the LUT internal memory needs to be re-written.
-	 */
-	if (crtc->state->gamma_lut)
-		vop_crtc_gamma_set(vop, crtc, old_state);
-
 	mutex_lock(&vop->vop_lock);
 
 	WARN_ON(vop->event);
@@ -1403,6 +1432,14 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
 
 	VOP_REG_SET(vop, common, standby, 0);
 	mutex_unlock(&vop->vop_lock);
+
+	/*
+	 * If we have a GAMMA LUT in the state, then let's make sure
+	 * it's updated. We might be coming out of suspend,
+	 * which means the LUT internal memory needs to be re-written.
+	 */
+	if (crtc->state->gamma_lut)
+		vop_crtc_gamma_set(vop, crtc, old_state);
 }
 
 static bool vop_fs_irq_is_pending(struct vop *vop)
@@ -2125,8 +2162,8 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 	if (res) {
-		if (!vop_data->lut_size) {
-			DRM_DEV_ERROR(dev, "no gamma LUT size defined\n");
+		if (vop_data->lut_size != 1024 && vop_data->lut_size != 256) {
+			DRM_DEV_ERROR(dev, "unsupported gamma LUT size %d\n", vop_data->lut_size);
 			return -EINVAL;
 		}
 		vop->lut_regs = devm_ioremap_resource(dev, res);
-- 
2.24.3 (Apple Git-128)


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[PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Hugh Cole-Baker]

Define the memory region on RK3399 VOPs containing the gamma LUT at
base+0x2000.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
---

Changes from v1: no changes in this patch

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 3871c7fd83b0..9cbf6ccdd256 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
 
 	vopl: vop@ff8f0000 {
 		compatible = "rockchip,rk3399-vop-lit";
-		reg = <0x0 0xff8f0000 0x0 0x3efc>;
+		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
 		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
 		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
 		assigned-clock-rates = <400000000>, <100000000>;
@@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
 
 	vopb: vop@ff900000 {
 		compatible = "rockchip,rk3399-vop-big";
-		reg = <0x0 0xff900000 0x0 0x3efc>;
+		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
 		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
 		assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
 		assigned-clock-rates = <400000000>, <100000000>;
-- 
2.24.3 (Apple Git-128)

[PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Hugh Cole-Baker]

Define the memory region on RK3399 VOPs containing the gamma LUT at
base+0x2000.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
---

Changes from v1: no changes in this patch

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 3871c7fd83b0..9cbf6ccdd256 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
 
 	vopl: vop@ff8f0000 {
 		compatible = "rockchip,rk3399-vop-lit";
-		reg = <0x0 0xff8f0000 0x0 0x3efc>;
+		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
 		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
 		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
 		assigned-clock-rates = <400000000>, <100000000>;
@@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
 
 	vopb: vop@ff900000 {
 		compatible = "rockchip,rk3399-vop-big";
-		reg = <0x0 0xff900000 0x0 0x3efc>;
+		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
 		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
 		assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
 		assigned-clock-rates = <400000000>, <100000000>;
-- 
2.24.3 (Apple Git-128)


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[PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Hugh Cole-Baker]

Define the memory region on RK3399 VOPs containing the gamma LUT at
base+0x2000.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
---

Changes from v1: no changes in this patch

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 3871c7fd83b0..9cbf6ccdd256 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
 
 	vopl: vop@ff8f0000 {
 		compatible = "rockchip,rk3399-vop-lit";
-		reg = <0x0 0xff8f0000 0x0 0x3efc>;
+		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
 		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
 		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
 		assigned-clock-rates = <400000000>, <100000000>;
@@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
 
 	vopb: vop@ff900000 {
 		compatible = "rockchip,rk3399-vop-big";
-		reg = <0x0 0xff900000 0x0 0x3efc>;
+		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
 		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
 		assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
 		assigned-clock-rates = <400000000>, <100000000>;
-- 
2.24.3 (Apple Git-128)


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Re: [PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399

[Milan P. Stanić]

Hi,

Tested it on gru-kevin with mainline kernel 5.19 and it works

On Tue, 2021-10-19 at 22:58, Hugh Cole-Baker wrote:
> The VOP on RK3399 has a different approach from previous versions for
> setting a gamma lookup table, using an update_gamma_lut register. As
> this differs from RK3288, give RK3399 its own set of "common" register
> definitions.
> 
> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Tested-by: "Milan P. Stanić" <mps@arvanta.net>
> ---
> 
> Changes from v1: no changes in this patch
> 
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.h |  2 ++
>  drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 24 +++++++++++++++++++--
>  drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  1 +
>  3 files changed, 25 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> index 857d97cdc67c..14179e89bd21 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> @@ -99,6 +99,8 @@ struct vop_common {
>  	struct vop_reg dither_down_en;
>  	struct vop_reg dither_up;
>  	struct vop_reg dsp_lut_en;
> +	struct vop_reg update_gamma_lut;
> +	struct vop_reg lut_buffer_index;
>  	struct vop_reg gate_en;
>  	struct vop_reg mmu_en;
>  	struct vop_reg out_mode;
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> index ca7cc82125cb..bfb7e130f09b 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> @@ -865,6 +865,24 @@ static const struct vop_output rk3399_output = {
>  	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
>  };
>  
> +static const struct vop_common rk3399_common = {
> +	.standby = VOP_REG_SYNC(RK3399_SYS_CTRL, 0x1, 22),
> +	.gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
> +	.mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20),
> +	.dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4),
> +	.dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3),
> +	.dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2),
> +	.pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
> +	.dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
> +	.dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0),
> +	.update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7),
> +	.lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1),
> +	.data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
> +	.dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18),
> +	.out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
> +	.cfg_done = VOP_REG_SYNC(RK3399_REG_CFG_DONE, 0x1, 0),
> +};
> +
>  static const struct vop_yuv2yuv_phy rk3399_yuv2yuv_win01_data = {
>  	.y2r_coefficients = {
>  		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),
> @@ -944,7 +962,7 @@ static const struct vop_data rk3399_vop_big = {
>  	.version = VOP_VERSION(3, 5),
>  	.feature = VOP_FEATURE_OUTPUT_RGB10,
>  	.intr = &rk3366_vop_intr,
> -	.common = &rk3288_common,
> +	.common = &rk3399_common,
>  	.modeset = &rk3288_modeset,
>  	.output = &rk3399_output,
>  	.afbc = &rk3399_vop_afbc,
> @@ -952,6 +970,7 @@ static const struct vop_data rk3399_vop_big = {
>  	.win = rk3399_vop_win_data,
>  	.win_size = ARRAY_SIZE(rk3399_vop_win_data),
>  	.win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data,
> +	.lut_size = 1024,
>  };
>  
>  static const struct vop_win_data rk3399_vop_lit_win_data[] = {
> @@ -970,13 +989,14 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_lit_win_yuv2yuv_data[] = {
>  static const struct vop_data rk3399_vop_lit = {
>  	.version = VOP_VERSION(3, 6),
>  	.intr = &rk3366_vop_intr,
> -	.common = &rk3288_common,
> +	.common = &rk3399_common,
>  	.modeset = &rk3288_modeset,
>  	.output = &rk3399_output,
>  	.misc = &rk3368_misc,
>  	.win = rk3399_vop_lit_win_data,
>  	.win_size = ARRAY_SIZE(rk3399_vop_lit_win_data),
>  	.win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data,
> +	.lut_size = 256,
>  };
>  
>  static const struct vop_win_data rk3228_vop_win_data[] = {
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
> index 0b3cd65ba5c1..406e981c75bd 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
> @@ -628,6 +628,7 @@
>  #define RK3399_YUV2YUV_WIN			0x02c0
>  #define RK3399_YUV2YUV_POST			0x02c4
>  #define RK3399_AUTO_GATING_EN			0x02cc
> +#define RK3399_DBG_POST_REG1			0x036c
>  #define RK3399_WIN0_CSC_COE			0x03a0
>  #define RK3399_WIN1_CSC_COE			0x03c0
>  #define RK3399_WIN2_CSC_COE			0x03e0

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Re: [PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399

[Milan P. Stanić]

Hi,

Tested it on gru-kevin with mainline kernel 5.19 and it works

On Tue, 2021-10-19 at 22:58, Hugh Cole-Baker wrote:
> The VOP on RK3399 has a different approach from previous versions for
> setting a gamma lookup table, using an update_gamma_lut register. As
> this differs from RK3288, give RK3399 its own set of "common" register
> definitions.
> 
> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Tested-by: "Milan P. Stanić" <mps@arvanta.net>
> ---
> 
> Changes from v1: no changes in this patch
> 
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.h |  2 ++
>  drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 24 +++++++++++++++++++--
>  drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  1 +
>  3 files changed, 25 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> index 857d97cdc67c..14179e89bd21 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> @@ -99,6 +99,8 @@ struct vop_common {
>  	struct vop_reg dither_down_en;
>  	struct vop_reg dither_up;
>  	struct vop_reg dsp_lut_en;
> +	struct vop_reg update_gamma_lut;
> +	struct vop_reg lut_buffer_index;
>  	struct vop_reg gate_en;
>  	struct vop_reg mmu_en;
>  	struct vop_reg out_mode;
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> index ca7cc82125cb..bfb7e130f09b 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> @@ -865,6 +865,24 @@ static const struct vop_output rk3399_output = {
>  	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
>  };
>  
> +static const struct vop_common rk3399_common = {
> +	.standby = VOP_REG_SYNC(RK3399_SYS_CTRL, 0x1, 22),
> +	.gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
> +	.mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20),
> +	.dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4),
> +	.dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3),
> +	.dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2),
> +	.pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
> +	.dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
> +	.dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0),
> +	.update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7),
> +	.lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1),
> +	.data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
> +	.dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18),
> +	.out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
> +	.cfg_done = VOP_REG_SYNC(RK3399_REG_CFG_DONE, 0x1, 0),
> +};
> +
>  static const struct vop_yuv2yuv_phy rk3399_yuv2yuv_win01_data = {
>  	.y2r_coefficients = {
>  		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),
> @@ -944,7 +962,7 @@ static const struct vop_data rk3399_vop_big = {
>  	.version = VOP_VERSION(3, 5),
>  	.feature = VOP_FEATURE_OUTPUT_RGB10,
>  	.intr = &rk3366_vop_intr,
> -	.common = &rk3288_common,
> +	.common = &rk3399_common,
>  	.modeset = &rk3288_modeset,
>  	.output = &rk3399_output,
>  	.afbc = &rk3399_vop_afbc,
> @@ -952,6 +970,7 @@ static const struct vop_data rk3399_vop_big = {
>  	.win = rk3399_vop_win_data,
>  	.win_size = ARRAY_SIZE(rk3399_vop_win_data),
>  	.win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data,
> +	.lut_size = 1024,
>  };
>  
>  static const struct vop_win_data rk3399_vop_lit_win_data[] = {
> @@ -970,13 +989,14 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_lit_win_yuv2yuv_data[] = {
>  static const struct vop_data rk3399_vop_lit = {
>  	.version = VOP_VERSION(3, 6),
>  	.intr = &rk3366_vop_intr,
> -	.common = &rk3288_common,
> +	.common = &rk3399_common,
>  	.modeset = &rk3288_modeset,
>  	.output = &rk3399_output,
>  	.misc = &rk3368_misc,
>  	.win = rk3399_vop_lit_win_data,
>  	.win_size = ARRAY_SIZE(rk3399_vop_lit_win_data),
>  	.win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data,
> +	.lut_size = 256,
>  };
>  
>  static const struct vop_win_data rk3228_vop_win_data[] = {
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
> index 0b3cd65ba5c1..406e981c75bd 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
> @@ -628,6 +628,7 @@
>  #define RK3399_YUV2YUV_WIN			0x02c0
>  #define RK3399_YUV2YUV_POST			0x02c4
>  #define RK3399_AUTO_GATING_EN			0x02cc
> +#define RK3399_DBG_POST_REG1			0x036c
>  #define RK3399_WIN0_CSC_COE			0x03a0
>  #define RK3399_WIN1_CSC_COE			0x03c0
>  #define RK3399_WIN2_CSC_COE			0x03e0

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Re: [PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399

[Milan P. Stanić]

Hi,

Tested it on gru-kevin with mainline kernel 5.19 and it works

On Tue, 2021-10-19 at 22:58, Hugh Cole-Baker wrote:
> The VOP on RK3399 has a different approach from previous versions for
> setting a gamma lookup table, using an update_gamma_lut register. As
> this differs from RK3288, give RK3399 its own set of "common" register
> definitions.
> 
> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Tested-by: "Milan P. Stanić" <mps@arvanta.net>
> ---
> 
> Changes from v1: no changes in this patch
> 
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.h |  2 ++
>  drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 24 +++++++++++++++++++--
>  drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  1 +
>  3 files changed, 25 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> index 857d97cdc67c..14179e89bd21 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> @@ -99,6 +99,8 @@ struct vop_common {
>  	struct vop_reg dither_down_en;
>  	struct vop_reg dither_up;
>  	struct vop_reg dsp_lut_en;
> +	struct vop_reg update_gamma_lut;
> +	struct vop_reg lut_buffer_index;
>  	struct vop_reg gate_en;
>  	struct vop_reg mmu_en;
>  	struct vop_reg out_mode;
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> index ca7cc82125cb..bfb7e130f09b 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> @@ -865,6 +865,24 @@ static const struct vop_output rk3399_output = {
>  	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
>  };
>  
> +static const struct vop_common rk3399_common = {
> +	.standby = VOP_REG_SYNC(RK3399_SYS_CTRL, 0x1, 22),
> +	.gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
> +	.mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20),
> +	.dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4),
> +	.dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3),
> +	.dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2),
> +	.pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
> +	.dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
> +	.dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0),
> +	.update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7),
> +	.lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1),
> +	.data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
> +	.dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18),
> +	.out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
> +	.cfg_done = VOP_REG_SYNC(RK3399_REG_CFG_DONE, 0x1, 0),
> +};
> +
>  static const struct vop_yuv2yuv_phy rk3399_yuv2yuv_win01_data = {
>  	.y2r_coefficients = {
>  		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),
> @@ -944,7 +962,7 @@ static const struct vop_data rk3399_vop_big = {
>  	.version = VOP_VERSION(3, 5),
>  	.feature = VOP_FEATURE_OUTPUT_RGB10,
>  	.intr = &rk3366_vop_intr,
> -	.common = &rk3288_common,
> +	.common = &rk3399_common,
>  	.modeset = &rk3288_modeset,
>  	.output = &rk3399_output,
>  	.afbc = &rk3399_vop_afbc,
> @@ -952,6 +970,7 @@ static const struct vop_data rk3399_vop_big = {
>  	.win = rk3399_vop_win_data,
>  	.win_size = ARRAY_SIZE(rk3399_vop_win_data),
>  	.win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data,
> +	.lut_size = 1024,
>  };
>  
>  static const struct vop_win_data rk3399_vop_lit_win_data[] = {
> @@ -970,13 +989,14 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_lit_win_yuv2yuv_data[] = {
>  static const struct vop_data rk3399_vop_lit = {
>  	.version = VOP_VERSION(3, 6),
>  	.intr = &rk3366_vop_intr,
> -	.common = &rk3288_common,
> +	.common = &rk3399_common,
>  	.modeset = &rk3288_modeset,
>  	.output = &rk3399_output,
>  	.misc = &rk3368_misc,
>  	.win = rk3399_vop_lit_win_data,
>  	.win_size = ARRAY_SIZE(rk3399_vop_lit_win_data),
>  	.win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data,
> +	.lut_size = 256,
>  };
>  
>  static const struct vop_win_data rk3228_vop_win_data[] = {
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
> index 0b3cd65ba5c1..406e981c75bd 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
> @@ -628,6 +628,7 @@
>  #define RK3399_YUV2YUV_WIN			0x02c0
>  #define RK3399_YUV2YUV_POST			0x02c4
>  #define RK3399_AUTO_GATING_EN			0x02cc
> +#define RK3399_DBG_POST_REG1			0x036c
>  #define RK3399_WIN0_CSC_COE			0x03a0
>  #define RK3399_WIN1_CSC_COE			0x03c0
>  #define RK3399_WIN2_CSC_COE			0x03e0

Re: [PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399

[Linus Heckemann]

Hugh Cole-Baker <sigmaris@gmail.com> writes:
>
> The VOP on RK3399 has a different approach from previous versions for
> setting a gamma lookup table, using an update_gamma_lut register. As
> this differs from RK3288, give RK3399 its own set of "common" register
> definitions.
>
> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
> Tested-by: "Milan P. Stanić" <mps@arvanta.net>
> ---
>
> Changes from v1: no changes in this patch
>

This series makes gammastep on sway for adjusting colour temperature
work wonderfully. I'd really appreciate if it found its way upstream!

Tested-by: Linus Heckemann <git@sphalerite.org>

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Re: [PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399

[Linus Heckemann]

Hugh Cole-Baker <sigmaris@gmail.com> writes:
>
> The VOP on RK3399 has a different approach from previous versions for
> setting a gamma lookup table, using an update_gamma_lut register. As
> this differs from RK3288, give RK3399 its own set of "common" register
> definitions.
>
> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
> Tested-by: "Milan P. Stanić" <mps@arvanta.net>
> ---
>
> Changes from v1: no changes in this patch
>

This series makes gammastep on sway for adjusting colour temperature
work wonderfully. I'd really appreciate if it found its way upstream!

Tested-by: Linus Heckemann <git@sphalerite.org>

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Re: [PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399

[Linus Heckemann]

Hugh Cole-Baker <sigmaris@gmail.com> writes:
>
> The VOP on RK3399 has a different approach from previous versions for
> setting a gamma lookup table, using an update_gamma_lut register. As
> this differs from RK3288, give RK3399 its own set of "common" register
> definitions.
>
> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
> Tested-by: "Milan P. Stanić" <mps@arvanta.net>
> ---
>
> Changes from v1: no changes in this patch
>

This series makes gammastep on sway for adjusting colour temperature
work wonderfully. I'd really appreciate if it found its way upstream!

Tested-by: Linus Heckemann <git@sphalerite.org>

Re: (subset) [PATCH v2 0/3] drm/rockchip: support gamma control on RK3399

[Heiko Stuebner]

On Tue, 19 Oct 2021 22:58:40 +0100, Hugh Cole-Baker wrote:
> This extends the Rockchip VOP driver to support setting the gamma LUT on the
> RK3399 SoC. Previously, the driver supported gamma control for the RK3288
> only. On the RK3399 the method for updating the LUT is slightly different.
> This implementation was based on the code and description from the vendor
> kernel [1].
> 
> The RK3399 also has the address resources for the VOP general registers and
> the gamma LUT located adjacent to each other, not on either side of the IOMMU
> address as on the RK3288, but for simplicity this series follows the existing
> DT binding which requires the gamma LUT as a second address resource.
> 
> [...]

Applied, thanks!

[1/3] drm/rockchip: define gamma registers for RK3399
      commit: 3ba000d6ae999b99f29afd64814877a5c4406786
[2/3] drm/rockchip: support gamma control on RK3399
      commit: 7ae7a6211fe7251543796d5af971acb8c9e2da9e

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

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Re: (subset) [PATCH v2 0/3] drm/rockchip: support gamma control on RK3399

[Heiko Stuebner]

On Tue, 19 Oct 2021 22:58:40 +0100, Hugh Cole-Baker wrote:
> This extends the Rockchip VOP driver to support setting the gamma LUT on the
> RK3399 SoC. Previously, the driver supported gamma control for the RK3288
> only. On the RK3399 the method for updating the LUT is slightly different.
> This implementation was based on the code and description from the vendor
> kernel [1].
> 
> The RK3399 also has the address resources for the VOP general registers and
> the gamma LUT located adjacent to each other, not on either side of the IOMMU
> address as on the RK3288, but for simplicity this series follows the existing
> DT binding which requires the gamma LUT as a second address resource.
> 
> [...]

Applied, thanks!

[1/3] drm/rockchip: define gamma registers for RK3399
      commit: 3ba000d6ae999b99f29afd64814877a5c4406786
[2/3] drm/rockchip: support gamma control on RK3399
      commit: 7ae7a6211fe7251543796d5af971acb8c9e2da9e

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

Re: (subset) [PATCH v2 0/3] drm/rockchip: support gamma control on RK3399

[Heiko Stuebner]

On Tue, 19 Oct 2021 22:58:40 +0100, Hugh Cole-Baker wrote:
> This extends the Rockchip VOP driver to support setting the gamma LUT on the
> RK3399 SoC. Previously, the driver supported gamma control for the RK3288
> only. On the RK3399 the method for updating the LUT is slightly different.
> This implementation was based on the code and description from the vendor
> kernel [1].
> 
> The RK3399 also has the address resources for the VOP general registers and
> the gamma LUT located adjacent to each other, not on either side of the IOMMU
> address as on the RK3288, but for simplicity this series follows the existing
> DT binding which requires the gamma LUT as a second address resource.
> 
> [...]

Applied, thanks!

[1/3] drm/rockchip: define gamma registers for RK3399
      commit: 3ba000d6ae999b99f29afd64814877a5c4406786
[2/3] drm/rockchip: support gamma control on RK3399
      commit: 7ae7a6211fe7251543796d5af971acb8c9e2da9e

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

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Re: (subset) [PATCH v2 0/3] drm/rockchip: support gamma control on RK3399

[Heiko Stuebner]

On Tue, 19 Oct 2021 22:58:40 +0100, Hugh Cole-Baker wrote:
> This extends the Rockchip VOP driver to support setting the gamma LUT on the
> RK3399 SoC. Previously, the driver supported gamma control for the RK3288
> only. On the RK3399 the method for updating the LUT is slightly different.
> This implementation was based on the code and description from the vendor
> kernel [1].
> 
> The RK3399 also has the address resources for the VOP general registers and
> the gamma LUT located adjacent to each other, not on either side of the IOMMU
> address as on the RK3288, but for simplicity this series follows the existing
> DT binding which requires the gamma LUT as a second address resource.
> 
> [...]

Applied, thanks!

[3/3] arm64: dts: rockchip: enable gamma control on RK3399
      commit: 3a5247120668041c8e9eb190497296656b66bf9a

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

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Re: (subset) [PATCH v2 0/3] drm/rockchip: support gamma control on RK3399

[Heiko Stuebner]

On Tue, 19 Oct 2021 22:58:40 +0100, Hugh Cole-Baker wrote:
> This extends the Rockchip VOP driver to support setting the gamma LUT on the
> RK3399 SoC. Previously, the driver supported gamma control for the RK3288
> only. On the RK3399 the method for updating the LUT is slightly different.
> This implementation was based on the code and description from the vendor
> kernel [1].
> 
> The RK3399 also has the address resources for the VOP general registers and
> the gamma LUT located adjacent to each other, not on either side of the IOMMU
> address as on the RK3288, but for simplicity this series follows the existing
> DT binding which requires the gamma LUT as a second address resource.
> 
> [...]

Applied, thanks!

[3/3] arm64: dts: rockchip: enable gamma control on RK3399
      commit: 3a5247120668041c8e9eb190497296656b66bf9a

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

Re: (subset) [PATCH v2 0/3] drm/rockchip: support gamma control on RK3399

[Heiko Stuebner]

On Tue, 19 Oct 2021 22:58:40 +0100, Hugh Cole-Baker wrote:
> This extends the Rockchip VOP driver to support setting the gamma LUT on the
> RK3399 SoC. Previously, the driver supported gamma control for the RK3288
> only. On the RK3399 the method for updating the LUT is slightly different.
> This implementation was based on the code and description from the vendor
> kernel [1].
> 
> The RK3399 also has the address resources for the VOP general registers and
> the gamma LUT located adjacent to each other, not on either side of the IOMMU
> address as on the RK3288, but for simplicity this series follows the existing
> DT binding which requires the gamma LUT as a second address resource.
> 
> [...]

Applied, thanks!

[3/3] arm64: dts: rockchip: enable gamma control on RK3399
      commit: 3a5247120668041c8e9eb190497296656b66bf9a

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

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Re: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Robin Murphy]

On 2021-10-19 22:58, Hugh Cole-Baker wrote:
> Define the memory region on RK3399 VOPs containing the gamma LUT at
> base+0x2000.
> 
> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
> ---
> 
> Changes from v1: no changes in this patch
> 
>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 3871c7fd83b0..9cbf6ccdd256 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
>   
>   	vopl: vop@ff8f0000 {
>   		compatible = "rockchip,rk3399-vop-lit";
> -		reg = <0x0 0xff8f0000 0x0 0x3efc>;
> +		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
>   		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
>   		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
>   		assigned-clock-rates = <400000000>, <100000000>;
> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
>   
>   	vopb: vop@ff900000 {
>   		compatible = "rockchip,rk3399-vop-big";
> -		reg = <0x0 0xff900000 0x0 0x3efc>;
> +		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;

Doesn't the second range still need to be shorter than 0xf00 to avoid 
overlapping the IOMMU?

Robin.

>   		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
>   		assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
>   		assigned-clock-rates = <400000000>, <100000000>;

Re: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Robin Murphy]

On 2021-10-19 22:58, Hugh Cole-Baker wrote:
> Define the memory region on RK3399 VOPs containing the gamma LUT at
> base+0x2000.
> 
> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
> ---
> 
> Changes from v1: no changes in this patch
> 
>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 3871c7fd83b0..9cbf6ccdd256 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
>   
>   	vopl: vop@ff8f0000 {
>   		compatible = "rockchip,rk3399-vop-lit";
> -		reg = <0x0 0xff8f0000 0x0 0x3efc>;
> +		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
>   		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
>   		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
>   		assigned-clock-rates = <400000000>, <100000000>;
> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
>   
>   	vopb: vop@ff900000 {
>   		compatible = "rockchip,rk3399-vop-big";
> -		reg = <0x0 0xff900000 0x0 0x3efc>;
> +		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;

Doesn't the second range still need to be shorter than 0xf00 to avoid 
overlapping the IOMMU?

Robin.

>   		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
>   		assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
>   		assigned-clock-rates = <400000000>, <100000000>;

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Re: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Robin Murphy]

On 2021-10-19 22:58, Hugh Cole-Baker wrote:
> Define the memory region on RK3399 VOPs containing the gamma LUT at
> base+0x2000.
> 
> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
> ---
> 
> Changes from v1: no changes in this patch
> 
>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 3871c7fd83b0..9cbf6ccdd256 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
>   
>   	vopl: vop@ff8f0000 {
>   		compatible = "rockchip,rk3399-vop-lit";
> -		reg = <0x0 0xff8f0000 0x0 0x3efc>;
> +		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
>   		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
>   		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
>   		assigned-clock-rates = <400000000>, <100000000>;
> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
>   
>   	vopb: vop@ff900000 {
>   		compatible = "rockchip,rk3399-vop-big";
> -		reg = <0x0 0xff900000 0x0 0x3efc>;
> +		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;

Doesn't the second range still need to be shorter than 0xf00 to avoid 
overlapping the IOMMU?

Robin.

>   		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
>   		assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
>   		assigned-clock-rates = <400000000>, <100000000>;

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Re: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Hugh Cole-Baker]

> On 15 Sep 2022, at 15:40, Robin Murphy <robin.murphy@arm.com> wrote:
> 
> On 2021-10-19 22:58, Hugh Cole-Baker wrote:
>> Define the memory region on RK3399 VOPs containing the gamma LUT at
>> base+0x2000.
>> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
>> ---
>> Changes from v1: no changes in this patch
>>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index 3871c7fd83b0..9cbf6ccdd256 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
>>    	vopl: vop@ff8f0000 {
>>  		compatible = "rockchip,rk3399-vop-lit";
>> -		reg = <0x0 0xff8f0000 0x0 0x3efc>;
>> +		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
>>  		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
>>  		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
>>  		assigned-clock-rates = <400000000>, <100000000>;
>> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
>>    	vopb: vop@ff900000 {
>>  		compatible = "rockchip,rk3399-vop-big";
>> -		reg = <0x0 0xff900000 0x0 0x3efc>;
>> +		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
> 
> Doesn't the second range still need to be shorter than 0xf00 to avoid overlapping the IOMMU?
> 
> Robin.

This should be OK, the other registers are in the range ff900000-ff902000, the
gamma LUT occupies the range ff902000-ff903000, and then the IOMMU registers
begin at ff903f00. I don't see any overlaps with the IOMMU unless I'm
misreading the dts.

>>  		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
>>  		assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
>>  		assigned-clock-rates = <400000000>, <100000000>;

br, Hugh.

Re: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Hugh Cole-Baker]

> On 15 Sep 2022, at 15:40, Robin Murphy <robin.murphy@arm.com> wrote:
> 
> On 2021-10-19 22:58, Hugh Cole-Baker wrote:
>> Define the memory region on RK3399 VOPs containing the gamma LUT at
>> base+0x2000.
>> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
>> ---
>> Changes from v1: no changes in this patch
>>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index 3871c7fd83b0..9cbf6ccdd256 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
>>    	vopl: vop@ff8f0000 {
>>  		compatible = "rockchip,rk3399-vop-lit";
>> -		reg = <0x0 0xff8f0000 0x0 0x3efc>;
>> +		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
>>  		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
>>  		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
>>  		assigned-clock-rates = <400000000>, <100000000>;
>> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
>>    	vopb: vop@ff900000 {
>>  		compatible = "rockchip,rk3399-vop-big";
>> -		reg = <0x0 0xff900000 0x0 0x3efc>;
>> +		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
> 
> Doesn't the second range still need to be shorter than 0xf00 to avoid overlapping the IOMMU?
> 
> Robin.

This should be OK, the other registers are in the range ff900000-ff902000, the
gamma LUT occupies the range ff902000-ff903000, and then the IOMMU registers
begin at ff903f00. I don't see any overlaps with the IOMMU unless I'm
misreading the dts.

>>  		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
>>  		assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
>>  		assigned-clock-rates = <400000000>, <100000000>;

br, Hugh.


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Re: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Hugh Cole-Baker]

> On 15 Sep 2022, at 15:40, Robin Murphy <robin.murphy@arm.com> wrote:
> 
> On 2021-10-19 22:58, Hugh Cole-Baker wrote:
>> Define the memory region on RK3399 VOPs containing the gamma LUT at
>> base+0x2000.
>> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
>> ---
>> Changes from v1: no changes in this patch
>>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index 3871c7fd83b0..9cbf6ccdd256 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
>>    	vopl: vop@ff8f0000 {
>>  		compatible = "rockchip,rk3399-vop-lit";
>> -		reg = <0x0 0xff8f0000 0x0 0x3efc>;
>> +		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
>>  		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
>>  		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
>>  		assigned-clock-rates = <400000000>, <100000000>;
>> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
>>    	vopb: vop@ff900000 {
>>  		compatible = "rockchip,rk3399-vop-big";
>> -		reg = <0x0 0xff900000 0x0 0x3efc>;
>> +		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
> 
> Doesn't the second range still need to be shorter than 0xf00 to avoid overlapping the IOMMU?
> 
> Robin.

This should be OK, the other registers are in the range ff900000-ff902000, the
gamma LUT occupies the range ff902000-ff903000, and then the IOMMU registers
begin at ff903f00. I don't see any overlaps with the IOMMU unless I'm
misreading the dts.

>>  		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
>>  		assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
>>  		assigned-clock-rates = <400000000>, <100000000>;

br, Hugh.


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Re: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Robin Murphy]

On 2022-09-15 17:53, Hugh Cole-Baker wrote:
> 
>> On 15 Sep 2022, at 15:40, Robin Murphy <robin.murphy@arm.com> wrote:
>>
>> On 2021-10-19 22:58, Hugh Cole-Baker wrote:
>>> Define the memory region on RK3399 VOPs containing the gamma LUT at
>>> base+0x2000.
>>> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
>>> ---
>>> Changes from v1: no changes in this patch
>>>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
>>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>>> index 3871c7fd83b0..9cbf6ccdd256 100644
>>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>>> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
>>>     	vopl: vop@ff8f0000 {
>>>   		compatible = "rockchip,rk3399-vop-lit";
>>> -		reg = <0x0 0xff8f0000 0x0 0x3efc>;
>>> +		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
>>>   		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
>>>   		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
>>>   		assigned-clock-rates = <400000000>, <100000000>;
>>> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
>>>     	vopb: vop@ff900000 {
>>>   		compatible = "rockchip,rk3399-vop-big";
>>> -		reg = <0x0 0xff900000 0x0 0x3efc>;
>>> +		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
>>
>> Doesn't the second range still need to be shorter than 0xf00 to avoid overlapping the IOMMU?
>>
>> Robin.
> 
> This should be OK, the other registers are in the range ff900000-ff902000, the
> gamma LUT occupies the range ff902000-ff903000, and then the IOMMU registers
> begin at ff903f00. I don't see any overlaps with the IOMMU unless I'm
> misreading the dts.

Oh dear, you're quite right, apparently I can't add up in hex today. 
Sorry for the noise!

Robin.

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Re: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Robin Murphy]

On 2022-09-15 17:53, Hugh Cole-Baker wrote:
> 
>> On 15 Sep 2022, at 15:40, Robin Murphy <robin.murphy@arm.com> wrote:
>>
>> On 2021-10-19 22:58, Hugh Cole-Baker wrote:
>>> Define the memory region on RK3399 VOPs containing the gamma LUT at
>>> base+0x2000.
>>> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
>>> ---
>>> Changes from v1: no changes in this patch
>>>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
>>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>>> index 3871c7fd83b0..9cbf6ccdd256 100644
>>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>>> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
>>>     	vopl: vop@ff8f0000 {
>>>   		compatible = "rockchip,rk3399-vop-lit";
>>> -		reg = <0x0 0xff8f0000 0x0 0x3efc>;
>>> +		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
>>>   		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
>>>   		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
>>>   		assigned-clock-rates = <400000000>, <100000000>;
>>> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
>>>     	vopb: vop@ff900000 {
>>>   		compatible = "rockchip,rk3399-vop-big";
>>> -		reg = <0x0 0xff900000 0x0 0x3efc>;
>>> +		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
>>
>> Doesn't the second range still need to be shorter than 0xf00 to avoid overlapping the IOMMU?
>>
>> Robin.
> 
> This should be OK, the other registers are in the range ff900000-ff902000, the
> gamma LUT occupies the range ff902000-ff903000, and then the IOMMU registers
> begin at ff903f00. I don't see any overlaps with the IOMMU unless I'm
> misreading the dts.

Oh dear, you're quite right, apparently I can't add up in hex today. 
Sorry for the noise!

Robin.

Re: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399

[Robin Murphy]

On 2022-09-15 17:53, Hugh Cole-Baker wrote:
> 
>> On 15 Sep 2022, at 15:40, Robin Murphy <robin.murphy@arm.com> wrote:
>>
>> On 2021-10-19 22:58, Hugh Cole-Baker wrote:
>>> Define the memory region on RK3399 VOPs containing the gamma LUT at
>>> base+0x2000.
>>> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
>>> ---
>>> Changes from v1: no changes in this patch
>>>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
>>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>>> index 3871c7fd83b0..9cbf6ccdd256 100644
>>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>>> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 {
>>>     	vopl: vop@ff8f0000 {
>>>   		compatible = "rockchip,rk3399-vop-lit";
>>> -		reg = <0x0 0xff8f0000 0x0 0x3efc>;
>>> +		reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
>>>   		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
>>>   		assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
>>>   		assigned-clock-rates = <400000000>, <100000000>;
>>> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 {
>>>     	vopb: vop@ff900000 {
>>>   		compatible = "rockchip,rk3399-vop-big";
>>> -		reg = <0x0 0xff900000 0x0 0x3efc>;
>>> +		reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
>>
>> Doesn't the second range still need to be shorter than 0xf00 to avoid overlapping the IOMMU?
>>
>> Robin.
> 
> This should be OK, the other registers are in the range ff900000-ff902000, the
> gamma LUT occupies the range ff902000-ff903000, and then the IOMMU registers
> begin at ff903f00. I don't see any overlaps with the IOMMU unless I'm
> misreading the dts.

Oh dear, you're quite right, apparently I can't add up in hex today. 
Sorry for the noise!

Robin.

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