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From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Lyude Paul <lyude@redhat.com>
Cc: jani.nikula@intel.com, manasi.d.navare@intel.com,
	intel-gfx@lists.freedesktop.org, jani.saarinen@intel.com,
	dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 0/2] Add DP MST DSC support to i915
Date: Thu, 11 Aug 2022 10:33:51 +0300	[thread overview]
Message-ID: <YvSvDpq35CxfbnRJ@intel.com> (raw)
In-Reply-To: <419bcc405fa4b298acb3f167316217bcca9f7c07.camel@redhat.com>

On Wed, Aug 10, 2022 at 04:02:08PM -0400, Lyude Paul wrote:
> Btw, what's the plan for this? Figured I'd ask since I noticed this on the ML,
> nd I'm now finishing up getting the atomic only MST patches I've been working
> on merged :)

Current plan is that I need to fix this, as current implementation doesn't
seem to work because of my wrong assumption that drm_dp_mst_find_vcpi_slots
will fail if no slots are available and then we can fallback to DSC.

In reality that function can return whatever bogus value it wants, like
71 slots, while you have only 63 available. The real check is done in
drm_dp_mst_atomic_check, which would of course reject that configuration,
however by that moment its going to be too late for swithcing to DSC.

So looke like I will have to move that check at least partly to where DSC/no DSC decision is done. However if there are multiple displays we get
another problem, lets say we have 2 displays requiring 40 vcpi slots each in DSC
mode with certain input bpp.
We have now either option to reject the whole config or go back and try with
another bpp to check if we can reduce amount of slots.
Because by default we choose the first one which fits, however by the time when 
compute_config is called, we still don't have all config computed, which might
lead to that last crtc can either run our of vcpi slots or we will have to 
go back and try recalculating with higher compression ratio.

My other question was that DSC was supposed to be "visually" lossless, wondering
why we are still trying with different bpps? Could have just set highest
compression ratio right away.

So need to sort this out first before floating new series.

Stan

> 
> On Wed, 2022-08-10 at 11:17 +0300, Stanislav Lisovskiy wrote:
> > Currently we have only DSC support for DP SST.
> > 
> > Stanislav Lisovskiy (2):
> >   drm: Add missing DP DSC extended capability definitions.
> >   drm/i915: Add DSC support to MST path
> > 
> >  drivers/gpu/drm/i915/display/intel_dp.c     |  76 +++++-----
> >  drivers/gpu/drm/i915/display/intel_dp.h     |  17 +++
> >  drivers/gpu/drm/i915/display/intel_dp_mst.c | 145 ++++++++++++++++++++
> >  include/drm/display/drm_dp.h                |  10 +-
> >  4 files changed, 203 insertions(+), 45 deletions(-)
> > 
> 
> -- 
> Cheers,
>  Lyude Paul (she/her)
>  Software Engineer at Red Hat
> 

WARNING: multiple messages have this Message-ID (diff)
From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Lyude Paul <lyude@redhat.com>
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 0/2] Add DP MST DSC support to i915
Date: Thu, 11 Aug 2022 10:33:51 +0300	[thread overview]
Message-ID: <YvSvDpq35CxfbnRJ@intel.com> (raw)
In-Reply-To: <419bcc405fa4b298acb3f167316217bcca9f7c07.camel@redhat.com>

On Wed, Aug 10, 2022 at 04:02:08PM -0400, Lyude Paul wrote:
> Btw, what's the plan for this? Figured I'd ask since I noticed this on the ML,
> nd I'm now finishing up getting the atomic only MST patches I've been working
> on merged :)

Current plan is that I need to fix this, as current implementation doesn't
seem to work because of my wrong assumption that drm_dp_mst_find_vcpi_slots
will fail if no slots are available and then we can fallback to DSC.

In reality that function can return whatever bogus value it wants, like
71 slots, while you have only 63 available. The real check is done in
drm_dp_mst_atomic_check, which would of course reject that configuration,
however by that moment its going to be too late for swithcing to DSC.

So looke like I will have to move that check at least partly to where DSC/no DSC decision is done. However if there are multiple displays we get
another problem, lets say we have 2 displays requiring 40 vcpi slots each in DSC
mode with certain input bpp.
We have now either option to reject the whole config or go back and try with
another bpp to check if we can reduce amount of slots.
Because by default we choose the first one which fits, however by the time when 
compute_config is called, we still don't have all config computed, which might
lead to that last crtc can either run our of vcpi slots or we will have to 
go back and try recalculating with higher compression ratio.

My other question was that DSC was supposed to be "visually" lossless, wondering
why we are still trying with different bpps? Could have just set highest
compression ratio right away.

So need to sort this out first before floating new series.

Stan

> 
> On Wed, 2022-08-10 at 11:17 +0300, Stanislav Lisovskiy wrote:
> > Currently we have only DSC support for DP SST.
> > 
> > Stanislav Lisovskiy (2):
> >   drm: Add missing DP DSC extended capability definitions.
> >   drm/i915: Add DSC support to MST path
> > 
> >  drivers/gpu/drm/i915/display/intel_dp.c     |  76 +++++-----
> >  drivers/gpu/drm/i915/display/intel_dp.h     |  17 +++
> >  drivers/gpu/drm/i915/display/intel_dp_mst.c | 145 ++++++++++++++++++++
> >  include/drm/display/drm_dp.h                |  10 +-
> >  4 files changed, 203 insertions(+), 45 deletions(-)
> > 
> 
> -- 
> Cheers,
>  Lyude Paul (she/her)
>  Software Engineer at Red Hat
> 

  reply	other threads:[~2022-08-11  7:37 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-10  8:17 [PATCH 0/2] Add DP MST DSC support to i915 Stanislav Lisovskiy
2022-08-10  8:17 ` [Intel-gfx] " Stanislav Lisovskiy
2022-08-10  8:17 ` [PATCH 1/2] drm: Add missing DP DSC extended capability definitions Stanislav Lisovskiy
2022-08-10  8:17   ` [Intel-gfx] " Stanislav Lisovskiy
2022-08-10  8:17 ` [PATCH 2/2] drm/i915: Add DSC support to MST path Stanislav Lisovskiy
2022-08-10  8:17   ` [Intel-gfx] " Stanislav Lisovskiy
2022-08-10 15:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add DP MST DSC support to i915 (rev5) Patchwork
2022-08-10 15:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-08-10 20:02 ` [PATCH 0/2] Add DP MST DSC support to i915 Lyude Paul
2022-08-10 20:02   ` [Intel-gfx] " Lyude Paul
2022-08-11  7:33   ` Lisovskiy, Stanislav [this message]
2022-08-11  7:33     ` Lisovskiy, Stanislav
2022-08-11 18:11     ` Navare, Manasi
2022-08-11 18:11       ` [Intel-gfx] " Navare, Manasi
2022-08-11 19:54     ` Lyude Paul
2022-08-11 19:54       ` Lyude Paul
2022-08-11  3:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for Add DP MST DSC support to i915 (rev5) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2022-08-22  9:40 [PATCH 0/2] Add DP MST DSC support to i915 Stanislav Lisovskiy
2022-08-15 17:35 Stanislav Lisovskiy
2022-04-11 16:25 Stanislav Lisovskiy
2022-03-21  9:10 Stanislav Lisovskiy
2022-03-17 16:33 Stanislav Lisovskiy

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