[PATCH 0/3] Host1x context isolation on Tegra234

[PATCH 0/3] Host1x context isolation on Tegra234

[Mikko Perttunen]

From: Mikko Perttunen <mperttunen@nvidia.com>

Hi all,

this series adds support for Host1x context isolation
on Tegra234 (Orin). The difference from previous generations
is that there are two IOMMUs to which engines can be attached
to, resulting in having to have a set of contexts for each one.

Patches should be applied in order. The first patch is needed
so that the kernel doesn't attempt to use a context device
attached to the wrong IOMMU when context stream IDs are present
in the device tree. The other two patches have a compile time
dependency.

Thanks,
Mikko

Mikko Perttunen (3):
  gpu: host1x: Select context device based on attached IOMMU
  dt-bindings: Add Host1x context stream IDs on Tegra234
  arm64: tegra: Add context isolation domains on Tegra234

 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 19 +++++++++++++++++++
 drivers/gpu/drm/tegra/uapi.c             |  2 +-
 drivers/gpu/host1x/context.c             |  5 +++++
 include/dt-bindings/memory/tegra234-mc.h | 10 ++++++++++
 include/linux/host1x.h                   |  1 +
 5 files changed, 36 insertions(+), 1 deletion(-)

-- 
2.37.0

[PATCH 0/3] Host1x context isolation on Tegra234

[Mikko Perttunen]

From: Mikko Perttunen <mperttunen@nvidia.com>

Hi all,

this series adds support for Host1x context isolation
on Tegra234 (Orin). The difference from previous generations
is that there are two IOMMUs to which engines can be attached
to, resulting in having to have a set of contexts for each one.

Patches should be applied in order. The first patch is needed
so that the kernel doesn't attempt to use a context device
attached to the wrong IOMMU when context stream IDs are present
in the device tree. The other two patches have a compile time
dependency.

Thanks,
Mikko

Mikko Perttunen (3):
  gpu: host1x: Select context device based on attached IOMMU
  dt-bindings: Add Host1x context stream IDs on Tegra234
  arm64: tegra: Add context isolation domains on Tegra234

 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 19 +++++++++++++++++++
 drivers/gpu/drm/tegra/uapi.c             |  2 +-
 drivers/gpu/host1x/context.c             |  5 +++++
 include/dt-bindings/memory/tegra234-mc.h | 10 ++++++++++
 include/linux/host1x.h                   |  1 +
 5 files changed, 36 insertions(+), 1 deletion(-)

-- 
2.37.0

[PATCH 1/3] gpu: host1x: Select context device based on attached IOMMU

[Mikko Perttunen]

From: Mikko Perttunen <mperttunen@nvidia.com>

On Tegra234, engines that are programmed through Host1x channels can
be attached to either the NISO0 or NISO1 SMMU. Because of that, when
selecting a context device to use with an engine, we need to select
one that is also attached to the same SMMU.

Add a parameter to host1x_memory_context_alloc to specify which device
we are allocating a context for, and use it to pick an appropriate
context device.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 drivers/gpu/drm/tegra/uapi.c | 2 +-
 drivers/gpu/host1x/context.c | 5 +++++
 include/linux/host1x.h       | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tegra/uapi.c b/drivers/gpu/drm/tegra/uapi.c
index a98239cb0e29..5adab6b22916 100644
--- a/drivers/gpu/drm/tegra/uapi.c
+++ b/drivers/gpu/drm/tegra/uapi.c
@@ -116,7 +116,7 @@ int tegra_drm_ioctl_channel_open(struct drm_device *drm, void *data, struct drm_
 
 		if (supported)
 			context->memory_context = host1x_memory_context_alloc(
-				host, get_task_pid(current, PIDTYPE_TGID));
+				host, client->base.dev, get_task_pid(current, PIDTYPE_TGID));
 
 		if (IS_ERR(context->memory_context)) {
 			if (PTR_ERR(context->memory_context) != -EOPNOTSUPP) {
diff --git a/drivers/gpu/host1x/context.c b/drivers/gpu/host1x/context.c
index b08cf11f9a66..8d6447cdd882 100644
--- a/drivers/gpu/host1x/context.c
+++ b/drivers/gpu/host1x/context.c
@@ -104,6 +104,7 @@ void host1x_memory_context_list_free(struct host1x_memory_context_list *cdl)
 }
 
 struct host1x_memory_context *host1x_memory_context_alloc(struct host1x *host1x,
+							  struct device *dev,
 							  struct pid *pid)
 {
 	struct host1x_memory_context_list *cdl = &host1x->context_list;
@@ -118,6 +119,10 @@ struct host1x_memory_context *host1x_memory_context_alloc(struct host1x *host1x,
 	for (i = 0; i < cdl->len; i++) {
 		struct host1x_memory_context *cd = &cdl->devs[i];
 
+		if (cd->dev.iommu->iommu_dev != dev->iommu->iommu_dev) {
+			continue;
+		}
+
 		if (cd->owner == pid) {
 			refcount_inc(&cd->ref);
 			mutex_unlock(&cdl->lock);
diff --git a/include/linux/host1x.h b/include/linux/host1x.h
index cb2100d9b0ff..ef05de1f4f1e 100644
--- a/include/linux/host1x.h
+++ b/include/linux/host1x.h
@@ -469,6 +469,7 @@ struct host1x_memory_context {
 
 #ifdef CONFIG_IOMMU_API
 struct host1x_memory_context *host1x_memory_context_alloc(struct host1x *host1x,
+							  struct device *dev,
 							  struct pid *pid);
 void host1x_memory_context_get(struct host1x_memory_context *cd);
 void host1x_memory_context_put(struct host1x_memory_context *cd);
-- 
2.37.0

[PATCH 1/3] gpu: host1x: Select context device based on attached IOMMU

[Mikko Perttunen]

From: Mikko Perttunen <mperttunen@nvidia.com>

On Tegra234, engines that are programmed through Host1x channels can
be attached to either the NISO0 or NISO1 SMMU. Because of that, when
selecting a context device to use with an engine, we need to select
one that is also attached to the same SMMU.

Add a parameter to host1x_memory_context_alloc to specify which device
we are allocating a context for, and use it to pick an appropriate
context device.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 drivers/gpu/drm/tegra/uapi.c | 2 +-
 drivers/gpu/host1x/context.c | 5 +++++
 include/linux/host1x.h       | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tegra/uapi.c b/drivers/gpu/drm/tegra/uapi.c
index a98239cb0e29..5adab6b22916 100644
--- a/drivers/gpu/drm/tegra/uapi.c
+++ b/drivers/gpu/drm/tegra/uapi.c
@@ -116,7 +116,7 @@ int tegra_drm_ioctl_channel_open(struct drm_device *drm, void *data, struct drm_
 
 		if (supported)
 			context->memory_context = host1x_memory_context_alloc(
-				host, get_task_pid(current, PIDTYPE_TGID));
+				host, client->base.dev, get_task_pid(current, PIDTYPE_TGID));
 
 		if (IS_ERR(context->memory_context)) {
 			if (PTR_ERR(context->memory_context) != -EOPNOTSUPP) {
diff --git a/drivers/gpu/host1x/context.c b/drivers/gpu/host1x/context.c
index b08cf11f9a66..8d6447cdd882 100644
--- a/drivers/gpu/host1x/context.c
+++ b/drivers/gpu/host1x/context.c
@@ -104,6 +104,7 @@ void host1x_memory_context_list_free(struct host1x_memory_context_list *cdl)
 }
 
 struct host1x_memory_context *host1x_memory_context_alloc(struct host1x *host1x,
+							  struct device *dev,
 							  struct pid *pid)
 {
 	struct host1x_memory_context_list *cdl = &host1x->context_list;
@@ -118,6 +119,10 @@ struct host1x_memory_context *host1x_memory_context_alloc(struct host1x *host1x,
 	for (i = 0; i < cdl->len; i++) {
 		struct host1x_memory_context *cd = &cdl->devs[i];
 
+		if (cd->dev.iommu->iommu_dev != dev->iommu->iommu_dev) {
+			continue;
+		}
+
 		if (cd->owner == pid) {
 			refcount_inc(&cd->ref);
 			mutex_unlock(&cdl->lock);
diff --git a/include/linux/host1x.h b/include/linux/host1x.h
index cb2100d9b0ff..ef05de1f4f1e 100644
--- a/include/linux/host1x.h
+++ b/include/linux/host1x.h
@@ -469,6 +469,7 @@ struct host1x_memory_context {
 
 #ifdef CONFIG_IOMMU_API
 struct host1x_memory_context *host1x_memory_context_alloc(struct host1x *host1x,
+							  struct device *dev,
 							  struct pid *pid);
 void host1x_memory_context_get(struct host1x_memory_context *cd);
 void host1x_memory_context_put(struct host1x_memory_context *cd);
-- 
2.37.0

[PATCH 2/3] dt-bindings: Add Host1x context stream IDs on Tegra234

[Mikko Perttunen]

From: Mikko Perttunen <mperttunen@nvidia.com>

Add defines for stream IDs used for Host1x context isolation
on Tegra234. The same stream IDs are used for both NISO0 and
NISO1 SMMUs since Host1x's stream ID protection tables don't
make a distinction between the two.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 include/dt-bindings/memory/tegra234-mc.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
index 75f0bd30d365..d9b21b64ed73 100644
--- a/include/dt-bindings/memory/tegra234-mc.h
+++ b/include/dt-bindings/memory/tegra234-mc.h
@@ -35,6 +35,16 @@
 #define TEGRA234_SID_NVDEC	0x29
 #define TEGRA234_SID_VIC	0x34
 
+/* Shared stream IDs */
+#define TEGRA234_SID_HOST1X_CTX0	0x35
+#define TEGRA234_SID_HOST1X_CTX1	0x36
+#define TEGRA234_SID_HOST1X_CTX2	0x37
+#define TEGRA234_SID_HOST1X_CTX3	0x38
+#define TEGRA234_SID_HOST1X_CTX4	0x39
+#define TEGRA234_SID_HOST1X_CTX5	0x3a
+#define TEGRA234_SID_HOST1X_CTX6	0x3b
+#define TEGRA234_SID_HOST1X_CTX7	0x3c
+
 /*
  * memory client IDs
  */
-- 
2.37.0

[PATCH 2/3] dt-bindings: Add Host1x context stream IDs on Tegra234

[Mikko Perttunen]

From: Mikko Perttunen <mperttunen@nvidia.com>

Add defines for stream IDs used for Host1x context isolation
on Tegra234. The same stream IDs are used for both NISO0 and
NISO1 SMMUs since Host1x's stream ID protection tables don't
make a distinction between the two.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 include/dt-bindings/memory/tegra234-mc.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
index 75f0bd30d365..d9b21b64ed73 100644
--- a/include/dt-bindings/memory/tegra234-mc.h
+++ b/include/dt-bindings/memory/tegra234-mc.h
@@ -35,6 +35,16 @@
 #define TEGRA234_SID_NVDEC	0x29
 #define TEGRA234_SID_VIC	0x34
 
+/* Shared stream IDs */
+#define TEGRA234_SID_HOST1X_CTX0	0x35
+#define TEGRA234_SID_HOST1X_CTX1	0x36
+#define TEGRA234_SID_HOST1X_CTX2	0x37
+#define TEGRA234_SID_HOST1X_CTX3	0x38
+#define TEGRA234_SID_HOST1X_CTX4	0x39
+#define TEGRA234_SID_HOST1X_CTX5	0x3a
+#define TEGRA234_SID_HOST1X_CTX6	0x3b
+#define TEGRA234_SID_HOST1X_CTX7	0x3c
+
 /*
  * memory client IDs
  */
-- 
2.37.0

[PATCH 3/3] arm64: tegra: Add context isolation domains on Tegra234

[Mikko Perttunen]

From: Mikko Perttunen <mperttunen@nvidia.com>

Add Host1x context isolation domains on Tegra234. On Tegra234 we have
two IOMMUs that are connected to Host1x-channel programmed engines,
so we have to include domains for each of them.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 65d49b27bc5f..d764bd98433a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -570,6 +570,25 @@ host1x@13e00000 {
 			interconnect-names = "dma-mem";
 			iommus = <&smmu_niso1 TEGRA234_SID_HOST1X>;
 
+			/* Context isolation domains */
+			iommu-map = <
+				0 &smmu_niso0 TEGRA234_SID_HOST1X_CTX0 1
+				1 &smmu_niso0 TEGRA234_SID_HOST1X_CTX1 1
+				2 &smmu_niso0 TEGRA234_SID_HOST1X_CTX2 1
+				3 &smmu_niso0 TEGRA234_SID_HOST1X_CTX3 1
+				4 &smmu_niso0 TEGRA234_SID_HOST1X_CTX4 1
+				5 &smmu_niso0 TEGRA234_SID_HOST1X_CTX5 1
+				6 &smmu_niso0 TEGRA234_SID_HOST1X_CTX6 1
+				7 &smmu_niso0 TEGRA234_SID_HOST1X_CTX7 1
+				8 &smmu_niso1 TEGRA234_SID_HOST1X_CTX0 1
+				9 &smmu_niso1 TEGRA234_SID_HOST1X_CTX1 1
+				10 &smmu_niso1 TEGRA234_SID_HOST1X_CTX2 1
+				11 &smmu_niso1 TEGRA234_SID_HOST1X_CTX3 1
+				12 &smmu_niso1 TEGRA234_SID_HOST1X_CTX4 1
+				13 &smmu_niso1 TEGRA234_SID_HOST1X_CTX5 1
+				14 &smmu_niso1 TEGRA234_SID_HOST1X_CTX6 1
+				15 &smmu_niso1 TEGRA234_SID_HOST1X_CTX7 1>;
+
 			vic@15340000 {
 				compatible = "nvidia,tegra234-vic";
 				reg = <0x15340000 0x00040000>;
-- 
2.37.0

[PATCH 3/3] arm64: tegra: Add context isolation domains on Tegra234

[Mikko Perttunen]

From: Mikko Perttunen <mperttunen@nvidia.com>

Add Host1x context isolation domains on Tegra234. On Tegra234 we have
two IOMMUs that are connected to Host1x-channel programmed engines,
so we have to include domains for each of them.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 65d49b27bc5f..d764bd98433a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -570,6 +570,25 @@ host1x@13e00000 {
 			interconnect-names = "dma-mem";
 			iommus = <&smmu_niso1 TEGRA234_SID_HOST1X>;
 
+			/* Context isolation domains */
+			iommu-map = <
+				0 &smmu_niso0 TEGRA234_SID_HOST1X_CTX0 1
+				1 &smmu_niso0 TEGRA234_SID_HOST1X_CTX1 1
+				2 &smmu_niso0 TEGRA234_SID_HOST1X_CTX2 1
+				3 &smmu_niso0 TEGRA234_SID_HOST1X_CTX3 1
+				4 &smmu_niso0 TEGRA234_SID_HOST1X_CTX4 1
+				5 &smmu_niso0 TEGRA234_SID_HOST1X_CTX5 1
+				6 &smmu_niso0 TEGRA234_SID_HOST1X_CTX6 1
+				7 &smmu_niso0 TEGRA234_SID_HOST1X_CTX7 1
+				8 &smmu_niso1 TEGRA234_SID_HOST1X_CTX0 1
+				9 &smmu_niso1 TEGRA234_SID_HOST1X_CTX1 1
+				10 &smmu_niso1 TEGRA234_SID_HOST1X_CTX2 1
+				11 &smmu_niso1 TEGRA234_SID_HOST1X_CTX3 1
+				12 &smmu_niso1 TEGRA234_SID_HOST1X_CTX4 1
+				13 &smmu_niso1 TEGRA234_SID_HOST1X_CTX5 1
+				14 &smmu_niso1 TEGRA234_SID_HOST1X_CTX6 1
+				15 &smmu_niso1 TEGRA234_SID_HOST1X_CTX7 1>;
+
 			vic@15340000 {
 				compatible = "nvidia,tegra234-vic";
 				reg = <0x15340000 0x00040000>;
-- 
2.37.0

Re: [PATCH 2/3] dt-bindings: Add Host1x context stream IDs on Tegra234

[Rob Herring]

On Wed, 07 Sep 2022 11:38:43 +0300, Mikko Perttunen wrote:
> From: Mikko Perttunen <mperttunen@nvidia.com>
> 
> Add defines for stream IDs used for Host1x context isolation
> on Tegra234. The same stream IDs are used for both NISO0 and
> NISO1 SMMUs since Host1x's stream ID protection tables don't
> make a distinction between the two.
> 
> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> ---
>  include/dt-bindings/memory/tegra234-mc.h | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH 2/3] dt-bindings: Add Host1x context stream IDs on Tegra234

[Rob Herring]

On Wed, 07 Sep 2022 11:38:43 +0300, Mikko Perttunen wrote:
> From: Mikko Perttunen <mperttunen@nvidia.com>
> 
> Add defines for stream IDs used for Host1x context isolation
> on Tegra234. The same stream IDs are used for both NISO0 and
> NISO1 SMMUs since Host1x's stream ID protection tables don't
> make a distinction between the two.
> 
> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> ---
>  include/dt-bindings/memory/tegra234-mc.h | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH 0/3] Host1x context isolation on Tegra234

[Thierry Reding]

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On Wed, Sep 07, 2022 at 11:38:41AM +0300, Mikko Perttunen wrote:
> From: Mikko Perttunen <mperttunen@nvidia.com>
> 
> Hi all,
> 
> this series adds support for Host1x context isolation
> on Tegra234 (Orin). The difference from previous generations
> is that there are two IOMMUs to which engines can be attached
> to, resulting in having to have a set of contexts for each one.
> 
> Patches should be applied in order. The first patch is needed
> so that the kernel doesn't attempt to use a context device
> attached to the wrong IOMMU when context stream IDs are present
> in the device tree. The other two patches have a compile time
> dependency.
> 
> Thanks,
> Mikko
> 
> Mikko Perttunen (3):
>   gpu: host1x: Select context device based on attached IOMMU
>   dt-bindings: Add Host1x context stream IDs on Tegra234
>   arm64: tegra: Add context isolation domains on Tegra234
> 
>  arch/arm64/boot/dts/nvidia/tegra234.dtsi | 19 +++++++++++++++++++
>  drivers/gpu/drm/tegra/uapi.c             |  2 +-
>  drivers/gpu/host1x/context.c             |  5 +++++
>  include/dt-bindings/memory/tegra234-mc.h | 10 ++++++++++
>  include/linux/host1x.h                   |  1 +
>  5 files changed, 36 insertions(+), 1 deletion(-)

All three patches applied.

Thanks,
Thierry

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Re: [PATCH 0/3] Host1x context isolation on Tegra234

[Thierry Reding]

[-- Attachment #1: Type: text/plain, Size: 1301 bytes --]

On Wed, Sep 07, 2022 at 11:38:41AM +0300, Mikko Perttunen wrote:
> From: Mikko Perttunen <mperttunen@nvidia.com>
> 
> Hi all,
> 
> this series adds support for Host1x context isolation
> on Tegra234 (Orin). The difference from previous generations
> is that there are two IOMMUs to which engines can be attached
> to, resulting in having to have a set of contexts for each one.
> 
> Patches should be applied in order. The first patch is needed
> so that the kernel doesn't attempt to use a context device
> attached to the wrong IOMMU when context stream IDs are present
> in the device tree. The other two patches have a compile time
> dependency.
> 
> Thanks,
> Mikko
> 
> Mikko Perttunen (3):
>   gpu: host1x: Select context device based on attached IOMMU
>   dt-bindings: Add Host1x context stream IDs on Tegra234
>   arm64: tegra: Add context isolation domains on Tegra234
> 
>  arch/arm64/boot/dts/nvidia/tegra234.dtsi | 19 +++++++++++++++++++
>  drivers/gpu/drm/tegra/uapi.c             |  2 +-
>  drivers/gpu/host1x/context.c             |  5 +++++
>  include/dt-bindings/memory/tegra234-mc.h | 10 ++++++++++
>  include/linux/host1x.h                   |  1 +
>  5 files changed, 36 insertions(+), 1 deletion(-)

All three patches applied.

Thanks,
Thierry

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