Re: Similar SoCs with different CPUs and interrupt bindings

From: Conor Dooley <conor@kernel.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	"Lad, Prabhakar" <prabhakar.csengg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Andre Przywara <andre.przywara@arm.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Samuel Holland <samuel@sholland.org>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Atish Patra <atishp@atishpatra.org>,
	"Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>
Subject: Re: Similar SoCs with different CPUs and interrupt bindings
Date: Wed, 21 Sep 2022 22:05:55 +0100	[thread overview]
Message-ID: <Yyt8s5+pyoysVNeC@spud> (raw)
In-Reply-To: <CAMuHMdXaWz4zP-Zrc4drxwVmbMjmGZHABVbUtO91fZXKawathw@mail.gmail.com>

On Wed, Sep 21, 2022 at 12:08:11PM +0200, Geert Uytterhoeven wrote:
> Hi Krzysztof,
> > > This worked as expected, but couldn't get the arithmetic operation
> > > working. Could you please provide an example?
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> > index ff6aab388eb7..0ecca775fa3f 100644
> > --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> > @@ -8,6 +8,8 @@
> >  #include <dt-bindings/interrupt-controller/arm-gic.h>
> >  #include <dt-bindings/clock/r9a07g043-cpg.h>
> >
> > +#define SOC_PERIPHERAL_IRQ_NUMBER(na)  (na + 32)
> > +#define SOC_PERIPHERAL_IRQ(nr, na) GIC_SPI nr SOC_PERIPHERAL_IRQ_NUMBER(na)
> 
> #define SOC_PERIPHERAL_IRQ(nr, flags) GIC_SPI
> SOC_PERIPHERAL_IRQ_NUMBER(nr) flags
> 
> >  / {
> >         compatible = "renesas,r9a07g043";
> >         #address-cells = <2>;
> > @@ -128,7 +130,7 @@ ssi1: ssi@1004a000 {
> >                         compatible = "renesas,r9a07g043-ssi",
> >                                      "renesas,rz-ssi";
> >                         reg = <0 0x1004a000 0 0x400>;
> > -                       interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> > +                       interrupts = <SOC_PERIPHERAL_IRQ(330, IRQ_TYPE_LEVEL_HIGH)>,
> >
> >
> >
> > Or any other method like that....
> 
> Oh cool, seems like arithmetic is supported.
> No idea what I did wrong last time I tried...

Oh sick, it does actually work??? So, am I missing something or is this
sort of approach now a no-brainer?