[PATCH 0/2] Update the PCIe device ID's for USB device controllers on Alder Lake platforms

[PATCH 0/2] Update the PCIe device ID's for USB device controllers on Alder Lake platforms

[shruthi.sanil]

From: Shruthi Sanil <shruthi.sanil@intel.com>

Alder Lake has split die architecture for the USB device controllers.
The USB2 controller resides in the PCH sub system and the USB3 controller
resides in the CPU sub system. Hence we need to update both the device ID's
for the device to be enumerated correctly.

Shruthi Sanil (2):
  usb: dwc3: pci: Update the macro names for USB PCIe device ID's for
    Alder Lake platforms
  usb: dwc3: pci: Add PCIe device ID for USB3 controller on CPU
    sub-system for Alder Lake P

 drivers/usb/dwc3/dwc3-pci.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)


base-commit: e839a756012b6cad7a4eeb67b0598ac3f349f863
-- 
2.17.1

[PATCH 1/2] usb: dwc3: pci: Update the macro names for USB PCIe device ID's for Alder Lake platforms

[shruthi.sanil]

From: Shruthi Sanil <shruthi.sanil@intel.com>

The device ID 0x465e is defined for the USB3 device controller in the CPU
sub-system of Alder Lake N platform. Hence updating the macro name
accordingly.

The device ID 0x54ee is defined for the USB2 controller on the PCH
sub-system for Alder Lake N platform. Hence updating the macro name
accordingly.

The device ID's defined for Alder Lake P is shared between
Alder Lake P, Alder Lake PS and Alder Lake M.
Hence updating the macro name to ADL from ADLP to make it common
and keeping it aligned with the xHCI ID's naming convention.

As we have two device controllers on Alder Lake platforms
i.e. one on PCH sub-system and another on CPU sub-system(USB3),
appending _PCH for the USB2 device ID macro to differentiate
between the 2 ID's.

Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Shruthi Sanil <shruthi.sanil@intel.com>
---
 drivers/usb/dwc3/dwc3-pci.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index 4ee4ca09873a..7169d8865e17 100644
--- a/drivers/usb/dwc3/dwc3-pci.c
+++ b/drivers/usb/dwc3/dwc3-pci.c
@@ -40,9 +40,9 @@
 #define PCI_DEVICE_ID_INTEL_TGPLP		0xa0ee
 #define PCI_DEVICE_ID_INTEL_TGPH		0x43ee
 #define PCI_DEVICE_ID_INTEL_JSP			0x4dee
-#define PCI_DEVICE_ID_INTEL_ADL			0x465e
-#define PCI_DEVICE_ID_INTEL_ADLP		0x51ee
-#define PCI_DEVICE_ID_INTEL_ADLM		0x54ee
+#define PCI_DEVICE_ID_INTEL_ADL_PCH		0x51ee
+#define PCI_DEVICE_ID_INTEL_ADLN		0x465e
+#define PCI_DEVICE_ID_INTEL_ADLN_PCH		0x54ee
 #define PCI_DEVICE_ID_INTEL_ADLS		0x7ae1
 #define PCI_DEVICE_ID_INTEL_RPL			0x460e
 #define PCI_DEVICE_ID_INTEL_RPLS		0x7a61
@@ -445,13 +445,13 @@ static const struct pci_device_id dwc3_pci_id_table[] = {
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_JSP),
 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 
-	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADL),
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADL_PCH),
 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 
-	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLP),
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLN),
 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 
-	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLM),
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLN_PCH),
 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLS),
-- 
2.17.1

[PATCH 2/2] usb: dwc3: pci: Add PCIe device ID for USB3 controller on CPU sub-system for Alder Lake P

[shruthi.sanil]

From: Shruthi Sanil <shruthi.sanil@intel.com>

USB3 PCIe device ID's needs to be updated for the device to enumerate as
a USB3 device on the host for Alder Lake P.

Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Shruthi Sanil <shruthi.sanil@intel.com>
---
 drivers/usb/dwc3/dwc3-pci.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index 7169d8865e17..fb14511b1e10 100644
--- a/drivers/usb/dwc3/dwc3-pci.c
+++ b/drivers/usb/dwc3/dwc3-pci.c
@@ -40,6 +40,7 @@
 #define PCI_DEVICE_ID_INTEL_TGPLP		0xa0ee
 #define PCI_DEVICE_ID_INTEL_TGPH		0x43ee
 #define PCI_DEVICE_ID_INTEL_JSP			0x4dee
+#define PCI_DEVICE_ID_INTEL_ADL			0x460e
 #define PCI_DEVICE_ID_INTEL_ADL_PCH		0x51ee
 #define PCI_DEVICE_ID_INTEL_ADLN		0x465e
 #define PCI_DEVICE_ID_INTEL_ADLN_PCH		0x54ee
@@ -445,6 +446,9 @@ static const struct pci_device_id dwc3_pci_id_table[] = {
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_JSP),
 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADL),
+	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
+
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADL_PCH),
 	  (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 
-- 
2.17.1

RE: [PATCH 0/2] Update the PCIe device ID's for USB device controllers on Alder Lake platforms

[Sanil, Shruthi]

Gentle Reminder! 😊


Regards,
Shruthi

> -----Original Message-----
> From: Sanil, Shruthi <shruthi.sanil@intel.com>
> Sent: Tuesday, September 13, 2022 11:23 AM
> To: balbi@kernel.org; gregkh@linuxfoundation.org; linux-
> usb@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc: Krogerus, Heikki <heikki.krogerus@intel.com>; Thokala, Srikanth
> <srikanth.thokala@intel.com>; Sangannavar, Mallikarjunappa
> <mallikarjunappa.sangannavar@intel.com>; Sanil, Shruthi
> <shruthi.sanil@intel.com>
> Subject: [PATCH 0/2] Update the PCIe device ID's for USB device controllers
> on Alder Lake platforms
> 
> From: Shruthi Sanil <shruthi.sanil@intel.com>
> 
> Alder Lake has split die architecture for the USB device controllers.
> The USB2 controller resides in the PCH sub system and the USB3 controller
> resides in the CPU sub system. Hence we need to update both the device ID's
> for the device to be enumerated correctly.
> 
> Shruthi Sanil (2):
>   usb: dwc3: pci: Update the macro names for USB PCIe device ID's for
>     Alder Lake platforms
>   usb: dwc3: pci: Add PCIe device ID for USB3 controller on CPU
>     sub-system for Alder Lake P
> 
>  drivers/usb/dwc3/dwc3-pci.c | 14 +++++++++-----
>  1 file changed, 9 insertions(+), 5 deletions(-)
> 
> 
> base-commit: e839a756012b6cad7a4eeb67b0598ac3f349f863
> --
> 2.17.1

Re: [PATCH 0/2] Update the PCIe device ID's for USB device controllers on Alder Lake platforms

[gregkh]

On Thu, Sep 22, 2022 at 05:58:15AM +0000, Sanil, Shruthi wrote:
> Gentle Reminder! 😊

Gentle reminder to never top-post :)