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From: Sean Christopherson <seanjc@google.com>
To: Maxim Levitsky <mlevitsk@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Alejandro Jimenez <alejandro.j.jimenez@oracle.com>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	Li RongQing <lirongqing@baidu.com>
Subject: Re: [PATCH v3 07/28] KVM: x86: Inhibit APIC memslot if x2APIC and AVIC are enabled
Date: Mon, 26 Sep 2022 17:00:49 +0000	[thread overview]
Message-ID: <YzHawRN8vpEzP7XD@google.com> (raw)
In-Reply-To: <e84ebf0a7ac9322bd0cfa742ef6dd2bbfdac0df9.camel@redhat.com>

On Fri, Sep 23, 2022, Maxim Levitsky wrote:
> On Tue, 2022-09-20 at 23:31 +0000, Sean Christopherson wrote:
> > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> > index 2c96c43c313a..6475c882b359 100644
> > --- a/arch/x86/include/asm/kvm_host.h
> > +++ b/arch/x86/include/asm/kvm_host.h
> > @@ -1132,6 +1132,17 @@ enum kvm_apicv_inhibit {
> >  	 * AVIC is disabled because SEV doesn't support it.
> >  	 */
> >  	APICV_INHIBIT_REASON_SEV,
> > +
> > +	/*
> > +	 * Due to sharing page tables across vCPUs, the xAPIC memslot must be
> > +	 * deleted if any vCPU has x2APIC enabled as SVM doesn't provide fully
> > +	 * independent controls for AVIC vs. x2AVIC, and also because SVM
> > +	 * supports a "hybrid" AVIC mode for CPUs that support AVIC but not
> > +	 * x2AVIC.  Note, this isn't a "full" inhibit and is tracked separately.
> > +	 * AVIC can still be activated, but KVM must not create SPTEs for the
> > +	 * APIC base.  For simplicity, this is sticky.
> > +	 */
> > +	APICV_INHIBIT_REASON_X2APIC,
> 
> Hi Sean!
> 
> So assuming that I won't object to making it SVM specific (I still think
> that VMX should also inhibit this memslot because this is closer to x86 spec,
> but if you really want it this way, I won't fight over it):

Heh, I don't necessarily "want" it this way, it's more that I don't see a compelling
reason to change KVM's behavior and risk silently causing a performance regression.
If KVM didn't already have the "APIC base may have RAM semantics" quirk, and/or if
this were the initial APICv implementation and thus no possible users, then I would
probably also vote to give APICv the same treatment.

> I somewhat don't like this inhibit, because now it is used just to say
> 'I am AVIC'.
> 
> What do you think if you just move the code that removes the memslot to SVM,
> to avic_set_virtual_apic_mode?

Suffers the same SRCU issue (see below) :-/

Given the SRCU problem, I'd prefer to keep the management of the memslot in common
code, even though I agree it's a bit silly.  And KVM_REQ_UNBLOCK is a perfect fit
for dealing with the SRCU issue, i.e. handling this in AVIC code would require
another hook on top of spreading the memslot management across x86 and SVM code.

> > @@ -1169,10 +1180,11 @@ struct kvm_arch {
> >  	struct kvm_apic_map __rcu *apic_map;
> >  	atomic_t apic_map_dirty;
> >  
> > -	/* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */
> > -	struct rw_semaphore apicv_update_lock;
> > -
> >  	bool apic_access_memslot_enabled;
> > +	bool apic_access_memslot_inhibited;
> 
> So the apic_access_memslot_enabled currently tracks if the memslot is enabled.
> As I see later in the patch when you free the memslot, you set it to false,
> which means that if a vCPU is created after that (it can happen in theory),
> the memslot will be created again :(
> 
> I say we need 'enabled', and 'allocated' booleans instead. Inhibit will set
> enabled to false, and then on next vcpu run, that will free the memslot.
> 
> when enabled == false, the code needs to be changed to not allocate it again.

This should be handled already.  apic_access_memslot_enabled is toggled from
true=>false if and only if apic_access_memslot_inhibited is set, and the "enabled"
flag is protected by slots_lock.  Thus, newly created vCPUs are guaranteed to
either see apic_access_memslot_enabled==true or apic_access_memslot_inhibited==true.

  int kvm_alloc_apic_access_page(struct kvm *kvm)
  {
	struct page *page;
	void __user *hva;
	int ret = 0;

	mutex_lock(&kvm->slots_lock);
	if (kvm->arch.apic_access_memslot_enabled ||
	    kvm->arch.apic_access_memslot_inhibited)  <=== prevents reallocation
		goto out;

  out:
	mutex_unlock(&kvm->slots_lock);
	return ret;
  }

That could be made more obvious by adding a WARN in kvm_free_apic_access_page(), i.e.

  void kvm_free_apic_access_page(struct kvm *kvm)
  {
	WARN_ON_ONCE(!kvm->arch.apic_access_memslot_inhibited);

	mutex_lock(&kvm->slots_lock);

	if (kvm->arch.apic_access_memslot_enabled) {
		__x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
		kvm->arch.apic_access_memslot_enabled = false;
	}

	mutex_unlock(&kvm->slots_lock);
  }

> > +
> > +	/* Protects apicv_inhibit_reasons */
> > +	struct rw_semaphore apicv_update_lock;
> >  	unsigned long apicv_inhibit_reasons;
> >  
> >  	gpa_t wall_clock;
> > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> > index 99994d2470a2..70f00eda75b2 100644
> > --- a/arch/x86/kvm/lapic.c
> > +++ b/arch/x86/kvm/lapic.c
> > @@ -2394,9 +2394,26 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value)
> >  		}
> >  	}
> >  
> > -	if (((old_value ^ value) & X2APIC_ENABLE) && (value & X2APIC_ENABLE))
> > +	if (((old_value ^ value) & X2APIC_ENABLE) && (value & X2APIC_ENABLE)) {
> >  		kvm_apic_set_x2apic_id(apic, vcpu->vcpu_id);
> >  
> > +		/*
> > +		 * Mark the APIC memslot as inhibited if x2APIC is enabled and
> > +		 * the x2APIC inhibit is required.  The actual deletion of the
> > +		 * memslot is handled by vcpu_run() as SRCU may or may not be
> > +		 * held at this time, i.e. updating memslots isn't safe.  Don't
> > +		 * check apic_access_memslot_inhibited, this vCPU needs to
> > +		 * ensure the memslot is deleted before re-entering the guest,
> > +		 * i.e. needs to make the request even if the inhibit flag was
> > +		 * already set by a different vCPU.
> > +		 */
> > +		if (vcpu->kvm->arch.apic_access_memslot_enabled &&
> > +		    static_call(kvm_x86_check_apicv_inhibit_reasons)(APICV_INHIBIT_REASON_X2APIC)) {
> > +			vcpu->kvm->arch.apic_access_memslot_inhibited = true;
> > +			kvm_make_request(KVM_REQ_UNBLOCK, vcpu);
> 
> You are about to remove the KVM_REQ_UNBLOCK in other patch series.

No, KVM_REQ_UNHALT is being removed.  KVM_REQ_UNBLOCK needs to stay, although it
has a rather weird name, e.g. KVM_REQ_WORK would probably be better.

> How about just raising KVM_REQ_APICV_UPDATE on current vCPU
> and having a special case in kvm_vcpu_update_apicv of 
> 
> if (apic_access_memslot_enabled == false && apic_access_memslot_allocaed == true) {
> 	drop srcu lock

This was my initial thought as well, but the issue is that SRCU may or may not be
held, and so the unlock+lock would need to be conditional.  That's technically a
solvable problem, as it's possible to detect if SRCU is held, but I really don't
want to rely on kvm_vcpu.srcu_depth for anything other than proving that KVM doesn't
screw up SRCU.

> 	free the memslot
> 	take srcu lock
> }

  reply	other threads:[~2022-09-26 17:38 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-20 23:31 [PATCH v3 00/28] KVM: x86: AVIC and local APIC fixes+cleanups Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 01/28] KVM: x86: Blindly get current x2APIC reg value on "nodecode write" traps Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 02/28] KVM: x86: Purge "highest ISR" cache when updating APICv state Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 03/28] KVM: SVM: Flush the "current" TLB when activating AVIC Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 04/28] KVM: SVM: Process ICR on AVIC IPI delivery failure due to invalid target Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 05/28] KVM: x86: Don't inhibit APICv/AVIC if xAPIC ID mismatch is due to 32-bit ID Sean Christopherson
2022-09-28  3:15   ` Alejandro Jimenez
2022-09-28  5:55     ` Maxim Levitsky
2022-09-28 16:51       ` Sean Christopherson
2022-09-28 17:51         ` Maxim Levitsky
2022-09-28 18:03           ` Sean Christopherson
2022-09-28 18:16             ` Maxim Levitsky
2022-09-28 20:44               ` Sean Christopherson
2022-09-28 20:50         ` Alejandro Jimenez
2022-09-20 23:31 ` [PATCH v3 06/28] KVM: x86: Move APIC access page helper to common x86 code Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 07/28] KVM: x86: Inhibit APIC memslot if x2APIC and AVIC are enabled Sean Christopherson
2022-09-23 10:27   ` Maxim Levitsky
2022-09-26 17:00     ` Sean Christopherson [this message]
2022-09-28  6:21       ` Maxim Levitsky
2022-09-28 16:33         ` Sean Christopherson
2022-09-28 17:40           ` Maxim Levitsky
2022-09-28 22:35             ` Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 08/28] KVM: SVM: Don't put/load AVIC when setting virtual APIC mode Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 09/28] KVM: SVM: Replace "avic_mode" enum with "x2avic_enabled" boolean Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 10/28] KVM: SVM: Compute dest based on sender's x2APIC status for AVIC kick Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 11/28] KVM: SVM: Fix x2APIC Logical ID calculation for avic_kick_target_vcpus_fast Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 12/28] Revert "KVM: SVM: Use target APIC ID to complete x2AVIC IRQs when possible" Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 13/28] KVM: SVM: Document that vCPU ID == APIC ID in AVIC kick fastpatch Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 14/28] KVM: SVM: Add helper to perform final AVIC "kick" of single vCPU Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 15/28] KVM: x86: Explicitly skip optimized logical map setup if vCPU's LDR==0 Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 16/28] KVM: x86: Explicitly track all possibilities for APIC map's logical modes Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 17/28] KVM: x86: Skip redundant x2APIC logical mode optimized cluster setup Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 18/28] KVM: x86: Disable APIC logical map if logical ID covers multiple MDAs Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 19/28] KVM: x86: Disable APIC logical map if vCPUs are aliased in logical mode Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 20/28] KVM: x86: Honor architectural behavior for aliased 8-bit APIC IDs Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 21/28] KVM: x86: Inhibit APICv/AVIC if the optimized physical map is disabled Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 22/28] KVM: SVM: Inhibit AVIC if vCPUs are aliased in logical mode Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 23/28] KVM: SVM: Always update local APIC on writes to logical dest register Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 24/28] KVM: SVM: Update svm->ldr_reg cache even if LDR is "bad" Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 25/28] KVM: SVM: Require logical ID to be power-of-2 for AVIC entry Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 26/28] KVM: SVM: Handle multiple logical targets in AVIC kick fastpath Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 27/28] KVM: SVM: Ignore writes to Remote Read Data on AVIC write traps Sean Christopherson
2022-09-20 23:31 ` [PATCH v3 28/28] Revert "KVM: SVM: Do not throw warning when calling avic_vcpu_load on a running vcpu" Sean Christopherson

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