Re: [PATCH] RISC-V: Add support for Ztso

From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
To: Palmer Dabbelt <palmer@rivosinc.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH] RISC-V: Add support for Ztso
Date: Thu, 29 Sep 2022 20:16:48 +0100	[thread overview]
Message-ID: <YzXvIKVeFcHQ3ZQI@work-vm> (raw)
In-Reply-To: <20220902034412.8918-1-palmer@rivosinc.com>

* Palmer Dabbelt (palmer@rivosinc.com) wrote:
> Ztso, the RISC-V extension that provides the TSO memory model, was
> recently frozen.  This provides support for Ztso on targets that are
> themselves TSO.
> 
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> 
> ---
> 

> diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
> index 00fcbe297d..2a43d54fcd 100644
> --- a/tcg/i386/tcg-target.h
> +++ b/tcg/i386/tcg-target.h
> @@ -236,6 +236,7 @@ static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_rx,
>  #include "tcg/tcg-mo.h"
>  
>  #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
> +#define TCG_TARGET_SUPPORTS_MCTCG_RVTSO 1

Is x86's brand of memory ordering strong enough for Ztso?
I thought x86 had an optimisation where it was allowed to store forward
within the current CPU causing stores not to be quite strictly ordered.

Dave

>  #define TCG_TARGET_HAS_MEMORY_BSWAP  have_movbe
>  
> diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h
> index 23e2063667..f423c124a0 100644
> --- a/tcg/s390x/tcg-target.h
> +++ b/tcg/s390x/tcg-target.h
> @@ -171,6 +171,7 @@ extern uint64_t s390_facilities[3];
>  #define TCG_TARGET_HAS_MEMORY_BSWAP   1
>  
>  #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
> +#define TCG_TARGET_SUPPORTS_MCTCG_RVTSO 1
>  
>  static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_rx,
>                                              uintptr_t jmp_rw, uintptr_t addr)
> -- 
> 2.34.1
> 
> 
-- 
Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK