* [PATCH 0/2] Improvement and fix for HiSilicon I2C driver
@ 2023-03-13 7:45 Yicong Yang
2023-03-13 7:45 ` [PATCH 1/2] i2c: hisi: Avoid redundant interrupts Yicong Yang
2023-03-13 7:45 ` [PATCH 2/2] i2c: hisi: Only use the completion interrupt to finish the transfer Yicong Yang
0 siblings, 2 replies; 5+ messages in thread
From: Yicong Yang @ 2023-03-13 7:45 UTC (permalink / raw)
To: wsa, linux-i2c; +Cc: chenweilong, f.fangjian, linuxarm, prime.zeng, yangyicong
From: Yicong Yang <yangyicong@hisilicon.com>
This patchset includes 2 patches for 1) Improve the interrupt handling to
avoid redundant interrupts and 2) fix the issue that on error case the
completion is not handled and corrupt the next transfer.
Yicong Yang (2):
i2c: hisi: Avoid redundant interrupts
i2c: hisi: Only use the completion interrupt to finish the transfer
drivers/i2c/busses/i2c-hisi.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
--
2.24.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] i2c: hisi: Avoid redundant interrupts
2023-03-13 7:45 [PATCH 0/2] Improvement and fix for HiSilicon I2C driver Yicong Yang
@ 2023-03-13 7:45 ` Yicong Yang
2023-03-16 20:06 ` Wolfram Sang
2023-03-13 7:45 ` [PATCH 2/2] i2c: hisi: Only use the completion interrupt to finish the transfer Yicong Yang
1 sibling, 1 reply; 5+ messages in thread
From: Yicong Yang @ 2023-03-13 7:45 UTC (permalink / raw)
To: wsa, linux-i2c
Cc: chenweilong, f.fangjian, linuxarm, prime.zeng, yangyicong, Sheng Feng
From: Yicong Yang <yangyicong@hisilicon.com>
After issuing all the messages we can disable the TX_EMPTY interrupts
to avoid handling redundant interrupts. For doing a sinlge bus
detection (i2cdetect -y -r 0) we can reduce ~97% interrupts (before
~12000 after ~400).
Reported-by: Sheng Feng <fengsheng5@huawei.com>
Signed-off-by: Sheng Feng <fengsheng5@huawei.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
---
drivers/i2c/busses/i2c-hisi.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/i2c/busses/i2c-hisi.c b/drivers/i2c/busses/i2c-hisi.c
index 8c6c7075c765..1b7609a34f4a 100644
--- a/drivers/i2c/busses/i2c-hisi.c
+++ b/drivers/i2c/busses/i2c-hisi.c
@@ -316,6 +316,13 @@ static void hisi_i2c_xfer_msg(struct hisi_i2c_controller *ctlr)
max_write == 0)
break;
}
+
+ /*
+ * Disable the TX_EMPTY interrupt after finishing all the messages to
+ * avoid overwhelming the CPU.
+ */
+ if (ctlr->msg_tx_idx == ctlr->msg_num)
+ hisi_i2c_disable_int(ctlr, HISI_I2C_INT_TX_EMPTY);
}
static irqreturn_t hisi_i2c_irq(int irq, void *context)
--
2.24.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] i2c: hisi: Avoid redundant interrupts
2023-03-13 7:45 ` [PATCH 1/2] i2c: hisi: Avoid redundant interrupts Yicong Yang
@ 2023-03-16 20:06 ` Wolfram Sang
0 siblings, 0 replies; 5+ messages in thread
From: Wolfram Sang @ 2023-03-16 20:06 UTC (permalink / raw)
To: Yicong Yang
Cc: linux-i2c, chenweilong, f.fangjian, linuxarm, prime.zeng,
yangyicong, Sheng Feng
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On Mon, Mar 13, 2023 at 03:45:51PM +0800, Yicong Yang wrote:
> From: Yicong Yang <yangyicong@hisilicon.com>
>
> After issuing all the messages we can disable the TX_EMPTY interrupts
> to avoid handling redundant interrupts. For doing a sinlge bus
> detection (i2cdetect -y -r 0) we can reduce ~97% interrupts (before
> ~12000 after ~400).
>
> Reported-by: Sheng Feng <fengsheng5@huawei.com>
> Signed-off-by: Sheng Feng <fengsheng5@huawei.com>
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Applied to for-current, thanks!
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] i2c: hisi: Only use the completion interrupt to finish the transfer
2023-03-13 7:45 [PATCH 0/2] Improvement and fix for HiSilicon I2C driver Yicong Yang
2023-03-13 7:45 ` [PATCH 1/2] i2c: hisi: Avoid redundant interrupts Yicong Yang
@ 2023-03-13 7:45 ` Yicong Yang
2023-03-16 20:06 ` Wolfram Sang
1 sibling, 1 reply; 5+ messages in thread
From: Yicong Yang @ 2023-03-13 7:45 UTC (permalink / raw)
To: wsa, linux-i2c
Cc: chenweilong, f.fangjian, linuxarm, prime.zeng, yangyicong, Sheng Feng
From: Yicong Yang <yangyicong@hisilicon.com>
The controller will always generate a completion interrupt when the
transfer is finished normally or not. Currently we use either error or
completion interrupt to finish, this may result the completion
interrupt unhandled and corrupt the next transfer, especially at low
speed mode. Since on error case, the error interrupt will come first
then is the completion interrupt. So only use the completion interrupt
to finish the whole transfer process.
Fixes: d62fbdb99a85 ("i2c: add support for HiSilicon I2C controller")
Reported-by: Sheng Feng <fengsheng5@huawei.com>
Signed-off-by: Sheng Feng <fengsheng5@huawei.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
---
drivers/i2c/busses/i2c-hisi.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-hisi.c b/drivers/i2c/busses/i2c-hisi.c
index 1b7609a34f4a..e067671b3ce2 100644
--- a/drivers/i2c/busses/i2c-hisi.c
+++ b/drivers/i2c/busses/i2c-hisi.c
@@ -348,7 +348,11 @@ static irqreturn_t hisi_i2c_irq(int irq, void *context)
hisi_i2c_read_rx_fifo(ctlr);
out:
- if (int_stat & HISI_I2C_INT_TRANS_CPLT || ctlr->xfer_err) {
+ /*
+ * Only use TRANS_CPLT to indicate the completion. On error cases we'll
+ * get two interrupts, INT_ERR first then TRANS_CPLT.
+ */
+ if (int_stat & HISI_I2C_INT_TRANS_CPLT) {
hisi_i2c_disable_int(ctlr, HISI_I2C_INT_ALL);
hisi_i2c_clear_int(ctlr, HISI_I2C_INT_ALL);
complete(ctlr->completion);
--
2.24.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 2/2] i2c: hisi: Only use the completion interrupt to finish the transfer
2023-03-13 7:45 ` [PATCH 2/2] i2c: hisi: Only use the completion interrupt to finish the transfer Yicong Yang
@ 2023-03-16 20:06 ` Wolfram Sang
0 siblings, 0 replies; 5+ messages in thread
From: Wolfram Sang @ 2023-03-16 20:06 UTC (permalink / raw)
To: Yicong Yang
Cc: linux-i2c, chenweilong, f.fangjian, linuxarm, prime.zeng,
yangyicong, Sheng Feng
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On Mon, Mar 13, 2023 at 03:45:52PM +0800, Yicong Yang wrote:
> From: Yicong Yang <yangyicong@hisilicon.com>
>
> The controller will always generate a completion interrupt when the
> transfer is finished normally or not. Currently we use either error or
> completion interrupt to finish, this may result the completion
> interrupt unhandled and corrupt the next transfer, especially at low
> speed mode. Since on error case, the error interrupt will come first
> then is the completion interrupt. So only use the completion interrupt
> to finish the whole transfer process.
>
> Fixes: d62fbdb99a85 ("i2c: add support for HiSilicon I2C controller")
> Reported-by: Sheng Feng <fengsheng5@huawei.com>
> Signed-off-by: Sheng Feng <fengsheng5@huawei.com>
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Applied to for-current, thanks!
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^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2023-03-16 20:07 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-13 7:45 [PATCH 0/2] Improvement and fix for HiSilicon I2C driver Yicong Yang
2023-03-13 7:45 ` [PATCH 1/2] i2c: hisi: Avoid redundant interrupts Yicong Yang
2023-03-16 20:06 ` Wolfram Sang
2023-03-13 7:45 ` [PATCH 2/2] i2c: hisi: Only use the completion interrupt to finish the transfer Yicong Yang
2023-03-16 20:06 ` Wolfram Sang
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