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* [[PATCH v2]] riscv: add backtrace support
@ 2023-09-05 12:12 Ben Dooks
  2024-03-28  7:36 ` Leo Liang
  0 siblings, 1 reply; 2+ messages in thread
From: Ben Dooks @ 2023-09-05 12:12 UTC (permalink / raw)
  To: u-boot; +Cc: ganboing, rick, Ben Dooks

When debugging, it is useful to have a backtrace to find
out what is in the call stack as the previous function (RA)
may not have been the culprit.

Since this adds size to the build, do not add it by default
and avoid putting it in the SPL build if not needed.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
v2:
  - back to codethink email as sifive account is now gone
  - add option to build SPL with frame pointer
    (as suggested by Bo Gan <ganboing@gmail.com>
---
 arch/riscv/Kconfig          | 20 ++++++++++++++++++++
 arch/riscv/Makefile         |  4 ++++
 arch/riscv/cpu/start.S      |  1 +
 arch/riscv/lib/interrupts.c | 35 +++++++++++++++++++++++++++++++++++
 4 files changed, 60 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6771d8d919..a446166631 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -111,6 +111,26 @@ config ARCH_RV64I
 
 endchoice
 
+config FRAMEPOINTER
+	bool "Build with frame pointer for stack unwinding"
+	help
+	  Choose this option to use the frame pointer so the stack can be
+	  unwound if needed. This is useful for tracing where faults came
+	  from as the source may be several functions back
+
+	  If you say Y here, then the code size will be increased due to
+	  having to store the fp.
+
+config SPL_FRAMEPOINTER
+	bool "Build SPL with frame pointer for stack unwinding"
+	help
+	  Choose this option to use the frame pointer so the stack can be
+	  unwound if needed. This is useful for tracing where faults came
+	  from as the source may be several functions back
+
+	  If you say Y here, then the code size will be increased due to
+	  having to store the fp.
+
 choice
 	prompt "Code Model"
 	default CMODEL_MEDLOW
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 4963b5109b..0cb60c7c7e 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -45,6 +45,10 @@ endif
 ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
 	     -mcmodel=$(CMODEL)
 
+ifeq ($(CONFIG_$(SPL_)FRAMEPOINTER),y)
+	ARCH_FLAGS += -fno-omit-frame-pointer
+endif
+
 PLATFORM_CPPFLAGS	+= $(ARCH_FLAGS)
 CFLAGS_EFI		+= $(ARCH_FLAGS)
 
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 30cf674370..53de424378 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -419,6 +419,7 @@ call_board_init_r:
  */
 	mv	a0, s3			/* gd_t */
 	mv	a1, s4			/* dest_addr */
+	mv	s0, zero		/* fp == NULL */
 
 /*
  * jump to it ...
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
index e966afa7e3..db3d7e294b 100644
--- a/arch/riscv/lib/interrupts.c
+++ b/arch/riscv/lib/interrupts.c
@@ -53,6 +53,40 @@ static void show_regs(struct pt_regs *regs)
 #endif
 }
 
+#if defined(CONFIG_FRAMEPOINTER) || defined(CONFIG_SPL_FRAMEPOINTER)
+static void show_backtrace(struct pt_regs *regs)
+{
+	uintptr_t *fp = (uintptr_t *)regs->s0;
+	unsigned count = 0;
+	ulong ra;
+
+	printf("backtrace:\n");
+
+	/* there are a few entry points where the s0 register is
+	 * set to gd, so to avoid changing those, just abort if
+	 * the value is the same */
+	while (fp != NULL && fp != (uintptr_t *)gd) {
+		ra = fp[-1];
+		printf("backtrace %2d: FP: " REG_FMT " RA: " REG_FMT,
+		       count, (ulong)fp, ra);
+
+		if (gd && gd->flags & GD_FLG_RELOC)
+			printf(" - RA: " REG_FMT " reloc adjusted\n",
+			ra - gd->reloc_off);
+		else
+			printf("\n");
+
+		fp = (uintptr_t *)fp[-2];
+		count++;
+	}
+}
+#else
+static void show_backtrace(struct pt_regs *regs)
+{
+	printf("No backtrace support enabled\n");
+}
+#endif
+
 /**
  * instr_len() - get instruction length
  *
@@ -119,6 +153,7 @@ static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs)
 		       epc - gd->reloc_off, regs->ra - gd->reloc_off);
 
 	show_regs(regs);
+	show_backtrace(regs);
 	show_code(epc);
 	show_efi_loaded_images(epc);
 	panic("\n");
-- 
2.40.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [[PATCH v2]] riscv: add backtrace support
  2023-09-05 12:12 [[PATCH v2]] riscv: add backtrace support Ben Dooks
@ 2024-03-28  7:36 ` Leo Liang
  0 siblings, 0 replies; 2+ messages in thread
From: Leo Liang @ 2024-03-28  7:36 UTC (permalink / raw)
  To: Ben Dooks; +Cc: u-boot, ganboing, rick

On Tue, Sep 05, 2023 at 01:12:53PM +0100, Ben Dooks wrote:
> When debugging, it is useful to have a backtrace to find
> out what is in the call stack as the previous function (RA)
> may not have been the culprit.
> 
> Since this adds size to the build, do not add it by default
> and avoid putting it in the SPL build if not needed.
> 
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> ---
> v2:
>   - back to codethink email as sifive account is now gone
>   - add option to build SPL with frame pointer
>     (as suggested by Bo Gan <ganboing@gmail.com>
> ---
>  arch/riscv/Kconfig          | 20 ++++++++++++++++++++
>  arch/riscv/Makefile         |  4 ++++
>  arch/riscv/cpu/start.S      |  1 +
>  arch/riscv/lib/interrupts.c | 35 +++++++++++++++++++++++++++++++++++
>  4 files changed, 60 insertions(+)

Tested-by: Leo Yu-Chi Liang <ycliang@andestech.com>

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2024-03-28  7:37 UTC | newest]

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2023-09-05 12:12 [[PATCH v2]] riscv: add backtrace support Ben Dooks
2024-03-28  7:36 ` Leo Liang

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