* [PATCH] arm64: zynqmp: Describe DisplayPort connector for Kria
@ 2024-03-21 15:54 Michal Simek
2024-04-02 13:06 ` Michal Simek
0 siblings, 1 reply; 2+ messages in thread
From: Michal Simek @ 2024-03-21 15:54 UTC (permalink / raw)
To: u-boot, git
Cc: Vishal Sagar, Harini Katakam, Manikanta Guntupalli, Neal Frager,
Radhey Shyam Pandey, Rasmus Villemoes, Tejas Bhumkar, Tom Rini
From: Vishal Sagar <vishal.sagar@amd.com>
Add a device tree node to describe the DisplayPort connector, and
connect it to the DPSUB output.
The patch was tested on kv260-revB/rev2 and also kr260-revB.
Signed-off-by: Vishal Sagar <vishal.sagar@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
---
arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 20 ++++++++++++++++++++
arch/arm/dts/zynqmp-sck-kv-g-revB.dtso | 20 ++++++++++++++++++++
2 files changed, 40 insertions(+)
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
index 6c29f6574134..0a0cbd2b69ae 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
@@ -66,6 +66,18 @@
#clock-cells = <0>;
clock-frequency = <74250000>;
};
+
+ dpcon {
+ compatible = "dp-connector";
+ label = "P11";
+ type = "full-size";
+
+ port {
+ dpcon_in: endpoint {
+ remote-endpoint = <&dpsub_dp_out>;
+ };
+ };
+ };
};
&i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
@@ -130,6 +142,14 @@
phy-names = "dp-phy0";
phys = <&psgtr 1 PHY_TYPE_DP 0 1>;
assigned-clock-rates = <27000000>, <25000000>, <300000000>;
+
+ ports {
+ port@5 {
+ dpsub_dp_out: endpoint {
+ remote-endpoint = <&dpcon_in>;
+ };
+ };
+ };
};
&zynqmp_dpdma {
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
index a4b4465d2038..a449c1161b1e 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
@@ -63,6 +63,18 @@
#clock-cells = <0>;
clock-frequency = <27000000>;
};
+
+ dpcon {
+ compatible = "dp-connector";
+ label = "P11";
+ type = "full-size";
+
+ port {
+ dpcon_in: endpoint {
+ remote-endpoint = <&dpsub_dp_out>;
+ };
+ };
+ };
};
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -97,6 +109,14 @@
phy-names = "dp-phy0", "dp-phy1";
phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
assigned-clock-rates = <27000000>, <25000000>, <300000000>;
+
+ ports {
+ port@5 {
+ dpsub_dp_out: endpoint {
+ remote-endpoint = <&dpcon_in>;
+ };
+ };
+ };
};
&zynqmp_dpdma {
--
2.44.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] arm64: zynqmp: Describe DisplayPort connector for Kria
2024-03-21 15:54 [PATCH] arm64: zynqmp: Describe DisplayPort connector for Kria Michal Simek
@ 2024-04-02 13:06 ` Michal Simek
0 siblings, 0 replies; 2+ messages in thread
From: Michal Simek @ 2024-04-02 13:06 UTC (permalink / raw)
To: u-boot, git
Cc: Vishal Sagar, Harini Katakam, Manikanta Guntupalli, Neal Frager,
Radhey Shyam Pandey, Rasmus Villemoes, Tejas Bhumkar, Tom Rini
On 3/21/24 16:54, Michal Simek wrote:
> From: Vishal Sagar <vishal.sagar@amd.com>
>
> Add a device tree node to describe the DisplayPort connector, and
> connect it to the DPSUB output.
>
> The patch was tested on kv260-revB/rev2 and also kr260-revB.
>
> Signed-off-by: Vishal Sagar <vishal.sagar@amd.com>
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
>
> arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 20 ++++++++++++++++++++
> arch/arm/dts/zynqmp-sck-kv-g-revB.dtso | 20 ++++++++++++++++++++
> 2 files changed, 40 insertions(+)
>
> diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
> index 6c29f6574134..0a0cbd2b69ae 100644
> --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
> +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
> @@ -66,6 +66,18 @@
> #clock-cells = <0>;
> clock-frequency = <74250000>;
> };
> +
> + dpcon {
> + compatible = "dp-connector";
> + label = "P11";
> + type = "full-size";
> +
> + port {
> + dpcon_in: endpoint {
> + remote-endpoint = <&dpsub_dp_out>;
> + };
> + };
> + };
> };
>
> &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
> @@ -130,6 +142,14 @@
> phy-names = "dp-phy0";
> phys = <&psgtr 1 PHY_TYPE_DP 0 1>;
> assigned-clock-rates = <27000000>, <25000000>, <300000000>;
> +
> + ports {
> + port@5 {
> + dpsub_dp_out: endpoint {
> + remote-endpoint = <&dpcon_in>;
> + };
> + };
> + };
> };
>
> &zynqmp_dpdma {
> diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
> index a4b4465d2038..a449c1161b1e 100644
> --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
> +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
> @@ -63,6 +63,18 @@
> #clock-cells = <0>;
> clock-frequency = <27000000>;
> };
> +
> + dpcon {
> + compatible = "dp-connector";
> + label = "P11";
> + type = "full-size";
> +
> + port {
> + dpcon_in: endpoint {
> + remote-endpoint = <&dpsub_dp_out>;
> + };
> + };
> + };
> };
>
> &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
> @@ -97,6 +109,14 @@
> phy-names = "dp-phy0", "dp-phy1";
> phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
> assigned-clock-rates = <27000000>, <25000000>, <300000000>;
> +
> + ports {
> + port@5 {
> + dpsub_dp_out: endpoint {
> + remote-endpoint = <&dpcon_in>;
> + };
> + };
> + };
> };
>
> &zynqmp_dpdma {
Applied.
M
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2024-04-02 13:06 ` Michal Simek
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