From: Xianting TIan <xianting.tian@linux.alibaba.com> To: Arnd Bergmann <arnd@arndb.de> Cc: gregkh <gregkh@linuxfoundation.org>, Jiri Slaby <jirislaby@kernel.org>, Amit Shah <amit@kernel.org>, Omar Sandoval <osandov@fb.com>, linuxppc-dev <linuxppc-dev@lists.ozlabs.org>, "open list:DRM DRIVER FOR QEMU'S CIRRUS DEVICE" <virtualization@lists.linux-foundation.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Guo Ren <guoren@kernel.org> Subject: Re: [PATCH v4 1/2] tty: hvc: pass DMA capable memory to put_chars() Date: Thu, 12 Aug 2021 17:14:09 +0800 [thread overview] Message-ID: <a5bb4fbb-a9c4-9b9a-3cfe-09d3b99c7915@linux.alibaba.com> (raw) In-Reply-To: <CAK8P3a2ykLvJkhX+wDAOHdyLHjPFAfhOxi5BNM9kTKv_8F7VQg@mail.gmail.com> 在 2021/8/12 下午4:54, Arnd Bergmann 写道: > On Thu, Aug 12, 2021 at 10:08 AM Xianting TIan > <xianting.tian@linux.alibaba.com> wrote: >> 在 2021/8/6 下午10:51, Arnd Bergmann 写道: >>> On Fri, Aug 6, 2021 at 5:01 AM Xianting Tian >>>> +#define __ALIGNED__ __attribute__((__aligned__(sizeof(long)))) >>> I think you need a higher alignment for DMA buffers, instead of sizeof(long), >>> I would suggest ARCH_DMA_MINALIGN. >> As some ARCH(eg, x86, riscv) doesn't define ARCH_DMA_MINALIG, so i think >> it 's better remain the code unchanged, >> >> I will send v5 patch soon. > I think you could just use "L1_CACHE_BYTES" as the alignment in this case. > This will make the structure slightly larger for architectures that do not have > alignment constraints on DMA buffers, but using a smaller alignment is > clearly wrong. Another option would be to use ARCH_KMALLOC_MINALIGN. yes, I unstand you, the align size must L1_CACHE_BYTES at least. > > Note that there is a patch to add ARCH_DMA_MINALIGN to riscv already, yes, I summited this patch, it is discussing, seems they don't want to apply it. > as some implementations do not have coherent DMA. I had failed to > realized though that on x86 you do not get an ARCH_DMA_MINALIGN > definition. I didn't find the definition in arch/x86/include/asm/cache.h and other place, x86 is dma coherent, it may doesn't need it. > > Arnd
WARNING: multiple messages have this Message-ID (diff)
From: Xianting TIan <xianting.tian@linux.alibaba.com> To: Arnd Bergmann <arnd@arndb.de> Cc: Jiri Slaby <jirislaby@kernel.org>, Amit Shah <amit@kernel.org>, gregkh <gregkh@linuxfoundation.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, "open list:DRM DRIVER FOR QEMU'S CIRRUS DEVICE" <virtualization@lists.linux-foundation.org>, Guo Ren <guoren@kernel.org>, linuxppc-dev <linuxppc-dev@lists.ozlabs.org>, Omar Sandoval <osandov@fb.com> Subject: Re: [PATCH v4 1/2] tty: hvc: pass DMA capable memory to put_chars() Date: Thu, 12 Aug 2021 17:14:09 +0800 [thread overview] Message-ID: <a5bb4fbb-a9c4-9b9a-3cfe-09d3b99c7915@linux.alibaba.com> (raw) In-Reply-To: <CAK8P3a2ykLvJkhX+wDAOHdyLHjPFAfhOxi5BNM9kTKv_8F7VQg@mail.gmail.com> 在 2021/8/12 下午4:54, Arnd Bergmann 写道: > On Thu, Aug 12, 2021 at 10:08 AM Xianting TIan > <xianting.tian@linux.alibaba.com> wrote: >> 在 2021/8/6 下午10:51, Arnd Bergmann 写道: >>> On Fri, Aug 6, 2021 at 5:01 AM Xianting Tian >>>> +#define __ALIGNED__ __attribute__((__aligned__(sizeof(long)))) >>> I think you need a higher alignment for DMA buffers, instead of sizeof(long), >>> I would suggest ARCH_DMA_MINALIGN. >> As some ARCH(eg, x86, riscv) doesn't define ARCH_DMA_MINALIG, so i think >> it 's better remain the code unchanged, >> >> I will send v5 patch soon. > I think you could just use "L1_CACHE_BYTES" as the alignment in this case. > This will make the structure slightly larger for architectures that do not have > alignment constraints on DMA buffers, but using a smaller alignment is > clearly wrong. Another option would be to use ARCH_KMALLOC_MINALIGN. yes, I unstand you, the align size must L1_CACHE_BYTES at least. > > Note that there is a patch to add ARCH_DMA_MINALIGN to riscv already, yes, I summited this patch, it is discussing, seems they don't want to apply it. > as some implementations do not have coherent DMA. I had failed to > realized though that on x86 you do not get an ARCH_DMA_MINALIGN > definition. I didn't find the definition in arch/x86/include/asm/cache.h and other place, x86 is dma coherent, it may doesn't need it. > > Arnd
next prev parent reply other threads:[~2021-08-12 9:14 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-06 3:01 [PATCH v4 0/2] make hvc pass dma capable memory to its backend Xianting Tian 2021-08-06 3:01 ` Xianting Tian 2021-08-06 3:01 ` [PATCH v4 1/2] tty: hvc: pass DMA capable memory to put_chars() Xianting Tian 2021-08-06 3:01 ` Xianting Tian 2021-08-06 14:51 ` Arnd Bergmann 2021-08-06 14:51 ` Arnd Bergmann 2021-08-06 14:51 ` Arnd Bergmann 2021-08-07 15:00 ` Xianting Tian 2021-08-07 15:00 ` Xianting Tian 2021-08-12 8:07 ` Xianting TIan 2021-08-12 8:07 ` Xianting TIan 2021-08-12 8:54 ` Arnd Bergmann 2021-08-12 8:54 ` Arnd Bergmann 2021-08-12 8:54 ` Arnd Bergmann 2021-08-12 9:14 ` Xianting TIan [this message] 2021-08-12 9:14 ` Xianting TIan 2021-08-06 3:01 ` [PATCH v4 2/2] virtio-console: remove unnecessary kmemdup() Xianting Tian 2021-08-06 3:01 ` Xianting Tian
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