[PATCH 1/6] clk: meson: add minimal driver for g12a-ao clocks

From: Jaehoon Chung <jh80.chung@samsung.com>
To: u-boot@lists.denx.de
Subject: [PATCH 1/6] clk: meson: add minimal driver for g12a-ao clocks
Date: Tue, 15 Dec 2020 06:50:00 +0900	[thread overview]
Message-ID: <a7925cb2-3688-8f0f-fda2-8f777d862433@samsung.com> (raw)
In-Reply-To: <84d06ecc-70af-b5b1-6a4d-17b77a5679c7@baylibre.com>

On 12/15/20 3:53 AM, Neil Armstrong wrote:
> Hi,
> 
> On 14/12/2020 12:24, Marek Szyprowski wrote:
>> Add minimal driver AO clocks on meson G12A family. Only ADC related clocks
>> are supported.
>>
>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
>> Change-Id: I0c91848bc55493e19570db333e7da6020d687907
> 
> Please drop the Change-Ids
> 
>> ---
>>  drivers/clk/meson/Makefile  |  1 +
>>  drivers/clk/meson/g12a-ao.c | 83 +++++++++++++++++++++++++++++++++++++
>>  2 files changed, 84 insertions(+)
>>  create mode 100644 drivers/clk/meson/g12a-ao.c
>>
>> diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
>> index c873d6976fa..7204383e173 100644
>> --- a/drivers/clk/meson/Makefile
>> +++ b/drivers/clk/meson/Makefile
>> @@ -6,4 +6,5 @@
>>  obj-$(CONFIG_CLK_MESON_GX) += gxbb.o
>>  obj-$(CONFIG_CLK_MESON_AXG) += axg.o
>>  obj-$(CONFIG_CLK_MESON_G12A) += g12a.o
>> +obj-$(CONFIG_CLK_MESON_G12A) += g12a-ao.o
>>  
>> diff --git a/drivers/clk/meson/g12a-ao.c b/drivers/clk/meson/g12a-ao.c
>> new file mode 100644
>> index 00000000000..7a0abea77c4
>> --- /dev/null
>> +++ b/drivers/clk/meson/g12a-ao.c
>> @@ -0,0 +1,83 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +
>> +#include <common.h>
>> +#include <log.h>
>> +#include <asm/io.h>
>> +#include <clk-uclass.h>
>> +#include <dm.h>
>> +#include <regmap.h>
>> +#include <syscon.h>
>> +#include <dt-bindings/clock/g12a-aoclkc.h>
>> +
>> +#include "clk_meson.h"
>> +
>> +struct meson_clk {
>> +	struct regmap *map;
>> +};
>> +
>> +#define AO_CLK_GATE0		0x4c
>> +#define AO_SAR_CLK		0x90
>> +
>> +static struct meson_gate gates[] = {
>> +	MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 8),
>> +	MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 8),
>> +};
>> +
>> +static int meson_set_gate(struct clk *clk, bool on)
>> +{
>> +	struct meson_clk *priv = dev_get_priv(clk->dev);
>> +	struct meson_gate *gate;
>> +
>> +	if (clk->id >= ARRAY_SIZE(gates))
>> +		return -ENOENT;
>> +
>> +	gate = &gates[clk->id];
>> +
>> +	if (gate->reg == 0)
>> +		return 0;
>> +
>> +	regmap_update_bits(priv->map, gate->reg,
>> +			   BIT(gate->bit), on ? BIT(gate->bit) : 0);
>> +
>> +	return 0;
>> +}
>> +
>> +static int meson_clk_enable(struct clk *clk)
>> +{
>> +	return meson_set_gate(clk, true);
>> +}
>> +
>> +static int meson_clk_disable(struct clk *clk)
>> +{
>> +	return meson_set_gate(clk, false);
>> +}
>> +
>> +static int meson_clk_probe(struct udevice *dev)
>> +{
>> +	struct meson_clk *priv = dev_get_priv(dev);
>> +
>> +	priv->map = syscon_node_to_regmap(dev_get_parent(dev)->node);
>> +	if (IS_ERR(priv->map))
>> +		return PTR_ERR(priv->map);
>> +
>> +	return 0;
>> +}
>> +
>> +static struct clk_ops meson_clk_ops = {
>> +	.disable	= meson_clk_disable,
>> +	.enable		= meson_clk_enable,
>> +};
>> +
>> +static const struct udevice_id meson_clk_ids[] = {
>> +	{ .compatible = "amlogic,meson-g12a-aoclkc" },
>> +	{ }
>> +};
>> +
>> +U_BOOT_DRIVER(meson_clk_axg) = {
>> +	.name		= "meson_clk_g12a_ao",
>> +	.id		= UCLASS_CLK,
>> +	.of_match	= meson_clk_ids,
>> +	.priv_auto_alloc_size = sizeof(struct meson_clk),
>> +	.ops		= &meson_clk_ops,
>> +	.probe		= meson_clk_probe,
>> +};
>>
> 
> very nice, thanks for addition !
> 
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

>